arch/arm/boot/dts/rk3288-phycore-som.dtsi

   1 /*
   2  * Device tree file for Phytec phyCORE-RK3288 SoM
   3  * Copyright (C) 2017 PHYTEC Messtechnik GmbH
   4  * Author: Wadim Egorov <w.egorov@phytec.de>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 #include <dt-bindings/net/ti-dp83867.h>
  46 #include "rk3288.dtsi"
  47
  48 / {
  49         model = "Phytec RK3288 phyCORE";
  50         compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
  51
  52         /*
  53          * Set the minimum memory size here and
  54          * let the bootloader set the real size.
  55          */
  56         memory {
  57                 device_type = "memory";
  58                 reg = <0x0 0x0 0x0 0x8000000>;
  59         };
  60
  61         aliases {
  62                 rtc0 = &i2c_rtc;
  63                 rtc1 = &rk818;
  64         };
  65
  66         ext_gmac: external-gmac-clock {
  67                 compatible = "fixed-clock";
  68                 #clock-cells = <0>;
  69                 clock-frequency = <125000000>;
  70                 clock-output-names = "ext_gmac";
  71         };
  72
  73         leds: user-leds {
  74                 compatible = "gpio-leds";
  75                 pinctrl-names = "default";
  76                 pinctrl-0 = <&user_led>;
  77
  78                 user {
  79                         label = "green_led";
  80                         gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
  81                         linux,default-trigger = "heartbeat";
  82                         default-state = "keep";
  83                 };
  84         };
  85
  86         vdd_emmc_io: vdd-emmc-io {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "vdd_emmc_io";
  89                 regulator-min-microvolt = <1800000>;
  90                 regulator-max-microvolt = <1800000>;
  91                 vin-supply = <&vdd_3v3_io>;
  92         };
  93
  94         vdd_in_otg_out: vdd-in-otg-out {
  95                 compatible = "regulator-fixed";
  96                 regulator-name = "vdd_in_otg_out";
  97                 regulator-always-on;
  98                 regulator-boot-on;
  99                 regulator-min-microvolt = <5000000>;
 100                 regulator-max-microvolt = <5000000>;
 101         };
 102
 103         vdd_misc_1v8: vdd-misc-1v8 {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "vdd_misc_1v8";
 106                 regulator-always-on;
 107                 regulator-boot-on;
 108                 regulator-min-microvolt = <1800000>;
 109                 regulator-max-microvolt = <1800000>;
 110         };
 111 };
 112
 113 &cpu0 {
 114         cpu0-supply = <&vdd_cpu>;
 115         operating-points = <
 116                 /* KHz    uV */
 117                 1800000 1400000
 118                 1608000 1350000
 119                 1512000 1300000
 120                 1416000 1200000
 121                 1200000 1100000
 122                 1008000 1050000
 123                  816000 1000000
 124                  696000  950000
 125                  600000  900000
 126                  408000  900000
 127                  312000  900000
 128                  216000  900000
 129                  126000  900000
 130         >;
 131 };
 132
 133 &emmc {
 134         status = "okay";
 135         bus-width = <8>;
 136         cap-mmc-highspeed;
 137         disable-wp;
 138         non-removable;
 139         pinctrl-names = "default";
 140         pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
 141         vmmc-supply = <&vdd_3v3_io>;
 142         vqmmc-supply = <&vdd_emmc_io>;
 143 };
 144
 145 &gmac {
 146         assigned-clocks = <&cru SCLK_MAC>;
 147         assigned-clock-parents = <&ext_gmac>;
 148         clock_in_out = "input";
 149         pinctrl-names = "default";
 150         pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
 151         phy-handle = <&phy0>;
 152         phy-supply = <&vdd_eth_2v5>;
 153         phy-mode = "rgmii-id";
 154         snps,reset-active-low;
 155         snps,reset-delays-us = <0 10000 1000000>;
 156         snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
 157         tx_delay = <0x0>;
 158         rx_delay = <0x0>;
 159
 160         mdio0 {
 161                 compatible = "snps,dwmac-mdio";
 162                 #address-cells = <1>;
 163                 #size-cells = <0>;
 164
 165                 phy0: ethernet-phy@0 {
 166                         compatible = "ethernet-phy-ieee802.3-c22";
 167                         reg = <0>;
 168                         interrupt-parent = <&gpio4>;
 169                         interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
 170                         ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 171                         ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 172                         ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 173                         enet-phy-lane-no-swap;
 174                 };
 175         };
 176 };
 177
 178 &hdmi {
 179         ddc-i2c-bus = <&i2c5>;
 180 };
 181
 182 &io_domains {
 183         status = "okay";
 184         sdcard-supply = <&vdd_io_sd>;
 185         flash0-supply = <&vdd_emmc_io>;
 186         flash1-supply = <&vdd_misc_1v8>;
 187         gpio1830-supply = <&vdd_3v3_io>;
 188         gpio30-supply = <&vdd_3v3_io>;
 189         bb-supply = <&vdd_3v3_io>;
 190         dvp-supply = <&vdd_3v3_io>;
 191         lcdc-supply = <&vdd_3v3_io>;
 192         wifi-supply = <&vdd_3v3_io>;
 193         audio-supply = <&vdd_3v3_io>;
 194 };
 195
 196 &i2c0 {
 197         status = "okay";
 198         clock-frequency = <400000>;
 199
 200         rk818: pmic@1c {
 201                 compatible = "rockchip,rk818";
 202                 reg = <0x1c>;
 203                 interrupt-parent = <&gpio0>;
 204                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 205                 pinctrl-names = "default";
 206                 pinctrl-0 = <&pmic_int>;
 207                 rockchip,system-power-controller;
 208                 wakeup-source;
 209                 #clock-cells = <1>;
 210
 211                 vcc1-supply = <&vdd_sys>;
 212                 vcc2-supply = <&vdd_sys>;
 213                 vcc3-supply = <&vdd_sys>;
 214                 vcc4-supply = <&vdd_sys>;
 215                 boost-supply = <&vdd_in_otg_out>;
 216                 vcc6-supply = <&vdd_sys>;
 217                 vcc7-supply = <&vdd_misc_1v8>;
 218                 vcc8-supply = <&vdd_misc_1v8>;
 219                 vcc9-supply = <&vdd_3v3_io>;
 220                 vddio-supply = <&vdd_3v3_io>;
 221
 222                 regulators {
 223                         vdd_log: DCDC_REG1 {
 224                                 regulator-name = "vdd_log";
 225                                 regulator-always-on;
 226                                 regulator-boot-on;
 227                                 regulator-min-microvolt = <1100000>;
 228                                 regulator-max-microvolt = <1100000>;
 229                                 regulator-state-mem {
 230                                         regulator-off-in-suspend;
 231                                 };
 232                         };
 233
 234                         vdd_gpu: DCDC_REG2 {
 235                                 regulator-name = "vdd_gpu";
 236                                 regulator-always-on;
 237                                 regulator-boot-on;
 238                                 regulator-min-microvolt = <800000>;
 239                                 regulator-max-microvolt = <1250000>;
 240                                 regulator-state-mem {
 241                                         regulator-on-in-suspend;
 242                                         regulator-suspend-microvolt = <1000000>;
 243                                 };
 244                         };
 245
 246                         vcc_ddr: DCDC_REG3 {
 247                                 regulator-name = "vcc_ddr";
 248                                 regulator-always-on;
 249                                 regulator-boot-on;
 250                                 regulator-state-mem {
 251                                         regulator-on-in-suspend;
 252                                 };
 253                         };
 254
 255                         vdd_3v3_io: DCDC_REG4 {
 256                                 regulator-name = "vdd_3v3_io";
 257                                 regulator-always-on;
 258                                 regulator-boot-on;
 259                                 regulator-min-microvolt = <3300000>;
 260                                 regulator-max-microvolt = <3300000>;
 261                                 regulator-state-mem {
 262                                         regulator-on-in-suspend;
 263                                         regulator-suspend-microvolt = <3300000>;
 264                                 };
 265                         };
 266
 267                         vdd_sys: DCDC_BOOST {
 268                                 regulator-name = "vdd_sys";
 269                                 regulator-always-on;
 270                                 regulator-boot-on;
 271                                 regulator-min-microvolt = <5000000>;
 272                                 regulator-max-microvolt = <5000000>;
 273                                 regulator-state-mem {
 274                                         regulator-on-in-suspend;
 275                                         regulator-suspend-microvolt = <5000000>;
 276                                 };
 277                         };
 278
 279                         /* vcc9 */
 280                         vdd_sd: SWITCH_REG {
 281                                 regulator-name = "vdd_sd";
 282                                 regulator-always-on;
 283                                 regulator-boot-on;
 284                                 regulator-state-mem {
 285                                         regulator-off-in-suspend;
 286                                 };
 287                         };
 288
 289                         /* vcc6 */
 290                         vdd_eth_2v5: LDO_REG2 {
 291                                 regulator-name = "vdd_eth_2v5";
 292                                 regulator-always-on;
 293                                 regulator-boot-on;
 294                                 regulator-min-microvolt = <2500000>;
 295                                 regulator-max-microvolt = <2500000>;
 296                                 regulator-state-mem {
 297                                         regulator-on-in-suspend;
 298                                         regulator-suspend-microvolt = <2500000>;
 299                                 };
 300                         };
 301
 302                         /* vcc7 */
 303                         vdd_1v0: LDO_REG3 {
 304                                 regulator-name = "vdd_1v0";
 305                                 regulator-always-on;
 306                                 regulator-boot-on;
 307                                 regulator-min-microvolt = <1000000>;
 308                                 regulator-max-microvolt = <1000000>;
 309                                 regulator-state-mem {
 310                                         regulator-on-in-suspend;
 311                                         regulator-suspend-microvolt = <1000000>;
 312                                 };
 313                         };
 314
 315                         /* vcc8 */
 316                         vdd_1v8_lcd_ldo: LDO_REG4 {
 317                                 regulator-name = "vdd_1v8_lcd_ldo";
 318                                 regulator-always-on;
 319                                 regulator-boot-on;
 320                                 regulator-min-microvolt = <1800000>;
 321                                 regulator-max-microvolt = <1800000>;
 322                                 regulator-state-mem {
 323                                         regulator-on-in-suspend;
 324                                         regulator-suspend-microvolt = <1800000>;
 325                                 };
 326                         };
 327
 328                         /* vcc8 */
 329                         vdd_1v0_lcd: LDO_REG6 {
 330                                 regulator-name = "vdd_1v0_lcd";
 331                                 regulator-always-on;
 332                                 regulator-boot-on;
 333                                 regulator-min-microvolt = <1000000>;
 334                                 regulator-max-microvolt = <1000000>;
 335                                 regulator-state-mem {
 336                                         regulator-on-in-suspend;
 337                                         regulator-suspend-microvolt = <1000000>;
 338                                 };
 339                         };
 340
 341                         /* vcc7 */
 342                         vdd_1v8_ldo: LDO_REG7 {
 343                                 regulator-name = "vdd_1v8_ldo";
 344                                 regulator-always-on;
 345                                 regulator-boot-on;
 346                                 regulator-min-microvolt = <1800000>;
 347                                 regulator-max-microvolt = <1800000>;
 348                                 regulator-state-mem {
 349                                         regulator-off-in-suspend;
 350                                         regulator-suspend-microvolt = <1800000>;
 351                                 };
 352                         };
 353
 354                         /* vcc9 */
 355                         vdd_io_sd: LDO_REG9 {
 356                                 regulator-name = "vdd_io_sd";
 357                                 regulator-always-on;
 358                                 regulator-boot-on;
 359                                 regulator-min-microvolt = <3300000>;
 360                                 regulator-max-microvolt = <3300000>;
 361                                 regulator-state-mem {
 362                                         regulator-on-in-suspend;
 363                                         regulator-suspend-microvolt = <3300000>;
 364                                 };
 365                         };
 366                 };
 367         };
 368
 369         /* M24C32-D */
 370         i2c_eeprom: eeprom@50 {
 371                 compatible = "atmel,24c32";
 372                 reg = <0x50>;
 373                 pagesize = <32>;
 374         };
 375
 376         vdd_cpu: regulator@60 {
 377                 compatible = "fcs,fan53555";
 378                 reg = <0x60>;
 379                 fcs,suspend-voltage-selector = <1>;
 380                 regulator-always-on;
 381                 regulator-boot-on;
 382                 regulator-enable-ramp-delay = <300>;
 383                 regulator-name = "vdd_cpu";
 384                 regulator-min-microvolt = <800000>;
 385                 regulator-max-microvolt = <1430000>;
 386                 regulator-ramp-delay = <8000>;
 387                 vin-supply = <&vdd_sys>;
 388         };
 389 };
 390
 391 &pinctrl {
 392         pcfg_output_high: pcfg-output-high {
 393                 output-high;
 394         };
 395
 396         emmc {
 397                 /*
 398                  * We run eMMC at max speed; bump up drive strength.
 399                  * We also have external pulls, so disable the internal ones.
 400                  */
 401                 emmc_clk: emmc-clk {
 402                         rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
 403                 };
 404
 405                 emmc_cmd: emmc-cmd {
 406                         rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
 407                 };
 408
 409                 emmc_bus8: emmc-bus8 {
 410                         rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
 411                                         <3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
 412                                         <3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
 413                                         <3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
 414                                         <3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
 415                                         <3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
 416                                         <3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
 417                                         <3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
 418                 };
 419         };
 420
 421         gmac {
 422                 phy_int: phy-int {
 423                         rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
 424                 };
 425
 426                 phy_rst: phy-rst {
 427                         rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
 428                 };
 429         };
 430
 431         leds {
 432                 user_led: user-led {
 433                         rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
 434                 };
 435         };
 436
 437         pmic {
 438                 pmic_int: pmic-int {
 439                         rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
 440                 };
 441
 442                 /* Pin for switching state between sleep and non-sleep state */
 443                 pmic_sleep: pmic-sleep {
 444                         rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
 445                 };
 446         };
 447 };
 448
 449 &pwm1 {
 450         status = "okay";
 451 };
 452
 453 &saradc {
 454         status = "okay";
 455         vref-supply = <&vdd_1v8_ldo>;
 456 };
 457
 458 &spi2 {
 459         status = "okay";
 460
 461         serial_flash: flash@0 {
 462                 compatible = "micron,n25q128a13", "jedec,spi-nor";
 463                 reg = <0x0>;
 464                 spi-max-frequency = <50000000>;
 465                 m25p,fast-read;
 466                 #address-cells = <1>;
 467                 #size-cells = <1>;
 468                 status = "okay";
 469         };
 470 };
 471
 472 &tsadc {
 473         status = "okay";
 474         rockchip,hw-tshut-mode = <0>;
 475         rockchip,hw-tshut-polarity = <0>;
 476 };
 477
 478 &vopb {
 479         status = "okay";
 480 };
 481
 482 &vopb_mmu {
 483         status = "okay";
 484 };
 485
 486 &vopl {
 487         status = "okay";
 488 };
 489
 490 &vopl_mmu {
 491         status = "okay";
 492 };
 493
 494 &wdt {
 495         status = "okay";
 496 };