arch/arm/boot/dts/rk3288-phycore-som.dtsi

   1 /*
   2  * Device tree file for Phytec phyCORE-RK3288 SoM
   3  * Copyright (C) 2017 PHYTEC Messtechnik GmbH
   4  * Author: Wadim Egorov <w.egorov@phytec.de>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 #include <dt-bindings/net/ti-dp83867.h>
  46 #include "rk3288.dtsi"
  47
  48 / {
  49         model = "Phytec RK3288 phyCORE";
  50         compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
  51
  52         /*
  53          * Set the minimum memory size here and
  54          * let the bootloader set the real size.
  55          */
  56         memory {
  57                 device_type = "memory";
  58                 reg = <0 0x8000000>;
  59         };
  60
  61         aliases {
  62                 rtc0 = &i2c_rtc;
  63                 rtc1 = &rk818;
  64         };
  65
  66         ext_gmac: external-gmac-clock {
  67                 compatible = "fixed-clock";
  68                 #clock-cells = <0>;
  69                 clock-frequency = <125000000>;
  70                 clock-output-names = "ext_gmac";
  71         };
  72
  73         leds: user-leds {
  74                 compatible = "gpio-leds";
  75                 pinctrl-names = "default";
  76                 pinctrl-0 = <&user_led>;
  77
  78                 user {
  79                         label = "green_led";
  80                         gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
  81                         linux,default-trigger = "heartbeat";
  82                         default-state = "keep";
  83                 };
  84         };
  85
  86         vdd_emmc_io: vdd-emmc-io {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "vdd_emmc_io";
  89                 regulator-min-microvolt = <1800000>;
  90                 regulator-max-microvolt = <1800000>;
  91                 vin-supply = <&vdd_3v3_io>;
  92         };
  93
  94         vdd_in_otg_out: vdd-in-otg-out {
  95                 compatible = "regulator-fixed";
  96                 regulator-name = "vdd_in_otg_out";
  97                 regulator-always-on;
  98                 regulator-boot-on;
  99                 regulator-min-microvolt = <5000000>;
 100                 regulator-max-microvolt = <5000000>;
 101         };
 102
 103         vdd_misc_1v8: vdd-misc-1v8 {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "vdd_misc_1v8";
 106                 regulator-always-on;
 107                 regulator-boot-on;
 108                 regulator-min-microvolt = <1800000>;
 109                 regulator-max-microvolt = <1800000>;
 110         };
 111 };
 112
 113 &cpu0 {
 114         cpu0-supply = <&vdd_cpu>;
 115         operating-points = <
 116                 /* KHz    uV */
 117                 1800000 1400000
 118                 1608000 1350000
 119                 1512000 1300000
 120                 1416000 1200000
 121                 1200000 1100000
 122                 1008000 1050000
 123                  816000 1000000
 124                  696000  950000
 125                  600000  900000
 126                  408000  900000
 127                  312000  900000
 128                  216000  900000
 129                  126000  900000
 130         >;
 131 };
 132
 133 &emmc {
 134         status = "okay";
 135         bus-width = <8>;
 136         cap-mmc-highspeed;
 137         disable-wp;
 138         non-removable;
 139         num-slots = <1>;
 140         pinctrl-names = "default";
 141         pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
 142         vmmc-supply = <&vdd_3v3_io>;
 143         vqmmc-supply = <&vdd_emmc_io>;
 144 };
 145
 146 &gmac {
 147         assigned-clocks = <&cru SCLK_MAC>;
 148         assigned-clock-parents = <&ext_gmac>;
 149         clock_in_out = "input";
 150         pinctrl-names = "default";
 151         pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
 152         phy-handle = <&phy0>;
 153         phy-supply = <&vdd_eth_2v5>;
 154         phy-mode = "rgmii-id";
 155         snps,reset-active-low;
 156         snps,reset-delays-us = <0 10000 1000000>;
 157         snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
 158         tx_delay = <0x0>;
 159         rx_delay = <0x0>;
 160
 161         mdio0 {
 162                 compatible = "snps,dwmac-mdio";
 163                 #address-cells = <1>;
 164                 #size-cells = <0>;
 165
 166                 phy0: ethernet-phy@0 {
 167                         compatible = "ethernet-phy-ieee802.3-c22";
 168                         reg = <0>;
 169                         interrupt-parent = <&gpio4>;
 170                         interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
 171                         ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 172                         ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 173                         ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 174                         enet-phy-lane-no-swap;
 175                 };
 176         };
 177 };
 178
 179 &hdmi {
 180         ddc-i2c-bus = <&i2c5>;
 181 };
 182
 183 &io_domains {
 184         status = "okay";
 185         sdcard-supply = <&vdd_io_sd>;
 186         flash0-supply = <&vdd_emmc_io>;
 187         flash1-supply = <&vdd_misc_1v8>;
 188         gpio1830-supply = <&vdd_3v3_io>;
 189         gpio30-supply = <&vdd_3v3_io>;
 190         bb-supply = <&vdd_3v3_io>;
 191         dvp-supply = <&vdd_3v3_io>;
 192         lcdc-supply = <&vdd_3v3_io>;
 193         wifi-supply = <&vdd_3v3_io>;
 194         audio-supply = <&vdd_3v3_io>;
 195 };
 196
 197 &i2c0 {
 198         status = "okay";
 199         clock-frequency = <400000>;
 200
 201         rk818: pmic@1c {
 202                 compatible = "rockchip,rk818";
 203                 reg = <0x1c>;
 204                 interrupt-parent = <&gpio0>;
 205                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 206                 pinctrl-names = "default";
 207                 pinctrl-0 = <&pmic_int>;
 208                 rockchip,system-power-controller;
 209                 wakeup-source;
 210                 #clock-cells = <1>;
 211
 212                 vcc1-supply = <&vdd_sys>;
 213                 vcc2-supply = <&vdd_sys>;
 214                 vcc3-supply = <&vdd_sys>;
 215                 vcc4-supply = <&vdd_sys>;
 216                 boost-supply = <&vdd_in_otg_out>;
 217                 vcc6-supply = <&vdd_sys>;
 218                 vcc7-supply = <&vdd_misc_1v8>;
 219                 vcc8-supply = <&vdd_misc_1v8>;
 220                 vcc9-supply = <&vdd_3v3_io>;
 221                 vddio-supply = <&vdd_3v3_io>;
 222
 223                 regulators {
 224                         vdd_log: DCDC_REG1 {
 225                                 regulator-name = "vdd_log";
 226                                 regulator-always-on;
 227                                 regulator-boot-on;
 228                                 regulator-min-microvolt = <1100000>;
 229                                 regulator-max-microvolt = <1100000>;
 230                                 regulator-state-mem {
 231                                         regulator-off-in-suspend;
 232                                 };
 233                         };
 234
 235                         vdd_gpu: DCDC_REG2 {
 236                                 regulator-name = "vdd_gpu";
 237                                 regulator-always-on;
 238                                 regulator-boot-on;
 239                                 regulator-min-microvolt = <800000>;
 240                                 regulator-max-microvolt = <1250000>;
 241                                 regulator-state-mem {
 242                                         regulator-on-in-suspend;
 243                                         regulator-suspend-microvolt = <1000000>;
 244                                 };
 245                         };
 246
 247                         vcc_ddr: DCDC_REG3 {
 248                                 regulator-name = "vcc_ddr";
 249                                 regulator-always-on;
 250                                 regulator-boot-on;
 251                                 regulator-state-mem {
 252                                         regulator-on-in-suspend;
 253                                 };
 254                         };
 255
 256                         vdd_3v3_io: DCDC_REG4 {
 257                                 regulator-name = "vdd_3v3_io";
 258                                 regulator-always-on;
 259                                 regulator-boot-on;
 260                                 regulator-min-microvolt = <3300000>;
 261                                 regulator-max-microvolt = <3300000>;
 262                                 regulator-state-mem {
 263                                         regulator-on-in-suspend;
 264                                         regulator-suspend-microvolt = <3300000>;
 265                                 };
 266                         };
 267
 268                         vdd_sys: DCDC_BOOST {
 269                                 regulator-name = "vdd_sys";
 270                                 regulator-always-on;
 271                                 regulator-boot-on;
 272                                 regulator-min-microvolt = <5000000>;
 273                                 regulator-max-microvolt = <5000000>;
 274                                 regulator-state-mem {
 275                                         regulator-on-in-suspend;
 276                                         regulator-suspend-microvolt = <5000000>;
 277                                 };
 278                         };
 279
 280                         /* vcc9 */
 281                         vdd_sd: SWITCH_REG {
 282                                 regulator-name = "vdd_sd";
 283                                 regulator-always-on;
 284                                 regulator-boot-on;
 285                                 regulator-state-mem {
 286                                         regulator-off-in-suspend;
 287                                 };
 288                         };
 289
 290                         /* vcc6 */
 291                         vdd_eth_2v5: LDO_REG2 {
 292                                 regulator-name = "vdd_eth_2v5";
 293                                 regulator-always-on;
 294                                 regulator-boot-on;
 295                                 regulator-min-microvolt = <2500000>;
 296                                 regulator-max-microvolt = <2500000>;
 297                                 regulator-state-mem {
 298                                         regulator-on-in-suspend;
 299                                         regulator-suspend-microvolt = <2500000>;
 300                                 };
 301                         };
 302
 303                         /* vcc7 */
 304                         vdd_1v0: LDO_REG3 {
 305                                 regulator-name = "vdd_1v0";
 306                                 regulator-always-on;
 307                                 regulator-boot-on;
 308                                 regulator-min-microvolt = <1000000>;
 309                                 regulator-max-microvolt = <1000000>;
 310                                 regulator-state-mem {
 311                                         regulator-on-in-suspend;
 312                                         regulator-suspend-microvolt = <1000000>;
 313                                 };
 314                         };
 315
 316                         /* vcc8 */
 317                         vdd_1v8_lcd_ldo: LDO_REG4 {
 318                                 regulator-name = "vdd_1v8_lcd_ldo";
 319                                 regulator-always-on;
 320                                 regulator-boot-on;
 321                                 regulator-min-microvolt = <1800000>;
 322                                 regulator-max-microvolt = <1800000>;
 323                                 regulator-state-mem {
 324                                         regulator-on-in-suspend;
 325                                         regulator-suspend-microvolt = <1800000>;
 326                                 };
 327                         };
 328
 329                         /* vcc8 */
 330                         vdd_1v0_lcd: LDO_REG6 {
 331                                 regulator-name = "vdd_1v0_lcd";
 332                                 regulator-always-on;
 333                                 regulator-boot-on;
 334                                 regulator-min-microvolt = <1000000>;
 335                                 regulator-max-microvolt = <1000000>;
 336                                 regulator-state-mem {
 337                                         regulator-on-in-suspend;
 338                                         regulator-suspend-microvolt = <1000000>;
 339                                 };
 340                         };
 341
 342                         /* vcc7 */
 343                         vdd_1v8_ldo: LDO_REG7 {
 344                                 regulator-name = "vdd_1v8_ldo";
 345                                 regulator-always-on;
 346                                 regulator-boot-on;
 347                                 regulator-min-microvolt = <1800000>;
 348                                 regulator-max-microvolt = <1800000>;
 349                                 regulator-state-mem {
 350                                         regulator-off-in-suspend;
 351                                         regulator-suspend-microvolt = <1800000>;
 352                                 };
 353                         };
 354
 355                         /* vcc9 */
 356                         vdd_io_sd: LDO_REG9 {
 357                                 regulator-name = "vdd_io_sd";
 358                                 regulator-always-on;
 359                                 regulator-boot-on;
 360                                 regulator-min-microvolt = <3300000>;
 361                                 regulator-max-microvolt = <3300000>;
 362                                 regulator-state-mem {
 363                                         regulator-on-in-suspend;
 364                                         regulator-suspend-microvolt = <3300000>;
 365                                 };
 366                         };
 367                 };
 368         };
 369
 370         /* M24C32-D */
 371         i2c_eeprom: eeprom@50 {
 372                 compatible = "atmel,24c32";
 373                 reg = <0x50>;
 374                 pagesize = <32>;
 375         };
 376
 377         vdd_cpu: regulator@60 {
 378                 compatible = "fcs,fan53555";
 379                 reg = <0x60>;
 380                 fcs,suspend-voltage-selector = <1>;
 381                 regulator-always-on;
 382                 regulator-boot-on;
 383                 regulator-enable-ramp-delay = <300>;
 384                 regulator-name = "vdd_cpu";
 385                 regulator-min-microvolt = <800000>;
 386                 regulator-max-microvolt = <1430000>;
 387                 regulator-ramp-delay = <8000>;
 388                 vin-supply = <&vdd_sys>;
 389         };
 390 };
 391
 392 &pinctrl {
 393         pcfg_output_high: pcfg-output-high {
 394                 output-high;
 395         };
 396
 397         emmc {
 398                 /*
 399                  * We run eMMC at max speed; bump up drive strength.
 400                  * We also have external pulls, so disable the internal ones.
 401                  */
 402                 emmc_clk: emmc-clk {
 403                         rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
 404                 };
 405
 406                 emmc_cmd: emmc-cmd {
 407                         rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
 408                 };
 409
 410                 emmc_bus8: emmc-bus8 {
 411                         rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
 412                                         <3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
 413                                         <3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
 414                                         <3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
 415                                         <3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
 416                                         <3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
 417                                         <3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
 418                                         <3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
 419                 };
 420         };
 421
 422         gmac {
 423                 phy_int: phy-int {
 424                         rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
 425                 };
 426
 427                 phy_rst: phy-rst {
 428                         rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
 429                 };
 430         };
 431
 432         leds {
 433                 user_led: user-led {
 434                         rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
 435                 };
 436         };
 437
 438         pmic {
 439                 pmic_int: pmic-int {
 440                         rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
 441                 };
 442
 443                 /* Pin for switching state between sleep and non-sleep state */
 444                 pmic_sleep: pmic-sleep {
 445                         rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
 446                 };
 447         };
 448 };
 449
 450 &pwm1 {
 451         status = "okay";
 452 };
 453
 454 &saradc {
 455         status = "okay";
 456         vref-supply = <&vdd_1v8_ldo>;
 457 };
 458
 459 &spi2 {
 460         status = "okay";
 461
 462         serial_flash: flash@0 {
 463                 compatible = "micron,n25q128a13", "jedec,spi-nor";
 464                 reg = <0x0>;
 465                 spi-max-frequency = <50000000>;
 466                 m25p,fast-read;
 467                 #address-cells = <1>;
 468                 #size-cells = <1>;
 469                 status = "okay";
 470         };
 471 };
 472
 473 &tsadc {
 474         status = "okay";
 475         rockchip,hw-tshut-mode = <0>;
 476         rockchip,hw-tshut-polarity = <0>;
 477 };
 478
 479 &vopb {
 480         status = "okay";
 481 };
 482
 483 &vopb_mmu {
 484         status = "okay";
 485 };
 486
 487 &vopl {
 488         status = "okay";
 489 };
 490
 491 &vopl_mmu {
 492         status = "okay";
 493 };
 494
 495 &wdt {
 496         status = "okay";
 497 };