arch/arm/boot/dts/r8a7793.dtsi

   1 /*
   2  * Device Tree Source for the r8a7793 SoC
   3  *
   4  * Copyright (C) 2014-2015 Renesas Electronics Corporation
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/power/r8a7793-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7793";
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 i2c3 = &i2c3;
  26                 i2c4 = &i2c4;
  27                 i2c5 = &i2c5;
  28                 i2c6 = &i2c6;
  29                 i2c7 = &i2c7;
  30                 i2c8 = &i2c8;
  31                 spi0 = &qspi;
  32         };
  33
  34         /*
  35          * The external audio clocks are configured as 0 Hz fixed frequency
  36          * clocks by default.
  37          * Boards that provide audio clocks should override them.
  38          */
  39         audio_clk_a: audio_clk_a {
  40                 compatible = "fixed-clock";
  41                 #clock-cells = <0>;
  42                 clock-frequency = <0>;
  43         };
  44         audio_clk_b: audio_clk_b {
  45                 compatible = "fixed-clock";
  46                 #clock-cells = <0>;
  47                 clock-frequency = <0>;
  48         };
  49         audio_clk_c: audio_clk_c {
  50                 compatible = "fixed-clock";
  51                 #clock-cells = <0>;
  52                 clock-frequency = <0>;
  53         };
  54
  55         /* External CAN clock */
  56         can_clk: can {
  57                 compatible = "fixed-clock";
  58                 #clock-cells = <0>;
  59                 /* This value must be overridden by the board. */
  60                 clock-frequency = <0>;
  61         };
  62
  63         cpus {
  64                 #address-cells = <1>;
  65                 #size-cells = <0>;
  66                 enable-method = "renesas,apmu";
  67
  68                 cpu0: cpu@0 {
  69                         device_type = "cpu";
  70                         compatible = "arm,cortex-a15";
  71                         reg = <0>;
  72                         clock-frequency = <1500000000>;
  73                         voltage-tolerance = <1>; /* 1% */
  74                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  75                         clock-latency = <300000>; /* 300 us */
  76                         power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
  77
  78                         /* kHz - uV - OPPs unknown yet */
  79                         operating-points = <1500000 1000000>,
  80                                            <1312500 1000000>,
  81                                            <1125000 1000000>,
  82                                            < 937500 1000000>,
  83                                            < 750000 1000000>,
  84                                            < 375000 1000000>;
  85                         next-level-cache = <&L2_CA15>;
  86                 };
  87
  88                 cpu1: cpu@1 {
  89                         device_type = "cpu";
  90                         compatible = "arm,cortex-a15";
  91                         reg = <1>;
  92                         clock-frequency = <1500000000>;
  93                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  94                         power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
  95                 };
  96
  97                 L2_CA15: cache-controller-0 {
  98                         compatible = "cache";
  99                         power-domains = <&sysc R8A7793_PD_CA15_SCU>;
 100                         cache-unified;
 101                         cache-level = <2>;
 102                 };
 103         };
 104
 105         /* External root clock */
 106         extal_clk: extal {
 107                 compatible = "fixed-clock";
 108                 #clock-cells = <0>;
 109                 /* This value must be overridden by the board. */
 110                 clock-frequency = <0>;
 111         };
 112
 113         /* External SCIF clock */
 114         scif_clk: scif {
 115                 compatible = "fixed-clock";
 116                 #clock-cells = <0>;
 117                 /* This value must be overridden by the board. */
 118                 clock-frequency = <0>;
 119         };
 120
 121         soc {
 122                 compatible = "simple-bus";
 123                 interrupt-parent = <&gic>;
 124
 125                 #address-cells = <2>;
 126                 #size-cells = <2>;
 127                 ranges;
 128
 129                 gpio0: gpio@e6050000 {
 130                         compatible = "renesas,gpio-r8a7793",
 131                                      "renesas,rcar-gen2-gpio";
 132                         reg = <0 0xe6050000 0 0x50>;
 133                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 134                         #gpio-cells = <2>;
 135                         gpio-controller;
 136                         gpio-ranges = <&pfc 0 0 32>;
 137                         #interrupt-cells = <2>;
 138                         interrupt-controller;
 139                         clocks = <&cpg CPG_MOD 912>;
 140                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 141                         resets = <&cpg 912>;
 142                 };
 143
 144                 gpio1: gpio@e6051000 {
 145                         compatible = "renesas,gpio-r8a7793",
 146                                      "renesas,rcar-gen2-gpio";
 147                         reg = <0 0xe6051000 0 0x50>;
 148                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 149                         #gpio-cells = <2>;
 150                         gpio-controller;
 151                         gpio-ranges = <&pfc 0 32 26>;
 152                         #interrupt-cells = <2>;
 153                         interrupt-controller;
 154                         clocks = <&cpg CPG_MOD 911>;
 155                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 156                         resets = <&cpg 911>;
 157                 };
 158
 159                 gpio2: gpio@e6052000 {
 160                         compatible = "renesas,gpio-r8a7793",
 161                                      "renesas,rcar-gen2-gpio";
 162                         reg = <0 0xe6052000 0 0x50>;
 163                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 164                         #gpio-cells = <2>;
 165                         gpio-controller;
 166                         gpio-ranges = <&pfc 0 64 32>;
 167                         #interrupt-cells = <2>;
 168                         interrupt-controller;
 169                         clocks = <&cpg CPG_MOD 910>;
 170                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 171                         resets = <&cpg 910>;
 172                 };
 173
 174                 gpio3: gpio@e6053000 {
 175                         compatible = "renesas,gpio-r8a7793",
 176                                      "renesas,rcar-gen2-gpio";
 177                         reg = <0 0xe6053000 0 0x50>;
 178                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 179                         #gpio-cells = <2>;
 180                         gpio-controller;
 181                         gpio-ranges = <&pfc 0 96 32>;
 182                         #interrupt-cells = <2>;
 183                         interrupt-controller;
 184                         clocks = <&cpg CPG_MOD 909>;
 185                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 186                         resets = <&cpg 909>;
 187                 };
 188
 189                 gpio4: gpio@e6054000 {
 190                         compatible = "renesas,gpio-r8a7793",
 191                                      "renesas,rcar-gen2-gpio";
 192                         reg = <0 0xe6054000 0 0x50>;
 193                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 194                         #gpio-cells = <2>;
 195                         gpio-controller;
 196                         gpio-ranges = <&pfc 0 128 32>;
 197                         #interrupt-cells = <2>;
 198                         interrupt-controller;
 199                         clocks = <&cpg CPG_MOD 908>;
 200                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 201                         resets = <&cpg 908>;
 202                 };
 203
 204                 gpio5: gpio@e6055000 {
 205                         compatible = "renesas,gpio-r8a7793",
 206                                      "renesas,rcar-gen2-gpio";
 207                         reg = <0 0xe6055000 0 0x50>;
 208                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 209                         #gpio-cells = <2>;
 210                         gpio-controller;
 211                         gpio-ranges = <&pfc 0 160 32>;
 212                         #interrupt-cells = <2>;
 213                         interrupt-controller;
 214                         clocks = <&cpg CPG_MOD 907>;
 215                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 216                         resets = <&cpg 907>;
 217                 };
 218
 219                 gpio6: gpio@e6055400 {
 220                         compatible = "renesas,gpio-r8a7793",
 221                                      "renesas,rcar-gen2-gpio";
 222                         reg = <0 0xe6055400 0 0x50>;
 223                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 224                         #gpio-cells = <2>;
 225                         gpio-controller;
 226                         gpio-ranges = <&pfc 0 192 32>;
 227                         #interrupt-cells = <2>;
 228                         interrupt-controller;
 229                         clocks = <&cpg CPG_MOD 905>;
 230                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 231                         resets = <&cpg 905>;
 232                 };
 233
 234                 gpio7: gpio@e6055800 {
 235                         compatible = "renesas,gpio-r8a7793",
 236                                      "renesas,rcar-gen2-gpio";
 237                         reg = <0 0xe6055800 0 0x50>;
 238                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 239                         #gpio-cells = <2>;
 240                         gpio-controller;
 241                         gpio-ranges = <&pfc 0 224 26>;
 242                         #interrupt-cells = <2>;
 243                         interrupt-controller;
 244                         clocks = <&cpg CPG_MOD 904>;
 245                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 246                         resets = <&cpg 904>;
 247                 };
 248
 249                 pfc: pin-controller@e6060000 {
 250                         compatible = "renesas,pfc-r8a7793";
 251                         reg = <0 0xe6060000 0 0x250>;
 252                 };
 253
 254                 /* Special CPG clocks */
 255                 cpg: clock-controller@e6150000 {
 256                         compatible = "renesas,r8a7793-cpg-mssr";
 257                         reg = <0 0xe6150000 0 0x1000>;
 258                         clocks = <&extal_clk>, <&usb_extal_clk>;
 259                         clock-names = "extal", "usb_extal";
 260                         #clock-cells = <2>;
 261                         #power-domain-cells = <0>;
 262                         #reset-cells = <1>;
 263                 };
 264
 265                 apmu@e6152000 {
 266                         compatible = "renesas,r8a7793-apmu", "renesas,apmu";
 267                         reg = <0 0xe6152000 0 0x188>;
 268                         cpus = <&cpu0 &cpu1>;
 269                 };
 270
 271                 rst: reset-controller@e6160000 {
 272                         compatible = "renesas,r8a7793-rst";
 273                         reg = <0 0xe6160000 0 0x0100>;
 274                 };
 275
 276                 sysc: system-controller@e6180000 {
 277                         compatible = "renesas,r8a7793-sysc";
 278                         reg = <0 0xe6180000 0 0x0200>;
 279                         #power-domain-cells = <1>;
 280                 };
 281
 282                 irqc0: interrupt-controller@e61c0000 {
 283                         compatible = "renesas,irqc-r8a7793", "renesas,irqc";
 284                         #interrupt-cells = <2>;
 285                         interrupt-controller;
 286                         reg = <0 0xe61c0000 0 0x200>;
 287                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 288                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 289                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 290                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 291                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 292                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 293                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 294                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 295                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 296                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 297                         clocks = <&cpg CPG_MOD 407>;
 298                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 299                         resets = <&cpg 407>;
 300                 };
 301
 302                 thermal: thermal@e61f0000 {
 303                         compatible = "renesas,thermal-r8a7793",
 304                                      "renesas,rcar-gen2-thermal",
 305                                      "renesas,rcar-thermal";
 306                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
 307                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 308                         clocks = <&cpg CPG_MOD 522>;
 309                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 310                         resets = <&cpg 522>;
 311                         #thermal-sensor-cells = <0>;
 312                 };
 313
 314                 ipmmu_sy0: mmu@e6280000 {
 315                         compatible = "renesas,ipmmu-r8a7793",
 316                                      "renesas,ipmmu-vmsa";
 317                         reg = <0 0xe6280000 0 0x1000>;
 318                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
 319                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 320                         #iommu-cells = <1>;
 321                         status = "disabled";
 322                 };
 323
 324                 ipmmu_sy1: mmu@e6290000 {
 325                         compatible = "renesas,ipmmu-r8a7793",
 326                                      "renesas,ipmmu-vmsa";
 327                         reg = <0 0xe6290000 0 0x1000>;
 328                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 329                         #iommu-cells = <1>;
 330                         status = "disabled";
 331                 };
 332
 333                 ipmmu_ds: mmu@e6740000 {
 334                         compatible = "renesas,ipmmu-r8a7793",
 335                                      "renesas,ipmmu-vmsa";
 336                         reg = <0 0xe6740000 0 0x1000>;
 337                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
 338                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
 339                         #iommu-cells = <1>;
 340                         status = "disabled";
 341                 };
 342
 343                 ipmmu_mp: mmu@ec680000 {
 344                         compatible = "renesas,ipmmu-r8a7793",
 345                                      "renesas,ipmmu-vmsa";
 346                         reg = <0 0xec680000 0 0x1000>;
 347                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 348                         #iommu-cells = <1>;
 349                         status = "disabled";
 350                 };
 351
 352                 ipmmu_mx: mmu@fe951000 {
 353                         compatible = "renesas,ipmmu-r8a7793",
 354                                      "renesas,ipmmu-vmsa";
 355                         reg = <0 0xfe951000 0 0x1000>;
 356                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
 357                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 358                         #iommu-cells = <1>;
 359                         status = "disabled";
 360                 };
 361
 362                 ipmmu_rt: mmu@ffc80000 {
 363                         compatible = "renesas,ipmmu-r8a7793",
 364                                      "renesas,ipmmu-vmsa";
 365                         reg = <0 0xffc80000 0 0x1000>;
 366                         interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
 367                         #iommu-cells = <1>;
 368                         status = "disabled";
 369                 };
 370
 371                 ipmmu_gp: mmu@e62a0000 {
 372                         compatible = "renesas,ipmmu-r8a7793",
 373                                      "renesas,ipmmu-vmsa";
 374                         reg = <0 0xe62a0000 0 0x1000>;
 375                         interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
 376                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
 377                         #iommu-cells = <1>;
 378                         status = "disabled";
 379                 };
 380
 381                 icram0: sram@e63a0000 {
 382                         compatible = "mmio-sram";
 383                         reg = <0 0xe63a0000 0 0x12000>;
 384                 };
 385
 386                 icram1: sram@e63c0000 {
 387                         compatible = "mmio-sram";
 388                         reg = <0 0xe63c0000 0 0x1000>;
 389                         #address-cells = <1>;
 390                         #size-cells = <1>;
 391                         ranges = <0 0 0xe63c0000 0x1000>;
 392
 393                         smp-sram@0 {
 394                                 compatible = "renesas,smp-sram";
 395                                 reg = <0 0x10>;
 396                         };
 397                 };
 398
 399                 /* The memory map in the User's Manual maps the cores to
 400                  * bus numbers
 401                  */
 402                 i2c0: i2c@e6508000 {
 403                         #address-cells = <1>;
 404                         #size-cells = <0>;
 405                         compatible = "renesas,i2c-r8a7793",
 406                                      "renesas,rcar-gen2-i2c";
 407                         reg = <0 0xe6508000 0 0x40>;
 408                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 409                         clocks = <&cpg CPG_MOD 931>;
 410                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 411                         resets = <&cpg 931>;
 412                         i2c-scl-internal-delay-ns = <6>;
 413                         status = "disabled";
 414                 };
 415
 416                 i2c1: i2c@e6518000 {
 417                         #address-cells = <1>;
 418                         #size-cells = <0>;
 419                         compatible = "renesas,i2c-r8a7793",
 420                                      "renesas,rcar-gen2-i2c";
 421                         reg = <0 0xe6518000 0 0x40>;
 422                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 423                         clocks = <&cpg CPG_MOD 930>;
 424                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 425                         resets = <&cpg 930>;
 426                         i2c-scl-internal-delay-ns = <6>;
 427                         status = "disabled";
 428                 };
 429
 430                 i2c2: i2c@e6530000 {
 431                         #address-cells = <1>;
 432                         #size-cells = <0>;
 433                         compatible = "renesas,i2c-r8a7793",
 434                                      "renesas,rcar-gen2-i2c";
 435                         reg = <0 0xe6530000 0 0x40>;
 436                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 437                         clocks = <&cpg CPG_MOD 929>;
 438                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 439                         resets = <&cpg 929>;
 440                         i2c-scl-internal-delay-ns = <6>;
 441                         status = "disabled";
 442                 };
 443
 444                 i2c3: i2c@e6540000 {
 445                         #address-cells = <1>;
 446                         #size-cells = <0>;
 447                         compatible = "renesas,i2c-r8a7793",
 448                                      "renesas,rcar-gen2-i2c";
 449                         reg = <0 0xe6540000 0 0x40>;
 450                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 451                         clocks = <&cpg CPG_MOD 928>;
 452                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 453                         resets = <&cpg 928>;
 454                         i2c-scl-internal-delay-ns = <6>;
 455                         status = "disabled";
 456                 };
 457
 458                 i2c4: i2c@e6520000 {
 459                         #address-cells = <1>;
 460                         #size-cells = <0>;
 461                         compatible = "renesas,i2c-r8a7793",
 462                                      "renesas,rcar-gen2-i2c";
 463                         reg = <0 0xe6520000 0 0x40>;
 464                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 465                         clocks = <&cpg CPG_MOD 927>;
 466                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 467                         resets = <&cpg 927>;
 468                         i2c-scl-internal-delay-ns = <6>;
 469                         status = "disabled";
 470                 };
 471
 472                 i2c5: i2c@e6528000 {
 473                         /* doesn't need pinmux */
 474                         #address-cells = <1>;
 475                         #size-cells = <0>;
 476                         compatible = "renesas,i2c-r8a7793",
 477                                      "renesas,rcar-gen2-i2c";
 478                         reg = <0 0xe6528000 0 0x40>;
 479                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 480                         clocks = <&cpg CPG_MOD 925>;
 481                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 482                         resets = <&cpg 925>;
 483                         i2c-scl-internal-delay-ns = <110>;
 484                         status = "disabled";
 485                 };
 486
 487                 i2c6: i2c@e60b0000 {
 488                         /* doesn't need pinmux */
 489                         #address-cells = <1>;
 490                         #size-cells = <0>;
 491                         compatible = "renesas,iic-r8a7793",
 492                                      "renesas,rcar-gen2-iic",
 493                                      "renesas,rmobile-iic";
 494                         reg = <0 0xe60b0000 0 0x425>;
 495                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 496                         clocks = <&cpg CPG_MOD 926>;
 497                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 498                                <&dmac1 0x77>, <&dmac1 0x78>;
 499                         dma-names = "tx", "rx", "tx", "rx";
 500                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 501                         resets = <&cpg 926>;
 502                         status = "disabled";
 503                 };
 504
 505                 i2c7: i2c@e6500000 {
 506                         #address-cells = <1>;
 507                         #size-cells = <0>;
 508                         compatible = "renesas,iic-r8a7793",
 509                                      "renesas,rcar-gen2-iic",
 510                                      "renesas,rmobile-iic";
 511                         reg = <0 0xe6500000 0 0x425>;
 512                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 513                         clocks = <&cpg CPG_MOD 318>;
 514                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 515                                <&dmac1 0x61>, <&dmac1 0x62>;
 516                         dma-names = "tx", "rx", "tx", "rx";
 517                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 518                         resets = <&cpg 318>;
 519                         status = "disabled";
 520                 };
 521
 522                 i2c8: i2c@e6510000 {
 523                         #address-cells = <1>;
 524                         #size-cells = <0>;
 525                         compatible = "renesas,iic-r8a7793",
 526                                      "renesas,rcar-gen2-iic",
 527                                      "renesas,rmobile-iic";
 528                         reg = <0 0xe6510000 0 0x425>;
 529                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 530                         clocks = <&cpg CPG_MOD 323>;
 531                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 532                                <&dmac1 0x65>, <&dmac1 0x66>;
 533                         dma-names = "tx", "rx", "tx", "rx";
 534                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 535                         resets = <&cpg 323>;
 536                         status = "disabled";
 537                 };
 538
 539                 dmac0: dma-controller@e6700000 {
 540                         compatible = "renesas,dmac-r8a7793",
 541                                      "renesas,rcar-dmac";
 542                         reg = <0 0xe6700000 0 0x20000>;
 543                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 544                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 545                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 546                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 547                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 548                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 549                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 550                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 551                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 552                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 553                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 554                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 555                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 556                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 557                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 558                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 559                         interrupt-names = "error",
 560                                           "ch0", "ch1", "ch2", "ch3",
 561                                           "ch4", "ch5", "ch6", "ch7",
 562                                           "ch8", "ch9", "ch10", "ch11",
 563                                           "ch12", "ch13", "ch14";
 564                         clocks = <&cpg CPG_MOD 219>;
 565                         clock-names = "fck";
 566                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 567                         resets = <&cpg 219>;
 568                         #dma-cells = <1>;
 569                         dma-channels = <15>;
 570                 };
 571
 572                 dmac1: dma-controller@e6720000 {
 573                         compatible = "renesas,dmac-r8a7793",
 574                                      "renesas,rcar-dmac";
 575                         reg = <0 0xe6720000 0 0x20000>;
 576                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 577                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 578                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 579                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 580                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 581                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 582                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 583                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 584                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 585                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 586                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 587                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 588                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 589                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 590                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 591                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 592                         interrupt-names = "error",
 593                                           "ch0", "ch1", "ch2", "ch3",
 594                                           "ch4", "ch5", "ch6", "ch7",
 595                                           "ch8", "ch9", "ch10", "ch11",
 596                                           "ch12", "ch13", "ch14";
 597                         clocks = <&cpg CPG_MOD 218>;
 598                         clock-names = "fck";
 599                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 600                         resets = <&cpg 218>;
 601                         #dma-cells = <1>;
 602                         dma-channels = <15>;
 603                 };
 604
 605                 qspi: spi@e6b10000 {
 606                         compatible = "renesas,qspi-r8a7793", "renesas,qspi";
 607                         reg = <0 0xe6b10000 0 0x2c>;
 608                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 609                         clocks = <&cpg CPG_MOD 917>;
 610                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 611                                <&dmac1 0x17>, <&dmac1 0x18>;
 612                         dma-names = "tx", "rx", "tx", "rx";
 613                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 614                         resets = <&cpg 917>;
 615                         num-cs = <1>;
 616                         #address-cells = <1>;
 617                         #size-cells = <0>;
 618                         status = "disabled";
 619                 };
 620
 621                 scifa0: serial@e6c40000 {
 622                         compatible = "renesas,scifa-r8a7793",
 623                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 624                         reg = <0 0xe6c40000 0 64>;
 625                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 626                         clocks = <&cpg CPG_MOD 204>;
 627                         clock-names = "fck";
 628                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 629                                <&dmac1 0x21>, <&dmac1 0x22>;
 630                         dma-names = "tx", "rx", "tx", "rx";
 631                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 632                         resets = <&cpg 204>;
 633                         status = "disabled";
 634                 };
 635
 636                 scifa1: serial@e6c50000 {
 637                         compatible = "renesas,scifa-r8a7793",
 638                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 639                         reg = <0 0xe6c50000 0 64>;
 640                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 641                         clocks = <&cpg CPG_MOD 203>;
 642                         clock-names = "fck";
 643                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 644                                <&dmac1 0x25>, <&dmac1 0x26>;
 645                         dma-names = "tx", "rx", "tx", "rx";
 646                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 647                         resets = <&cpg 203>;
 648                         status = "disabled";
 649                 };
 650
 651                 scifa2: serial@e6c60000 {
 652                         compatible = "renesas,scifa-r8a7793",
 653                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 654                         reg = <0 0xe6c60000 0 64>;
 655                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 656                         clocks = <&cpg CPG_MOD 202>;
 657                         clock-names = "fck";
 658                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 659                                <&dmac1 0x27>, <&dmac1 0x28>;
 660                         dma-names = "tx", "rx", "tx", "rx";
 661                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 662                         resets = <&cpg 202>;
 663                         status = "disabled";
 664                 };
 665
 666                 scifa3: serial@e6c70000 {
 667                         compatible = "renesas,scifa-r8a7793",
 668                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 669                         reg = <0 0xe6c70000 0 64>;
 670                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 671                         clocks = <&cpg CPG_MOD 1106>;
 672                         clock-names = "fck";
 673                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 674                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 675                         dma-names = "tx", "rx", "tx", "rx";
 676                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 677                         resets = <&cpg 1106>;
 678                         status = "disabled";
 679                 };
 680
 681                 scifa4: serial@e6c78000 {
 682                         compatible = "renesas,scifa-r8a7793",
 683                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 684                         reg = <0 0xe6c78000 0 64>;
 685                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 686                         clocks = <&cpg CPG_MOD 1107>;
 687                         clock-names = "fck";
 688                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 689                                <&dmac1 0x1f>, <&dmac1 0x20>;
 690                         dma-names = "tx", "rx", "tx", "rx";
 691                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 692                         resets = <&cpg 1107>;
 693                         status = "disabled";
 694                 };
 695
 696                 scifa5: serial@e6c80000 {
 697                         compatible = "renesas,scifa-r8a7793",
 698                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 699                         reg = <0 0xe6c80000 0 64>;
 700                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 701                         clocks = <&cpg CPG_MOD 1108>;
 702                         clock-names = "fck";
 703                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 704                                <&dmac1 0x23>, <&dmac1 0x24>;
 705                         dma-names = "tx", "rx", "tx", "rx";
 706                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 707                         resets = <&cpg 1108>;
 708                         status = "disabled";
 709                 };
 710
 711                 scifb0: serial@e6c20000 {
 712                         compatible = "renesas,scifb-r8a7793",
 713                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 714                         reg = <0 0xe6c20000 0 0x100>;
 715                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 716                         clocks = <&cpg CPG_MOD 206>;
 717                         clock-names = "fck";
 718                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 719                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 720                         dma-names = "tx", "rx", "tx", "rx";
 721                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 722                         resets = <&cpg 206>;
 723                         status = "disabled";
 724                 };
 725
 726                 scifb1: serial@e6c30000 {
 727                         compatible = "renesas,scifb-r8a7793",
 728                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 729                         reg = <0 0xe6c30000 0 0x100>;
 730                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 731                         clocks = <&cpg CPG_MOD 207>;
 732                         clock-names = "fck";
 733                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 734                                <&dmac1 0x19>, <&dmac1 0x1a>;
 735                         dma-names = "tx", "rx", "tx", "rx";
 736                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 737                         resets = <&cpg 207>;
 738                         status = "disabled";
 739                 };
 740
 741                 scifb2: serial@e6ce0000 {
 742                         compatible = "renesas,scifb-r8a7793",
 743                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 744                         reg = <0 0xe6ce0000 0 0x100>;
 745                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 746                         clocks = <&cpg CPG_MOD 216>;
 747                         clock-names = "fck";
 748                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 749                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 750                         dma-names = "tx", "rx", "tx", "rx";
 751                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 752                         resets = <&cpg 216>;
 753                         status = "disabled";
 754                 };
 755
 756                 scif0: serial@e6e60000 {
 757                         compatible = "renesas,scif-r8a7793",
 758                                      "renesas,rcar-gen2-scif", "renesas,scif";
 759                         reg = <0 0xe6e60000 0 64>;
 760                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 761                         clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 762                                  <&scif_clk>;
 763                         clock-names = "fck", "brg_int", "scif_clk";
 764                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 765                                <&dmac1 0x29>, <&dmac1 0x2a>;
 766                         dma-names = "tx", "rx", "tx", "rx";
 767                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 768                         resets = <&cpg 721>;
 769                         status = "disabled";
 770                 };
 771
 772                 scif1: serial@e6e68000 {
 773                         compatible = "renesas,scif-r8a7793",
 774                                      "renesas,rcar-gen2-scif", "renesas,scif";
 775                         reg = <0 0xe6e68000 0 64>;
 776                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 777                         clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 778                                  <&scif_clk>;
 779                         clock-names = "fck", "brg_int", "scif_clk";
 780                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 781                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 782                         dma-names = "tx", "rx", "tx", "rx";
 783                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 784                         resets = <&cpg 720>;
 785                         status = "disabled";
 786                 };
 787
 788                 scif2: serial@e6e58000 {
 789                         compatible = "renesas,scif-r8a7793",
 790                                      "renesas,rcar-gen2-scif", "renesas,scif";
 791                         reg = <0 0xe6e58000 0 64>;
 792                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 793                         clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 794                                  <&scif_clk>;
 795                         clock-names = "fck", "brg_int", "scif_clk";
 796                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 797                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 798                         dma-names = "tx", "rx", "tx", "rx";
 799                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 800                         resets = <&cpg 719>;
 801                         status = "disabled";
 802                 };
 803
 804                 scif3: serial@e6ea8000 {
 805                         compatible = "renesas,scif-r8a7793",
 806                                      "renesas,rcar-gen2-scif", "renesas,scif";
 807                         reg = <0 0xe6ea8000 0 64>;
 808                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 809                         clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 810                                  <&scif_clk>;
 811                         clock-names = "fck", "brg_int", "scif_clk";
 812                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 813                                <&dmac1 0x2f>, <&dmac1 0x30>;
 814                         dma-names = "tx", "rx", "tx", "rx";
 815                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 816                         resets = <&cpg 718>;
 817                         status = "disabled";
 818                 };
 819
 820                 scif4: serial@e6ee0000 {
 821                         compatible = "renesas,scif-r8a7793",
 822                                      "renesas,rcar-gen2-scif", "renesas,scif";
 823                         reg = <0 0xe6ee0000 0 64>;
 824                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 825                         clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 826                                  <&scif_clk>;
 827                         clock-names = "fck", "brg_int", "scif_clk";
 828                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 829                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 830                         dma-names = "tx", "rx", "tx", "rx";
 831                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 832                         resets = <&cpg 715>;
 833                         status = "disabled";
 834                 };
 835
 836                 scif5: serial@e6ee8000 {
 837                         compatible = "renesas,scif-r8a7793",
 838                                      "renesas,rcar-gen2-scif", "renesas,scif";
 839                         reg = <0 0xe6ee8000 0 64>;
 840                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 841                         clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 842                                  <&scif_clk>;
 843                         clock-names = "fck", "brg_int", "scif_clk";
 844                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 845                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 846                         dma-names = "tx", "rx", "tx", "rx";
 847                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 848                         resets = <&cpg 714>;
 849                         status = "disabled";
 850                 };
 851
 852                 hscif0: serial@e62c0000 {
 853                         compatible = "renesas,hscif-r8a7793",
 854                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 855                         reg = <0 0xe62c0000 0 96>;
 856                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 857                         clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 858                                  <&scif_clk>;
 859                         clock-names = "fck", "brg_int", "scif_clk";
 860                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 861                                <&dmac1 0x39>, <&dmac1 0x3a>;
 862                         dma-names = "tx", "rx", "tx", "rx";
 863                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 864                         resets = <&cpg 717>;
 865                         status = "disabled";
 866                 };
 867
 868                 hscif1: serial@e62c8000 {
 869                         compatible = "renesas,hscif-r8a7793",
 870                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 871                         reg = <0 0xe62c8000 0 96>;
 872                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 873                         clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 874                                  <&scif_clk>;
 875                         clock-names = "fck", "brg_int", "scif_clk";
 876                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 877                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 878                         dma-names = "tx", "rx", "tx", "rx";
 879                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 880                         resets = <&cpg 716>;
 881                         status = "disabled";
 882                 };
 883
 884                 hscif2: serial@e62d0000 {
 885                         compatible = "renesas,hscif-r8a7793",
 886                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 887                         reg = <0 0xe62d0000 0 96>;
 888                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 889                         clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 890                                  <&scif_clk>;
 891                         clock-names = "fck", "brg_int", "scif_clk";
 892                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 893                                <&dmac1 0x3b>, <&dmac1 0x3c>;
 894                         dma-names = "tx", "rx", "tx", "rx";
 895                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 896                         resets = <&cpg 713>;
 897                         status = "disabled";
 898                 };
 899
 900                 can0: can@e6e80000 {
 901                         compatible = "renesas,can-r8a7793",
 902                                      "renesas,rcar-gen2-can";
 903                         reg = <0 0xe6e80000 0 0x1000>;
 904                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 905                         clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
 906                                  <&can_clk>;
 907                         clock-names = "clkp1", "clkp2", "can_clk";
 908                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 909                         resets = <&cpg 916>;
 910                         status = "disabled";
 911                 };
 912
 913                 can1: can@e6e88000 {
 914                         compatible = "renesas,can-r8a7793",
 915                                      "renesas,rcar-gen2-can";
 916                         reg = <0 0xe6e88000 0 0x1000>;
 917                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 918                         clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
 919                                  <&can_clk>;
 920                         clock-names = "clkp1", "clkp2", "can_clk";
 921                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 922                         resets = <&cpg 915>;
 923                         status = "disabled";
 924                 };
 925
 926                 vin0: video@e6ef0000 {
 927                         compatible = "renesas,vin-r8a7793",
 928                                      "renesas,rcar-gen2-vin";
 929                         reg = <0 0xe6ef0000 0 0x1000>;
 930                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 931                         clocks = <&cpg CPG_MOD 811>;
 932                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 933                         resets = <&cpg 811>;
 934                         status = "disabled";
 935                 };
 936
 937                 vin1: video@e6ef1000 {
 938                         compatible = "renesas,vin-r8a7793",
 939                                      "renesas,rcar-gen2-vin";
 940                         reg = <0 0xe6ef1000 0 0x1000>;
 941                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 942                         clocks = <&cpg CPG_MOD 810>;
 943                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 944                         resets = <&cpg 810>;
 945                         status = "disabled";
 946                 };
 947
 948                 vin2: video@e6ef2000 {
 949                         compatible = "renesas,vin-r8a7793",
 950                                      "renesas,rcar-gen2-vin";
 951                         reg = <0 0xe6ef2000 0 0x1000>;
 952                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 953                         clocks = <&cpg CPG_MOD 809>;
 954                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 955                         resets = <&cpg 809>;
 956                         status = "disabled";
 957                 };
 958
 959                 rcar_sound: sound@ec500000 {
 960                         /*
 961                          * #sound-dai-cells is required
 962                          *
 963                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
 964                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
 965                          */
 966                         compatible = "renesas,rcar_sound-r8a7793",
 967                                      "renesas,rcar_sound-gen2";
 968                         reg = <0 0xec500000 0 0x1000>, /* SCU */
 969                               <0 0xec5a0000 0 0x100>,  /* ADG */
 970                               <0 0xec540000 0 0x1000>, /* SSIU */
 971                               <0 0xec541000 0 0x280>,  /* SSI */
 972                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 973                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 974
 975                         clocks = <&cpg CPG_MOD 1005>,
 976                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 977                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 978                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 979                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 980                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 981                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 982                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 983                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 984                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 985                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 986                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 987                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
 988                                  <&cpg CPG_CORE R8A7793_CLK_M2>;
 989                         clock-names = "ssi-all",
 990                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 991                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 992                                       "ssi.1", "ssi.0",
 993                                       "src.9", "src.8", "src.7", "src.6",
 994                                       "src.5", "src.4", "src.3", "src.2",
 995                                       "src.1", "src.0",
 996                                       "dvc.0", "dvc.1",
 997                                       "clk_a", "clk_b", "clk_c", "clk_i";
 998                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 999                         resets = <&cpg 1005>,
1000                                  <&cpg 1006>, <&cpg 1007>,
1001                                  <&cpg 1008>, <&cpg 1009>,
1002                                  <&cpg 1010>, <&cpg 1011>,
1003                                  <&cpg 1012>, <&cpg 1013>,
1004                                  <&cpg 1014>, <&cpg 1015>;
1005                         reset-names = "ssi-all",
1006                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1007                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1008                                       "ssi.1", "ssi.0";
1009
1010                         status = "disabled";
1011
1012                         rcar_sound,dvc {
1013                                 dvc0: dvc-0 {
1014                                         dmas = <&audma1 0xbc>;
1015                                         dma-names = "tx";
1016                                 };
1017                                 dvc1: dvc-1 {
1018                                         dmas = <&audma1 0xbe>;
1019                                         dma-names = "tx";
1020                                 };
1021                         };
1022
1023                         rcar_sound,src {
1024                                 src0: src-0 {
1025                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1026                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1027                                         dma-names = "rx", "tx";
1028                                 };
1029                                 src1: src-1 {
1030                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1031                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1032                                         dma-names = "rx", "tx";
1033                                 };
1034                                 src2: src-2 {
1035                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1036                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1037                                         dma-names = "rx", "tx";
1038                                 };
1039                                 src3: src-3 {
1040                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1041                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1042                                         dma-names = "rx", "tx";
1043                                 };
1044                                 src4: src-4 {
1045                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1046                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1047                                         dma-names = "rx", "tx";
1048                                 };
1049                                 src5: src-5 {
1050                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1051                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1052                                         dma-names = "rx", "tx";
1053                                 };
1054                                 src6: src-6 {
1055                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1056                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1057                                         dma-names = "rx", "tx";
1058                                 };
1059                                 src7: src-7 {
1060                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1061                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1062                                         dma-names = "rx", "tx";
1063                                 };
1064                                 src8: src-8 {
1065                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1066                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1067                                         dma-names = "rx", "tx";
1068                                 };
1069                                 src9: src-9 {
1070                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1071                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1072                                         dma-names = "rx", "tx";
1073                                 };
1074                         };
1075
1076                         rcar_sound,ssi {
1077                                 ssi0: ssi-0 {
1078                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1079                                         dmas = <&audma0 0x01>, <&audma1 0x02>,
1080                                                <&audma0 0x15>, <&audma1 0x16>;
1081                                         dma-names = "rx", "tx", "rxu", "txu";
1082                                 };
1083                                 ssi1: ssi-1 {
1084                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1085                                         dmas = <&audma0 0x03>, <&audma1 0x04>,
1086                                                <&audma0 0x49>, <&audma1 0x4a>;
1087                                         dma-names = "rx", "tx", "rxu", "txu";
1088                                 };
1089                                 ssi2: ssi-2 {
1090                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1091                                         dmas = <&audma0 0x05>, <&audma1 0x06>,
1092                                                <&audma0 0x63>, <&audma1 0x64>;
1093                                         dma-names = "rx", "tx", "rxu", "txu";
1094                                 };
1095                                 ssi3: ssi-3 {
1096                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1097                                         dmas = <&audma0 0x07>, <&audma1 0x08>,
1098                                                <&audma0 0x6f>, <&audma1 0x70>;
1099                                         dma-names = "rx", "tx", "rxu", "txu";
1100                                 };
1101                                 ssi4: ssi-4 {
1102                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1103                                         dmas = <&audma0 0x09>, <&audma1 0x0a>,
1104                                                <&audma0 0x71>, <&audma1 0x72>;
1105                                         dma-names = "rx", "tx", "rxu", "txu";
1106                                 };
1107                                 ssi5: ssi-5 {
1108                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1109                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1110                                                <&audma0 0x73>, <&audma1 0x74>;
1111                                         dma-names = "rx", "tx", "rxu", "txu";
1112                                 };
1113                                 ssi6: ssi-6 {
1114                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1115                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1116                                                <&audma0 0x75>, <&audma1 0x76>;
1117                                         dma-names = "rx", "tx", "rxu", "txu";
1118                                 };
1119                                 ssi7: ssi-7 {
1120                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1121                                         dmas = <&audma0 0x0f>, <&audma1 0x10>,
1122                                                <&audma0 0x79>, <&audma1 0x7a>;
1123                                         dma-names = "rx", "tx", "rxu", "txu";
1124                                 };
1125                                 ssi8: ssi-8 {
1126                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1127                                         dmas = <&audma0 0x11>, <&audma1 0x12>,
1128                                                <&audma0 0x7b>, <&audma1 0x7c>;
1129                                         dma-names = "rx", "tx", "rxu", "txu";
1130                                 };
1131                                 ssi9: ssi-9 {
1132                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1133                                         dmas = <&audma0 0x13>, <&audma1 0x14>,
1134                                                <&audma0 0x7d>, <&audma1 0x7e>;
1135                                         dma-names = "rx", "tx", "rxu", "txu";
1136                                 };
1137                         };
1138                 };
1139
1140                 audma0: dma-controller@ec700000 {
1141                         compatible = "renesas,dmac-r8a7793",
1142                                      "renesas,rcar-dmac";
1143                         reg = <0 0xec700000 0 0x10000>;
1144                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1145                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1146                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1147                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1148                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1149                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1150                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1151                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1152                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1153                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1154                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1155                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1156                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1157                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1158                         interrupt-names = "error",
1159                                           "ch0", "ch1", "ch2", "ch3",
1160                                           "ch4", "ch5", "ch6", "ch7",
1161                                           "ch8", "ch9", "ch10", "ch11",
1162                                           "ch12";
1163                         clocks = <&cpg CPG_MOD 502>;
1164                         clock-names = "fck";
1165                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1166                         resets = <&cpg 502>;
1167                         #dma-cells = <1>;
1168                         dma-channels = <13>;
1169                 };
1170
1171                 audma1: dma-controller@ec720000 {
1172                         compatible = "renesas,dmac-r8a7793",
1173                                      "renesas,rcar-dmac";
1174                         reg = <0 0xec720000 0 0x10000>;
1175                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1176                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1177                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1178                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1179                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1180                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1181                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1182                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1183                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1184                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1185                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1186                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1187                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1188                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1189                         interrupt-names = "error",
1190                                           "ch0", "ch1", "ch2", "ch3",
1191                                           "ch4", "ch5", "ch6", "ch7",
1192                                           "ch8", "ch9", "ch10", "ch11",
1193                                           "ch12";
1194                         clocks = <&cpg CPG_MOD 501>;
1195                         clock-names = "fck";
1196                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1197                         resets = <&cpg 501>;
1198                         #dma-cells = <1>;
1199                         dma-channels = <13>;
1200                 };
1201
1202                 sdhi0: sd@ee100000 {
1203                         compatible = "renesas,sdhi-r8a7793",
1204                                      "renesas,rcar-gen2-sdhi";
1205                         reg = <0 0xee100000 0 0x328>;
1206                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1207                         clocks = <&cpg CPG_MOD 314>;
1208                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1209                                <&dmac1 0xcd>, <&dmac1 0xce>;
1210                         dma-names = "tx", "rx", "tx", "rx";
1211                         max-frequency = <195000000>;
1212                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1213                         resets = <&cpg 314>;
1214                         status = "disabled";
1215                 };
1216
1217                 sdhi1: sd@ee140000 {
1218                         compatible = "renesas,sdhi-r8a7793",
1219                                      "renesas,rcar-gen2-sdhi";
1220                         reg = <0 0xee140000 0 0x100>;
1221                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1222                         clocks = <&cpg CPG_MOD 312>;
1223                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1224                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1225                         dma-names = "tx", "rx", "tx", "rx";
1226                         max-frequency = <97500000>;
1227                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1228                         resets = <&cpg 312>;
1229                         status = "disabled";
1230                 };
1231
1232                 sdhi2: sd@ee160000 {
1233                         compatible = "renesas,sdhi-r8a7793",
1234                                      "renesas,rcar-gen2-sdhi";
1235                         reg = <0 0xee160000 0 0x100>;
1236                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1237                         clocks = <&cpg CPG_MOD 311>;
1238                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1239                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1240                         dma-names = "tx", "rx", "tx", "rx";
1241                         max-frequency = <97500000>;
1242                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1243                         resets = <&cpg 311>;
1244                         status = "disabled";
1245                 };
1246
1247                 mmcif0: mmc@ee200000 {
1248                         compatible = "renesas,mmcif-r8a7793",
1249                                      "renesas,sh-mmcif";
1250                         reg = <0 0xee200000 0 0x80>;
1251                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1252                         clocks = <&cpg CPG_MOD 315>;
1253                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1254                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1255                         dma-names = "tx", "rx", "tx", "rx";
1256                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1257                         resets = <&cpg 315>;
1258                         reg-io-width = <4>;
1259                         status = "disabled";
1260                         max-frequency = <97500000>;
1261                 };
1262
1263                 ether: ethernet@ee700000 {
1264                         compatible = "renesas,ether-r8a7793",
1265                                      "renesas,rcar-gen2-ether";
1266                         reg = <0 0xee700000 0 0x400>;
1267                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1268                         clocks = <&cpg CPG_MOD 813>;
1269                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1270                         resets = <&cpg 813>;
1271                         phy-mode = "rmii";
1272                         #address-cells = <1>;
1273                         #size-cells = <0>;
1274                         status = "disabled";
1275                 };
1276
1277                 gic: interrupt-controller@f1001000 {
1278                         compatible = "arm,gic-400";
1279                         #interrupt-cells = <3>;
1280                         #address-cells = <0>;
1281                         interrupt-controller;
1282                         reg = <0 0xf1001000 0 0x1000>,
1283                                 <0 0xf1002000 0 0x2000>,
1284                                 <0 0xf1004000 0 0x2000>,
1285                                 <0 0xf1006000 0 0x2000>;
1286                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1287                         clocks = <&cpg CPG_MOD 408>;
1288                         clock-names = "clk";
1289                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1290                         resets = <&cpg 408>;
1291                 };
1292
1293                 du: display@feb00000 {
1294                         compatible = "renesas,du-r8a7793";
1295                         reg = <0 0xfeb00000 0 0x40000>,
1296                               <0 0xfeb90000 0 0x1c>;
1297                         reg-names = "du", "lvds.0";
1298                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1299                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1300                         clocks = <&cpg CPG_MOD 724>,
1301                                  <&cpg CPG_MOD 723>,
1302                                  <&cpg CPG_MOD 726>;
1303                         clock-names = "du.0", "du.1", "lvds.0";
1304                         status = "disabled";
1305
1306                         ports {
1307                                 #address-cells = <1>;
1308                                 #size-cells = <0>;
1309
1310                                 port@0 {
1311                                         reg = <0>;
1312                                         du_out_rgb: endpoint {
1313                                         };
1314                                 };
1315                                 port@1 {
1316                                         reg = <1>;
1317                                         du_out_lvds0: endpoint {
1318                                         };
1319                                 };
1320                         };
1321                 };
1322
1323                 prr: chipid@ff000044 {
1324                         compatible = "renesas,prr";
1325                         reg = <0 0xff000044 0 4>;
1326                 };
1327
1328                 cmt0: timer@ffca0000 {
1329                         compatible = "renesas,r8a7793-cmt0",
1330                                      "renesas,rcar-gen2-cmt0";
1331                         reg = <0 0xffca0000 0 0x1004>;
1332                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1333                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1334                         clocks = <&cpg CPG_MOD 124>;
1335                         clock-names = "fck";
1336                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1337                         resets = <&cpg 124>;
1338
1339                         status = "disabled";
1340                 };
1341
1342                 cmt1: timer@e6130000 {
1343                         compatible = "renesas,r8a7793-cmt1",
1344                                      "renesas,rcar-gen2-cmt1";
1345                         reg = <0 0xe6130000 0 0x1004>;
1346                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1347                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1348                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1349                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1350                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1351                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1352                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1353                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1354                         clocks = <&cpg CPG_MOD 329>;
1355                         clock-names = "fck";
1356                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1357                         resets = <&cpg 329>;
1358
1359                         status = "disabled";
1360                 };
1361         };
1362
1363         thermal-zones {
1364                 cpu_thermal: cpu-thermal {
1365                         polling-delay-passive = <0>;
1366                         polling-delay = <0>;
1367
1368                         thermal-sensors = <&thermal>;
1369
1370                         trips {
1371                                 cpu-crit {
1372                                         temperature = <95000>;
1373                                         hysteresis = <0>;
1374                                         type = "critical";
1375                                 };
1376                         };
1377                         cooling-maps {
1378                         };
1379                 };
1380         };
1381
1382         timer {
1383                 compatible = "arm,armv7-timer";
1384                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1385                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1386                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1387                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1388         };
1389
1390         /* External USB clock - can be overridden by the board */
1391         usb_extal_clk: usb_extal {
1392                 compatible = "fixed-clock";
1393                 #clock-cells = <0>;
1394                 clock-frequency = <48000000>;
1395         };
1396 };