arch/arm/boot/dts/r8a7793.dtsi

   1 /*
   2  * Device Tree Source for the r8a7793 SoC
   3  *
   4  * Copyright (C) 2014-2015 Renesas Electronics Corporation
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/power/r8a7793-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7793";
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 i2c3 = &i2c3;
  26                 i2c4 = &i2c4;
  27                 i2c5 = &i2c5;
  28                 i2c6 = &i2c6;
  29                 i2c7 = &i2c7;
  30                 i2c8 = &i2c8;
  31                 spi0 = &qspi;
  32         };
  33
  34         /*
  35          * The external audio clocks are configured as 0 Hz fixed frequency
  36          * clocks by default.
  37          * Boards that provide audio clocks should override them.
  38          */
  39         audio_clk_a: audio_clk_a {
  40                 compatible = "fixed-clock";
  41                 #clock-cells = <0>;
  42                 clock-frequency = <0>;
  43         };
  44         audio_clk_b: audio_clk_b {
  45                 compatible = "fixed-clock";
  46                 #clock-cells = <0>;
  47                 clock-frequency = <0>;
  48         };
  49         audio_clk_c: audio_clk_c {
  50                 compatible = "fixed-clock";
  51                 #clock-cells = <0>;
  52                 clock-frequency = <0>;
  53         };
  54
  55         /* External CAN clock */
  56         can_clk: can {
  57                 compatible = "fixed-clock";
  58                 #clock-cells = <0>;
  59                 /* This value must be overridden by the board. */
  60                 clock-frequency = <0>;
  61         };
  62
  63         cpus {
  64                 #address-cells = <1>;
  65                 #size-cells = <0>;
  66                 enable-method = "renesas,apmu";
  67
  68                 cpu0: cpu@0 {
  69                         device_type = "cpu";
  70                         compatible = "arm,cortex-a15";
  71                         reg = <0>;
  72                         clock-frequency = <1500000000>;
  73                         voltage-tolerance = <1>; /* 1% */
  74                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  75                         clock-latency = <300000>; /* 300 us */
  76                         power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
  77
  78                         /* kHz - uV - OPPs unknown yet */
  79                         operating-points = <1500000 1000000>,
  80                                            <1312500 1000000>,
  81                                            <1125000 1000000>,
  82                                            < 937500 1000000>,
  83                                            < 750000 1000000>,
  84                                            < 375000 1000000>;
  85                         next-level-cache = <&L2_CA15>;
  86                 };
  87
  88                 cpu1: cpu@1 {
  89                         device_type = "cpu";
  90                         compatible = "arm,cortex-a15";
  91                         reg = <1>;
  92                         clock-frequency = <1500000000>;
  93                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  94                         power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
  95                 };
  96
  97                 L2_CA15: cache-controller-0 {
  98                         compatible = "cache";
  99                         power-domains = <&sysc R8A7793_PD_CA15_SCU>;
 100                         cache-unified;
 101                         cache-level = <2>;
 102                 };
 103         };
 104
 105         /* External root clock */
 106         extal_clk: extal {
 107                 compatible = "fixed-clock";
 108                 #clock-cells = <0>;
 109                 /* This value must be overridden by the board. */
 110                 clock-frequency = <0>;
 111         };
 112
 113         pmu {
 114                 compatible = "arm,cortex-a15-pmu";
 115                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 116                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 117                 interrupt-affinity = <&cpu0>, <&cpu1>;
 118         };
 119
 120         /* External SCIF clock */
 121         scif_clk: scif {
 122                 compatible = "fixed-clock";
 123                 #clock-cells = <0>;
 124                 /* This value must be overridden by the board. */
 125                 clock-frequency = <0>;
 126         };
 127
 128         soc {
 129                 compatible = "simple-bus";
 130                 interrupt-parent = <&gic>;
 131
 132                 #address-cells = <2>;
 133                 #size-cells = <2>;
 134                 ranges;
 135
 136                 rwdt: watchdog@e6020000 {
 137                         compatible = "renesas,r8a7793-wdt",
 138                                      "renesas,rcar-gen2-wdt";
 139                         reg = <0 0xe6020000 0 0x0c>;
 140                         clocks = <&cpg CPG_MOD 402>;
 141                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 142                         resets = <&cpg 402>;
 143                         status = "disabled";
 144                 };
 145
 146                 gpio0: gpio@e6050000 {
 147                         compatible = "renesas,gpio-r8a7793",
 148                                      "renesas,rcar-gen2-gpio";
 149                         reg = <0 0xe6050000 0 0x50>;
 150                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 151                         #gpio-cells = <2>;
 152                         gpio-controller;
 153                         gpio-ranges = <&pfc 0 0 32>;
 154                         #interrupt-cells = <2>;
 155                         interrupt-controller;
 156                         clocks = <&cpg CPG_MOD 912>;
 157                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 158                         resets = <&cpg 912>;
 159                 };
 160
 161                 gpio1: gpio@e6051000 {
 162                         compatible = "renesas,gpio-r8a7793",
 163                                      "renesas,rcar-gen2-gpio";
 164                         reg = <0 0xe6051000 0 0x50>;
 165                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 166                         #gpio-cells = <2>;
 167                         gpio-controller;
 168                         gpio-ranges = <&pfc 0 32 26>;
 169                         #interrupt-cells = <2>;
 170                         interrupt-controller;
 171                         clocks = <&cpg CPG_MOD 911>;
 172                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 173                         resets = <&cpg 911>;
 174                 };
 175
 176                 gpio2: gpio@e6052000 {
 177                         compatible = "renesas,gpio-r8a7793",
 178                                      "renesas,rcar-gen2-gpio";
 179                         reg = <0 0xe6052000 0 0x50>;
 180                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 181                         #gpio-cells = <2>;
 182                         gpio-controller;
 183                         gpio-ranges = <&pfc 0 64 32>;
 184                         #interrupt-cells = <2>;
 185                         interrupt-controller;
 186                         clocks = <&cpg CPG_MOD 910>;
 187                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 188                         resets = <&cpg 910>;
 189                 };
 190
 191                 gpio3: gpio@e6053000 {
 192                         compatible = "renesas,gpio-r8a7793",
 193                                      "renesas,rcar-gen2-gpio";
 194                         reg = <0 0xe6053000 0 0x50>;
 195                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 196                         #gpio-cells = <2>;
 197                         gpio-controller;
 198                         gpio-ranges = <&pfc 0 96 32>;
 199                         #interrupt-cells = <2>;
 200                         interrupt-controller;
 201                         clocks = <&cpg CPG_MOD 909>;
 202                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 203                         resets = <&cpg 909>;
 204                 };
 205
 206                 gpio4: gpio@e6054000 {
 207                         compatible = "renesas,gpio-r8a7793",
 208                                      "renesas,rcar-gen2-gpio";
 209                         reg = <0 0xe6054000 0 0x50>;
 210                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 211                         #gpio-cells = <2>;
 212                         gpio-controller;
 213                         gpio-ranges = <&pfc 0 128 32>;
 214                         #interrupt-cells = <2>;
 215                         interrupt-controller;
 216                         clocks = <&cpg CPG_MOD 908>;
 217                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 218                         resets = <&cpg 908>;
 219                 };
 220
 221                 gpio5: gpio@e6055000 {
 222                         compatible = "renesas,gpio-r8a7793",
 223                                      "renesas,rcar-gen2-gpio";
 224                         reg = <0 0xe6055000 0 0x50>;
 225                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 226                         #gpio-cells = <2>;
 227                         gpio-controller;
 228                         gpio-ranges = <&pfc 0 160 32>;
 229                         #interrupt-cells = <2>;
 230                         interrupt-controller;
 231                         clocks = <&cpg CPG_MOD 907>;
 232                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 233                         resets = <&cpg 907>;
 234                 };
 235
 236                 gpio6: gpio@e6055400 {
 237                         compatible = "renesas,gpio-r8a7793",
 238                                      "renesas,rcar-gen2-gpio";
 239                         reg = <0 0xe6055400 0 0x50>;
 240                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 241                         #gpio-cells = <2>;
 242                         gpio-controller;
 243                         gpio-ranges = <&pfc 0 192 32>;
 244                         #interrupt-cells = <2>;
 245                         interrupt-controller;
 246                         clocks = <&cpg CPG_MOD 905>;
 247                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 248                         resets = <&cpg 905>;
 249                 };
 250
 251                 gpio7: gpio@e6055800 {
 252                         compatible = "renesas,gpio-r8a7793",
 253                                      "renesas,rcar-gen2-gpio";
 254                         reg = <0 0xe6055800 0 0x50>;
 255                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 256                         #gpio-cells = <2>;
 257                         gpio-controller;
 258                         gpio-ranges = <&pfc 0 224 26>;
 259                         #interrupt-cells = <2>;
 260                         interrupt-controller;
 261                         clocks = <&cpg CPG_MOD 904>;
 262                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 263                         resets = <&cpg 904>;
 264                 };
 265
 266                 pfc: pin-controller@e6060000 {
 267                         compatible = "renesas,pfc-r8a7793";
 268                         reg = <0 0xe6060000 0 0x250>;
 269                 };
 270
 271                 /* Special CPG clocks */
 272                 cpg: clock-controller@e6150000 {
 273                         compatible = "renesas,r8a7793-cpg-mssr";
 274                         reg = <0 0xe6150000 0 0x1000>;
 275                         clocks = <&extal_clk>, <&usb_extal_clk>;
 276                         clock-names = "extal", "usb_extal";
 277                         #clock-cells = <2>;
 278                         #power-domain-cells = <0>;
 279                         #reset-cells = <1>;
 280                 };
 281
 282                 apmu@e6152000 {
 283                         compatible = "renesas,r8a7793-apmu", "renesas,apmu";
 284                         reg = <0 0xe6152000 0 0x188>;
 285                         cpus = <&cpu0 &cpu1>;
 286                 };
 287
 288                 rst: reset-controller@e6160000 {
 289                         compatible = "renesas,r8a7793-rst";
 290                         reg = <0 0xe6160000 0 0x0100>;
 291                 };
 292
 293                 sysc: system-controller@e6180000 {
 294                         compatible = "renesas,r8a7793-sysc";
 295                         reg = <0 0xe6180000 0 0x0200>;
 296                         #power-domain-cells = <1>;
 297                 };
 298
 299                 irqc0: interrupt-controller@e61c0000 {
 300                         compatible = "renesas,irqc-r8a7793", "renesas,irqc";
 301                         #interrupt-cells = <2>;
 302                         interrupt-controller;
 303                         reg = <0 0xe61c0000 0 0x200>;
 304                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 305                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 306                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 307                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 308                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 309                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 310                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 311                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 312                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 313                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 314                         clocks = <&cpg CPG_MOD 407>;
 315                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 316                         resets = <&cpg 407>;
 317                 };
 318
 319                 thermal: thermal@e61f0000 {
 320                         compatible = "renesas,thermal-r8a7793",
 321                                      "renesas,rcar-gen2-thermal",
 322                                      "renesas,rcar-thermal";
 323                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
 324                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 325                         clocks = <&cpg CPG_MOD 522>;
 326                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 327                         resets = <&cpg 522>;
 328                         #thermal-sensor-cells = <0>;
 329                 };
 330
 331                 ipmmu_sy0: mmu@e6280000 {
 332                         compatible = "renesas,ipmmu-r8a7793",
 333                                      "renesas,ipmmu-vmsa";
 334                         reg = <0 0xe6280000 0 0x1000>;
 335                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
 336                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 337                         #iommu-cells = <1>;
 338                         status = "disabled";
 339                 };
 340
 341                 ipmmu_sy1: mmu@e6290000 {
 342                         compatible = "renesas,ipmmu-r8a7793",
 343                                      "renesas,ipmmu-vmsa";
 344                         reg = <0 0xe6290000 0 0x1000>;
 345                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 346                         #iommu-cells = <1>;
 347                         status = "disabled";
 348                 };
 349
 350                 ipmmu_ds: mmu@e6740000 {
 351                         compatible = "renesas,ipmmu-r8a7793",
 352                                      "renesas,ipmmu-vmsa";
 353                         reg = <0 0xe6740000 0 0x1000>;
 354                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
 355                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
 356                         #iommu-cells = <1>;
 357                         status = "disabled";
 358                 };
 359
 360                 ipmmu_mp: mmu@ec680000 {
 361                         compatible = "renesas,ipmmu-r8a7793",
 362                                      "renesas,ipmmu-vmsa";
 363                         reg = <0 0xec680000 0 0x1000>;
 364                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 365                         #iommu-cells = <1>;
 366                         status = "disabled";
 367                 };
 368
 369                 ipmmu_mx: mmu@fe951000 {
 370                         compatible = "renesas,ipmmu-r8a7793",
 371                                      "renesas,ipmmu-vmsa";
 372                         reg = <0 0xfe951000 0 0x1000>;
 373                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
 374                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 375                         #iommu-cells = <1>;
 376                         status = "disabled";
 377                 };
 378
 379                 ipmmu_rt: mmu@ffc80000 {
 380                         compatible = "renesas,ipmmu-r8a7793",
 381                                      "renesas,ipmmu-vmsa";
 382                         reg = <0 0xffc80000 0 0x1000>;
 383                         interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
 384                         #iommu-cells = <1>;
 385                         status = "disabled";
 386                 };
 387
 388                 ipmmu_gp: mmu@e62a0000 {
 389                         compatible = "renesas,ipmmu-r8a7793",
 390                                      "renesas,ipmmu-vmsa";
 391                         reg = <0 0xe62a0000 0 0x1000>;
 392                         interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
 393                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
 394                         #iommu-cells = <1>;
 395                         status = "disabled";
 396                 };
 397
 398                 icram0: sram@e63a0000 {
 399                         compatible = "mmio-sram";
 400                         reg = <0 0xe63a0000 0 0x12000>;
 401                 };
 402
 403                 icram1: sram@e63c0000 {
 404                         compatible = "mmio-sram";
 405                         reg = <0 0xe63c0000 0 0x1000>;
 406                         #address-cells = <1>;
 407                         #size-cells = <1>;
 408                         ranges = <0 0 0xe63c0000 0x1000>;
 409
 410                         smp-sram@0 {
 411                                 compatible = "renesas,smp-sram";
 412                                 reg = <0 0x100>;
 413                         };
 414                 };
 415
 416                 /* The memory map in the User's Manual maps the cores to
 417                  * bus numbers
 418                  */
 419                 i2c0: i2c@e6508000 {
 420                         #address-cells = <1>;
 421                         #size-cells = <0>;
 422                         compatible = "renesas,i2c-r8a7793",
 423                                      "renesas,rcar-gen2-i2c";
 424                         reg = <0 0xe6508000 0 0x40>;
 425                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 426                         clocks = <&cpg CPG_MOD 931>;
 427                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 428                         resets = <&cpg 931>;
 429                         i2c-scl-internal-delay-ns = <6>;
 430                         status = "disabled";
 431                 };
 432
 433                 i2c1: i2c@e6518000 {
 434                         #address-cells = <1>;
 435                         #size-cells = <0>;
 436                         compatible = "renesas,i2c-r8a7793",
 437                                      "renesas,rcar-gen2-i2c";
 438                         reg = <0 0xe6518000 0 0x40>;
 439                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 440                         clocks = <&cpg CPG_MOD 930>;
 441                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 442                         resets = <&cpg 930>;
 443                         i2c-scl-internal-delay-ns = <6>;
 444                         status = "disabled";
 445                 };
 446
 447                 i2c2: i2c@e6530000 {
 448                         #address-cells = <1>;
 449                         #size-cells = <0>;
 450                         compatible = "renesas,i2c-r8a7793",
 451                                      "renesas,rcar-gen2-i2c";
 452                         reg = <0 0xe6530000 0 0x40>;
 453                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 454                         clocks = <&cpg CPG_MOD 929>;
 455                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 456                         resets = <&cpg 929>;
 457                         i2c-scl-internal-delay-ns = <6>;
 458                         status = "disabled";
 459                 };
 460
 461                 i2c3: i2c@e6540000 {
 462                         #address-cells = <1>;
 463                         #size-cells = <0>;
 464                         compatible = "renesas,i2c-r8a7793",
 465                                      "renesas,rcar-gen2-i2c";
 466                         reg = <0 0xe6540000 0 0x40>;
 467                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 468                         clocks = <&cpg CPG_MOD 928>;
 469                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 470                         resets = <&cpg 928>;
 471                         i2c-scl-internal-delay-ns = <6>;
 472                         status = "disabled";
 473                 };
 474
 475                 i2c4: i2c@e6520000 {
 476                         #address-cells = <1>;
 477                         #size-cells = <0>;
 478                         compatible = "renesas,i2c-r8a7793",
 479                                      "renesas,rcar-gen2-i2c";
 480                         reg = <0 0xe6520000 0 0x40>;
 481                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 482                         clocks = <&cpg CPG_MOD 927>;
 483                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 484                         resets = <&cpg 927>;
 485                         i2c-scl-internal-delay-ns = <6>;
 486                         status = "disabled";
 487                 };
 488
 489                 i2c5: i2c@e6528000 {
 490                         /* doesn't need pinmux */
 491                         #address-cells = <1>;
 492                         #size-cells = <0>;
 493                         compatible = "renesas,i2c-r8a7793",
 494                                      "renesas,rcar-gen2-i2c";
 495                         reg = <0 0xe6528000 0 0x40>;
 496                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 497                         clocks = <&cpg CPG_MOD 925>;
 498                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 499                         resets = <&cpg 925>;
 500                         i2c-scl-internal-delay-ns = <110>;
 501                         status = "disabled";
 502                 };
 503
 504                 i2c6: i2c@e60b0000 {
 505                         /* doesn't need pinmux */
 506                         #address-cells = <1>;
 507                         #size-cells = <0>;
 508                         compatible = "renesas,iic-r8a7793",
 509                                      "renesas,rcar-gen2-iic",
 510                                      "renesas,rmobile-iic";
 511                         reg = <0 0xe60b0000 0 0x425>;
 512                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 513                         clocks = <&cpg CPG_MOD 926>;
 514                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 515                                <&dmac1 0x77>, <&dmac1 0x78>;
 516                         dma-names = "tx", "rx", "tx", "rx";
 517                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 518                         resets = <&cpg 926>;
 519                         status = "disabled";
 520                 };
 521
 522                 i2c7: i2c@e6500000 {
 523                         #address-cells = <1>;
 524                         #size-cells = <0>;
 525                         compatible = "renesas,iic-r8a7793",
 526                                      "renesas,rcar-gen2-iic",
 527                                      "renesas,rmobile-iic";
 528                         reg = <0 0xe6500000 0 0x425>;
 529                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 530                         clocks = <&cpg CPG_MOD 318>;
 531                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 532                                <&dmac1 0x61>, <&dmac1 0x62>;
 533                         dma-names = "tx", "rx", "tx", "rx";
 534                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 535                         resets = <&cpg 318>;
 536                         status = "disabled";
 537                 };
 538
 539                 i2c8: i2c@e6510000 {
 540                         #address-cells = <1>;
 541                         #size-cells = <0>;
 542                         compatible = "renesas,iic-r8a7793",
 543                                      "renesas,rcar-gen2-iic",
 544                                      "renesas,rmobile-iic";
 545                         reg = <0 0xe6510000 0 0x425>;
 546                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 547                         clocks = <&cpg CPG_MOD 323>;
 548                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 549                                <&dmac1 0x65>, <&dmac1 0x66>;
 550                         dma-names = "tx", "rx", "tx", "rx";
 551                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 552                         resets = <&cpg 323>;
 553                         status = "disabled";
 554                 };
 555
 556                 dmac0: dma-controller@e6700000 {
 557                         compatible = "renesas,dmac-r8a7793",
 558                                      "renesas,rcar-dmac";
 559                         reg = <0 0xe6700000 0 0x20000>;
 560                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 561                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 562                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 563                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 564                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 565                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 566                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 567                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 568                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 569                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 570                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 571                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 572                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 573                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 574                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 575                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 576                         interrupt-names = "error",
 577                                           "ch0", "ch1", "ch2", "ch3",
 578                                           "ch4", "ch5", "ch6", "ch7",
 579                                           "ch8", "ch9", "ch10", "ch11",
 580                                           "ch12", "ch13", "ch14";
 581                         clocks = <&cpg CPG_MOD 219>;
 582                         clock-names = "fck";
 583                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 584                         resets = <&cpg 219>;
 585                         #dma-cells = <1>;
 586                         dma-channels = <15>;
 587                 };
 588
 589                 dmac1: dma-controller@e6720000 {
 590                         compatible = "renesas,dmac-r8a7793",
 591                                      "renesas,rcar-dmac";
 592                         reg = <0 0xe6720000 0 0x20000>;
 593                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 594                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 595                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 596                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 597                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 598                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 599                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 600                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 601                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 602                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 603                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 604                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 605                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 606                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 607                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 608                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 609                         interrupt-names = "error",
 610                                           "ch0", "ch1", "ch2", "ch3",
 611                                           "ch4", "ch5", "ch6", "ch7",
 612                                           "ch8", "ch9", "ch10", "ch11",
 613                                           "ch12", "ch13", "ch14";
 614                         clocks = <&cpg CPG_MOD 218>;
 615                         clock-names = "fck";
 616                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 617                         resets = <&cpg 218>;
 618                         #dma-cells = <1>;
 619                         dma-channels = <15>;
 620                 };
 621
 622                 qspi: spi@e6b10000 {
 623                         compatible = "renesas,qspi-r8a7793", "renesas,qspi";
 624                         reg = <0 0xe6b10000 0 0x2c>;
 625                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 626                         clocks = <&cpg CPG_MOD 917>;
 627                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 628                                <&dmac1 0x17>, <&dmac1 0x18>;
 629                         dma-names = "tx", "rx", "tx", "rx";
 630                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 631                         resets = <&cpg 917>;
 632                         num-cs = <1>;
 633                         #address-cells = <1>;
 634                         #size-cells = <0>;
 635                         status = "disabled";
 636                 };
 637
 638                 scifa0: serial@e6c40000 {
 639                         compatible = "renesas,scifa-r8a7793",
 640                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 641                         reg = <0 0xe6c40000 0 64>;
 642                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 643                         clocks = <&cpg CPG_MOD 204>;
 644                         clock-names = "fck";
 645                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 646                                <&dmac1 0x21>, <&dmac1 0x22>;
 647                         dma-names = "tx", "rx", "tx", "rx";
 648                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 649                         resets = <&cpg 204>;
 650                         status = "disabled";
 651                 };
 652
 653                 scifa1: serial@e6c50000 {
 654                         compatible = "renesas,scifa-r8a7793",
 655                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 656                         reg = <0 0xe6c50000 0 64>;
 657                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 658                         clocks = <&cpg CPG_MOD 203>;
 659                         clock-names = "fck";
 660                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 661                                <&dmac1 0x25>, <&dmac1 0x26>;
 662                         dma-names = "tx", "rx", "tx", "rx";
 663                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 664                         resets = <&cpg 203>;
 665                         status = "disabled";
 666                 };
 667
 668                 scifa2: serial@e6c60000 {
 669                         compatible = "renesas,scifa-r8a7793",
 670                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 671                         reg = <0 0xe6c60000 0 64>;
 672                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 673                         clocks = <&cpg CPG_MOD 202>;
 674                         clock-names = "fck";
 675                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 676                                <&dmac1 0x27>, <&dmac1 0x28>;
 677                         dma-names = "tx", "rx", "tx", "rx";
 678                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 679                         resets = <&cpg 202>;
 680                         status = "disabled";
 681                 };
 682
 683                 scifa3: serial@e6c70000 {
 684                         compatible = "renesas,scifa-r8a7793",
 685                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 686                         reg = <0 0xe6c70000 0 64>;
 687                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 688                         clocks = <&cpg CPG_MOD 1106>;
 689                         clock-names = "fck";
 690                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 691                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 692                         dma-names = "tx", "rx", "tx", "rx";
 693                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 694                         resets = <&cpg 1106>;
 695                         status = "disabled";
 696                 };
 697
 698                 scifa4: serial@e6c78000 {
 699                         compatible = "renesas,scifa-r8a7793",
 700                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 701                         reg = <0 0xe6c78000 0 64>;
 702                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 703                         clocks = <&cpg CPG_MOD 1107>;
 704                         clock-names = "fck";
 705                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 706                                <&dmac1 0x1f>, <&dmac1 0x20>;
 707                         dma-names = "tx", "rx", "tx", "rx";
 708                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 709                         resets = <&cpg 1107>;
 710                         status = "disabled";
 711                 };
 712
 713                 scifa5: serial@e6c80000 {
 714                         compatible = "renesas,scifa-r8a7793",
 715                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 716                         reg = <0 0xe6c80000 0 64>;
 717                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 718                         clocks = <&cpg CPG_MOD 1108>;
 719                         clock-names = "fck";
 720                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 721                                <&dmac1 0x23>, <&dmac1 0x24>;
 722                         dma-names = "tx", "rx", "tx", "rx";
 723                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 724                         resets = <&cpg 1108>;
 725                         status = "disabled";
 726                 };
 727
 728                 scifb0: serial@e6c20000 {
 729                         compatible = "renesas,scifb-r8a7793",
 730                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 731                         reg = <0 0xe6c20000 0 0x100>;
 732                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 733                         clocks = <&cpg CPG_MOD 206>;
 734                         clock-names = "fck";
 735                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 736                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 737                         dma-names = "tx", "rx", "tx", "rx";
 738                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 739                         resets = <&cpg 206>;
 740                         status = "disabled";
 741                 };
 742
 743                 scifb1: serial@e6c30000 {
 744                         compatible = "renesas,scifb-r8a7793",
 745                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 746                         reg = <0 0xe6c30000 0 0x100>;
 747                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 748                         clocks = <&cpg CPG_MOD 207>;
 749                         clock-names = "fck";
 750                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 751                                <&dmac1 0x19>, <&dmac1 0x1a>;
 752                         dma-names = "tx", "rx", "tx", "rx";
 753                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 754                         resets = <&cpg 207>;
 755                         status = "disabled";
 756                 };
 757
 758                 scifb2: serial@e6ce0000 {
 759                         compatible = "renesas,scifb-r8a7793",
 760                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 761                         reg = <0 0xe6ce0000 0 0x100>;
 762                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 763                         clocks = <&cpg CPG_MOD 216>;
 764                         clock-names = "fck";
 765                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 766                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 767                         dma-names = "tx", "rx", "tx", "rx";
 768                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 769                         resets = <&cpg 216>;
 770                         status = "disabled";
 771                 };
 772
 773                 scif0: serial@e6e60000 {
 774                         compatible = "renesas,scif-r8a7793",
 775                                      "renesas,rcar-gen2-scif", "renesas,scif";
 776                         reg = <0 0xe6e60000 0 64>;
 777                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 778                         clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 779                                  <&scif_clk>;
 780                         clock-names = "fck", "brg_int", "scif_clk";
 781                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 782                                <&dmac1 0x29>, <&dmac1 0x2a>;
 783                         dma-names = "tx", "rx", "tx", "rx";
 784                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 785                         resets = <&cpg 721>;
 786                         status = "disabled";
 787                 };
 788
 789                 scif1: serial@e6e68000 {
 790                         compatible = "renesas,scif-r8a7793",
 791                                      "renesas,rcar-gen2-scif", "renesas,scif";
 792                         reg = <0 0xe6e68000 0 64>;
 793                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 794                         clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 795                                  <&scif_clk>;
 796                         clock-names = "fck", "brg_int", "scif_clk";
 797                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 798                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 799                         dma-names = "tx", "rx", "tx", "rx";
 800                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 801                         resets = <&cpg 720>;
 802                         status = "disabled";
 803                 };
 804
 805                 scif2: serial@e6e58000 {
 806                         compatible = "renesas,scif-r8a7793",
 807                                      "renesas,rcar-gen2-scif", "renesas,scif";
 808                         reg = <0 0xe6e58000 0 64>;
 809                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 810                         clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 811                                  <&scif_clk>;
 812                         clock-names = "fck", "brg_int", "scif_clk";
 813                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 814                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 815                         dma-names = "tx", "rx", "tx", "rx";
 816                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 817                         resets = <&cpg 719>;
 818                         status = "disabled";
 819                 };
 820
 821                 scif3: serial@e6ea8000 {
 822                         compatible = "renesas,scif-r8a7793",
 823                                      "renesas,rcar-gen2-scif", "renesas,scif";
 824                         reg = <0 0xe6ea8000 0 64>;
 825                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 826                         clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 827                                  <&scif_clk>;
 828                         clock-names = "fck", "brg_int", "scif_clk";
 829                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 830                                <&dmac1 0x2f>, <&dmac1 0x30>;
 831                         dma-names = "tx", "rx", "tx", "rx";
 832                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 833                         resets = <&cpg 718>;
 834                         status = "disabled";
 835                 };
 836
 837                 scif4: serial@e6ee0000 {
 838                         compatible = "renesas,scif-r8a7793",
 839                                      "renesas,rcar-gen2-scif", "renesas,scif";
 840                         reg = <0 0xe6ee0000 0 64>;
 841                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 842                         clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 843                                  <&scif_clk>;
 844                         clock-names = "fck", "brg_int", "scif_clk";
 845                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 846                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 847                         dma-names = "tx", "rx", "tx", "rx";
 848                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 849                         resets = <&cpg 715>;
 850                         status = "disabled";
 851                 };
 852
 853                 scif5: serial@e6ee8000 {
 854                         compatible = "renesas,scif-r8a7793",
 855                                      "renesas,rcar-gen2-scif", "renesas,scif";
 856                         reg = <0 0xe6ee8000 0 64>;
 857                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 858                         clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 859                                  <&scif_clk>;
 860                         clock-names = "fck", "brg_int", "scif_clk";
 861                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 862                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 863                         dma-names = "tx", "rx", "tx", "rx";
 864                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 865                         resets = <&cpg 714>;
 866                         status = "disabled";
 867                 };
 868
 869                 hscif0: serial@e62c0000 {
 870                         compatible = "renesas,hscif-r8a7793",
 871                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 872                         reg = <0 0xe62c0000 0 96>;
 873                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 874                         clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 875                                  <&scif_clk>;
 876                         clock-names = "fck", "brg_int", "scif_clk";
 877                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 878                                <&dmac1 0x39>, <&dmac1 0x3a>;
 879                         dma-names = "tx", "rx", "tx", "rx";
 880                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 881                         resets = <&cpg 717>;
 882                         status = "disabled";
 883                 };
 884
 885                 hscif1: serial@e62c8000 {
 886                         compatible = "renesas,hscif-r8a7793",
 887                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 888                         reg = <0 0xe62c8000 0 96>;
 889                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 890                         clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 891                                  <&scif_clk>;
 892                         clock-names = "fck", "brg_int", "scif_clk";
 893                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 894                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 895                         dma-names = "tx", "rx", "tx", "rx";
 896                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 897                         resets = <&cpg 716>;
 898                         status = "disabled";
 899                 };
 900
 901                 hscif2: serial@e62d0000 {
 902                         compatible = "renesas,hscif-r8a7793",
 903                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 904                         reg = <0 0xe62d0000 0 96>;
 905                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 906                         clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 907                                  <&scif_clk>;
 908                         clock-names = "fck", "brg_int", "scif_clk";
 909                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 910                                <&dmac1 0x3b>, <&dmac1 0x3c>;
 911                         dma-names = "tx", "rx", "tx", "rx";
 912                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 913                         resets = <&cpg 713>;
 914                         status = "disabled";
 915                 };
 916
 917                 can0: can@e6e80000 {
 918                         compatible = "renesas,can-r8a7793",
 919                                      "renesas,rcar-gen2-can";
 920                         reg = <0 0xe6e80000 0 0x1000>;
 921                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 922                         clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
 923                                  <&can_clk>;
 924                         clock-names = "clkp1", "clkp2", "can_clk";
 925                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 926                         resets = <&cpg 916>;
 927                         status = "disabled";
 928                 };
 929
 930                 can1: can@e6e88000 {
 931                         compatible = "renesas,can-r8a7793",
 932                                      "renesas,rcar-gen2-can";
 933                         reg = <0 0xe6e88000 0 0x1000>;
 934                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 935                         clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
 936                                  <&can_clk>;
 937                         clock-names = "clkp1", "clkp2", "can_clk";
 938                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 939                         resets = <&cpg 915>;
 940                         status = "disabled";
 941                 };
 942
 943                 vin0: video@e6ef0000 {
 944                         compatible = "renesas,vin-r8a7793",
 945                                      "renesas,rcar-gen2-vin";
 946                         reg = <0 0xe6ef0000 0 0x1000>;
 947                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 948                         clocks = <&cpg CPG_MOD 811>;
 949                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 950                         resets = <&cpg 811>;
 951                         status = "disabled";
 952                 };
 953
 954                 vin1: video@e6ef1000 {
 955                         compatible = "renesas,vin-r8a7793",
 956                                      "renesas,rcar-gen2-vin";
 957                         reg = <0 0xe6ef1000 0 0x1000>;
 958                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 959                         clocks = <&cpg CPG_MOD 810>;
 960                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 961                         resets = <&cpg 810>;
 962                         status = "disabled";
 963                 };
 964
 965                 vin2: video@e6ef2000 {
 966                         compatible = "renesas,vin-r8a7793",
 967                                      "renesas,rcar-gen2-vin";
 968                         reg = <0 0xe6ef2000 0 0x1000>;
 969                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 970                         clocks = <&cpg CPG_MOD 809>;
 971                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 972                         resets = <&cpg 809>;
 973                         status = "disabled";
 974                 };
 975
 976                 rcar_sound: sound@ec500000 {
 977                         /*
 978                          * #sound-dai-cells is required
 979                          *
 980                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
 981                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
 982                          */
 983                         compatible = "renesas,rcar_sound-r8a7793",
 984                                      "renesas,rcar_sound-gen2";
 985                         reg = <0 0xec500000 0 0x1000>, /* SCU */
 986                               <0 0xec5a0000 0 0x100>,  /* ADG */
 987                               <0 0xec540000 0 0x1000>, /* SSIU */
 988                               <0 0xec541000 0 0x280>,  /* SSI */
 989                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 990                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 991
 992                         clocks = <&cpg CPG_MOD 1005>,
 993                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 994                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 995                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 996                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 997                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 998                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 999                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1000                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1001                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1002                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1003                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1004                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1005                                  <&cpg CPG_CORE R8A7793_CLK_M2>;
1006                         clock-names = "ssi-all",
1007                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1008                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1009                                       "ssi.1", "ssi.0",
1010                                       "src.9", "src.8", "src.7", "src.6",
1011                                       "src.5", "src.4", "src.3", "src.2",
1012                                       "src.1", "src.0",
1013                                       "dvc.0", "dvc.1",
1014                                       "clk_a", "clk_b", "clk_c", "clk_i";
1015                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1016                         resets = <&cpg 1005>,
1017                                  <&cpg 1006>, <&cpg 1007>,
1018                                  <&cpg 1008>, <&cpg 1009>,
1019                                  <&cpg 1010>, <&cpg 1011>,
1020                                  <&cpg 1012>, <&cpg 1013>,
1021                                  <&cpg 1014>, <&cpg 1015>;
1022                         reset-names = "ssi-all",
1023                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1024                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1025                                       "ssi.1", "ssi.0";
1026
1027                         status = "disabled";
1028
1029                         rcar_sound,dvc {
1030                                 dvc0: dvc-0 {
1031                                         dmas = <&audma1 0xbc>;
1032                                         dma-names = "tx";
1033                                 };
1034                                 dvc1: dvc-1 {
1035                                         dmas = <&audma1 0xbe>;
1036                                         dma-names = "tx";
1037                                 };
1038                         };
1039
1040                         rcar_sound,src {
1041                                 src0: src-0 {
1042                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1043                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1044                                         dma-names = "rx", "tx";
1045                                 };
1046                                 src1: src-1 {
1047                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1048                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1049                                         dma-names = "rx", "tx";
1050                                 };
1051                                 src2: src-2 {
1052                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1053                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1054                                         dma-names = "rx", "tx";
1055                                 };
1056                                 src3: src-3 {
1057                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1058                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1059                                         dma-names = "rx", "tx";
1060                                 };
1061                                 src4: src-4 {
1062                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1063                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1064                                         dma-names = "rx", "tx";
1065                                 };
1066                                 src5: src-5 {
1067                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1068                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1069                                         dma-names = "rx", "tx";
1070                                 };
1071                                 src6: src-6 {
1072                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1073                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1074                                         dma-names = "rx", "tx";
1075                                 };
1076                                 src7: src-7 {
1077                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1078                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1079                                         dma-names = "rx", "tx";
1080                                 };
1081                                 src8: src-8 {
1082                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1083                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1084                                         dma-names = "rx", "tx";
1085                                 };
1086                                 src9: src-9 {
1087                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1088                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1089                                         dma-names = "rx", "tx";
1090                                 };
1091                         };
1092
1093                         rcar_sound,ssi {
1094                                 ssi0: ssi-0 {
1095                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1096                                         dmas = <&audma0 0x01>, <&audma1 0x02>,
1097                                                <&audma0 0x15>, <&audma1 0x16>;
1098                                         dma-names = "rx", "tx", "rxu", "txu";
1099                                 };
1100                                 ssi1: ssi-1 {
1101                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1102                                         dmas = <&audma0 0x03>, <&audma1 0x04>,
1103                                                <&audma0 0x49>, <&audma1 0x4a>;
1104                                         dma-names = "rx", "tx", "rxu", "txu";
1105                                 };
1106                                 ssi2: ssi-2 {
1107                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1108                                         dmas = <&audma0 0x05>, <&audma1 0x06>,
1109                                                <&audma0 0x63>, <&audma1 0x64>;
1110                                         dma-names = "rx", "tx", "rxu", "txu";
1111                                 };
1112                                 ssi3: ssi-3 {
1113                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1114                                         dmas = <&audma0 0x07>, <&audma1 0x08>,
1115                                                <&audma0 0x6f>, <&audma1 0x70>;
1116                                         dma-names = "rx", "tx", "rxu", "txu";
1117                                 };
1118                                 ssi4: ssi-4 {
1119                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1120                                         dmas = <&audma0 0x09>, <&audma1 0x0a>,
1121                                                <&audma0 0x71>, <&audma1 0x72>;
1122                                         dma-names = "rx", "tx", "rxu", "txu";
1123                                 };
1124                                 ssi5: ssi-5 {
1125                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1126                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1127                                                <&audma0 0x73>, <&audma1 0x74>;
1128                                         dma-names = "rx", "tx", "rxu", "txu";
1129                                 };
1130                                 ssi6: ssi-6 {
1131                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1132                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1133                                                <&audma0 0x75>, <&audma1 0x76>;
1134                                         dma-names = "rx", "tx", "rxu", "txu";
1135                                 };
1136                                 ssi7: ssi-7 {
1137                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1138                                         dmas = <&audma0 0x0f>, <&audma1 0x10>,
1139                                                <&audma0 0x79>, <&audma1 0x7a>;
1140                                         dma-names = "rx", "tx", "rxu", "txu";
1141                                 };
1142                                 ssi8: ssi-8 {
1143                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1144                                         dmas = <&audma0 0x11>, <&audma1 0x12>,
1145                                                <&audma0 0x7b>, <&audma1 0x7c>;
1146                                         dma-names = "rx", "tx", "rxu", "txu";
1147                                 };
1148                                 ssi9: ssi-9 {
1149                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1150                                         dmas = <&audma0 0x13>, <&audma1 0x14>,
1151                                                <&audma0 0x7d>, <&audma1 0x7e>;
1152                                         dma-names = "rx", "tx", "rxu", "txu";
1153                                 };
1154                         };
1155                 };
1156
1157                 audma0: dma-controller@ec700000 {
1158                         compatible = "renesas,dmac-r8a7793",
1159                                      "renesas,rcar-dmac";
1160                         reg = <0 0xec700000 0 0x10000>;
1161                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1162                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1163                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1164                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1165                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1166                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1167                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1168                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1169                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1170                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1171                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1172                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1173                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1174                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1175                         interrupt-names = "error",
1176                                           "ch0", "ch1", "ch2", "ch3",
1177                                           "ch4", "ch5", "ch6", "ch7",
1178                                           "ch8", "ch9", "ch10", "ch11",
1179                                           "ch12";
1180                         clocks = <&cpg CPG_MOD 502>;
1181                         clock-names = "fck";
1182                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1183                         resets = <&cpg 502>;
1184                         #dma-cells = <1>;
1185                         dma-channels = <13>;
1186                 };
1187
1188                 audma1: dma-controller@ec720000 {
1189                         compatible = "renesas,dmac-r8a7793",
1190                                      "renesas,rcar-dmac";
1191                         reg = <0 0xec720000 0 0x10000>;
1192                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1193                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1194                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1195                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1196                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1197                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1198                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1199                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1200                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1201                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1202                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1203                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1204                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1205                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1206                         interrupt-names = "error",
1207                                           "ch0", "ch1", "ch2", "ch3",
1208                                           "ch4", "ch5", "ch6", "ch7",
1209                                           "ch8", "ch9", "ch10", "ch11",
1210                                           "ch12";
1211                         clocks = <&cpg CPG_MOD 501>;
1212                         clock-names = "fck";
1213                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1214                         resets = <&cpg 501>;
1215                         #dma-cells = <1>;
1216                         dma-channels = <13>;
1217                 };
1218
1219                 sdhi0: sd@ee100000 {
1220                         compatible = "renesas,sdhi-r8a7793",
1221                                      "renesas,rcar-gen2-sdhi";
1222                         reg = <0 0xee100000 0 0x328>;
1223                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1224                         clocks = <&cpg CPG_MOD 314>;
1225                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1226                                <&dmac1 0xcd>, <&dmac1 0xce>;
1227                         dma-names = "tx", "rx", "tx", "rx";
1228                         max-frequency = <195000000>;
1229                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1230                         resets = <&cpg 314>;
1231                         status = "disabled";
1232                 };
1233
1234                 sdhi1: sd@ee140000 {
1235                         compatible = "renesas,sdhi-r8a7793",
1236                                      "renesas,rcar-gen2-sdhi";
1237                         reg = <0 0xee140000 0 0x100>;
1238                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1239                         clocks = <&cpg CPG_MOD 312>;
1240                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1241                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1242                         dma-names = "tx", "rx", "tx", "rx";
1243                         max-frequency = <97500000>;
1244                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1245                         resets = <&cpg 312>;
1246                         status = "disabled";
1247                 };
1248
1249                 sdhi2: sd@ee160000 {
1250                         compatible = "renesas,sdhi-r8a7793",
1251                                      "renesas,rcar-gen2-sdhi";
1252                         reg = <0 0xee160000 0 0x100>;
1253                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1254                         clocks = <&cpg CPG_MOD 311>;
1255                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1256                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1257                         dma-names = "tx", "rx", "tx", "rx";
1258                         max-frequency = <97500000>;
1259                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1260                         resets = <&cpg 311>;
1261                         status = "disabled";
1262                 };
1263
1264                 mmcif0: mmc@ee200000 {
1265                         compatible = "renesas,mmcif-r8a7793",
1266                                      "renesas,sh-mmcif";
1267                         reg = <0 0xee200000 0 0x80>;
1268                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1269                         clocks = <&cpg CPG_MOD 315>;
1270                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1271                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1272                         dma-names = "tx", "rx", "tx", "rx";
1273                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1274                         resets = <&cpg 315>;
1275                         reg-io-width = <4>;
1276                         status = "disabled";
1277                         max-frequency = <97500000>;
1278                 };
1279
1280                 ether: ethernet@ee700000 {
1281                         compatible = "renesas,ether-r8a7793",
1282                                      "renesas,rcar-gen2-ether";
1283                         reg = <0 0xee700000 0 0x400>;
1284                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1285                         clocks = <&cpg CPG_MOD 813>;
1286                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1287                         resets = <&cpg 813>;
1288                         phy-mode = "rmii";
1289                         #address-cells = <1>;
1290                         #size-cells = <0>;
1291                         status = "disabled";
1292                 };
1293
1294                 gic: interrupt-controller@f1001000 {
1295                         compatible = "arm,gic-400";
1296                         #interrupt-cells = <3>;
1297                         #address-cells = <0>;
1298                         interrupt-controller;
1299                         reg = <0 0xf1001000 0 0x1000>,
1300                                 <0 0xf1002000 0 0x2000>,
1301                                 <0 0xf1004000 0 0x2000>,
1302                                 <0 0xf1006000 0 0x2000>;
1303                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1304                         clocks = <&cpg CPG_MOD 408>;
1305                         clock-names = "clk";
1306                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1307                         resets = <&cpg 408>;
1308                 };
1309
1310                 fdp1@fe940000 {
1311                         compatible = "renesas,fdp1";
1312                         reg = <0 0xfe940000 0 0x2400>;
1313                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1314                         clocks = <&cpg CPG_MOD 119>;
1315                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1316                         resets = <&cpg 119>;
1317                 };
1318
1319                 fdp1@fe944000 {
1320                         compatible = "renesas,fdp1";
1321                         reg = <0 0xfe944000 0 0x2400>;
1322                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1323                         clocks = <&cpg CPG_MOD 118>;
1324                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1325                         resets = <&cpg 118>;
1326                 };
1327
1328                 du: display@feb00000 {
1329                         compatible = "renesas,du-r8a7793";
1330                         reg = <0 0xfeb00000 0 0x40000>;
1331                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1332                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1333                         clocks = <&cpg CPG_MOD 724>,
1334                                  <&cpg CPG_MOD 723>;
1335                         clock-names = "du.0", "du.1";
1336                         status = "disabled";
1337
1338                         ports {
1339                                 #address-cells = <1>;
1340                                 #size-cells = <0>;
1341
1342                                 port@0 {
1343                                         reg = <0>;
1344                                         du_out_rgb: endpoint {
1345                                         };
1346                                 };
1347                                 port@1 {
1348                                         reg = <1>;
1349                                         du_out_lvds0: endpoint {
1350                                                 remote-endpoint = <&lvds0_in>;
1351                                         };
1352                                 };
1353                         };
1354                 };
1355
1356                 lvds0: lvds@feb90000 {
1357                         compatible = "renesas,r8a7793-lvds";
1358                         reg = <0 0xfeb90000 0 0x1c>;
1359                         clocks = <&cpg CPG_MOD 726>;
1360                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1361                         resets = <&cpg 726>;
1362
1363                         status = "disabled";
1364
1365                         ports {
1366                                 #address-cells = <1>;
1367                                 #size-cells = <0>;
1368
1369                                 port@0 {
1370                                         reg = <0>;
1371                                         lvds0_in: endpoint {
1372                                                 remote-endpoint = <&du_out_lvds0>;
1373                                         };
1374                                 };
1375                                 port@1 {
1376                                         reg = <1>;
1377                                         lvds0_out: endpoint {
1378                                         };
1379                                 };
1380                         };
1381                 };
1382
1383                 prr: chipid@ff000044 {
1384                         compatible = "renesas,prr";
1385                         reg = <0 0xff000044 0 4>;
1386                 };
1387
1388                 cmt0: timer@ffca0000 {
1389                         compatible = "renesas,r8a7793-cmt0",
1390                                      "renesas,rcar-gen2-cmt0";
1391                         reg = <0 0xffca0000 0 0x1004>;
1392                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1393                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1394                         clocks = <&cpg CPG_MOD 124>;
1395                         clock-names = "fck";
1396                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1397                         resets = <&cpg 124>;
1398
1399                         status = "disabled";
1400                 };
1401
1402                 cmt1: timer@e6130000 {
1403                         compatible = "renesas,r8a7793-cmt1",
1404                                      "renesas,rcar-gen2-cmt1";
1405                         reg = <0 0xe6130000 0 0x1004>;
1406                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1407                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1408                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1409                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1410                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1411                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1412                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1413                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1414                         clocks = <&cpg CPG_MOD 329>;
1415                         clock-names = "fck";
1416                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1417                         resets = <&cpg 329>;
1418
1419                         status = "disabled";
1420                 };
1421         };
1422
1423         thermal-zones {
1424                 cpu_thermal: cpu-thermal {
1425                         polling-delay-passive = <0>;
1426                         polling-delay = <0>;
1427
1428                         thermal-sensors = <&thermal>;
1429
1430                         trips {
1431                                 cpu-crit {
1432                                         temperature = <95000>;
1433                                         hysteresis = <0>;
1434                                         type = "critical";
1435                                 };
1436                         };
1437                         cooling-maps {
1438                         };
1439                 };
1440         };
1441
1442         timer {
1443                 compatible = "arm,armv7-timer";
1444                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1445                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1446                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1447                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1448         };
1449
1450         /* External USB clock - can be overridden by the board */
1451         usb_extal_clk: usb_extal {
1452                 compatible = "fixed-clock";
1453                 #clock-cells = <0>;
1454                 clock-frequency = <48000000>;
1455         };
1456 };