2 * Device Tree Source for the r8a7791 SoC
4 * Copyright (C) 2013-2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
13 #include <dt-bindings/clock/r8a7791-clock.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/power/r8a7791-sysc.h>
19 compatible = "renesas,r8a7791";
20 interrupt-parent = <&gic>;
46 enable-method = "renesas,apmu";
50 compatible = "arm,cortex-a15";
52 clock-frequency = <1500000000>;
53 voltage-tolerance = <1>; /* 1% */
54 clocks = <&cpg_clocks R8A7791_CLK_Z>;
55 clock-latency = <300000>; /* 300 us */
56 power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
57 next-level-cache = <&L2_CA15>;
59 /* kHz - uV - OPPs unknown yet */
60 operating-points = <1500000 1000000>,
70 compatible = "arm,cortex-a15";
72 clock-frequency = <1500000000>;
73 power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
74 next-level-cache = <&L2_CA15>;
77 L2_CA15: cache-controller-0 {
79 power-domains = <&sysc R8A7791_PD_CA15_SCU>;
86 cpu_thermal: cpu-thermal {
87 polling-delay-passive = <0>;
90 thermal-sensors = <&thermal>;
94 temperature = <115000>;
105 compatible = "renesas,r8a7791-apmu", "renesas,apmu";
106 reg = <0 0xe6152000 0 0x188>;
107 cpus = <&cpu0 &cpu1>;
110 gic: interrupt-controller@f1001000 {
111 compatible = "arm,gic-400";
112 #interrupt-cells = <3>;
113 #address-cells = <0>;
114 interrupt-controller;
115 reg = <0 0xf1001000 0 0x1000>,
116 <0 0xf1002000 0 0x2000>,
117 <0 0xf1004000 0 0x2000>,
118 <0 0xf1006000 0 0x2000>;
119 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
120 clocks = <&mstp4_clks R8A7791_CLK_INTC_SYS>;
122 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
125 gpio0: gpio@e6050000 {
126 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
127 reg = <0 0xe6050000 0 0x50>;
128 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
131 gpio-ranges = <&pfc 0 0 32>;
132 #interrupt-cells = <2>;
133 interrupt-controller;
134 clocks = <&mstp9_clks R8A7791_CLK_GPIO0>;
135 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
138 gpio1: gpio@e6051000 {
139 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
140 reg = <0 0xe6051000 0 0x50>;
141 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
144 gpio-ranges = <&pfc 0 32 26>;
145 #interrupt-cells = <2>;
146 interrupt-controller;
147 clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
148 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
151 gpio2: gpio@e6052000 {
152 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
153 reg = <0 0xe6052000 0 0x50>;
154 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
157 gpio-ranges = <&pfc 0 64 32>;
158 #interrupt-cells = <2>;
159 interrupt-controller;
160 clocks = <&mstp9_clks R8A7791_CLK_GPIO2>;
161 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
164 gpio3: gpio@e6053000 {
165 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
166 reg = <0 0xe6053000 0 0x50>;
167 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
170 gpio-ranges = <&pfc 0 96 32>;
171 #interrupt-cells = <2>;
172 interrupt-controller;
173 clocks = <&mstp9_clks R8A7791_CLK_GPIO3>;
174 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
177 gpio4: gpio@e6054000 {
178 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
179 reg = <0 0xe6054000 0 0x50>;
180 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
183 gpio-ranges = <&pfc 0 128 32>;
184 #interrupt-cells = <2>;
185 interrupt-controller;
186 clocks = <&mstp9_clks R8A7791_CLK_GPIO4>;
187 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
190 gpio5: gpio@e6055000 {
191 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
192 reg = <0 0xe6055000 0 0x50>;
193 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
196 gpio-ranges = <&pfc 0 160 32>;
197 #interrupt-cells = <2>;
198 interrupt-controller;
199 clocks = <&mstp9_clks R8A7791_CLK_GPIO5>;
200 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
203 gpio6: gpio@e6055400 {
204 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
205 reg = <0 0xe6055400 0 0x50>;
206 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
209 gpio-ranges = <&pfc 0 192 32>;
210 #interrupt-cells = <2>;
211 interrupt-controller;
212 clocks = <&mstp9_clks R8A7791_CLK_GPIO6>;
213 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
216 gpio7: gpio@e6055800 {
217 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
218 reg = <0 0xe6055800 0 0x50>;
219 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
222 gpio-ranges = <&pfc 0 224 26>;
223 #interrupt-cells = <2>;
224 interrupt-controller;
225 clocks = <&mstp9_clks R8A7791_CLK_GPIO7>;
226 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
229 thermal: thermal@e61f0000 {
230 compatible = "renesas,thermal-r8a7791",
231 "renesas,rcar-gen2-thermal",
232 "renesas,rcar-thermal";
233 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
234 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
235 clocks = <&mstp5_clks R8A7791_CLK_THERMAL>;
236 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
237 #thermal-sensor-cells = <0>;
241 compatible = "arm,armv7-timer";
242 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
243 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
244 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
245 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
248 cmt0: timer@ffca0000 {
249 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
250 reg = <0 0xffca0000 0 0x1004>;
251 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
252 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
253 clocks = <&mstp1_clks R8A7791_CLK_CMT0>;
255 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
257 renesas,channels-mask = <0x60>;
262 cmt1: timer@e6130000 {
263 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
264 reg = <0 0xe6130000 0 0x1004>;
265 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
266 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
267 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
268 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
269 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
270 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
271 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
272 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
273 clocks = <&mstp3_clks R8A7791_CLK_CMT1>;
275 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
277 renesas,channels-mask = <0xff>;
282 irqc0: interrupt-controller@e61c0000 {
283 compatible = "renesas,irqc-r8a7791", "renesas,irqc";
284 #interrupt-cells = <2>;
285 interrupt-controller;
286 reg = <0 0xe61c0000 0 0x200>;
287 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
288 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
289 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
290 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
291 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
292 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
293 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
294 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
295 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
296 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
297 clocks = <&mstp4_clks R8A7791_CLK_IRQC>;
298 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
301 dmac0: dma-controller@e6700000 {
302 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
303 reg = <0 0xe6700000 0 0x20000>;
304 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
305 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
306 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
307 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
308 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
309 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
310 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
311 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
312 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
313 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
314 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
315 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
316 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
317 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
318 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
319 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
320 interrupt-names = "error",
321 "ch0", "ch1", "ch2", "ch3",
322 "ch4", "ch5", "ch6", "ch7",
323 "ch8", "ch9", "ch10", "ch11",
324 "ch12", "ch13", "ch14";
325 clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC0>;
327 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
332 dmac1: dma-controller@e6720000 {
333 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
334 reg = <0 0xe6720000 0 0x20000>;
335 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
336 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
337 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
338 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
339 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
340 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
341 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
342 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
343 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
344 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
345 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
346 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
347 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
348 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
351 interrupt-names = "error",
352 "ch0", "ch1", "ch2", "ch3",
353 "ch4", "ch5", "ch6", "ch7",
354 "ch8", "ch9", "ch10", "ch11",
355 "ch12", "ch13", "ch14";
356 clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC1>;
358 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
363 audma0: dma-controller@ec700000 {
364 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
365 reg = <0 0xec700000 0 0x10000>;
366 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
367 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
368 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
369 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
370 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
371 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
372 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
373 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
374 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
375 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
376 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
377 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
378 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
379 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
380 interrupt-names = "error",
381 "ch0", "ch1", "ch2", "ch3",
382 "ch4", "ch5", "ch6", "ch7",
383 "ch8", "ch9", "ch10", "ch11",
385 clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>;
387 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
392 audma1: dma-controller@ec720000 {
393 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
394 reg = <0 0xec720000 0 0x10000>;
395 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
396 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
397 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
398 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
399 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
400 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
401 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
402 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
404 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
405 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
406 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
407 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
408 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
409 interrupt-names = "error",
410 "ch0", "ch1", "ch2", "ch3",
411 "ch4", "ch5", "ch6", "ch7",
412 "ch8", "ch9", "ch10", "ch11",
414 clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>;
416 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
421 usb_dmac0: dma-controller@e65a0000 {
422 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
423 reg = <0 0xe65a0000 0 0x100>;
424 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
425 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
426 interrupt-names = "ch0", "ch1";
427 clocks = <&mstp3_clks R8A7791_CLK_USBDMAC0>;
428 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
433 usb_dmac1: dma-controller@e65b0000 {
434 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
435 reg = <0 0xe65b0000 0 0x100>;
436 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
437 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
438 interrupt-names = "ch0", "ch1";
439 clocks = <&mstp3_clks R8A7791_CLK_USBDMAC1>;
440 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
445 /* The memory map in the User's Manual maps the cores to bus numbers */
447 #address-cells = <1>;
449 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
450 reg = <0 0xe6508000 0 0x40>;
451 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
452 clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
453 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
454 i2c-scl-internal-delay-ns = <6>;
459 #address-cells = <1>;
461 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
462 reg = <0 0xe6518000 0 0x40>;
463 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
464 clocks = <&mstp9_clks R8A7791_CLK_I2C1>;
465 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
466 i2c-scl-internal-delay-ns = <6>;
471 #address-cells = <1>;
473 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
474 reg = <0 0xe6530000 0 0x40>;
475 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
476 clocks = <&mstp9_clks R8A7791_CLK_I2C2>;
477 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
478 i2c-scl-internal-delay-ns = <6>;
483 #address-cells = <1>;
485 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
486 reg = <0 0xe6540000 0 0x40>;
487 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
488 clocks = <&mstp9_clks R8A7791_CLK_I2C3>;
489 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
490 i2c-scl-internal-delay-ns = <6>;
495 #address-cells = <1>;
497 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
498 reg = <0 0xe6520000 0 0x40>;
499 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
500 clocks = <&mstp9_clks R8A7791_CLK_I2C4>;
501 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
502 i2c-scl-internal-delay-ns = <6>;
507 /* doesn't need pinmux */
508 #address-cells = <1>;
510 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
511 reg = <0 0xe6528000 0 0x40>;
512 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
513 clocks = <&mstp9_clks R8A7791_CLK_I2C5>;
514 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
515 i2c-scl-internal-delay-ns = <110>;
520 /* doesn't need pinmux */
521 #address-cells = <1>;
523 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
524 "renesas,rmobile-iic";
525 reg = <0 0xe60b0000 0 0x425>;
526 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
527 clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
528 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
529 <&dmac1 0x77>, <&dmac1 0x78>;
530 dma-names = "tx", "rx", "tx", "rx";
531 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
536 #address-cells = <1>;
538 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
539 "renesas,rmobile-iic";
540 reg = <0 0xe6500000 0 0x425>;
541 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
543 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
544 <&dmac1 0x61>, <&dmac1 0x62>;
545 dma-names = "tx", "rx", "tx", "rx";
546 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
551 #address-cells = <1>;
553 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
554 "renesas,rmobile-iic";
555 reg = <0 0xe6510000 0 0x425>;
556 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
557 clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
558 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
559 <&dmac1 0x65>, <&dmac1 0x66>;
560 dma-names = "tx", "rx", "tx", "rx";
561 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
566 compatible = "renesas,pfc-r8a7791";
567 reg = <0 0xe6060000 0 0x250>;
570 mmcif0: mmc@ee200000 {
571 compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif";
572 reg = <0 0xee200000 0 0x80>;
573 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&mstp3_clks R8A7791_CLK_MMCIF0>;
575 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
576 <&dmac1 0xd1>, <&dmac1 0xd2>;
577 dma-names = "tx", "rx", "tx", "rx";
578 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
581 max-frequency = <97500000>;
585 compatible = "renesas,sdhi-r8a7791";
586 reg = <0 0xee100000 0 0x328>;
587 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
588 clocks = <&mstp3_clks R8A7791_CLK_SDHI0>;
589 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
590 <&dmac1 0xcd>, <&dmac1 0xce>;
591 dma-names = "tx", "rx", "tx", "rx";
592 max-frequency = <195000000>;
593 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
598 compatible = "renesas,sdhi-r8a7791";
599 reg = <0 0xee140000 0 0x100>;
600 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
601 clocks = <&mstp3_clks R8A7791_CLK_SDHI1>;
602 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
603 <&dmac1 0xc1>, <&dmac1 0xc2>;
604 dma-names = "tx", "rx", "tx", "rx";
605 max-frequency = <97500000>;
606 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
611 compatible = "renesas,sdhi-r8a7791";
612 reg = <0 0xee160000 0 0x100>;
613 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
614 clocks = <&mstp3_clks R8A7791_CLK_SDHI2>;
615 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
616 <&dmac1 0xd3>, <&dmac1 0xd4>;
617 dma-names = "tx", "rx", "tx", "rx";
618 max-frequency = <97500000>;
619 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
623 scifa0: serial@e6c40000 {
624 compatible = "renesas,scifa-r8a7791",
625 "renesas,rcar-gen2-scifa", "renesas,scifa";
626 reg = <0 0xe6c40000 0 64>;
627 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
628 clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>;
630 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
631 <&dmac1 0x21>, <&dmac1 0x22>;
632 dma-names = "tx", "rx", "tx", "rx";
633 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
637 scifa1: serial@e6c50000 {
638 compatible = "renesas,scifa-r8a7791",
639 "renesas,rcar-gen2-scifa", "renesas,scifa";
640 reg = <0 0xe6c50000 0 64>;
641 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
642 clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>;
644 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
645 <&dmac1 0x25>, <&dmac1 0x26>;
646 dma-names = "tx", "rx", "tx", "rx";
647 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
651 scifa2: serial@e6c60000 {
652 compatible = "renesas,scifa-r8a7791",
653 "renesas,rcar-gen2-scifa", "renesas,scifa";
654 reg = <0 0xe6c60000 0 64>;
655 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
656 clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>;
658 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
659 <&dmac1 0x27>, <&dmac1 0x28>;
660 dma-names = "tx", "rx", "tx", "rx";
661 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
665 scifa3: serial@e6c70000 {
666 compatible = "renesas,scifa-r8a7791",
667 "renesas,rcar-gen2-scifa", "renesas,scifa";
668 reg = <0 0xe6c70000 0 64>;
669 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
670 clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>;
672 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
673 <&dmac1 0x1b>, <&dmac1 0x1c>;
674 dma-names = "tx", "rx", "tx", "rx";
675 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
679 scifa4: serial@e6c78000 {
680 compatible = "renesas,scifa-r8a7791",
681 "renesas,rcar-gen2-scifa", "renesas,scifa";
682 reg = <0 0xe6c78000 0 64>;
683 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
684 clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>;
686 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
687 <&dmac1 0x1f>, <&dmac1 0x20>;
688 dma-names = "tx", "rx", "tx", "rx";
689 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
693 scifa5: serial@e6c80000 {
694 compatible = "renesas,scifa-r8a7791",
695 "renesas,rcar-gen2-scifa", "renesas,scifa";
696 reg = <0 0xe6c80000 0 64>;
697 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
698 clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>;
700 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
701 <&dmac1 0x23>, <&dmac1 0x24>;
702 dma-names = "tx", "rx", "tx", "rx";
703 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
707 scifb0: serial@e6c20000 {
708 compatible = "renesas,scifb-r8a7791",
709 "renesas,rcar-gen2-scifb", "renesas,scifb";
710 reg = <0 0xe6c20000 0 0x100>;
711 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
712 clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>;
714 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
715 <&dmac1 0x3d>, <&dmac1 0x3e>;
716 dma-names = "tx", "rx", "tx", "rx";
717 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
721 scifb1: serial@e6c30000 {
722 compatible = "renesas,scifb-r8a7791",
723 "renesas,rcar-gen2-scifb", "renesas,scifb";
724 reg = <0 0xe6c30000 0 0x100>;
725 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>;
728 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
729 <&dmac1 0x19>, <&dmac1 0x1a>;
730 dma-names = "tx", "rx", "tx", "rx";
731 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
735 scifb2: serial@e6ce0000 {
736 compatible = "renesas,scifb-r8a7791",
737 "renesas,rcar-gen2-scifb", "renesas,scifb";
738 reg = <0 0xe6ce0000 0 0x100>;
739 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
740 clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>;
742 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
743 <&dmac1 0x1d>, <&dmac1 0x1e>;
744 dma-names = "tx", "rx", "tx", "rx";
745 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
749 scif0: serial@e6e60000 {
750 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
752 reg = <0 0xe6e60000 0 64>;
753 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
754 clocks = <&mstp7_clks R8A7791_CLK_SCIF0>, <&zs_clk>,
756 clock-names = "fck", "brg_int", "scif_clk";
757 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
758 <&dmac1 0x29>, <&dmac1 0x2a>;
759 dma-names = "tx", "rx", "tx", "rx";
760 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
764 scif1: serial@e6e68000 {
765 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
767 reg = <0 0xe6e68000 0 64>;
768 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
769 clocks = <&mstp7_clks R8A7791_CLK_SCIF1>, <&zs_clk>,
771 clock-names = "fck", "brg_int", "scif_clk";
772 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
773 <&dmac1 0x2d>, <&dmac1 0x2e>;
774 dma-names = "tx", "rx", "tx", "rx";
775 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
779 scif2: serial@e6e58000 {
780 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
782 reg = <0 0xe6e58000 0 64>;
783 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
784 clocks = <&mstp7_clks R8A7791_CLK_SCIF2>, <&zs_clk>,
786 clock-names = "fck", "brg_int", "scif_clk";
787 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
788 <&dmac1 0x2b>, <&dmac1 0x2c>;
789 dma-names = "tx", "rx", "tx", "rx";
790 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
794 scif3: serial@e6ea8000 {
795 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
797 reg = <0 0xe6ea8000 0 64>;
798 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
799 clocks = <&mstp7_clks R8A7791_CLK_SCIF3>, <&zs_clk>,
801 clock-names = "fck", "brg_int", "scif_clk";
802 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
803 <&dmac1 0x2f>, <&dmac1 0x30>;
804 dma-names = "tx", "rx", "tx", "rx";
805 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
809 scif4: serial@e6ee0000 {
810 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
812 reg = <0 0xe6ee0000 0 64>;
813 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
814 clocks = <&mstp7_clks R8A7791_CLK_SCIF4>, <&zs_clk>,
816 clock-names = "fck", "brg_int", "scif_clk";
817 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
818 <&dmac1 0xfb>, <&dmac1 0xfc>;
819 dma-names = "tx", "rx", "tx", "rx";
820 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
824 scif5: serial@e6ee8000 {
825 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
827 reg = <0 0xe6ee8000 0 64>;
828 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&mstp7_clks R8A7791_CLK_SCIF5>, <&zs_clk>,
831 clock-names = "fck", "brg_int", "scif_clk";
832 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
833 <&dmac1 0xfd>, <&dmac1 0xfe>;
834 dma-names = "tx", "rx", "tx", "rx";
835 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
839 hscif0: serial@e62c0000 {
840 compatible = "renesas,hscif-r8a7791",
841 "renesas,rcar-gen2-hscif", "renesas,hscif";
842 reg = <0 0xe62c0000 0 96>;
843 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
844 clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>, <&zs_clk>,
846 clock-names = "fck", "brg_int", "scif_clk";
847 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
848 <&dmac1 0x39>, <&dmac1 0x3a>;
849 dma-names = "tx", "rx", "tx", "rx";
850 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
854 hscif1: serial@e62c8000 {
855 compatible = "renesas,hscif-r8a7791",
856 "renesas,rcar-gen2-hscif", "renesas,hscif";
857 reg = <0 0xe62c8000 0 96>;
858 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
859 clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>, <&zs_clk>,
861 clock-names = "fck", "brg_int", "scif_clk";
862 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
863 <&dmac1 0x4d>, <&dmac1 0x4e>;
864 dma-names = "tx", "rx", "tx", "rx";
865 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
869 hscif2: serial@e62d0000 {
870 compatible = "renesas,hscif-r8a7791",
871 "renesas,rcar-gen2-hscif", "renesas,hscif";
872 reg = <0 0xe62d0000 0 96>;
873 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
874 clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>, <&zs_clk>,
876 clock-names = "fck", "brg_int", "scif_clk";
877 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
878 <&dmac1 0x3b>, <&dmac1 0x3c>;
879 dma-names = "tx", "rx", "tx", "rx";
880 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
884 ether: ethernet@ee700000 {
885 compatible = "renesas,ether-r8a7791";
886 reg = <0 0xee700000 0 0x400>;
887 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
888 clocks = <&mstp8_clks R8A7791_CLK_ETHER>;
889 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
891 #address-cells = <1>;
896 avb: ethernet@e6800000 {
897 compatible = "renesas,etheravb-r8a7791",
898 "renesas,etheravb-rcar-gen2";
899 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
900 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
901 clocks = <&mstp8_clks R8A7791_CLK_ETHERAVB>;
902 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
903 #address-cells = <1>;
908 sata0: sata@ee300000 {
909 compatible = "renesas,sata-r8a7791";
910 reg = <0 0xee300000 0 0x2000>;
911 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
912 clocks = <&mstp8_clks R8A7791_CLK_SATA0>;
913 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
917 sata1: sata@ee500000 {
918 compatible = "renesas,sata-r8a7791";
919 reg = <0 0xee500000 0 0x2000>;
920 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
921 clocks = <&mstp8_clks R8A7791_CLK_SATA1>;
922 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
926 hsusb: usb@e6590000 {
927 compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs";
928 reg = <0 0xe6590000 0 0x100>;
929 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
930 clocks = <&mstp7_clks R8A7791_CLK_HSUSB>;
931 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
932 <&usb_dmac1 0>, <&usb_dmac1 1>;
933 dma-names = "ch0", "ch1", "ch2", "ch3";
934 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
935 renesas,buswait = <4>;
941 usbphy: usb-phy@e6590100 {
942 compatible = "renesas,usb-phy-r8a7791",
943 "renesas,rcar-gen2-usb-phy";
944 reg = <0 0xe6590100 0 0x100>;
945 #address-cells = <1>;
947 clocks = <&mstp7_clks R8A7791_CLK_HSUSB>;
948 clock-names = "usbhs";
949 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
952 usb0: usb-channel@0 {
956 usb2: usb-channel@2 {
962 vin0: video@e6ef0000 {
963 compatible = "renesas,vin-r8a7791";
964 reg = <0 0xe6ef0000 0 0x1000>;
965 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
966 clocks = <&mstp8_clks R8A7791_CLK_VIN0>;
967 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
971 vin1: video@e6ef1000 {
972 compatible = "renesas,vin-r8a7791";
973 reg = <0 0xe6ef1000 0 0x1000>;
974 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
975 clocks = <&mstp8_clks R8A7791_CLK_VIN1>;
976 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
980 vin2: video@e6ef2000 {
981 compatible = "renesas,vin-r8a7791";
982 reg = <0 0xe6ef2000 0 0x1000>;
983 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
984 clocks = <&mstp8_clks R8A7791_CLK_VIN2>;
985 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
990 compatible = "renesas,vsp1";
991 reg = <0 0xfe928000 0 0x8000>;
992 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
993 clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>;
994 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
998 compatible = "renesas,vsp1";
999 reg = <0 0xfe930000 0 0x8000>;
1000 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1001 clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>;
1002 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1006 compatible = "renesas,vsp1";
1007 reg = <0 0xfe938000 0 0x8000>;
1008 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1009 clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>;
1010 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1013 du: display@feb00000 {
1014 compatible = "renesas,du-r8a7791";
1015 reg = <0 0xfeb00000 0 0x40000>,
1016 <0 0xfeb90000 0 0x1c>;
1017 reg-names = "du", "lvds.0";
1018 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1020 clocks = <&mstp7_clks R8A7791_CLK_DU0>,
1021 <&mstp7_clks R8A7791_CLK_DU1>,
1022 <&mstp7_clks R8A7791_CLK_LVDS0>;
1023 clock-names = "du.0", "du.1", "lvds.0";
1024 status = "disabled";
1027 #address-cells = <1>;
1032 du_out_rgb: endpoint {
1037 du_out_lvds0: endpoint {
1043 can0: can@e6e80000 {
1044 compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
1045 reg = <0 0xe6e80000 0 0x1000>;
1046 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1047 clocks = <&mstp9_clks R8A7791_CLK_RCAN0>,
1048 <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
1049 clock-names = "clkp1", "clkp2", "can_clk";
1050 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1051 status = "disabled";
1054 can1: can@e6e88000 {
1055 compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
1056 reg = <0 0xe6e88000 0 0x1000>;
1057 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1058 clocks = <&mstp9_clks R8A7791_CLK_RCAN1>,
1059 <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
1060 clock-names = "clkp1", "clkp2", "can_clk";
1061 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1062 status = "disabled";
1065 jpu: jpeg-codec@fe980000 {
1066 compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu";
1067 reg = <0 0xfe980000 0 0x10300>;
1068 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1069 clocks = <&mstp1_clks R8A7791_CLK_JPU>;
1070 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1074 #address-cells = <2>;
1078 /* External root clock */
1080 compatible = "fixed-clock";
1082 /* This value must be overriden by the board. */
1083 clock-frequency = <0>;
1087 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
1088 * default. Boards that provide audio clocks should override them.
1090 audio_clk_a: audio_clk_a {
1091 compatible = "fixed-clock";
1093 clock-frequency = <0>;
1095 audio_clk_b: audio_clk_b {
1096 compatible = "fixed-clock";
1098 clock-frequency = <0>;
1100 audio_clk_c: audio_clk_c {
1101 compatible = "fixed-clock";
1103 clock-frequency = <0>;
1106 /* External PCIe clock - can be overridden by the board */
1107 pcie_bus_clk: pcie_bus {
1108 compatible = "fixed-clock";
1110 clock-frequency = <0>;
1113 /* External SCIF clock */
1115 compatible = "fixed-clock";
1117 /* This value must be overridden by the board. */
1118 clock-frequency = <0>;
1121 /* External USB clock - can be overridden by the board */
1122 usb_extal_clk: usb_extal {
1123 compatible = "fixed-clock";
1125 clock-frequency = <48000000>;
1128 /* External CAN clock */
1130 compatible = "fixed-clock";
1132 /* This value must be overridden by the board. */
1133 clock-frequency = <0>;
1136 /* Special CPG clocks */
1137 cpg_clocks: cpg_clocks@e6150000 {
1138 compatible = "renesas,r8a7791-cpg-clocks",
1139 "renesas,rcar-gen2-cpg-clocks";
1140 reg = <0 0xe6150000 0 0x1000>;
1141 clocks = <&extal_clk &usb_extal_clk>;
1143 clock-output-names = "main", "pll0", "pll1", "pll3",
1144 "lb", "qspi", "sdh", "sd0", "z",
1146 #power-domain-cells = <0>;
1149 /* Variable factor clocks */
1150 sd2_clk: sd2@e6150078 {
1151 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1152 reg = <0 0xe6150078 0 4>;
1153 clocks = <&pll1_div2_clk>;
1156 sd3_clk: sd3@e615026c {
1157 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1158 reg = <0 0xe615026c 0 4>;
1159 clocks = <&pll1_div2_clk>;
1162 mmc0_clk: mmc0@e6150240 {
1163 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1164 reg = <0 0xe6150240 0 4>;
1165 clocks = <&pll1_div2_clk>;
1168 ssp_clk: ssp@e6150248 {
1169 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1170 reg = <0 0xe6150248 0 4>;
1171 clocks = <&pll1_div2_clk>;
1174 ssprs_clk: ssprs@e615024c {
1175 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1176 reg = <0 0xe615024c 0 4>;
1177 clocks = <&pll1_div2_clk>;
1181 /* Fixed factor clocks */
1182 pll1_div2_clk: pll1_div2 {
1183 compatible = "fixed-factor-clock";
1184 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1190 compatible = "fixed-factor-clock";
1191 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1197 compatible = "fixed-factor-clock";
1198 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1204 compatible = "fixed-factor-clock";
1205 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1211 compatible = "fixed-factor-clock";
1212 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1218 compatible = "fixed-factor-clock";
1219 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1225 compatible = "fixed-factor-clock";
1226 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1232 compatible = "fixed-factor-clock";
1233 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1239 compatible = "fixed-factor-clock";
1240 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1246 compatible = "fixed-factor-clock";
1247 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1253 compatible = "fixed-factor-clock";
1254 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1256 clock-div = <(48 * 1024)>;
1259 oscclk_clk: oscclk {
1260 compatible = "fixed-factor-clock";
1261 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1263 clock-div = <(12 * 1024)>;
1267 compatible = "fixed-factor-clock";
1268 clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
1274 compatible = "fixed-factor-clock";
1275 clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
1281 compatible = "fixed-factor-clock";
1282 clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
1288 compatible = "fixed-factor-clock";
1289 clocks = <&pll1_div2_clk>;
1295 compatible = "fixed-factor-clock";
1296 clocks = <&extal_clk>;
1303 mstp0_clks: mstp0_clks@e6150130 {
1304 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1305 reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
1308 clock-indices = <R8A7791_CLK_MSIOF0>;
1309 clock-output-names = "msiof0";
1311 mstp1_clks: mstp1_clks@e6150134 {
1312 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1313 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
1314 clocks = <&zs_clk>, <&zs_clk>, <&m2_clk>, <&zs_clk>, <&p_clk>,
1315 <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1316 <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>,
1320 R8A7791_CLK_VCP0 R8A7791_CLK_VPC0 R8A7791_CLK_JPU
1321 R8A7791_CLK_SSP1 R8A7791_CLK_TMU1 R8A7791_CLK_3DG
1322 R8A7791_CLK_2DDMAC R8A7791_CLK_FDP1_1 R8A7791_CLK_FDP1_0
1323 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0
1324 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0
1327 clock-output-names =
1328 "vcp0", "vpc0", "jpu", "ssp1", "tmu1", "3dg",
1329 "2ddmac", "fdp1-1", "fdp1-0", "tmu3", "tmu2", "cmt0",
1330 "tmu0", "vsp1-du1", "vsp1-du0", "vsp1-sy";
1332 mstp2_clks: mstp2_clks@e6150138 {
1333 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1334 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
1335 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1336 <&mp_clk>, <&mp_clk>, <&mp_clk>,
1337 <&zs_clk>, <&zs_clk>;
1340 R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0
1341 R8A7791_CLK_MSIOF2 R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1
1342 R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
1343 R8A7791_CLK_SYS_DMAC1 R8A7791_CLK_SYS_DMAC0
1345 clock-output-names =
1346 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
1347 "scifb1", "msiof1", "scifb2",
1348 "sys-dmac1", "sys-dmac0";
1350 mstp3_clks: mstp3_clks@e615013c {
1351 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1352 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1353 clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
1354 <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
1355 <&hp_clk>, <&hp_clk>;
1358 R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
1359 R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1
1360 R8A7791_CLK_SSUSB R8A7791_CLK_CMT1
1361 R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1
1363 clock-output-names =
1364 "tpu0", "sdhi2", "sdhi1", "sdhi0",
1365 "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1",
1366 "usbdmac0", "usbdmac1";
1368 mstp4_clks: mstp4_clks@e6150140 {
1369 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1370 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
1371 clocks = <&cp_clk>, <&zs_clk>;
1373 clock-indices = <R8A7791_CLK_IRQC R8A7791_CLK_INTC_SYS>;
1374 clock-output-names = "irqc", "intc-sys";
1376 mstp5_clks: mstp5_clks@e6150144 {
1377 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1378 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1379 clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>,
1380 <&extal_clk>, <&p_clk>;
1383 R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1
1384 R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL
1387 clock-output-names = "audmac0", "audmac1", "adsp_mod",
1390 mstp7_clks: mstp7_clks@e615014c {
1391 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1392 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
1393 clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
1394 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1395 <&zx_clk>, <&zx_clk>, <&zx_clk>;
1398 R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
1399 R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
1400 R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
1401 R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
1404 clock-output-names =
1405 "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
1406 "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
1408 mstp8_clks: mstp8_clks@e6150990 {
1409 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1410 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
1411 clocks = <&zx_clk>, <&hp_clk>, <&zg_clk>, <&zg_clk>,
1412 <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
1416 R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB
1417 R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0
1418 R8A7791_CLK_ETHERAVB R8A7791_CLK_ETHER
1419 R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
1421 clock-output-names =
1422 "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0",
1423 "etheravb", "ether", "sata1", "sata0";
1425 mstp9_clks: mstp9_clks@e6150994 {
1426 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1427 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
1428 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
1429 <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
1430 <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
1431 <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
1432 <&hp_clk>, <&hp_clk>;
1435 R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4
1436 R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0
1437 R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
1438 R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
1439 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
1441 clock-output-names =
1442 "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
1443 "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2",
1446 mstp10_clks: mstp10_clks@e6150998 {
1447 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1448 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1450 <&mstp10_clks R8A7791_CLK_SSI_ALL>, <&mstp10_clks R8A7791_CLK_SSI_ALL>,
1451 <&mstp10_clks R8A7791_CLK_SSI_ALL>, <&mstp10_clks R8A7791_CLK_SSI_ALL>,
1452 <&mstp10_clks R8A7791_CLK_SSI_ALL>, <&mstp10_clks R8A7791_CLK_SSI_ALL>,
1453 <&mstp10_clks R8A7791_CLK_SSI_ALL>, <&mstp10_clks R8A7791_CLK_SSI_ALL>,
1454 <&mstp10_clks R8A7791_CLK_SSI_ALL>, <&mstp10_clks R8A7791_CLK_SSI_ALL>,
1456 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1457 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1458 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1459 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1460 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1461 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1462 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>;
1467 R8A7791_CLK_SSI9 R8A7791_CLK_SSI8 R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5
1468 R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
1470 R8A7791_CLK_SCU_DVC1 R8A7791_CLK_SCU_DVC0
1471 R8A7791_CLK_SCU_CTU1_MIX1 R8A7791_CLK_SCU_CTU0_MIX0
1472 R8A7791_CLK_SCU_SRC9 R8A7791_CLK_SCU_SRC8 R8A7791_CLK_SCU_SRC7 R8A7791_CLK_SCU_SRC6 R8A7791_CLK_SCU_SRC5
1473 R8A7791_CLK_SCU_SRC4 R8A7791_CLK_SCU_SRC3 R8A7791_CLK_SCU_SRC2 R8A7791_CLK_SCU_SRC1 R8A7791_CLK_SCU_SRC0
1475 clock-output-names =
1477 "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
1478 "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
1480 "scu-dvc1", "scu-dvc0",
1481 "scu-ctu1-mix1", "scu-ctu0-mix0",
1482 "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
1483 "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
1485 mstp11_clks: mstp11_clks@e615099c {
1486 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1487 reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
1488 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
1491 R8A7791_CLK_SCIFA3 R8A7791_CLK_SCIFA4 R8A7791_CLK_SCIFA5
1493 clock-output-names = "scifa3", "scifa4", "scifa5";
1497 rst: reset-controller@e6160000 {
1498 compatible = "renesas,r8a7791-rst";
1499 reg = <0 0xe6160000 0 0x0100>;
1502 prr: chipid@ff000044 {
1503 compatible = "renesas,prr";
1504 reg = <0 0xff000044 0 4>;
1507 sysc: system-controller@e6180000 {
1508 compatible = "renesas,r8a7791-sysc";
1509 reg = <0 0xe6180000 0 0x0200>;
1510 #power-domain-cells = <1>;
1513 qspi: spi@e6b10000 {
1514 compatible = "renesas,qspi-r8a7791", "renesas,qspi";
1515 reg = <0 0xe6b10000 0 0x2c>;
1516 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1517 clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
1518 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1519 <&dmac1 0x17>, <&dmac1 0x18>;
1520 dma-names = "tx", "rx", "tx", "rx";
1521 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1523 #address-cells = <1>;
1525 status = "disabled";
1528 msiof0: spi@e6e20000 {
1529 compatible = "renesas,msiof-r8a7791",
1530 "renesas,rcar-gen2-msiof";
1531 reg = <0 0xe6e20000 0 0x0064>;
1532 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1533 clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
1534 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1535 <&dmac1 0x51>, <&dmac1 0x52>;
1536 dma-names = "tx", "rx", "tx", "rx";
1537 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1538 #address-cells = <1>;
1540 status = "disabled";
1543 msiof1: spi@e6e10000 {
1544 compatible = "renesas,msiof-r8a7791",
1545 "renesas,rcar-gen2-msiof";
1546 reg = <0 0xe6e10000 0 0x0064>;
1547 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1548 clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
1549 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1550 <&dmac1 0x55>, <&dmac1 0x56>;
1551 dma-names = "tx", "rx", "tx", "rx";
1552 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1553 #address-cells = <1>;
1555 status = "disabled";
1558 msiof2: spi@e6e00000 {
1559 compatible = "renesas,msiof-r8a7791",
1560 "renesas,rcar-gen2-msiof";
1561 reg = <0 0xe6e00000 0 0x0064>;
1562 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1563 clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
1564 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1565 <&dmac1 0x41>, <&dmac1 0x42>;
1566 dma-names = "tx", "rx", "tx", "rx";
1567 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1568 #address-cells = <1>;
1570 status = "disabled";
1573 xhci: usb@ee000000 {
1574 compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci";
1575 reg = <0 0xee000000 0 0xc00>;
1576 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1577 clocks = <&mstp3_clks R8A7791_CLK_SSUSB>;
1578 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1581 status = "disabled";
1584 pci0: pci@ee090000 {
1585 compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
1586 device_type = "pci";
1587 reg = <0 0xee090000 0 0xc00>,
1588 <0 0xee080000 0 0x1100>;
1589 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1590 clocks = <&mstp7_clks R8A7791_CLK_EHCI>;
1591 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1592 status = "disabled";
1595 #address-cells = <3>;
1597 #interrupt-cells = <1>;
1598 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1599 interrupt-map-mask = <0xff00 0 0 0x7>;
1600 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1601 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1602 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1605 reg = <0x800 0 0 0 0>;
1606 device_type = "pci";
1612 reg = <0x1000 0 0 0 0>;
1613 device_type = "pci";
1619 pci1: pci@ee0d0000 {
1620 compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
1621 device_type = "pci";
1622 reg = <0 0xee0d0000 0 0xc00>,
1623 <0 0xee0c0000 0 0x1100>;
1624 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1625 clocks = <&mstp7_clks R8A7791_CLK_EHCI>;
1626 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1627 status = "disabled";
1630 #address-cells = <3>;
1632 #interrupt-cells = <1>;
1633 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1634 interrupt-map-mask = <0xff00 0 0 0x7>;
1635 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1636 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1637 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1640 reg = <0x800 0 0 0 0>;
1641 device_type = "pci";
1647 reg = <0x1000 0 0 0 0>;
1648 device_type = "pci";
1654 pciec: pcie@fe000000 {
1655 compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
1656 reg = <0 0xfe000000 0 0x80000>;
1657 #address-cells = <3>;
1659 bus-range = <0x00 0xff>;
1660 device_type = "pci";
1661 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1662 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1663 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1664 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1665 /* Map all possible DDR as inbound ranges */
1666 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1667 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1668 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1669 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1670 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1671 #interrupt-cells = <1>;
1672 interrupt-map-mask = <0 0 0 0>;
1673 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1674 clocks = <&mstp3_clks R8A7791_CLK_PCIEC>, <&pcie_bus_clk>;
1675 clock-names = "pcie", "pcie_bus";
1676 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1677 status = "disabled";
1680 ipmmu_sy0: mmu@e6280000 {
1681 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1682 reg = <0 0xe6280000 0 0x1000>;
1683 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1684 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1686 status = "disabled";
1689 ipmmu_sy1: mmu@e6290000 {
1690 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1691 reg = <0 0xe6290000 0 0x1000>;
1692 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1694 status = "disabled";
1697 ipmmu_ds: mmu@e6740000 {
1698 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1699 reg = <0 0xe6740000 0 0x1000>;
1700 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1701 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1703 status = "disabled";
1706 ipmmu_mp: mmu@ec680000 {
1707 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1708 reg = <0 0xec680000 0 0x1000>;
1709 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1711 status = "disabled";
1714 ipmmu_mx: mmu@fe951000 {
1715 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1716 reg = <0 0xfe951000 0 0x1000>;
1717 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1718 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1720 status = "disabled";
1723 ipmmu_rt: mmu@ffc80000 {
1724 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1725 reg = <0 0xffc80000 0 0x1000>;
1726 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1728 status = "disabled";
1731 ipmmu_gp: mmu@e62a0000 {
1732 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1733 reg = <0 0xe62a0000 0 0x1000>;
1734 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1735 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1737 status = "disabled";
1740 rcar_sound: sound@ec500000 {
1742 * #sound-dai-cells is required
1744 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1745 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1747 compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
1748 reg = <0 0xec500000 0 0x1000>, /* SCU */
1749 <0 0xec5a0000 0 0x100>, /* ADG */
1750 <0 0xec540000 0 0x1000>, /* SSIU */
1751 <0 0xec541000 0 0x280>, /* SSI */
1752 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1753 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1755 clocks = <&mstp10_clks R8A7791_CLK_SSI_ALL>,
1756 <&mstp10_clks R8A7791_CLK_SSI9>, <&mstp10_clks R8A7791_CLK_SSI8>,
1757 <&mstp10_clks R8A7791_CLK_SSI7>, <&mstp10_clks R8A7791_CLK_SSI6>,
1758 <&mstp10_clks R8A7791_CLK_SSI5>, <&mstp10_clks R8A7791_CLK_SSI4>,
1759 <&mstp10_clks R8A7791_CLK_SSI3>, <&mstp10_clks R8A7791_CLK_SSI2>,
1760 <&mstp10_clks R8A7791_CLK_SSI1>, <&mstp10_clks R8A7791_CLK_SSI0>,
1761 <&mstp10_clks R8A7791_CLK_SCU_SRC9>, <&mstp10_clks R8A7791_CLK_SCU_SRC8>,
1762 <&mstp10_clks R8A7791_CLK_SCU_SRC7>, <&mstp10_clks R8A7791_CLK_SCU_SRC6>,
1763 <&mstp10_clks R8A7791_CLK_SCU_SRC5>, <&mstp10_clks R8A7791_CLK_SCU_SRC4>,
1764 <&mstp10_clks R8A7791_CLK_SCU_SRC3>, <&mstp10_clks R8A7791_CLK_SCU_SRC2>,
1765 <&mstp10_clks R8A7791_CLK_SCU_SRC1>, <&mstp10_clks R8A7791_CLK_SCU_SRC0>,
1766 <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
1767 <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
1768 <&mstp10_clks R8A7791_CLK_SCU_DVC0>, <&mstp10_clks R8A7791_CLK_SCU_DVC1>,
1769 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
1770 clock-names = "ssi-all",
1771 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1772 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1773 "src.9", "src.8", "src.7", "src.6", "src.5",
1774 "src.4", "src.3", "src.2", "src.1", "src.0",
1778 "clk_a", "clk_b", "clk_c", "clk_i";
1779 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1781 status = "disabled";
1785 dmas = <&audma1 0xbc>;
1789 dmas = <&audma1 0xbe>;
1812 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1813 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1814 dma-names = "rx", "tx";
1817 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1818 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1819 dma-names = "rx", "tx";
1822 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1823 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1824 dma-names = "rx", "tx";
1827 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1828 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1829 dma-names = "rx", "tx";
1832 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1833 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1834 dma-names = "rx", "tx";
1837 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1838 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1839 dma-names = "rx", "tx";
1842 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1843 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1844 dma-names = "rx", "tx";
1847 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1848 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1849 dma-names = "rx", "tx";
1852 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1853 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1854 dma-names = "rx", "tx";
1857 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1858 dmas = <&audma0 0x97>, <&audma1 0xba>;
1859 dma-names = "rx", "tx";
1865 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1866 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1867 dma-names = "rx", "tx", "rxu", "txu";
1870 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1871 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1872 dma-names = "rx", "tx", "rxu", "txu";
1875 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1876 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1877 dma-names = "rx", "tx", "rxu", "txu";
1880 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1881 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1882 dma-names = "rx", "tx", "rxu", "txu";
1885 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1886 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1887 dma-names = "rx", "tx", "rxu", "txu";
1890 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1891 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1892 dma-names = "rx", "tx", "rxu", "txu";
1895 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1896 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1897 dma-names = "rx", "tx", "rxu", "txu";
1900 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1901 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1902 dma-names = "rx", "tx", "rxu", "txu";
1905 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1906 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1907 dma-names = "rx", "tx", "rxu", "txu";
1910 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1911 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1912 dma-names = "rx", "tx", "rxu", "txu";