arch/arm/boot/dts/r8a7790.dtsi

   1 /*
   2  * Device Tree Source for the r8a7790 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corporation
   5  * Copyright (C) 2013-2014 Renesas Solutions Corp.
   6  * Copyright (C) 2014 Cogent Embedded Inc.
   7  *
   8  * This file is licensed under the terms of the GNU General Public License
   9  * version 2.  This program is licensed "as is" without any warranty of any
  10  * kind, whether express or implied.
  11  */
  12
  13 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
  14 #include <dt-bindings/interrupt-controller/arm-gic.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/power/r8a7790-sysc.h>
  17
  18 / {
  19         compatible = "renesas,r8a7790";
  20         interrupt-parent = <&gic>;
  21         #address-cells = <2>;
  22         #size-cells = <2>;
  23
  24         aliases {
  25                 i2c0 = &i2c0;
  26                 i2c1 = &i2c1;
  27                 i2c2 = &i2c2;
  28                 i2c3 = &i2c3;
  29                 i2c4 = &iic0;
  30                 i2c5 = &iic1;
  31                 i2c6 = &iic2;
  32                 i2c7 = &iic3;
  33                 spi0 = &qspi;
  34                 spi1 = &msiof0;
  35                 spi2 = &msiof1;
  36                 spi3 = &msiof2;
  37                 spi4 = &msiof3;
  38                 vin0 = &vin0;
  39                 vin1 = &vin1;
  40                 vin2 = &vin2;
  41                 vin3 = &vin3;
  42         };
  43
  44         cpus {
  45                 #address-cells = <1>;
  46                 #size-cells = <0>;
  47                 enable-method = "renesas,apmu";
  48
  49                 cpu0: cpu@0 {
  50                         device_type = "cpu";
  51                         compatible = "arm,cortex-a15";
  52                         reg = <0>;
  53                         clock-frequency = <1300000000>;
  54                         voltage-tolerance = <1>; /* 1% */
  55                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  56                         clock-latency = <300000>; /* 300 us */
  57                         power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
  58                         next-level-cache = <&L2_CA15>;
  59                         capacity-dmips-mhz = <1024>;
  60
  61                         /* kHz - uV - OPPs unknown yet */
  62                         operating-points = <1400000 1000000>,
  63                                            <1225000 1000000>,
  64                                            <1050000 1000000>,
  65                                            < 875000 1000000>,
  66                                            < 700000 1000000>,
  67                                            < 350000 1000000>;
  68                 };
  69
  70                 cpu1: cpu@1 {
  71                         device_type = "cpu";
  72                         compatible = "arm,cortex-a15";
  73                         reg = <1>;
  74                         clock-frequency = <1300000000>;
  75                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  76                         power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
  77                         next-level-cache = <&L2_CA15>;
  78                         capacity-dmips-mhz = <1024>;
  79                 };
  80
  81                 cpu2: cpu@2 {
  82                         device_type = "cpu";
  83                         compatible = "arm,cortex-a15";
  84                         reg = <2>;
  85                         clock-frequency = <1300000000>;
  86                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  87                         power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
  88                         next-level-cache = <&L2_CA15>;
  89                         capacity-dmips-mhz = <1024>;
  90                 };
  91
  92                 cpu3: cpu@3 {
  93                         device_type = "cpu";
  94                         compatible = "arm,cortex-a15";
  95                         reg = <3>;
  96                         clock-frequency = <1300000000>;
  97                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  98                         power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
  99                         next-level-cache = <&L2_CA15>;
 100                         capacity-dmips-mhz = <1024>;
 101                 };
 102
 103                 cpu4: cpu@100 {
 104                         device_type = "cpu";
 105                         compatible = "arm,cortex-a7";
 106                         reg = <0x100>;
 107                         clock-frequency = <780000000>;
 108                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 109                         power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
 110                         next-level-cache = <&L2_CA7>;
 111                         capacity-dmips-mhz = <539>;
 112                 };
 113
 114                 cpu5: cpu@101 {
 115                         device_type = "cpu";
 116                         compatible = "arm,cortex-a7";
 117                         reg = <0x101>;
 118                         clock-frequency = <780000000>;
 119                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 120                         power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
 121                         next-level-cache = <&L2_CA7>;
 122                         capacity-dmips-mhz = <539>;
 123                 };
 124
 125                 cpu6: cpu@102 {
 126                         device_type = "cpu";
 127                         compatible = "arm,cortex-a7";
 128                         reg = <0x102>;
 129                         clock-frequency = <780000000>;
 130                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 131                         power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
 132                         next-level-cache = <&L2_CA7>;
 133                         capacity-dmips-mhz = <539>;
 134                 };
 135
 136                 cpu7: cpu@103 {
 137                         device_type = "cpu";
 138                         compatible = "arm,cortex-a7";
 139                         reg = <0x103>;
 140                         clock-frequency = <780000000>;
 141                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 142                         power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
 143                         next-level-cache = <&L2_CA7>;
 144                         capacity-dmips-mhz = <539>;
 145                 };
 146
 147                 L2_CA15: cache-controller-0 {
 148                         compatible = "cache";
 149                         power-domains = <&sysc R8A7790_PD_CA15_SCU>;
 150                         cache-unified;
 151                         cache-level = <2>;
 152                 };
 153
 154                 L2_CA7: cache-controller-1 {
 155                         compatible = "cache";
 156                         power-domains = <&sysc R8A7790_PD_CA7_SCU>;
 157                         cache-unified;
 158                         cache-level = <2>;
 159                 };
 160         };
 161
 162         thermal-zones {
 163                 cpu_thermal: cpu-thermal {
 164                         polling-delay-passive   = <0>;
 165                         polling-delay           = <0>;
 166
 167                         thermal-sensors = <&thermal>;
 168
 169                         trips {
 170                                 cpu-crit {
 171                                         temperature     = <95000>;
 172                                         hysteresis      = <0>;
 173                                         type            = "critical";
 174                                 };
 175                         };
 176                         cooling-maps {
 177                         };
 178                 };
 179         };
 180
 181         apmu@e6151000 {
 182                 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
 183                 reg = <0 0xe6151000 0 0x188>;
 184                 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
 185         };
 186
 187         apmu@e6152000 {
 188                 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
 189                 reg = <0 0xe6152000 0 0x188>;
 190                 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
 191         };
 192
 193         gic: interrupt-controller@f1001000 {
 194                 compatible = "arm,gic-400";
 195                 #interrupt-cells = <3>;
 196                 #address-cells = <0>;
 197                 interrupt-controller;
 198                 reg = <0 0xf1001000 0 0x1000>,
 199                         <0 0xf1002000 0 0x2000>,
 200                         <0 0xf1004000 0 0x2000>,
 201                         <0 0xf1006000 0 0x2000>;
 202                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 203                 clocks = <&cpg CPG_MOD 408>;
 204                 clock-names = "clk";
 205                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 206                 resets = <&cpg 408>;
 207         };
 208
 209         gpio0: gpio@e6050000 {
 210                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 211                 reg = <0 0xe6050000 0 0x50>;
 212                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 213                 #gpio-cells = <2>;
 214                 gpio-controller;
 215                 gpio-ranges = <&pfc 0 0 32>;
 216                 #interrupt-cells = <2>;
 217                 interrupt-controller;
 218                 clocks = <&cpg CPG_MOD 912>;
 219                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 220                 resets = <&cpg 912>;
 221         };
 222
 223         gpio1: gpio@e6051000 {
 224                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 225                 reg = <0 0xe6051000 0 0x50>;
 226                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 227                 #gpio-cells = <2>;
 228                 gpio-controller;
 229                 gpio-ranges = <&pfc 0 32 30>;
 230                 #interrupt-cells = <2>;
 231                 interrupt-controller;
 232                 clocks = <&cpg CPG_MOD 911>;
 233                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 234                 resets = <&cpg 911>;
 235         };
 236
 237         gpio2: gpio@e6052000 {
 238                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 239                 reg = <0 0xe6052000 0 0x50>;
 240                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 241                 #gpio-cells = <2>;
 242                 gpio-controller;
 243                 gpio-ranges = <&pfc 0 64 30>;
 244                 #interrupt-cells = <2>;
 245                 interrupt-controller;
 246                 clocks = <&cpg CPG_MOD 910>;
 247                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 248                 resets = <&cpg 910>;
 249         };
 250
 251         gpio3: gpio@e6053000 {
 252                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 253                 reg = <0 0xe6053000 0 0x50>;
 254                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 255                 #gpio-cells = <2>;
 256                 gpio-controller;
 257                 gpio-ranges = <&pfc 0 96 32>;
 258                 #interrupt-cells = <2>;
 259                 interrupt-controller;
 260                 clocks = <&cpg CPG_MOD 909>;
 261                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 262                 resets = <&cpg 909>;
 263         };
 264
 265         gpio4: gpio@e6054000 {
 266                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 267                 reg = <0 0xe6054000 0 0x50>;
 268                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 269                 #gpio-cells = <2>;
 270                 gpio-controller;
 271                 gpio-ranges = <&pfc 0 128 32>;
 272                 #interrupt-cells = <2>;
 273                 interrupt-controller;
 274                 clocks = <&cpg CPG_MOD 908>;
 275                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 276                 resets = <&cpg 908>;
 277         };
 278
 279         gpio5: gpio@e6055000 {
 280                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 281                 reg = <0 0xe6055000 0 0x50>;
 282                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 283                 #gpio-cells = <2>;
 284                 gpio-controller;
 285                 gpio-ranges = <&pfc 0 160 32>;
 286                 #interrupt-cells = <2>;
 287                 interrupt-controller;
 288                 clocks = <&cpg CPG_MOD 907>;
 289                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 290                 resets = <&cpg 907>;
 291         };
 292
 293         thermal: thermal@e61f0000 {
 294                 compatible =    "renesas,thermal-r8a7790",
 295                                 "renesas,rcar-gen2-thermal",
 296                                 "renesas,rcar-thermal";
 297                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
 298                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 299                 clocks = <&cpg CPG_MOD 522>;
 300                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 301                 resets = <&cpg 522>;
 302                 #thermal-sensor-cells = <0>;
 303         };
 304
 305         timer {
 306                 compatible = "arm,armv7-timer";
 307                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 308                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 309                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 310                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 311         };
 312
 313         cmt0: timer@ffca0000 {
 314                 compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
 315                 reg = <0 0xffca0000 0 0x1004>;
 316                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 317                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 318                 clocks = <&cpg CPG_MOD 124>;
 319                 clock-names = "fck";
 320                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 321                 resets = <&cpg 124>;
 322
 323                 status = "disabled";
 324         };
 325
 326         cmt1: timer@e6130000 {
 327                 compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
 328                 reg = <0 0xe6130000 0 0x1004>;
 329                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 330                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 331                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 332                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 333                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 334                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 335                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 336                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 337                 clocks = <&cpg CPG_MOD 329>;
 338                 clock-names = "fck";
 339                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 340                 resets = <&cpg 329>;
 341
 342                 status = "disabled";
 343         };
 344
 345         irqc0: interrupt-controller@e61c0000 {
 346                 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
 347                 #interrupt-cells = <2>;
 348                 interrupt-controller;
 349                 reg = <0 0xe61c0000 0 0x200>;
 350                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 351                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 352                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 353                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 354                 clocks = <&cpg CPG_MOD 407>;
 355                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 356                 resets = <&cpg 407>;
 357         };
 358
 359         dmac0: dma-controller@e6700000 {
 360                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 361                 reg = <0 0xe6700000 0 0x20000>;
 362                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 363                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 364                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 365                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 366                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 367                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 368                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 369                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 370                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 371                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 372                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 373                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 374                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 375                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 376                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 377                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 378                 interrupt-names = "error",
 379                                 "ch0", "ch1", "ch2", "ch3",
 380                                 "ch4", "ch5", "ch6", "ch7",
 381                                 "ch8", "ch9", "ch10", "ch11",
 382                                 "ch12", "ch13", "ch14";
 383                 clocks = <&cpg CPG_MOD 219>;
 384                 clock-names = "fck";
 385                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 386                 resets = <&cpg 219>;
 387                 #dma-cells = <1>;
 388                 dma-channels = <15>;
 389         };
 390
 391         dmac1: dma-controller@e6720000 {
 392                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 393                 reg = <0 0xe6720000 0 0x20000>;
 394                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 395                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 396                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 397                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 398                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 399                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 400                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 401                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 402                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 403                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 404                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 405                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 406                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 407                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 408                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 409                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 410                 interrupt-names = "error",
 411                                 "ch0", "ch1", "ch2", "ch3",
 412                                 "ch4", "ch5", "ch6", "ch7",
 413                                 "ch8", "ch9", "ch10", "ch11",
 414                                 "ch12", "ch13", "ch14";
 415                 clocks = <&cpg CPG_MOD 218>;
 416                 clock-names = "fck";
 417                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 418                 resets = <&cpg 218>;
 419                 #dma-cells = <1>;
 420                 dma-channels = <15>;
 421         };
 422
 423         audma0: dma-controller@ec700000 {
 424                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 425                 reg = <0 0xec700000 0 0x10000>;
 426                 interrupts =    <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 427                                  GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 428                                  GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 429                                  GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 430                                  GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 431                                  GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 432                                  GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 433                                  GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 434                                  GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 435                                  GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 436                                  GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 437                                  GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 438                                  GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 439                                  GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 440                 interrupt-names = "error",
 441                                 "ch0", "ch1", "ch2", "ch3",
 442                                 "ch4", "ch5", "ch6", "ch7",
 443                                 "ch8", "ch9", "ch10", "ch11",
 444                                 "ch12";
 445                 clocks = <&cpg CPG_MOD 502>;
 446                 clock-names = "fck";
 447                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 448                 resets = <&cpg 502>;
 449                 #dma-cells = <1>;
 450                 dma-channels = <13>;
 451         };
 452
 453         audma1: dma-controller@ec720000 {
 454                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 455                 reg = <0 0xec720000 0 0x10000>;
 456                 interrupts =    <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 457                                  GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 458                                  GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 459                                  GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
 460                                  GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 461                                  GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 462                                  GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 463                                  GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 464                                  GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 465                                  GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 466                                  GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 467                                  GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 468                                  GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 469                                  GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
 470                 interrupt-names = "error",
 471                                 "ch0", "ch1", "ch2", "ch3",
 472                                 "ch4", "ch5", "ch6", "ch7",
 473                                 "ch8", "ch9", "ch10", "ch11",
 474                                 "ch12";
 475                 clocks = <&cpg CPG_MOD 501>;
 476                 clock-names = "fck";
 477                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 478                 resets = <&cpg 501>;
 479                 #dma-cells = <1>;
 480                 dma-channels = <13>;
 481         };
 482
 483         usb_dmac0: dma-controller@e65a0000 {
 484                 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
 485                 reg = <0 0xe65a0000 0 0x100>;
 486                 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 487                               GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 488                 interrupt-names = "ch0", "ch1";
 489                 clocks = <&cpg CPG_MOD 330>;
 490                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 491                 resets = <&cpg 330>;
 492                 #dma-cells = <1>;
 493                 dma-channels = <2>;
 494         };
 495
 496         usb_dmac1: dma-controller@e65b0000 {
 497                 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
 498                 reg = <0 0xe65b0000 0 0x100>;
 499                 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 500                               GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 501                 interrupt-names = "ch0", "ch1";
 502                 clocks = <&cpg CPG_MOD 331>;
 503                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 504                 resets = <&cpg 331>;
 505                 #dma-cells = <1>;
 506                 dma-channels = <2>;
 507         };
 508
 509         i2c0: i2c@e6508000 {
 510                 #address-cells = <1>;
 511                 #size-cells = <0>;
 512                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 513                 reg = <0 0xe6508000 0 0x40>;
 514                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 515                 clocks = <&cpg CPG_MOD 931>;
 516                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 517                 resets = <&cpg 931>;
 518                 i2c-scl-internal-delay-ns = <110>;
 519                 status = "disabled";
 520         };
 521
 522         i2c1: i2c@e6518000 {
 523                 #address-cells = <1>;
 524                 #size-cells = <0>;
 525                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 526                 reg = <0 0xe6518000 0 0x40>;
 527                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 528                 clocks = <&cpg CPG_MOD 930>;
 529                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 530                 resets = <&cpg 930>;
 531                 i2c-scl-internal-delay-ns = <6>;
 532                 status = "disabled";
 533         };
 534
 535         i2c2: i2c@e6530000 {
 536                 #address-cells = <1>;
 537                 #size-cells = <0>;
 538                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 539                 reg = <0 0xe6530000 0 0x40>;
 540                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 541                 clocks = <&cpg CPG_MOD 929>;
 542                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 543                 resets = <&cpg 929>;
 544                 i2c-scl-internal-delay-ns = <6>;
 545                 status = "disabled";
 546         };
 547
 548         i2c3: i2c@e6540000 {
 549                 #address-cells = <1>;
 550                 #size-cells = <0>;
 551                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 552                 reg = <0 0xe6540000 0 0x40>;
 553                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 554                 clocks = <&cpg CPG_MOD 928>;
 555                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 556                 resets = <&cpg 928>;
 557                 i2c-scl-internal-delay-ns = <110>;
 558                 status = "disabled";
 559         };
 560
 561         iic0: i2c@e6500000 {
 562                 #address-cells = <1>;
 563                 #size-cells = <0>;
 564                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 565                              "renesas,rmobile-iic";
 566                 reg = <0 0xe6500000 0 0x425>;
 567                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 568                 clocks = <&cpg CPG_MOD 318>;
 569                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 570                        <&dmac1 0x61>, <&dmac1 0x62>;
 571                 dma-names = "tx", "rx", "tx", "rx";
 572                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 573                 resets = <&cpg 318>;
 574                 status = "disabled";
 575         };
 576
 577         iic1: i2c@e6510000 {
 578                 #address-cells = <1>;
 579                 #size-cells = <0>;
 580                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 581                              "renesas,rmobile-iic";
 582                 reg = <0 0xe6510000 0 0x425>;
 583                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 584                 clocks = <&cpg CPG_MOD 323>;
 585                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 586                        <&dmac1 0x65>, <&dmac1 0x66>;
 587                 dma-names = "tx", "rx", "tx", "rx";
 588                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 589                 resets = <&cpg 323>;
 590                 status = "disabled";
 591         };
 592
 593         iic2: i2c@e6520000 {
 594                 #address-cells = <1>;
 595                 #size-cells = <0>;
 596                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 597                              "renesas,rmobile-iic";
 598                 reg = <0 0xe6520000 0 0x425>;
 599                 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
 600                 clocks = <&cpg CPG_MOD 300>;
 601                 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
 602                        <&dmac1 0x69>, <&dmac1 0x6a>;
 603                 dma-names = "tx", "rx", "tx", "rx";
 604                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 605                 resets = <&cpg 300>;
 606                 status = "disabled";
 607         };
 608
 609         iic3: i2c@e60b0000 {
 610                 #address-cells = <1>;
 611                 #size-cells = <0>;
 612                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 613                              "renesas,rmobile-iic";
 614                 reg = <0 0xe60b0000 0 0x425>;
 615                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 616                 clocks = <&cpg CPG_MOD 926>;
 617                 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 618                        <&dmac1 0x77>, <&dmac1 0x78>;
 619                 dma-names = "tx", "rx", "tx", "rx";
 620                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 621                 resets = <&cpg 926>;
 622                 status = "disabled";
 623         };
 624
 625         mmcif0: mmc@ee200000 {
 626                 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
 627                 reg = <0 0xee200000 0 0x80>;
 628                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 629                 clocks = <&cpg CPG_MOD 315>;
 630                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 631                        <&dmac1 0xd1>, <&dmac1 0xd2>;
 632                 dma-names = "tx", "rx", "tx", "rx";
 633                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 634                 resets = <&cpg 315>;
 635                 reg-io-width = <4>;
 636                 status = "disabled";
 637                 max-frequency = <97500000>;
 638         };
 639
 640         mmcif1: mmc@ee220000 {
 641                 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
 642                 reg = <0 0xee220000 0 0x80>;
 643                 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
 644                 clocks = <&cpg CPG_MOD 305>;
 645                 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
 646                        <&dmac1 0xe1>, <&dmac1 0xe2>;
 647                 dma-names = "tx", "rx", "tx", "rx";
 648                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 649                 resets = <&cpg 305>;
 650                 reg-io-width = <4>;
 651                 status = "disabled";
 652                 max-frequency = <97500000>;
 653         };
 654
 655         pfc: pin-controller@e6060000 {
 656                 compatible = "renesas,pfc-r8a7790";
 657                 reg = <0 0xe6060000 0 0x250>;
 658         };
 659
 660         sdhi0: sd@ee100000 {
 661                 compatible = "renesas,sdhi-r8a7790",
 662                              "renesas,rcar-gen2-sdhi";
 663                 reg = <0 0xee100000 0 0x328>;
 664                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 665                 clocks = <&cpg CPG_MOD 314>;
 666                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 667                        <&dmac1 0xcd>, <&dmac1 0xce>;
 668                 dma-names = "tx", "rx", "tx", "rx";
 669                 max-frequency = <195000000>;
 670                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 671                 resets = <&cpg 314>;
 672                 status = "disabled";
 673         };
 674
 675         sdhi1: sd@ee120000 {
 676                 compatible = "renesas,sdhi-r8a7790",
 677                              "renesas,rcar-gen2-sdhi";
 678                 reg = <0 0xee120000 0 0x328>;
 679                 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
 680                 clocks = <&cpg CPG_MOD 313>;
 681                 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
 682                        <&dmac1 0xc9>, <&dmac1 0xca>;
 683                 dma-names = "tx", "rx", "tx", "rx";
 684                 max-frequency = <195000000>;
 685                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 686                 resets = <&cpg 313>;
 687                 status = "disabled";
 688         };
 689
 690         sdhi2: sd@ee140000 {
 691                 compatible = "renesas,sdhi-r8a7790",
 692                              "renesas,rcar-gen2-sdhi";
 693                 reg = <0 0xee140000 0 0x100>;
 694                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 695                 clocks = <&cpg CPG_MOD 312>;
 696                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 697                        <&dmac1 0xc1>, <&dmac1 0xc2>;
 698                 dma-names = "tx", "rx", "tx", "rx";
 699                 max-frequency = <97500000>;
 700                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 701                 resets = <&cpg 312>;
 702                 status = "disabled";
 703         };
 704
 705         sdhi3: sd@ee160000 {
 706                 compatible = "renesas,sdhi-r8a7790",
 707                              "renesas,rcar-gen2-sdhi";
 708                 reg = <0 0xee160000 0 0x100>;
 709                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 710                 clocks = <&cpg CPG_MOD 311>;
 711                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 712                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 713                 dma-names = "tx", "rx", "tx", "rx";
 714                 max-frequency = <97500000>;
 715                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 716                 resets = <&cpg 311>;
 717                 status = "disabled";
 718         };
 719
 720         scifa0: serial@e6c40000 {
 721                 compatible = "renesas,scifa-r8a7790",
 722                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 723                 reg = <0 0xe6c40000 0 64>;
 724                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 725                 clocks = <&cpg CPG_MOD 204>;
 726                 clock-names = "fck";
 727                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 728                        <&dmac1 0x21>, <&dmac1 0x22>;
 729                 dma-names = "tx", "rx", "tx", "rx";
 730                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 731                 resets = <&cpg 204>;
 732                 status = "disabled";
 733         };
 734
 735         scifa1: serial@e6c50000 {
 736                 compatible = "renesas,scifa-r8a7790",
 737                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 738                 reg = <0 0xe6c50000 0 64>;
 739                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 740                 clocks = <&cpg CPG_MOD 203>;
 741                 clock-names = "fck";
 742                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 743                        <&dmac1 0x25>, <&dmac1 0x26>;
 744                 dma-names = "tx", "rx", "tx", "rx";
 745                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 746                 resets = <&cpg 203>;
 747                 status = "disabled";
 748         };
 749
 750         scifa2: serial@e6c60000 {
 751                 compatible = "renesas,scifa-r8a7790",
 752                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 753                 reg = <0 0xe6c60000 0 64>;
 754                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 755                 clocks = <&cpg CPG_MOD 202>;
 756                 clock-names = "fck";
 757                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 758                        <&dmac1 0x27>, <&dmac1 0x28>;
 759                 dma-names = "tx", "rx", "tx", "rx";
 760                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 761                 resets = <&cpg 202>;
 762                 status = "disabled";
 763         };
 764
 765         scifb0: serial@e6c20000 {
 766                 compatible = "renesas,scifb-r8a7790",
 767                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 768                 reg = <0 0xe6c20000 0 0x100>;
 769                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 770                 clocks = <&cpg CPG_MOD 206>;
 771                 clock-names = "fck";
 772                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 773                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 774                 dma-names = "tx", "rx", "tx", "rx";
 775                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 776                 resets = <&cpg 206>;
 777                 status = "disabled";
 778         };
 779
 780         scifb1: serial@e6c30000 {
 781                 compatible = "renesas,scifb-r8a7790",
 782                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 783                 reg = <0 0xe6c30000 0 0x100>;
 784                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 785                 clocks = <&cpg CPG_MOD 207>;
 786                 clock-names = "fck";
 787                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 788                        <&dmac1 0x19>, <&dmac1 0x1a>;
 789                 dma-names = "tx", "rx", "tx", "rx";
 790                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 791                 resets = <&cpg 207>;
 792                 status = "disabled";
 793         };
 794
 795         scifb2: serial@e6ce0000 {
 796                 compatible = "renesas,scifb-r8a7790",
 797                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 798                 reg = <0 0xe6ce0000 0 0x100>;
 799                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 800                 clocks = <&cpg CPG_MOD 216>;
 801                 clock-names = "fck";
 802                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 803                        <&dmac1 0x1d>, <&dmac1 0x1e>;
 804                 dma-names = "tx", "rx", "tx", "rx";
 805                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 806                 resets = <&cpg 216>;
 807                 status = "disabled";
 808         };
 809
 810         scif0: serial@e6e60000 {
 811                 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
 812                              "renesas,scif";
 813                 reg = <0 0xe6e60000 0 64>;
 814                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 815                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 816                          <&scif_clk>;
 817                 clock-names = "fck", "brg_int", "scif_clk";
 818                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 819                        <&dmac1 0x29>, <&dmac1 0x2a>;
 820                 dma-names = "tx", "rx", "tx", "rx";
 821                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 822                 resets = <&cpg 721>;
 823                 status = "disabled";
 824         };
 825
 826         scif1: serial@e6e68000 {
 827                 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
 828                              "renesas,scif";
 829                 reg = <0 0xe6e68000 0 64>;
 830                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 831                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 832                          <&scif_clk>;
 833                 clock-names = "fck", "brg_int", "scif_clk";
 834                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 835                        <&dmac1 0x2d>, <&dmac1 0x2e>;
 836                 dma-names = "tx", "rx", "tx", "rx";
 837                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 838                 resets = <&cpg 720>;
 839                 status = "disabled";
 840         };
 841
 842         scif2: serial@e6e56000 {
 843                 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
 844                              "renesas,scif";
 845                 reg = <0 0xe6e56000 0 64>;
 846                 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 847                 clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 848                          <&scif_clk>;
 849                 clock-names = "fck", "brg_int", "scif_clk";
 850                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 851                        <&dmac1 0x2b>, <&dmac1 0x2c>;
 852                 dma-names = "tx", "rx", "tx", "rx";
 853                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 854                 resets = <&cpg 310>;
 855                 status = "disabled";
 856         };
 857
 858         hscif0: serial@e62c0000 {
 859                 compatible = "renesas,hscif-r8a7790",
 860                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 861                 reg = <0 0xe62c0000 0 96>;
 862                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 863                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 864                          <&scif_clk>;
 865                 clock-names = "fck", "brg_int", "scif_clk";
 866                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 867                        <&dmac1 0x39>, <&dmac1 0x3a>;
 868                 dma-names = "tx", "rx", "tx", "rx";
 869                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 870                 resets = <&cpg 717>;
 871                 status = "disabled";
 872         };
 873
 874         hscif1: serial@e62c8000 {
 875                 compatible = "renesas,hscif-r8a7790",
 876                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 877                 reg = <0 0xe62c8000 0 96>;
 878                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 879                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 880                          <&scif_clk>;
 881                 clock-names = "fck", "brg_int", "scif_clk";
 882                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 883                        <&dmac1 0x4d>, <&dmac1 0x4e>;
 884                 dma-names = "tx", "rx", "tx", "rx";
 885                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 886                 resets = <&cpg 716>;
 887                 status = "disabled";
 888         };
 889
 890         icram0: sram@e63a0000 {
 891                 compatible = "mmio-sram";
 892                 reg = <0 0xe63a0000 0 0x12000>;
 893         };
 894
 895         icram1: sram@e63c0000 {
 896                 compatible = "mmio-sram";
 897                 reg = <0 0xe63c0000 0 0x1000>;
 898                 #address-cells = <1>;
 899                 #size-cells = <1>;
 900                 ranges = <0 0 0xe63c0000 0x1000>;
 901
 902                 smp-sram@0 {
 903                         compatible = "renesas,smp-sram";
 904                         reg = <0 0x10>;
 905                 };
 906         };
 907
 908         ether: ethernet@ee700000 {
 909                 compatible = "renesas,ether-r8a7790",
 910                              "renesas,rcar-gen2-ether";
 911                 reg = <0 0xee700000 0 0x400>;
 912                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 913                 clocks = <&cpg CPG_MOD 813>;
 914                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 915                 resets = <&cpg 813>;
 916                 phy-mode = "rmii";
 917                 #address-cells = <1>;
 918                 #size-cells = <0>;
 919                 status = "disabled";
 920         };
 921
 922         avb: ethernet@e6800000 {
 923                 compatible = "renesas,etheravb-r8a7790",
 924                              "renesas,etheravb-rcar-gen2";
 925                 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 926                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 927                 clocks = <&cpg CPG_MOD 812>;
 928                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 929                 resets = <&cpg 812>;
 930                 #address-cells = <1>;
 931                 #size-cells = <0>;
 932                 status = "disabled";
 933         };
 934
 935         sata0: sata@ee300000 {
 936                 compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
 937                 reg = <0 0xee300000 0 0x2000>;
 938                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 939                 clocks = <&cpg CPG_MOD 815>;
 940                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 941                 resets = <&cpg 815>;
 942                 status = "disabled";
 943         };
 944
 945         sata1: sata@ee500000 {
 946                 compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
 947                 reg = <0 0xee500000 0 0x2000>;
 948                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
 949                 clocks = <&cpg CPG_MOD 814>;
 950                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 951                 resets = <&cpg 814>;
 952                 status = "disabled";
 953         };
 954
 955         hsusb: usb@e6590000 {
 956                 compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
 957                 reg = <0 0xe6590000 0 0x100>;
 958                 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 959                 clocks = <&cpg CPG_MOD 704>;
 960                 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 961                        <&usb_dmac1 0>, <&usb_dmac1 1>;
 962                 dma-names = "ch0", "ch1", "ch2", "ch3";
 963                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 964                 resets = <&cpg 704>;
 965                 renesas,buswait = <4>;
 966                 phys = <&usb0 1>;
 967                 phy-names = "usb";
 968                 status = "disabled";
 969         };
 970
 971         usbphy: usb-phy@e6590100 {
 972                 compatible = "renesas,usb-phy-r8a7790",
 973                              "renesas,rcar-gen2-usb-phy";
 974                 reg = <0 0xe6590100 0 0x100>;
 975                 #address-cells = <1>;
 976                 #size-cells = <0>;
 977                 clocks = <&cpg CPG_MOD 704>;
 978                 clock-names = "usbhs";
 979                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 980                 resets = <&cpg 704>;
 981                 status = "disabled";
 982
 983                 usb0: usb-channel@0 {
 984                         reg = <0>;
 985                         #phy-cells = <1>;
 986                 };
 987                 usb2: usb-channel@2 {
 988                         reg = <2>;
 989                         #phy-cells = <1>;
 990                 };
 991         };
 992
 993         vin0: video@e6ef0000 {
 994                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
 995                 reg = <0 0xe6ef0000 0 0x1000>;
 996                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 997                 clocks = <&cpg CPG_MOD 811>;
 998                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 999                 resets = <&cpg 811>;
1000                 status = "disabled";
1001         };
1002
1003         vin1: video@e6ef1000 {
1004                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1005                 reg = <0 0xe6ef1000 0 0x1000>;
1006                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1007                 clocks = <&cpg CPG_MOD 810>;
1008                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1009                 resets = <&cpg 810>;
1010                 status = "disabled";
1011         };
1012
1013         vin2: video@e6ef2000 {
1014                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1015                 reg = <0 0xe6ef2000 0 0x1000>;
1016                 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1017                 clocks = <&cpg CPG_MOD 809>;
1018                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1019                 resets = <&cpg 809>;
1020                 status = "disabled";
1021         };
1022
1023         vin3: video@e6ef3000 {
1024                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1025                 reg = <0 0xe6ef3000 0 0x1000>;
1026                 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1027                 clocks = <&cpg CPG_MOD 808>;
1028                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1029                 resets = <&cpg 808>;
1030                 status = "disabled";
1031         };
1032
1033         vsp@fe920000 {
1034                 compatible = "renesas,vsp1";
1035                 reg = <0 0xfe920000 0 0x8000>;
1036                 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1037                 clocks = <&cpg CPG_MOD 130>;
1038                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1039                 resets = <&cpg 130>;
1040         };
1041
1042         vsp@fe928000 {
1043                 compatible = "renesas,vsp1";
1044                 reg = <0 0xfe928000 0 0x8000>;
1045                 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1046                 clocks = <&cpg CPG_MOD 131>;
1047                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1048                 resets = <&cpg 131>;
1049         };
1050
1051         vsp@fe930000 {
1052                 compatible = "renesas,vsp1";
1053                 reg = <0 0xfe930000 0 0x8000>;
1054                 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1055                 clocks = <&cpg CPG_MOD 128>;
1056                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1057                 resets = <&cpg 128>;
1058         };
1059
1060         vsp@fe938000 {
1061                 compatible = "renesas,vsp1";
1062                 reg = <0 0xfe938000 0 0x8000>;
1063                 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1064                 clocks = <&cpg CPG_MOD 127>;
1065                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1066                 resets = <&cpg 127>;
1067         };
1068
1069         du: display@feb00000 {
1070                 compatible = "renesas,du-r8a7790";
1071                 reg = <0 0xfeb00000 0 0x70000>,
1072                       <0 0xfeb90000 0 0x1c>,
1073                       <0 0xfeb94000 0 0x1c>;
1074                 reg-names = "du", "lvds.0", "lvds.1";
1075                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1076                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1077                              <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1078                 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1079                          <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
1080                          <&cpg CPG_MOD 725>;
1081                 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
1082                 status = "disabled";
1083
1084                 ports {
1085                         #address-cells = <1>;
1086                         #size-cells = <0>;
1087
1088                         port@0 {
1089                                 reg = <0>;
1090                                 du_out_rgb: endpoint {
1091                                 };
1092                         };
1093                         port@1 {
1094                                 reg = <1>;
1095                                 du_out_lvds0: endpoint {
1096                                 };
1097                         };
1098                         port@2 {
1099                                 reg = <2>;
1100                                 du_out_lvds1: endpoint {
1101                                 };
1102                         };
1103                 };
1104         };
1105
1106         can0: can@e6e80000 {
1107                 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1108                 reg = <0 0xe6e80000 0 0x1000>;
1109                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1110                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
1111                          <&can_clk>;
1112                 clock-names = "clkp1", "clkp2", "can_clk";
1113                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1114                 resets = <&cpg 916>;
1115                 status = "disabled";
1116         };
1117
1118         can1: can@e6e88000 {
1119                 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1120                 reg = <0 0xe6e88000 0 0x1000>;
1121                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1122                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
1123                          <&can_clk>;
1124                 clock-names = "clkp1", "clkp2", "can_clk";
1125                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1126                 resets = <&cpg 915>;
1127                 status = "disabled";
1128         };
1129
1130         jpu: jpeg-codec@fe980000 {
1131                 compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
1132                 reg = <0 0xfe980000 0 0x10300>;
1133                 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1134                 clocks = <&cpg CPG_MOD 106>;
1135                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1136                 resets = <&cpg 106>;
1137         };
1138
1139         /* External root clock */
1140         extal_clk: extal {
1141                 compatible = "fixed-clock";
1142                 #clock-cells = <0>;
1143                 /* This value must be overridden by the board. */
1144                 clock-frequency = <0>;
1145         };
1146
1147         /* External PCIe clock - can be overridden by the board */
1148         pcie_bus_clk: pcie_bus {
1149                 compatible = "fixed-clock";
1150                 #clock-cells = <0>;
1151                 clock-frequency = <0>;
1152         };
1153
1154         /*
1155          * The external audio clocks are configured as 0 Hz fixed frequency
1156          * clocks by default.
1157          * Boards that provide audio clocks should override them.
1158          */
1159         audio_clk_a: audio_clk_a {
1160                 compatible = "fixed-clock";
1161                 #clock-cells = <0>;
1162                 clock-frequency = <0>;
1163         };
1164         audio_clk_b: audio_clk_b {
1165                 compatible = "fixed-clock";
1166                 #clock-cells = <0>;
1167                 clock-frequency = <0>;
1168         };
1169         audio_clk_c: audio_clk_c {
1170                 compatible = "fixed-clock";
1171                 #clock-cells = <0>;
1172                 clock-frequency = <0>;
1173         };
1174
1175         /* External SCIF clock */
1176         scif_clk: scif {
1177                 compatible = "fixed-clock";
1178                 #clock-cells = <0>;
1179                 /* This value must be overridden by the board. */
1180                 clock-frequency = <0>;
1181         };
1182
1183         /* External USB clock - can be overridden by the board */
1184         usb_extal_clk: usb_extal {
1185                 compatible = "fixed-clock";
1186                 #clock-cells = <0>;
1187                 clock-frequency = <48000000>;
1188         };
1189
1190         /* External CAN clock */
1191         can_clk: can {
1192                 compatible = "fixed-clock";
1193                 #clock-cells = <0>;
1194                 /* This value must be overridden by the board. */
1195                 clock-frequency = <0>;
1196         };
1197
1198         cpg: clock-controller@e6150000 {
1199                 compatible = "renesas,r8a7790-cpg-mssr";
1200                 reg = <0 0xe6150000 0 0x1000>;
1201                 clocks = <&extal_clk>, <&usb_extal_clk>;
1202                 clock-names = "extal", "usb_extal";
1203                 #clock-cells = <2>;
1204                 #power-domain-cells = <0>;
1205                 #reset-cells = <1>;
1206         };
1207
1208         prr: chipid@ff000044 {
1209                 compatible = "renesas,prr";
1210                 reg = <0 0xff000044 0 4>;
1211         };
1212
1213         rst: reset-controller@e6160000 {
1214                 compatible = "renesas,r8a7790-rst";
1215                 reg = <0 0xe6160000 0 0x0100>;
1216         };
1217
1218         sysc: system-controller@e6180000 {
1219                 compatible = "renesas,r8a7790-sysc";
1220                 reg = <0 0xe6180000 0 0x0200>;
1221                 #power-domain-cells = <1>;
1222         };
1223
1224         qspi: spi@e6b10000 {
1225                 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
1226                 reg = <0 0xe6b10000 0 0x2c>;
1227                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1228                 clocks = <&cpg CPG_MOD 917>;
1229                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1230                        <&dmac1 0x17>, <&dmac1 0x18>;
1231                 dma-names = "tx", "rx", "tx", "rx";
1232                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1233                 resets = <&cpg 917>;
1234                 num-cs = <1>;
1235                 #address-cells = <1>;
1236                 #size-cells = <0>;
1237                 status = "disabled";
1238         };
1239
1240         msiof0: spi@e6e20000 {
1241                 compatible = "renesas,msiof-r8a7790",
1242                              "renesas,rcar-gen2-msiof";
1243                 reg = <0 0xe6e20000 0 0x0064>;
1244                 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1245                 clocks = <&cpg CPG_MOD 0>;
1246                 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1247                        <&dmac1 0x51>, <&dmac1 0x52>;
1248                 dma-names = "tx", "rx", "tx", "rx";
1249                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1250                 resets = <&cpg 0>;
1251                 #address-cells = <1>;
1252                 #size-cells = <0>;
1253                 status = "disabled";
1254         };
1255
1256         msiof1: spi@e6e10000 {
1257                 compatible = "renesas,msiof-r8a7790",
1258                              "renesas,rcar-gen2-msiof";
1259                 reg = <0 0xe6e10000 0 0x0064>;
1260                 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1261                 clocks = <&cpg CPG_MOD 208>;
1262                 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1263                        <&dmac1 0x55>, <&dmac1 0x56>;
1264                 dma-names = "tx", "rx", "tx", "rx";
1265                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1266                 resets = <&cpg 208>;
1267                 #address-cells = <1>;
1268                 #size-cells = <0>;
1269                 status = "disabled";
1270         };
1271
1272         msiof2: spi@e6e00000 {
1273                 compatible = "renesas,msiof-r8a7790",
1274                              "renesas,rcar-gen2-msiof";
1275                 reg = <0 0xe6e00000 0 0x0064>;
1276                 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1277                 clocks = <&cpg CPG_MOD 205>;
1278                 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1279                        <&dmac1 0x41>, <&dmac1 0x42>;
1280                 dma-names = "tx", "rx", "tx", "rx";
1281                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1282                 resets = <&cpg 205>;
1283                 #address-cells = <1>;
1284                 #size-cells = <0>;
1285                 status = "disabled";
1286         };
1287
1288         msiof3: spi@e6c90000 {
1289                 compatible = "renesas,msiof-r8a7790",
1290                              "renesas,rcar-gen2-msiof";
1291                 reg = <0 0xe6c90000 0 0x0064>;
1292                 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1293                 clocks = <&cpg CPG_MOD 215>;
1294                 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1295                        <&dmac1 0x45>, <&dmac1 0x46>;
1296                 dma-names = "tx", "rx", "tx", "rx";
1297                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1298                 resets = <&cpg 215>;
1299                 #address-cells = <1>;
1300                 #size-cells = <0>;
1301                 status = "disabled";
1302         };
1303
1304         xhci: usb@ee000000 {
1305                 compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
1306                 reg = <0 0xee000000 0 0xc00>;
1307                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1308                 clocks = <&cpg CPG_MOD 328>;
1309                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1310                 resets = <&cpg 328>;
1311                 phys = <&usb2 1>;
1312                 phy-names = "usb";
1313                 status = "disabled";
1314         };
1315
1316         pci0: pci@ee090000 {
1317                 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1318                 device_type = "pci";
1319                 reg = <0 0xee090000 0 0xc00>,
1320                       <0 0xee080000 0 0x1100>;
1321                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1322                 clocks = <&cpg CPG_MOD 703>;
1323                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1324                 resets = <&cpg 703>;
1325                 status = "disabled";
1326
1327                 bus-range = <0 0>;
1328                 #address-cells = <3>;
1329                 #size-cells = <2>;
1330                 #interrupt-cells = <1>;
1331                 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1332                 interrupt-map-mask = <0xff00 0 0 0x7>;
1333                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1334                                  0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1335                                  0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1336
1337                 usb@1,0 {
1338                         reg = <0x800 0 0 0 0>;
1339                         phys = <&usb0 0>;
1340                         phy-names = "usb";
1341                 };
1342
1343                 usb@2,0 {
1344                         reg = <0x1000 0 0 0 0>;
1345                         phys = <&usb0 0>;
1346                         phy-names = "usb";
1347                 };
1348         };
1349
1350         pci1: pci@ee0b0000 {
1351                 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1352                 device_type = "pci";
1353                 reg = <0 0xee0b0000 0 0xc00>,
1354                       <0 0xee0a0000 0 0x1100>;
1355                 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1356                 clocks = <&cpg CPG_MOD 703>;
1357                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1358                 resets = <&cpg 703>;
1359                 status = "disabled";
1360
1361                 bus-range = <1 1>;
1362                 #address-cells = <3>;
1363                 #size-cells = <2>;
1364                 #interrupt-cells = <1>;
1365                 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1366                 interrupt-map-mask = <0xff00 0 0 0x7>;
1367                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1368                                  0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1369                                  0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1370         };
1371
1372         pci2: pci@ee0d0000 {
1373                 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1374                 device_type = "pci";
1375                 clocks = <&cpg CPG_MOD 703>;
1376                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1377                 resets = <&cpg 703>;
1378                 reg = <0 0xee0d0000 0 0xc00>,
1379                       <0 0xee0c0000 0 0x1100>;
1380                 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1381                 status = "disabled";
1382
1383                 bus-range = <2 2>;
1384                 #address-cells = <3>;
1385                 #size-cells = <2>;
1386                 #interrupt-cells = <1>;
1387                 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1388                 interrupt-map-mask = <0xff00 0 0 0x7>;
1389                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1390                                  0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1391                                  0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1392
1393                 usb@1,0 {
1394                         reg = <0x20800 0 0 0 0>;
1395                         phys = <&usb2 0>;
1396                         phy-names = "usb";
1397                 };
1398
1399                 usb@2,0 {
1400                         reg = <0x21000 0 0 0 0>;
1401                         phys = <&usb2 0>;
1402                         phy-names = "usb";
1403                 };
1404         };
1405
1406         pciec: pcie@fe000000 {
1407                 compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
1408                 reg = <0 0xfe000000 0 0x80000>;
1409                 #address-cells = <3>;
1410                 #size-cells = <2>;
1411                 bus-range = <0x00 0xff>;
1412                 device_type = "pci";
1413                 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1414                           0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1415                           0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1416                           0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1417                 /* Map all possible DDR as inbound ranges */
1418                 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1419                               0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1420                 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1421                              <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1422                              <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1423                 #interrupt-cells = <1>;
1424                 interrupt-map-mask = <0 0 0 0>;
1425                 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1426                 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1427                 clock-names = "pcie", "pcie_bus";
1428                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1429                 resets = <&cpg 319>;
1430                 status = "disabled";
1431         };
1432
1433         rcar_sound: sound@ec500000 {
1434                 /*
1435                  * #sound-dai-cells is required
1436                  *
1437                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1438                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1439                  */
1440                 compatible =  "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
1441                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1442                         <0 0xec5a0000 0 0x100>,  /* ADG */
1443                         <0 0xec540000 0 0x1000>, /* SSIU */
1444                         <0 0xec541000 0 0x280>,  /* SSI */
1445                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1446                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1447
1448                 clocks = <&cpg CPG_MOD 1005>,
1449                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1450                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1451                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1452                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1453                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1454                          <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1455                          <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1456                          <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1457                          <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1458                          <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1459                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1460                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1461                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1462                          <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1463                          <&cpg CPG_CORE R8A7790_CLK_M2>;
1464                 clock-names = "ssi-all",
1465                                 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1466                                 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1467                                 "src.9", "src.8", "src.7", "src.6", "src.5",
1468                                 "src.4", "src.3", "src.2", "src.1", "src.0",
1469                                 "ctu.0", "ctu.1",
1470                                 "mix.0", "mix.1",
1471                                 "dvc.0", "dvc.1",
1472                                 "clk_a", "clk_b", "clk_c", "clk_i";
1473                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1474                 resets = <&cpg 1005>,
1475                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1476                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1477                          <&cpg 1014>, <&cpg 1015>;
1478                 reset-names = "ssi-all",
1479                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1480                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1481
1482                 status = "disabled";
1483
1484                 rcar_sound,dvc {
1485                         dvc0: dvc-0 {
1486                                 dmas = <&audma1 0xbc>;
1487                                 dma-names = "tx";
1488                         };
1489                         dvc1: dvc-1 {
1490                                 dmas = <&audma1 0xbe>;
1491                                 dma-names = "tx";
1492                         };
1493                 };
1494
1495                 rcar_sound,mix {
1496                         mix0: mix-0 { };
1497                         mix1: mix-1 { };
1498                 };
1499
1500                 rcar_sound,ctu {
1501                         ctu00: ctu-0 { };
1502                         ctu01: ctu-1 { };
1503                         ctu02: ctu-2 { };
1504                         ctu03: ctu-3 { };
1505                         ctu10: ctu-4 { };
1506                         ctu11: ctu-5 { };
1507                         ctu12: ctu-6 { };
1508                         ctu13: ctu-7 { };
1509                 };
1510
1511                 rcar_sound,src {
1512                         src0: src-0 {
1513                                 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1514                                 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1515                                 dma-names = "rx", "tx";
1516                         };
1517                         src1: src-1 {
1518                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1519                                 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1520                                 dma-names = "rx", "tx";
1521                         };
1522                         src2: src-2 {
1523                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1524                                 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1525                                 dma-names = "rx", "tx";
1526                         };
1527                         src3: src-3 {
1528                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1529                                 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1530                                 dma-names = "rx", "tx";
1531                         };
1532                         src4: src-4 {
1533                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1534                                 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1535                                 dma-names = "rx", "tx";
1536                         };
1537                         src5: src-5 {
1538                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1539                                 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1540                                 dma-names = "rx", "tx";
1541                         };
1542                         src6: src-6 {
1543                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1544                                 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1545                                 dma-names = "rx", "tx";
1546                         };
1547                         src7: src-7 {
1548                                 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1549                                 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1550                                 dma-names = "rx", "tx";
1551                         };
1552                         src8: src-8 {
1553                                 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1554                                 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1555                                 dma-names = "rx", "tx";
1556                         };
1557                         src9: src-9 {
1558                                 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1559                                 dmas = <&audma0 0x97>, <&audma1 0xba>;
1560                                 dma-names = "rx", "tx";
1561                         };
1562                 };
1563
1564                 rcar_sound,ssi {
1565                         ssi0: ssi-0 {
1566                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1567                                 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1568                                 dma-names = "rx", "tx", "rxu", "txu";
1569                         };
1570                         ssi1: ssi-1 {
1571                                  interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1572                                 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1573                                 dma-names = "rx", "tx", "rxu", "txu";
1574                         };
1575                         ssi2: ssi-2 {
1576                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1577                                 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1578                                 dma-names = "rx", "tx", "rxu", "txu";
1579                         };
1580                         ssi3: ssi-3 {
1581                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1582                                 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1583                                 dma-names = "rx", "tx", "rxu", "txu";
1584                         };
1585                         ssi4: ssi-4 {
1586                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1587                                 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1588                                 dma-names = "rx", "tx", "rxu", "txu";
1589                         };
1590                         ssi5: ssi-5 {
1591                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1592                                 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1593                                 dma-names = "rx", "tx", "rxu", "txu";
1594                         };
1595                         ssi6: ssi-6 {
1596                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1597                                 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1598                                 dma-names = "rx", "tx", "rxu", "txu";
1599                         };
1600                         ssi7: ssi-7 {
1601                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1602                                 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1603                                 dma-names = "rx", "tx", "rxu", "txu";
1604                         };
1605                         ssi8: ssi-8 {
1606                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1607                                 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1608                                 dma-names = "rx", "tx", "rxu", "txu";
1609                         };
1610                         ssi9: ssi-9 {
1611                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1612                                 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1613                                 dma-names = "rx", "tx", "rxu", "txu";
1614                         };
1615                 };
1616         };
1617
1618         ipmmu_sy0: mmu@e6280000 {
1619                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1620                 reg = <0 0xe6280000 0 0x1000>;
1621                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1622                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1623                 #iommu-cells = <1>;
1624                 status = "disabled";
1625         };
1626
1627         ipmmu_sy1: mmu@e6290000 {
1628                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1629                 reg = <0 0xe6290000 0 0x1000>;
1630                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1631                 #iommu-cells = <1>;
1632                 status = "disabled";
1633         };
1634
1635         ipmmu_ds: mmu@e6740000 {
1636                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1637                 reg = <0 0xe6740000 0 0x1000>;
1638                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1639                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1640                 #iommu-cells = <1>;
1641                 status = "disabled";
1642         };
1643
1644         ipmmu_mp: mmu@ec680000 {
1645                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1646                 reg = <0 0xec680000 0 0x1000>;
1647                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1648                 #iommu-cells = <1>;
1649                 status = "disabled";
1650         };
1651
1652         ipmmu_mx: mmu@fe951000 {
1653                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1654                 reg = <0 0xfe951000 0 0x1000>;
1655                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1656                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1657                 #iommu-cells = <1>;
1658                 status = "disabled";
1659         };
1660
1661         ipmmu_rt: mmu@ffc80000 {
1662                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1663                 reg = <0 0xffc80000 0 0x1000>;
1664                 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1665                 #iommu-cells = <1>;
1666                 status = "disabled";
1667         };
1668 };