arch/arm/boot/dts/r8a7790.dtsi

   1 /*
   2  * Device Tree Source for the r8a7790 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corporation
   5  * Copyright (C) 2013-2014 Renesas Solutions Corp.
   6  * Copyright (C) 2014 Cogent Embedded Inc.
   7  *
   8  * This file is licensed under the terms of the GNU General Public License
   9  * version 2.  This program is licensed "as is" without any warranty of any
  10  * kind, whether express or implied.
  11  */
  12
  13 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
  14 #include <dt-bindings/interrupt-controller/arm-gic.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/power/r8a7790-sysc.h>
  17
  18 / {
  19         compatible = "renesas,r8a7790";
  20         interrupt-parent = <&gic>;
  21         #address-cells = <2>;
  22         #size-cells = <2>;
  23
  24         aliases {
  25                 i2c0 = &i2c0;
  26                 i2c1 = &i2c1;
  27                 i2c2 = &i2c2;
  28                 i2c3 = &i2c3;
  29                 i2c4 = &iic0;
  30                 i2c5 = &iic1;
  31                 i2c6 = &iic2;
  32                 i2c7 = &iic3;
  33                 spi0 = &qspi;
  34                 spi1 = &msiof0;
  35                 spi2 = &msiof1;
  36                 spi3 = &msiof2;
  37                 spi4 = &msiof3;
  38                 vin0 = &vin0;
  39                 vin1 = &vin1;
  40                 vin2 = &vin2;
  41                 vin3 = &vin3;
  42         };
  43
  44         cpus {
  45                 #address-cells = <1>;
  46                 #size-cells = <0>;
  47                 enable-method = "renesas,apmu";
  48
  49                 cpu0: cpu@0 {
  50                         device_type = "cpu";
  51                         compatible = "arm,cortex-a15";
  52                         reg = <0>;
  53                         clock-frequency = <1300000000>;
  54                         voltage-tolerance = <1>; /* 1% */
  55                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  56                         clock-latency = <300000>; /* 300 us */
  57                         power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
  58                         next-level-cache = <&L2_CA15>;
  59                         capacity-dmips-mhz = <1024>;
  60
  61                         /* kHz - uV - OPPs unknown yet */
  62                         operating-points = <1400000 1000000>,
  63                                            <1225000 1000000>,
  64                                            <1050000 1000000>,
  65                                            < 875000 1000000>,
  66                                            < 700000 1000000>,
  67                                            < 350000 1000000>;
  68                 };
  69
  70                 cpu1: cpu@1 {
  71                         device_type = "cpu";
  72                         compatible = "arm,cortex-a15";
  73                         reg = <1>;
  74                         clock-frequency = <1300000000>;
  75                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  76                         power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
  77                         next-level-cache = <&L2_CA15>;
  78                         capacity-dmips-mhz = <1024>;
  79                 };
  80
  81                 cpu2: cpu@2 {
  82                         device_type = "cpu";
  83                         compatible = "arm,cortex-a15";
  84                         reg = <2>;
  85                         clock-frequency = <1300000000>;
  86                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  87                         power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
  88                         next-level-cache = <&L2_CA15>;
  89                         capacity-dmips-mhz = <1024>;
  90                 };
  91
  92                 cpu3: cpu@3 {
  93                         device_type = "cpu";
  94                         compatible = "arm,cortex-a15";
  95                         reg = <3>;
  96                         clock-frequency = <1300000000>;
  97                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  98                         power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
  99                         next-level-cache = <&L2_CA15>;
 100                         capacity-dmips-mhz = <1024>;
 101                 };
 102
 103                 cpu4: cpu@100 {
 104                         device_type = "cpu";
 105                         compatible = "arm,cortex-a7";
 106                         reg = <0x100>;
 107                         clock-frequency = <780000000>;
 108                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 109                         power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
 110                         next-level-cache = <&L2_CA7>;
 111                         capacity-dmips-mhz = <539>;
 112                 };
 113
 114                 cpu5: cpu@101 {
 115                         device_type = "cpu";
 116                         compatible = "arm,cortex-a7";
 117                         reg = <0x101>;
 118                         clock-frequency = <780000000>;
 119                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 120                         power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
 121                         next-level-cache = <&L2_CA7>;
 122                         capacity-dmips-mhz = <539>;
 123                 };
 124
 125                 cpu6: cpu@102 {
 126                         device_type = "cpu";
 127                         compatible = "arm,cortex-a7";
 128                         reg = <0x102>;
 129                         clock-frequency = <780000000>;
 130                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 131                         power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
 132                         next-level-cache = <&L2_CA7>;
 133                         capacity-dmips-mhz = <539>;
 134                 };
 135
 136                 cpu7: cpu@103 {
 137                         device_type = "cpu";
 138                         compatible = "arm,cortex-a7";
 139                         reg = <0x103>;
 140                         clock-frequency = <780000000>;
 141                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 142                         power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
 143                         next-level-cache = <&L2_CA7>;
 144                         capacity-dmips-mhz = <539>;
 145                 };
 146
 147                 L2_CA15: cache-controller-0 {
 148                         compatible = "cache";
 149                         power-domains = <&sysc R8A7790_PD_CA15_SCU>;
 150                         cache-unified;
 151                         cache-level = <2>;
 152                 };
 153
 154                 L2_CA7: cache-controller-1 {
 155                         compatible = "cache";
 156                         power-domains = <&sysc R8A7790_PD_CA7_SCU>;
 157                         cache-unified;
 158                         cache-level = <2>;
 159                 };
 160         };
 161
 162         thermal-zones {
 163                 cpu_thermal: cpu-thermal {
 164                         polling-delay-passive   = <0>;
 165                         polling-delay           = <0>;
 166
 167                         thermal-sensors = <&thermal>;
 168
 169                         trips {
 170                                 cpu-crit {
 171                                         temperature     = <115000>;
 172                                         hysteresis      = <0>;
 173                                         type            = "critical";
 174                                 };
 175                         };
 176                         cooling-maps {
 177                         };
 178                 };
 179         };
 180
 181         apmu@e6151000 {
 182                 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
 183                 reg = <0 0xe6151000 0 0x188>;
 184                 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
 185         };
 186
 187         apmu@e6152000 {
 188                 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
 189                 reg = <0 0xe6152000 0 0x188>;
 190                 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
 191         };
 192
 193         gic: interrupt-controller@f1001000 {
 194                 compatible = "arm,gic-400";
 195                 #interrupt-cells = <3>;
 196                 #address-cells = <0>;
 197                 interrupt-controller;
 198                 reg = <0 0xf1001000 0 0x1000>,
 199                         <0 0xf1002000 0 0x2000>,
 200                         <0 0xf1004000 0 0x2000>,
 201                         <0 0xf1006000 0 0x2000>;
 202                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 203                 clocks = <&cpg CPG_MOD 408>;
 204                 clock-names = "clk";
 205                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 206                 resets = <&cpg 408>;
 207         };
 208
 209         gpio0: gpio@e6050000 {
 210                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 211                 reg = <0 0xe6050000 0 0x50>;
 212                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 213                 #gpio-cells = <2>;
 214                 gpio-controller;
 215                 gpio-ranges = <&pfc 0 0 32>;
 216                 #interrupt-cells = <2>;
 217                 interrupt-controller;
 218                 clocks = <&cpg CPG_MOD 912>;
 219                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 220                 resets = <&cpg 912>;
 221         };
 222
 223         gpio1: gpio@e6051000 {
 224                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 225                 reg = <0 0xe6051000 0 0x50>;
 226                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 227                 #gpio-cells = <2>;
 228                 gpio-controller;
 229                 gpio-ranges = <&pfc 0 32 30>;
 230                 #interrupt-cells = <2>;
 231                 interrupt-controller;
 232                 clocks = <&cpg CPG_MOD 911>;
 233                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 234                 resets = <&cpg 911>;
 235         };
 236
 237         gpio2: gpio@e6052000 {
 238                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 239                 reg = <0 0xe6052000 0 0x50>;
 240                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 241                 #gpio-cells = <2>;
 242                 gpio-controller;
 243                 gpio-ranges = <&pfc 0 64 30>;
 244                 #interrupt-cells = <2>;
 245                 interrupt-controller;
 246                 clocks = <&cpg CPG_MOD 910>;
 247                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 248                 resets = <&cpg 910>;
 249         };
 250
 251         gpio3: gpio@e6053000 {
 252                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 253                 reg = <0 0xe6053000 0 0x50>;
 254                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 255                 #gpio-cells = <2>;
 256                 gpio-controller;
 257                 gpio-ranges = <&pfc 0 96 32>;
 258                 #interrupt-cells = <2>;
 259                 interrupt-controller;
 260                 clocks = <&cpg CPG_MOD 909>;
 261                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 262                 resets = <&cpg 909>;
 263         };
 264
 265         gpio4: gpio@e6054000 {
 266                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 267                 reg = <0 0xe6054000 0 0x50>;
 268                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 269                 #gpio-cells = <2>;
 270                 gpio-controller;
 271                 gpio-ranges = <&pfc 0 128 32>;
 272                 #interrupt-cells = <2>;
 273                 interrupt-controller;
 274                 clocks = <&cpg CPG_MOD 908>;
 275                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 276                 resets = <&cpg 908>;
 277         };
 278
 279         gpio5: gpio@e6055000 {
 280                 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
 281                 reg = <0 0xe6055000 0 0x50>;
 282                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 283                 #gpio-cells = <2>;
 284                 gpio-controller;
 285                 gpio-ranges = <&pfc 0 160 32>;
 286                 #interrupt-cells = <2>;
 287                 interrupt-controller;
 288                 clocks = <&cpg CPG_MOD 907>;
 289                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 290                 resets = <&cpg 907>;
 291         };
 292
 293         thermal: thermal@e61f0000 {
 294                 compatible =    "renesas,thermal-r8a7790",
 295                                 "renesas,rcar-gen2-thermal",
 296                                 "renesas,rcar-thermal";
 297                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
 298                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 299                 clocks = <&cpg CPG_MOD 522>;
 300                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 301                 resets = <&cpg 522>;
 302                 #thermal-sensor-cells = <0>;
 303         };
 304
 305         timer {
 306                 compatible = "arm,armv7-timer";
 307                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 308                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 309                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 310                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 311         };
 312
 313         cmt0: timer@ffca0000 {
 314                 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
 315                 reg = <0 0xffca0000 0 0x1004>;
 316                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 317                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 318                 clocks = <&cpg CPG_MOD 124>;
 319                 clock-names = "fck";
 320                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 321                 resets = <&cpg 124>;
 322
 323                 renesas,channels-mask = <0x60>;
 324
 325                 status = "disabled";
 326         };
 327
 328         cmt1: timer@e6130000 {
 329                 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
 330                 reg = <0 0xe6130000 0 0x1004>;
 331                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 332                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 333                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 334                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 335                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 336                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 337                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 338                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 339                 clocks = <&cpg CPG_MOD 329>;
 340                 clock-names = "fck";
 341                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 342                 resets = <&cpg 329>;
 343
 344                 renesas,channels-mask = <0xff>;
 345
 346                 status = "disabled";
 347         };
 348
 349         irqc0: interrupt-controller@e61c0000 {
 350                 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
 351                 #interrupt-cells = <2>;
 352                 interrupt-controller;
 353                 reg = <0 0xe61c0000 0 0x200>;
 354                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 355                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 356                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 357                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 358                 clocks = <&cpg CPG_MOD 407>;
 359                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 360                 resets = <&cpg 407>;
 361         };
 362
 363         dmac0: dma-controller@e6700000 {
 364                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 365                 reg = <0 0xe6700000 0 0x20000>;
 366                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 367                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 368                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 369                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 370                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 371                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 372                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 373                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 374                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 375                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 376                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 377                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 378                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 379                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 380                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 381                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 382                 interrupt-names = "error",
 383                                 "ch0", "ch1", "ch2", "ch3",
 384                                 "ch4", "ch5", "ch6", "ch7",
 385                                 "ch8", "ch9", "ch10", "ch11",
 386                                 "ch12", "ch13", "ch14";
 387                 clocks = <&cpg CPG_MOD 219>;
 388                 clock-names = "fck";
 389                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 390                 resets = <&cpg 219>;
 391                 #dma-cells = <1>;
 392                 dma-channels = <15>;
 393         };
 394
 395         dmac1: dma-controller@e6720000 {
 396                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 397                 reg = <0 0xe6720000 0 0x20000>;
 398                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 399                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 400                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 401                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 402                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 403                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 404                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 405                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 406                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 407                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 408                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 409                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 410                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 411                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 412                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 413                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 414                 interrupt-names = "error",
 415                                 "ch0", "ch1", "ch2", "ch3",
 416                                 "ch4", "ch5", "ch6", "ch7",
 417                                 "ch8", "ch9", "ch10", "ch11",
 418                                 "ch12", "ch13", "ch14";
 419                 clocks = <&cpg CPG_MOD 218>;
 420                 clock-names = "fck";
 421                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 422                 resets = <&cpg 218>;
 423                 #dma-cells = <1>;
 424                 dma-channels = <15>;
 425         };
 426
 427         audma0: dma-controller@ec700000 {
 428                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 429                 reg = <0 0xec700000 0 0x10000>;
 430                 interrupts =    <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 431                                  GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 432                                  GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 433                                  GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 434                                  GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 435                                  GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 436                                  GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 437                                  GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 438                                  GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 439                                  GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 440                                  GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 441                                  GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 442                                  GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 443                                  GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 444                 interrupt-names = "error",
 445                                 "ch0", "ch1", "ch2", "ch3",
 446                                 "ch4", "ch5", "ch6", "ch7",
 447                                 "ch8", "ch9", "ch10", "ch11",
 448                                 "ch12";
 449                 clocks = <&cpg CPG_MOD 502>;
 450                 clock-names = "fck";
 451                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 452                 resets = <&cpg 502>;
 453                 #dma-cells = <1>;
 454                 dma-channels = <13>;
 455         };
 456
 457         audma1: dma-controller@ec720000 {
 458                 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 459                 reg = <0 0xec720000 0 0x10000>;
 460                 interrupts =    <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 461                                  GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 462                                  GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 463                                  GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
 464                                  GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 465                                  GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 466                                  GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 467                                  GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 468                                  GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 469                                  GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 470                                  GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 471                                  GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 472                                  GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 473                                  GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
 474                 interrupt-names = "error",
 475                                 "ch0", "ch1", "ch2", "ch3",
 476                                 "ch4", "ch5", "ch6", "ch7",
 477                                 "ch8", "ch9", "ch10", "ch11",
 478                                 "ch12";
 479                 clocks = <&cpg CPG_MOD 501>;
 480                 clock-names = "fck";
 481                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 482                 resets = <&cpg 501>;
 483                 #dma-cells = <1>;
 484                 dma-channels = <13>;
 485         };
 486
 487         usb_dmac0: dma-controller@e65a0000 {
 488                 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
 489                 reg = <0 0xe65a0000 0 0x100>;
 490                 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 491                               GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 492                 interrupt-names = "ch0", "ch1";
 493                 clocks = <&cpg CPG_MOD 330>;
 494                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 495                 resets = <&cpg 330>;
 496                 #dma-cells = <1>;
 497                 dma-channels = <2>;
 498         };
 499
 500         usb_dmac1: dma-controller@e65b0000 {
 501                 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
 502                 reg = <0 0xe65b0000 0 0x100>;
 503                 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 504                               GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 505                 interrupt-names = "ch0", "ch1";
 506                 clocks = <&cpg CPG_MOD 331>;
 507                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 508                 resets = <&cpg 331>;
 509                 #dma-cells = <1>;
 510                 dma-channels = <2>;
 511         };
 512
 513         i2c0: i2c@e6508000 {
 514                 #address-cells = <1>;
 515                 #size-cells = <0>;
 516                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 517                 reg = <0 0xe6508000 0 0x40>;
 518                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 519                 clocks = <&cpg CPG_MOD 931>;
 520                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 521                 resets = <&cpg 931>;
 522                 i2c-scl-internal-delay-ns = <110>;
 523                 status = "disabled";
 524         };
 525
 526         i2c1: i2c@e6518000 {
 527                 #address-cells = <1>;
 528                 #size-cells = <0>;
 529                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 530                 reg = <0 0xe6518000 0 0x40>;
 531                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 532                 clocks = <&cpg CPG_MOD 930>;
 533                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 534                 resets = <&cpg 930>;
 535                 i2c-scl-internal-delay-ns = <6>;
 536                 status = "disabled";
 537         };
 538
 539         i2c2: i2c@e6530000 {
 540                 #address-cells = <1>;
 541                 #size-cells = <0>;
 542                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 543                 reg = <0 0xe6530000 0 0x40>;
 544                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 545                 clocks = <&cpg CPG_MOD 929>;
 546                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 547                 resets = <&cpg 929>;
 548                 i2c-scl-internal-delay-ns = <6>;
 549                 status = "disabled";
 550         };
 551
 552         i2c3: i2c@e6540000 {
 553                 #address-cells = <1>;
 554                 #size-cells = <0>;
 555                 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
 556                 reg = <0 0xe6540000 0 0x40>;
 557                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 558                 clocks = <&cpg CPG_MOD 928>;
 559                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 560                 resets = <&cpg 928>;
 561                 i2c-scl-internal-delay-ns = <110>;
 562                 status = "disabled";
 563         };
 564
 565         iic0: i2c@e6500000 {
 566                 #address-cells = <1>;
 567                 #size-cells = <0>;
 568                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 569                              "renesas,rmobile-iic";
 570                 reg = <0 0xe6500000 0 0x425>;
 571                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 572                 clocks = <&cpg CPG_MOD 318>;
 573                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 574                        <&dmac1 0x61>, <&dmac1 0x62>;
 575                 dma-names = "tx", "rx", "tx", "rx";
 576                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 577                 resets = <&cpg 318>;
 578                 status = "disabled";
 579         };
 580
 581         iic1: i2c@e6510000 {
 582                 #address-cells = <1>;
 583                 #size-cells = <0>;
 584                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 585                              "renesas,rmobile-iic";
 586                 reg = <0 0xe6510000 0 0x425>;
 587                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 588                 clocks = <&cpg CPG_MOD 323>;
 589                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 590                        <&dmac1 0x65>, <&dmac1 0x66>;
 591                 dma-names = "tx", "rx", "tx", "rx";
 592                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 593                 resets = <&cpg 323>;
 594                 status = "disabled";
 595         };
 596
 597         iic2: i2c@e6520000 {
 598                 #address-cells = <1>;
 599                 #size-cells = <0>;
 600                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 601                              "renesas,rmobile-iic";
 602                 reg = <0 0xe6520000 0 0x425>;
 603                 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
 604                 clocks = <&cpg CPG_MOD 300>;
 605                 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
 606                        <&dmac1 0x69>, <&dmac1 0x6a>;
 607                 dma-names = "tx", "rx", "tx", "rx";
 608                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 609                 resets = <&cpg 300>;
 610                 status = "disabled";
 611         };
 612
 613         iic3: i2c@e60b0000 {
 614                 #address-cells = <1>;
 615                 #size-cells = <0>;
 616                 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
 617                              "renesas,rmobile-iic";
 618                 reg = <0 0xe60b0000 0 0x425>;
 619                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 620                 clocks = <&cpg CPG_MOD 926>;
 621                 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 622                        <&dmac1 0x77>, <&dmac1 0x78>;
 623                 dma-names = "tx", "rx", "tx", "rx";
 624                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 625                 resets = <&cpg 926>;
 626                 status = "disabled";
 627         };
 628
 629         mmcif0: mmc@ee200000 {
 630                 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
 631                 reg = <0 0xee200000 0 0x80>;
 632                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 633                 clocks = <&cpg CPG_MOD 315>;
 634                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 635                        <&dmac1 0xd1>, <&dmac1 0xd2>;
 636                 dma-names = "tx", "rx", "tx", "rx";
 637                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 638                 resets = <&cpg 315>;
 639                 reg-io-width = <4>;
 640                 status = "disabled";
 641                 max-frequency = <97500000>;
 642         };
 643
 644         mmcif1: mmc@ee220000 {
 645                 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
 646                 reg = <0 0xee220000 0 0x80>;
 647                 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
 648                 clocks = <&cpg CPG_MOD 305>;
 649                 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
 650                        <&dmac1 0xe1>, <&dmac1 0xe2>;
 651                 dma-names = "tx", "rx", "tx", "rx";
 652                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 653                 resets = <&cpg 305>;
 654                 reg-io-width = <4>;
 655                 status = "disabled";
 656                 max-frequency = <97500000>;
 657         };
 658
 659         pfc: pin-controller@e6060000 {
 660                 compatible = "renesas,pfc-r8a7790";
 661                 reg = <0 0xe6060000 0 0x250>;
 662         };
 663
 664         sdhi0: sd@ee100000 {
 665                 compatible = "renesas,sdhi-r8a7790";
 666                 reg = <0 0xee100000 0 0x328>;
 667                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 668                 clocks = <&cpg CPG_MOD 314>;
 669                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 670                        <&dmac1 0xcd>, <&dmac1 0xce>;
 671                 dma-names = "tx", "rx", "tx", "rx";
 672                 max-frequency = <195000000>;
 673                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 674                 resets = <&cpg 314>;
 675                 status = "disabled";
 676         };
 677
 678         sdhi1: sd@ee120000 {
 679                 compatible = "renesas,sdhi-r8a7790";
 680                 reg = <0 0xee120000 0 0x328>;
 681                 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
 682                 clocks = <&cpg CPG_MOD 313>;
 683                 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
 684                        <&dmac1 0xc9>, <&dmac1 0xca>;
 685                 dma-names = "tx", "rx", "tx", "rx";
 686                 max-frequency = <195000000>;
 687                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 688                 resets = <&cpg 313>;
 689                 status = "disabled";
 690         };
 691
 692         sdhi2: sd@ee140000 {
 693                 compatible = "renesas,sdhi-r8a7790";
 694                 reg = <0 0xee140000 0 0x100>;
 695                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 696                 clocks = <&cpg CPG_MOD 312>;
 697                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 698                        <&dmac1 0xc1>, <&dmac1 0xc2>;
 699                 dma-names = "tx", "rx", "tx", "rx";
 700                 max-frequency = <97500000>;
 701                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 702                 resets = <&cpg 312>;
 703                 status = "disabled";
 704         };
 705
 706         sdhi3: sd@ee160000 {
 707                 compatible = "renesas,sdhi-r8a7790";
 708                 reg = <0 0xee160000 0 0x100>;
 709                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 710                 clocks = <&cpg CPG_MOD 311>;
 711                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 712                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 713                 dma-names = "tx", "rx", "tx", "rx";
 714                 max-frequency = <97500000>;
 715                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 716                 resets = <&cpg 311>;
 717                 status = "disabled";
 718         };
 719
 720         scifa0: serial@e6c40000 {
 721                 compatible = "renesas,scifa-r8a7790",
 722                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 723                 reg = <0 0xe6c40000 0 64>;
 724                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 725                 clocks = <&cpg CPG_MOD 204>;
 726                 clock-names = "fck";
 727                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 728                        <&dmac1 0x21>, <&dmac1 0x22>;
 729                 dma-names = "tx", "rx", "tx", "rx";
 730                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 731                 resets = <&cpg 204>;
 732                 status = "disabled";
 733         };
 734
 735         scifa1: serial@e6c50000 {
 736                 compatible = "renesas,scifa-r8a7790",
 737                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 738                 reg = <0 0xe6c50000 0 64>;
 739                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 740                 clocks = <&cpg CPG_MOD 203>;
 741                 clock-names = "fck";
 742                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 743                        <&dmac1 0x25>, <&dmac1 0x26>;
 744                 dma-names = "tx", "rx", "tx", "rx";
 745                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 746                 resets = <&cpg 203>;
 747                 status = "disabled";
 748         };
 749
 750         scifa2: serial@e6c60000 {
 751                 compatible = "renesas,scifa-r8a7790",
 752                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 753                 reg = <0 0xe6c60000 0 64>;
 754                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 755                 clocks = <&cpg CPG_MOD 202>;
 756                 clock-names = "fck";
 757                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 758                        <&dmac1 0x27>, <&dmac1 0x28>;
 759                 dma-names = "tx", "rx", "tx", "rx";
 760                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 761                 resets = <&cpg 202>;
 762                 status = "disabled";
 763         };
 764
 765         scifb0: serial@e6c20000 {
 766                 compatible = "renesas,scifb-r8a7790",
 767                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 768                 reg = <0 0xe6c20000 0 0x100>;
 769                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 770                 clocks = <&cpg CPG_MOD 206>;
 771                 clock-names = "fck";
 772                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 773                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 774                 dma-names = "tx", "rx", "tx", "rx";
 775                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 776                 resets = <&cpg 206>;
 777                 status = "disabled";
 778         };
 779
 780         scifb1: serial@e6c30000 {
 781                 compatible = "renesas,scifb-r8a7790",
 782                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 783                 reg = <0 0xe6c30000 0 0x100>;
 784                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 785                 clocks = <&cpg CPG_MOD 207>;
 786                 clock-names = "fck";
 787                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 788                        <&dmac1 0x19>, <&dmac1 0x1a>;
 789                 dma-names = "tx", "rx", "tx", "rx";
 790                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 791                 resets = <&cpg 207>;
 792                 status = "disabled";
 793         };
 794
 795         scifb2: serial@e6ce0000 {
 796                 compatible = "renesas,scifb-r8a7790",
 797                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 798                 reg = <0 0xe6ce0000 0 0x100>;
 799                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 800                 clocks = <&cpg CPG_MOD 216>;
 801                 clock-names = "fck";
 802                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 803                        <&dmac1 0x1d>, <&dmac1 0x1e>;
 804                 dma-names = "tx", "rx", "tx", "rx";
 805                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 806                 resets = <&cpg 216>;
 807                 status = "disabled";
 808         };
 809
 810         scif0: serial@e6e60000 {
 811                 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
 812                              "renesas,scif";
 813                 reg = <0 0xe6e60000 0 64>;
 814                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 815                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 816                          <&scif_clk>;
 817                 clock-names = "fck", "brg_int", "scif_clk";
 818                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 819                        <&dmac1 0x29>, <&dmac1 0x2a>;
 820                 dma-names = "tx", "rx", "tx", "rx";
 821                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 822                 resets = <&cpg 721>;
 823                 status = "disabled";
 824         };
 825
 826         scif1: serial@e6e68000 {
 827                 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
 828                              "renesas,scif";
 829                 reg = <0 0xe6e68000 0 64>;
 830                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 831                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 832                          <&scif_clk>;
 833                 clock-names = "fck", "brg_int", "scif_clk";
 834                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 835                        <&dmac1 0x2d>, <&dmac1 0x2e>;
 836                 dma-names = "tx", "rx", "tx", "rx";
 837                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 838                 resets = <&cpg 720>;
 839                 status = "disabled";
 840         };
 841
 842         scif2: serial@e6e56000 {
 843                 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
 844                              "renesas,scif";
 845                 reg = <0 0xe6e56000 0 64>;
 846                 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 847                 clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 848                          <&scif_clk>;
 849                 clock-names = "fck", "brg_int", "scif_clk";
 850                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 851                        <&dmac1 0x2b>, <&dmac1 0x2c>;
 852                 dma-names = "tx", "rx", "tx", "rx";
 853                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 854                 resets = <&cpg 310>;
 855                 status = "disabled";
 856         };
 857
 858         hscif0: serial@e62c0000 {
 859                 compatible = "renesas,hscif-r8a7790",
 860                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 861                 reg = <0 0xe62c0000 0 96>;
 862                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 863                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 864                          <&scif_clk>;
 865                 clock-names = "fck", "brg_int", "scif_clk";
 866                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 867                        <&dmac1 0x39>, <&dmac1 0x3a>;
 868                 dma-names = "tx", "rx", "tx", "rx";
 869                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 870                 resets = <&cpg 717>;
 871                 status = "disabled";
 872         };
 873
 874         hscif1: serial@e62c8000 {
 875                 compatible = "renesas,hscif-r8a7790",
 876                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 877                 reg = <0 0xe62c8000 0 96>;
 878                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 879                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
 880                          <&scif_clk>;
 881                 clock-names = "fck", "brg_int", "scif_clk";
 882                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 883                        <&dmac1 0x4d>, <&dmac1 0x4e>;
 884                 dma-names = "tx", "rx", "tx", "rx";
 885                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 886                 resets = <&cpg 716>;
 887                 status = "disabled";
 888         };
 889
 890         icram0: sram@e63a0000 {
 891                 compatible = "mmio-sram";
 892                 reg = <0 0xe63a0000 0 0x12000>;
 893         };
 894
 895         icram1: sram@e63c0000 {
 896                 compatible = "mmio-sram";
 897                 reg = <0 0xe63c0000 0 0x1000>;
 898                 #address-cells = <1>;
 899                 #size-cells = <1>;
 900                 ranges = <0 0 0xe63c0000 0x1000>;
 901
 902                 smp-sram@0 {
 903                         compatible = "renesas,smp-sram";
 904                         reg = <0 0x10>;
 905                 };
 906         };
 907
 908         ether: ethernet@ee700000 {
 909                 compatible = "renesas,ether-r8a7790";
 910                 reg = <0 0xee700000 0 0x400>;
 911                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 912                 clocks = <&cpg CPG_MOD 813>;
 913                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 914                 resets = <&cpg 813>;
 915                 phy-mode = "rmii";
 916                 #address-cells = <1>;
 917                 #size-cells = <0>;
 918                 status = "disabled";
 919         };
 920
 921         avb: ethernet@e6800000 {
 922                 compatible = "renesas,etheravb-r8a7790",
 923                              "renesas,etheravb-rcar-gen2";
 924                 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 925                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 926                 clocks = <&cpg CPG_MOD 812>;
 927                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 928                 resets = <&cpg 812>;
 929                 #address-cells = <1>;
 930                 #size-cells = <0>;
 931                 status = "disabled";
 932         };
 933
 934         sata0: sata@ee300000 {
 935                 compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
 936                 reg = <0 0xee300000 0 0x2000>;
 937                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 938                 clocks = <&cpg CPG_MOD 815>;
 939                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 940                 resets = <&cpg 815>;
 941                 status = "disabled";
 942         };
 943
 944         sata1: sata@ee500000 {
 945                 compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
 946                 reg = <0 0xee500000 0 0x2000>;
 947                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
 948                 clocks = <&cpg CPG_MOD 814>;
 949                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 950                 resets = <&cpg 814>;
 951                 status = "disabled";
 952         };
 953
 954         hsusb: usb@e6590000 {
 955                 compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
 956                 reg = <0 0xe6590000 0 0x100>;
 957                 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 958                 clocks = <&cpg CPG_MOD 704>;
 959                 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 960                        <&usb_dmac1 0>, <&usb_dmac1 1>;
 961                 dma-names = "ch0", "ch1", "ch2", "ch3";
 962                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 963                 resets = <&cpg 704>;
 964                 renesas,buswait = <4>;
 965                 phys = <&usb0 1>;
 966                 phy-names = "usb";
 967                 status = "disabled";
 968         };
 969
 970         usbphy: usb-phy@e6590100 {
 971                 compatible = "renesas,usb-phy-r8a7790",
 972                              "renesas,rcar-gen2-usb-phy";
 973                 reg = <0 0xe6590100 0 0x100>;
 974                 #address-cells = <1>;
 975                 #size-cells = <0>;
 976                 clocks = <&cpg CPG_MOD 704>;
 977                 clock-names = "usbhs";
 978                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 979                 resets = <&cpg 704>;
 980                 status = "disabled";
 981
 982                 usb0: usb-channel@0 {
 983                         reg = <0>;
 984                         #phy-cells = <1>;
 985                 };
 986                 usb2: usb-channel@2 {
 987                         reg = <2>;
 988                         #phy-cells = <1>;
 989                 };
 990         };
 991
 992         vin0: video@e6ef0000 {
 993                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
 994                 reg = <0 0xe6ef0000 0 0x1000>;
 995                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 996                 clocks = <&cpg CPG_MOD 811>;
 997                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 998                 resets = <&cpg 811>;
 999                 status = "disabled";
1000         };
1001
1002         vin1: video@e6ef1000 {
1003                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1004                 reg = <0 0xe6ef1000 0 0x1000>;
1005                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1006                 clocks = <&cpg CPG_MOD 810>;
1007                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1008                 resets = <&cpg 810>;
1009                 status = "disabled";
1010         };
1011
1012         vin2: video@e6ef2000 {
1013                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1014                 reg = <0 0xe6ef2000 0 0x1000>;
1015                 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1016                 clocks = <&cpg CPG_MOD 809>;
1017                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1018                 resets = <&cpg 809>;
1019                 status = "disabled";
1020         };
1021
1022         vin3: video@e6ef3000 {
1023                 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1024                 reg = <0 0xe6ef3000 0 0x1000>;
1025                 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1026                 clocks = <&cpg CPG_MOD 808>;
1027                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1028                 resets = <&cpg 808>;
1029                 status = "disabled";
1030         };
1031
1032         vsp@fe920000 {
1033                 compatible = "renesas,vsp1";
1034                 reg = <0 0xfe920000 0 0x8000>;
1035                 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1036                 clocks = <&cpg CPG_MOD 130>;
1037                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1038                 resets = <&cpg 130>;
1039         };
1040
1041         vsp@fe928000 {
1042                 compatible = "renesas,vsp1";
1043                 reg = <0 0xfe928000 0 0x8000>;
1044                 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1045                 clocks = <&cpg CPG_MOD 131>;
1046                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1047                 resets = <&cpg 131>;
1048         };
1049
1050         vsp@fe930000 {
1051                 compatible = "renesas,vsp1";
1052                 reg = <0 0xfe930000 0 0x8000>;
1053                 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1054                 clocks = <&cpg CPG_MOD 128>;
1055                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1056                 resets = <&cpg 128>;
1057         };
1058
1059         vsp@fe938000 {
1060                 compatible = "renesas,vsp1";
1061                 reg = <0 0xfe938000 0 0x8000>;
1062                 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1063                 clocks = <&cpg CPG_MOD 127>;
1064                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1065                 resets = <&cpg 127>;
1066         };
1067
1068         du: display@feb00000 {
1069                 compatible = "renesas,du-r8a7790";
1070                 reg = <0 0xfeb00000 0 0x70000>,
1071                       <0 0xfeb90000 0 0x1c>,
1072                       <0 0xfeb94000 0 0x1c>;
1073                 reg-names = "du", "lvds.0", "lvds.1";
1074                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1075                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1076                              <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1077                 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1078                          <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
1079                          <&cpg CPG_MOD 725>;
1080                 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
1081                 status = "disabled";
1082
1083                 ports {
1084                         #address-cells = <1>;
1085                         #size-cells = <0>;
1086
1087                         port@0 {
1088                                 reg = <0>;
1089                                 du_out_rgb: endpoint {
1090                                 };
1091                         };
1092                         port@1 {
1093                                 reg = <1>;
1094                                 du_out_lvds0: endpoint {
1095                                 };
1096                         };
1097                         port@2 {
1098                                 reg = <2>;
1099                                 du_out_lvds1: endpoint {
1100                                 };
1101                         };
1102                 };
1103         };
1104
1105         can0: can@e6e80000 {
1106                 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1107                 reg = <0 0xe6e80000 0 0x1000>;
1108                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1109                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
1110                          <&can_clk>;
1111                 clock-names = "clkp1", "clkp2", "can_clk";
1112                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1113                 resets = <&cpg 916>;
1114                 status = "disabled";
1115         };
1116
1117         can1: can@e6e88000 {
1118                 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1119                 reg = <0 0xe6e88000 0 0x1000>;
1120                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1121                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
1122                          <&can_clk>;
1123                 clock-names = "clkp1", "clkp2", "can_clk";
1124                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1125                 resets = <&cpg 915>;
1126                 status = "disabled";
1127         };
1128
1129         jpu: jpeg-codec@fe980000 {
1130                 compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
1131                 reg = <0 0xfe980000 0 0x10300>;
1132                 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1133                 clocks = <&cpg CPG_MOD 106>;
1134                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1135                 resets = <&cpg 106>;
1136         };
1137
1138         /* External root clock */
1139         extal_clk: extal {
1140                 compatible = "fixed-clock";
1141                 #clock-cells = <0>;
1142                 /* This value must be overridden by the board. */
1143                 clock-frequency = <0>;
1144         };
1145
1146         /* External PCIe clock - can be overridden by the board */
1147         pcie_bus_clk: pcie_bus {
1148                 compatible = "fixed-clock";
1149                 #clock-cells = <0>;
1150                 clock-frequency = <0>;
1151         };
1152
1153         /*
1154          * The external audio clocks are configured as 0 Hz fixed frequency
1155          * clocks by default.
1156          * Boards that provide audio clocks should override them.
1157          */
1158         audio_clk_a: audio_clk_a {
1159                 compatible = "fixed-clock";
1160                 #clock-cells = <0>;
1161                 clock-frequency = <0>;
1162         };
1163         audio_clk_b: audio_clk_b {
1164                 compatible = "fixed-clock";
1165                 #clock-cells = <0>;
1166                 clock-frequency = <0>;
1167         };
1168         audio_clk_c: audio_clk_c {
1169                 compatible = "fixed-clock";
1170                 #clock-cells = <0>;
1171                 clock-frequency = <0>;
1172         };
1173
1174         /* External SCIF clock */
1175         scif_clk: scif {
1176                 compatible = "fixed-clock";
1177                 #clock-cells = <0>;
1178                 /* This value must be overridden by the board. */
1179                 clock-frequency = <0>;
1180         };
1181
1182         /* External USB clock - can be overridden by the board */
1183         usb_extal_clk: usb_extal {
1184                 compatible = "fixed-clock";
1185                 #clock-cells = <0>;
1186                 clock-frequency = <48000000>;
1187         };
1188
1189         /* External CAN clock */
1190         can_clk: can {
1191                 compatible = "fixed-clock";
1192                 #clock-cells = <0>;
1193                 /* This value must be overridden by the board. */
1194                 clock-frequency = <0>;
1195         };
1196
1197         cpg: clock-controller@e6150000 {
1198                 compatible = "renesas,r8a7790-cpg-mssr";
1199                 reg = <0 0xe6150000 0 0x1000>;
1200                 clocks = <&extal_clk>, <&usb_extal_clk>;
1201                 clock-names = "extal", "usb_extal";
1202                 #clock-cells = <2>;
1203                 #power-domain-cells = <0>;
1204                 #reset-cells = <1>;
1205         };
1206
1207         prr: chipid@ff000044 {
1208                 compatible = "renesas,prr";
1209                 reg = <0 0xff000044 0 4>;
1210         };
1211
1212         rst: reset-controller@e6160000 {
1213                 compatible = "renesas,r8a7790-rst";
1214                 reg = <0 0xe6160000 0 0x0100>;
1215         };
1216
1217         sysc: system-controller@e6180000 {
1218                 compatible = "renesas,r8a7790-sysc";
1219                 reg = <0 0xe6180000 0 0x0200>;
1220                 #power-domain-cells = <1>;
1221         };
1222
1223         qspi: spi@e6b10000 {
1224                 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
1225                 reg = <0 0xe6b10000 0 0x2c>;
1226                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1227                 clocks = <&cpg CPG_MOD 917>;
1228                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1229                        <&dmac1 0x17>, <&dmac1 0x18>;
1230                 dma-names = "tx", "rx", "tx", "rx";
1231                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1232                 resets = <&cpg 917>;
1233                 num-cs = <1>;
1234                 #address-cells = <1>;
1235                 #size-cells = <0>;
1236                 status = "disabled";
1237         };
1238
1239         msiof0: spi@e6e20000 {
1240                 compatible = "renesas,msiof-r8a7790",
1241                              "renesas,rcar-gen2-msiof";
1242                 reg = <0 0xe6e20000 0 0x0064>;
1243                 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1244                 clocks = <&cpg CPG_MOD 0>;
1245                 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1246                        <&dmac1 0x51>, <&dmac1 0x52>;
1247                 dma-names = "tx", "rx", "tx", "rx";
1248                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1249                 resets = <&cpg 0>;
1250                 #address-cells = <1>;
1251                 #size-cells = <0>;
1252                 status = "disabled";
1253         };
1254
1255         msiof1: spi@e6e10000 {
1256                 compatible = "renesas,msiof-r8a7790",
1257                              "renesas,rcar-gen2-msiof";
1258                 reg = <0 0xe6e10000 0 0x0064>;
1259                 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1260                 clocks = <&cpg CPG_MOD 208>;
1261                 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1262                        <&dmac1 0x55>, <&dmac1 0x56>;
1263                 dma-names = "tx", "rx", "tx", "rx";
1264                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1265                 resets = <&cpg 208>;
1266                 #address-cells = <1>;
1267                 #size-cells = <0>;
1268                 status = "disabled";
1269         };
1270
1271         msiof2: spi@e6e00000 {
1272                 compatible = "renesas,msiof-r8a7790",
1273                              "renesas,rcar-gen2-msiof";
1274                 reg = <0 0xe6e00000 0 0x0064>;
1275                 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1276                 clocks = <&cpg CPG_MOD 205>;
1277                 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1278                        <&dmac1 0x41>, <&dmac1 0x42>;
1279                 dma-names = "tx", "rx", "tx", "rx";
1280                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1281                 resets = <&cpg 205>;
1282                 #address-cells = <1>;
1283                 #size-cells = <0>;
1284                 status = "disabled";
1285         };
1286
1287         msiof3: spi@e6c90000 {
1288                 compatible = "renesas,msiof-r8a7790",
1289                              "renesas,rcar-gen2-msiof";
1290                 reg = <0 0xe6c90000 0 0x0064>;
1291                 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1292                 clocks = <&cpg CPG_MOD 215>;
1293                 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1294                        <&dmac1 0x45>, <&dmac1 0x46>;
1295                 dma-names = "tx", "rx", "tx", "rx";
1296                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1297                 resets = <&cpg 215>;
1298                 #address-cells = <1>;
1299                 #size-cells = <0>;
1300                 status = "disabled";
1301         };
1302
1303         xhci: usb@ee000000 {
1304                 compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
1305                 reg = <0 0xee000000 0 0xc00>;
1306                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1307                 clocks = <&cpg CPG_MOD 328>;
1308                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1309                 resets = <&cpg 328>;
1310                 phys = <&usb2 1>;
1311                 phy-names = "usb";
1312                 status = "disabled";
1313         };
1314
1315         pci0: pci@ee090000 {
1316                 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1317                 device_type = "pci";
1318                 reg = <0 0xee090000 0 0xc00>,
1319                       <0 0xee080000 0 0x1100>;
1320                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1321                 clocks = <&cpg CPG_MOD 703>;
1322                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1323                 resets = <&cpg 703>;
1324                 status = "disabled";
1325
1326                 bus-range = <0 0>;
1327                 #address-cells = <3>;
1328                 #size-cells = <2>;
1329                 #interrupt-cells = <1>;
1330                 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1331                 interrupt-map-mask = <0xff00 0 0 0x7>;
1332                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1333                                  0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1334                                  0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1335
1336                 usb@1,0 {
1337                         reg = <0x800 0 0 0 0>;
1338                         phys = <&usb0 0>;
1339                         phy-names = "usb";
1340                 };
1341
1342                 usb@2,0 {
1343                         reg = <0x1000 0 0 0 0>;
1344                         phys = <&usb0 0>;
1345                         phy-names = "usb";
1346                 };
1347         };
1348
1349         pci1: pci@ee0b0000 {
1350                 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1351                 device_type = "pci";
1352                 reg = <0 0xee0b0000 0 0xc00>,
1353                       <0 0xee0a0000 0 0x1100>;
1354                 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1355                 clocks = <&cpg CPG_MOD 703>;
1356                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1357                 resets = <&cpg 703>;
1358                 status = "disabled";
1359
1360                 bus-range = <1 1>;
1361                 #address-cells = <3>;
1362                 #size-cells = <2>;
1363                 #interrupt-cells = <1>;
1364                 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1365                 interrupt-map-mask = <0xff00 0 0 0x7>;
1366                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1367                                  0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1368                                  0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1369         };
1370
1371         pci2: pci@ee0d0000 {
1372                 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1373                 device_type = "pci";
1374                 clocks = <&cpg CPG_MOD 703>;
1375                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1376                 resets = <&cpg 703>;
1377                 reg = <0 0xee0d0000 0 0xc00>,
1378                       <0 0xee0c0000 0 0x1100>;
1379                 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1380                 status = "disabled";
1381
1382                 bus-range = <2 2>;
1383                 #address-cells = <3>;
1384                 #size-cells = <2>;
1385                 #interrupt-cells = <1>;
1386                 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1387                 interrupt-map-mask = <0xff00 0 0 0x7>;
1388                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1389                                  0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1390                                  0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1391
1392                 usb@1,0 {
1393                         reg = <0x20800 0 0 0 0>;
1394                         phys = <&usb2 0>;
1395                         phy-names = "usb";
1396                 };
1397
1398                 usb@2,0 {
1399                         reg = <0x21000 0 0 0 0>;
1400                         phys = <&usb2 0>;
1401                         phy-names = "usb";
1402                 };
1403         };
1404
1405         pciec: pcie@fe000000 {
1406                 compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
1407                 reg = <0 0xfe000000 0 0x80000>;
1408                 #address-cells = <3>;
1409                 #size-cells = <2>;
1410                 bus-range = <0x00 0xff>;
1411                 device_type = "pci";
1412                 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1413                           0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1414                           0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1415                           0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1416                 /* Map all possible DDR as inbound ranges */
1417                 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1418                               0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1419                 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1420                              <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1421                              <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1422                 #interrupt-cells = <1>;
1423                 interrupt-map-mask = <0 0 0 0>;
1424                 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1425                 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1426                 clock-names = "pcie", "pcie_bus";
1427                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1428                 resets = <&cpg 319>;
1429                 status = "disabled";
1430         };
1431
1432         rcar_sound: sound@ec500000 {
1433                 /*
1434                  * #sound-dai-cells is required
1435                  *
1436                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1437                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1438                  */
1439                 compatible =  "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
1440                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1441                         <0 0xec5a0000 0 0x100>,  /* ADG */
1442                         <0 0xec540000 0 0x1000>, /* SSIU */
1443                         <0 0xec541000 0 0x280>,  /* SSI */
1444                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1445                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1446
1447                 clocks = <&cpg CPG_MOD 1005>,
1448                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1449                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1450                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1451                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1452                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1453                          <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1454                          <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1455                          <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1456                          <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1457                          <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1458                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1459                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1460                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1461                          <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1462                          <&cpg CPG_CORE R8A7790_CLK_M2>;
1463                 clock-names = "ssi-all",
1464                                 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1465                                 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1466                                 "src.9", "src.8", "src.7", "src.6", "src.5",
1467                                 "src.4", "src.3", "src.2", "src.1", "src.0",
1468                                 "ctu.0", "ctu.1",
1469                                 "mix.0", "mix.1",
1470                                 "dvc.0", "dvc.1",
1471                                 "clk_a", "clk_b", "clk_c", "clk_i";
1472                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1473                 resets = <&cpg 1005>,
1474                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1475                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1476                          <&cpg 1014>, <&cpg 1015>;
1477                 reset-names = "ssi-all",
1478                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1479                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1480
1481                 status = "disabled";
1482
1483                 rcar_sound,dvc {
1484                         dvc0: dvc-0 {
1485                                 dmas = <&audma1 0xbc>;
1486                                 dma-names = "tx";
1487                         };
1488                         dvc1: dvc-1 {
1489                                 dmas = <&audma1 0xbe>;
1490                                 dma-names = "tx";
1491                         };
1492                 };
1493
1494                 rcar_sound,mix {
1495                         mix0: mix-0 { };
1496                         mix1: mix-1 { };
1497                 };
1498
1499                 rcar_sound,ctu {
1500                         ctu00: ctu-0 { };
1501                         ctu01: ctu-1 { };
1502                         ctu02: ctu-2 { };
1503                         ctu03: ctu-3 { };
1504                         ctu10: ctu-4 { };
1505                         ctu11: ctu-5 { };
1506                         ctu12: ctu-6 { };
1507                         ctu13: ctu-7 { };
1508                 };
1509
1510                 rcar_sound,src {
1511                         src0: src-0 {
1512                                 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1513                                 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1514                                 dma-names = "rx", "tx";
1515                         };
1516                         src1: src-1 {
1517                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1518                                 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1519                                 dma-names = "rx", "tx";
1520                         };
1521                         src2: src-2 {
1522                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1523                                 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1524                                 dma-names = "rx", "tx";
1525                         };
1526                         src3: src-3 {
1527                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1528                                 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1529                                 dma-names = "rx", "tx";
1530                         };
1531                         src4: src-4 {
1532                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1533                                 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1534                                 dma-names = "rx", "tx";
1535                         };
1536                         src5: src-5 {
1537                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1538                                 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1539                                 dma-names = "rx", "tx";
1540                         };
1541                         src6: src-6 {
1542                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1543                                 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1544                                 dma-names = "rx", "tx";
1545                         };
1546                         src7: src-7 {
1547                                 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1548                                 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1549                                 dma-names = "rx", "tx";
1550                         };
1551                         src8: src-8 {
1552                                 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1553                                 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1554                                 dma-names = "rx", "tx";
1555                         };
1556                         src9: src-9 {
1557                                 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1558                                 dmas = <&audma0 0x97>, <&audma1 0xba>;
1559                                 dma-names = "rx", "tx";
1560                         };
1561                 };
1562
1563                 rcar_sound,ssi {
1564                         ssi0: ssi-0 {
1565                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1566                                 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1567                                 dma-names = "rx", "tx", "rxu", "txu";
1568                         };
1569                         ssi1: ssi-1 {
1570                                  interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1571                                 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1572                                 dma-names = "rx", "tx", "rxu", "txu";
1573                         };
1574                         ssi2: ssi-2 {
1575                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1576                                 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1577                                 dma-names = "rx", "tx", "rxu", "txu";
1578                         };
1579                         ssi3: ssi-3 {
1580                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1581                                 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1582                                 dma-names = "rx", "tx", "rxu", "txu";
1583                         };
1584                         ssi4: ssi-4 {
1585                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1586                                 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1587                                 dma-names = "rx", "tx", "rxu", "txu";
1588                         };
1589                         ssi5: ssi-5 {
1590                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1591                                 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1592                                 dma-names = "rx", "tx", "rxu", "txu";
1593                         };
1594                         ssi6: ssi-6 {
1595                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1596                                 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1597                                 dma-names = "rx", "tx", "rxu", "txu";
1598                         };
1599                         ssi7: ssi-7 {
1600                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1601                                 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1602                                 dma-names = "rx", "tx", "rxu", "txu";
1603                         };
1604                         ssi8: ssi-8 {
1605                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1606                                 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1607                                 dma-names = "rx", "tx", "rxu", "txu";
1608                         };
1609                         ssi9: ssi-9 {
1610                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1611                                 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1612                                 dma-names = "rx", "tx", "rxu", "txu";
1613                         };
1614                 };
1615         };
1616
1617         ipmmu_sy0: mmu@e6280000 {
1618                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1619                 reg = <0 0xe6280000 0 0x1000>;
1620                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1621                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1622                 #iommu-cells = <1>;
1623                 status = "disabled";
1624         };
1625
1626         ipmmu_sy1: mmu@e6290000 {
1627                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1628                 reg = <0 0xe6290000 0 0x1000>;
1629                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1630                 #iommu-cells = <1>;
1631                 status = "disabled";
1632         };
1633
1634         ipmmu_ds: mmu@e6740000 {
1635                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1636                 reg = <0 0xe6740000 0 0x1000>;
1637                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1638                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1639                 #iommu-cells = <1>;
1640                 status = "disabled";
1641         };
1642
1643         ipmmu_mp: mmu@ec680000 {
1644                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1645                 reg = <0 0xec680000 0 0x1000>;
1646                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1647                 #iommu-cells = <1>;
1648                 status = "disabled";
1649         };
1650
1651         ipmmu_mx: mmu@fe951000 {
1652                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1653                 reg = <0 0xfe951000 0 0x1000>;
1654                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1655                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1656                 #iommu-cells = <1>;
1657                 status = "disabled";
1658         };
1659
1660         ipmmu_rt: mmu@ffc80000 {
1661                 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1662                 reg = <0 0xffc80000 0 0x1000>;
1663                 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1664                 #iommu-cells = <1>;
1665                 status = "disabled";
1666         };
1667 };