Merge tag 'edac_for_4.20_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / r8a7778-bockw.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Reference Device Tree Source for the R-Car M1A (R8A77781) Bock-W board
4  *
5  * Copyright (C) 2013  Renesas Solutions Corp.
6  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
7  *
8  * based on r8a7779
9  *
10  * Copyright (C) 2013 Renesas Solutions Corp.
11  * Copyright (C) 2013 Simon Horman
12  */
13
14 /dts-v1/;
15 #include "r8a7778.dtsi"
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/gpio/gpio.h>
18
19 / {
20         model = "bockw";
21         compatible = "renesas,bockw", "renesas,r8a7778";
22
23         aliases {
24                 serial0 = &scif0;
25         };
26
27         chosen {
28                 bootargs = "ignore_loglevel ip=dhcp root=/dev/nfs rw";
29                 stdout-path = "serial0:115200n8";
30         };
31
32         memory@60000000 {
33                 device_type = "memory";
34                 reg = <0x60000000 0x10000000>;
35         };
36
37         fixedregulator3v3: regulator-3v3 {
38                 compatible = "regulator-fixed";
39                 regulator-name = "fixed-3.3V";
40                 regulator-min-microvolt = <3300000>;
41                 regulator-max-microvolt = <3300000>;
42                 regulator-boot-on;
43                 regulator-always-on;
44         };
45
46         sound {
47                 compatible = "simple-audio-card";
48
49                 simple-audio-card,format = "left_j";
50                 simple-audio-card,bitclock-master = <&sndcodec>;
51                 simple-audio-card,frame-master = <&sndcodec>;
52
53                 sndcpu: simple-audio-card,cpu {
54                         sound-dai = <&rcar_sound>;
55                 };
56
57                 sndcodec: simple-audio-card,codec {
58                         sound-dai = <&ak4643>;
59                         system-clock-frequency = <11289600>;
60                 };
61         };
62 };
63
64 &bsc {
65         ethernet@18300000 {
66                 compatible = "smsc,lan9220", "smsc,lan9115";
67                 reg = <0x18300000 0x1000>;
68
69                 phy-mode = "mii";
70                 interrupt-parent = <&irqpin>;
71                 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
72                 reg-io-width = <4>;
73                 vddvario-supply = <&fixedregulator3v3>;
74                 vdd33a-supply = <&fixedregulator3v3>;
75         };
76 };
77
78 &extal_clk {
79         clock-frequency = <33333333>;
80 };
81
82 &i2c0 {
83         status = "okay";
84
85         ak4643: codec@12 {
86                 compatible = "asahi-kasei,ak4643";
87                 #sound-dai-cells = <0>;
88                 reg = <0x12>;
89         };
90
91         camera@41 {
92                 compatible = "oki,ml86v7667";
93                 reg = <0x41>;
94         };
95
96         camera@43 {
97                 compatible = "oki,ml86v7667";
98                 reg = <0x43>;
99         };
100
101         rx8581: rtc@51 {
102                 compatible = "epson,rx8581";
103                 reg = <0x51>;
104         };
105 };
106
107 &mmcif {
108         pinctrl-0 = <&mmc_pins>;
109         pinctrl-names = "default";
110
111         vmmc-supply = <&fixedregulator3v3>;
112         bus-width = <8>;
113         broken-cd;
114         status = "okay";
115 };
116
117 &irqpin {
118         status = "okay";
119 };
120
121 &tmu0 {
122         status = "okay";
123 };
124
125 &pfc {
126         pinctrl-0 = <&scif_clk_pins>;
127         pinctrl-names = "default";
128
129         scif0_pins: scif0 {
130                 groups = "scif0_data_a", "scif0_ctrl";
131                 function = "scif0";
132         };
133
134         scif_clk_pins: scif_clk {
135                 groups = "scif_clk";
136                 function = "scif_clk";
137         };
138
139         mmc_pins: mmc {
140                 groups = "mmc_data8", "mmc_ctrl";
141                 function = "mmc";
142         };
143
144         sdhi0_pins: sd0 {
145                 groups = "sdhi0_data4", "sdhi0_ctrl";
146                 function = "sdhi0";
147         };
148         sdhi0_pup_pins: sd0_pup {
149                 groups = "sdhi0_cd", "sdhi0_wp";
150                 function = "sdhi0";
151                 bias-pull-up;
152         };
153
154         hspi0_pins: hspi0 {
155                 groups = "hspi0_a";
156                 function = "hspi0";
157         };
158
159         usb0_pins: usb0 {
160                 groups = "usb0";
161                 function = "usb0";
162         };
163
164         usb1_pins: usb1 {
165                 groups = "usb1";
166                 function = "usb1";
167         };
168
169         vin0_pins: vin0 {
170                 groups = "vin0_data8", "vin0_clk";
171                 function = "vin0";
172         };
173
174         vin1_pins: vin1 {
175                 groups = "vin1_data8", "vin1_clk";
176                 function = "vin1";
177         };
178 };
179
180 &rcar_sound {
181         /* Single DAI */
182         #sound-dai-cells = <0>;
183 };
184
185 &sdhi0 {
186         pinctrl-0 = <&sdhi0_pins>, <&sdhi0_pup_pins>;
187         pinctrl-names = "default";
188
189         vmmc-supply = <&fixedregulator3v3>;
190         bus-width = <4>;
191         status = "okay";
192         wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
193 };
194
195 &hspi0 {
196         pinctrl-0 = <&hspi0_pins>;
197         pinctrl-names = "default";
198         status = "okay";
199
200         flash: flash@0 {
201                 compatible = "spansion,s25fl008k", "jedec,spi-nor";
202                 reg = <0>;
203                 spi-max-frequency = <104000000>;
204                 m25p,fast-read;
205
206                 partitions {
207                         compatible = "fixed-partitions";
208                         #address-cells = <1>;
209                         #size-cells = <1>;
210
211                         partition@0 {
212                                 label = "data(spi)";
213                                 reg = <0x00000000 0x00100000>;
214                         };
215                 };
216         };
217 };
218
219 &scif0 {
220         pinctrl-0 = <&scif0_pins>;
221         pinctrl-names = "default";
222
223         uart-has-rtscts;
224         status = "okay";
225 };
226
227 &scif_clk {
228         clock-frequency = <14745600>;
229 };