Merge tag 'drm-misc-fixes-2018-02-21' of git://anongit.freedesktop.org/drm/drm-misc...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / r8a7745.dtsi
1 /*
2  * Device Tree Source for the r8a7745 SoC
3  *
4  * Copyright (C) 2016-2017 Cogent Embedded Inc.
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2. This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
14 #include <dt-bindings/power/r8a7745-sysc.h>
15
16 / {
17         compatible = "renesas,r8a7745";
18         #address-cells = <2>;
19         #size-cells = <2>;
20
21         aliases {
22                 i2c0 = &i2c0;
23                 i2c1 = &i2c1;
24                 i2c2 = &i2c2;
25                 i2c3 = &i2c3;
26                 i2c4 = &i2c4;
27                 i2c5 = &i2c5;
28                 i2c6 = &iic0;
29                 i2c7 = &iic1;
30                 spi0 = &qspi;
31                 spi1 = &msiof0;
32                 spi2 = &msiof1;
33                 spi3 = &msiof2;
34                 vin0 = &vin0;
35                 vin1 = &vin1;
36         };
37
38         /*
39          * The external audio clocks are configured  as 0 Hz fixed
40          * frequency clocks by default.  Boards that provide audio
41          * clocks should override them.
42          */
43         audio_clka: audio_clka {
44                 compatible = "fixed-clock";
45                 #clock-cells = <0>;
46                 clock-frequency = <0>;
47         };
48         audio_clkb: audio_clkb {
49                 compatible = "fixed-clock";
50                 #clock-cells = <0>;
51                 clock-frequency = <0>;
52         };
53         audio_clkc: audio_clkc {
54                 compatible = "fixed-clock";
55                 #clock-cells = <0>;
56                 clock-frequency = <0>;
57         };
58
59         /* External CAN clock */
60         can_clk: can {
61                 compatible = "fixed-clock";
62                 #clock-cells = <0>;
63                 /* This value must be overridden by the board. */
64                 clock-frequency = <0>;
65         };
66
67         cpus {
68                 #address-cells = <1>;
69                 #size-cells = <0>;
70                 enable-method = "renesas,apmu";
71
72                 cpu0: cpu@0 {
73                         device_type = "cpu";
74                         compatible = "arm,cortex-a7";
75                         reg = <0>;
76                         clock-frequency = <1000000000>;
77                         clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
78                         power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
79                         next-level-cache = <&L2_CA7>;
80                 };
81
82                 cpu1: cpu@1 {
83                         device_type = "cpu";
84                         compatible = "arm,cortex-a7";
85                         reg = <1>;
86                         clock-frequency = <1000000000>;
87                         clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
88                         power-domains = <&sysc R8A7745_PD_CA7_CPU1>;
89                         next-level-cache = <&L2_CA7>;
90                 };
91
92                 L2_CA7: cache-controller-0 {
93                         compatible = "cache";
94                         cache-unified;
95                         cache-level = <2>;
96                         power-domains = <&sysc R8A7745_PD_CA7_SCU>;
97                 };
98         };
99
100         /* External root clock */
101         extal_clk: extal {
102                 compatible = "fixed-clock";
103                 #clock-cells = <0>;
104                 /* This value must be overridden by the board. */
105                 clock-frequency = <0>;
106         };
107
108         /* External SCIF clock */
109         scif_clk: scif {
110                 compatible = "fixed-clock";
111                 #clock-cells = <0>;
112                 /* This value must be overridden by the board. */
113                 clock-frequency = <0>;
114         };
115
116         soc {
117                 compatible = "simple-bus";
118                 interrupt-parent = <&gic>;
119
120                 #address-cells = <2>;
121                 #size-cells = <2>;
122                 ranges;
123
124                 apmu@e6151000 {
125                         compatible = "renesas,r8a7745-apmu", "renesas,apmu";
126                         reg = <0 0xe6151000 0 0x188>;
127                         cpus = <&cpu0 &cpu1>;
128                 };
129
130                 gic: interrupt-controller@f1001000 {
131                         compatible = "arm,gic-400";
132                         #interrupt-cells = <3>;
133                         #address-cells = <0>;
134                         interrupt-controller;
135                         reg = <0 0xf1001000 0 0x1000>,
136                               <0 0xf1002000 0 0x2000>,
137                               <0 0xf1004000 0 0x2000>,
138                               <0 0xf1006000 0 0x2000>;
139                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
140                                                  IRQ_TYPE_LEVEL_HIGH)>;
141                         clocks = <&cpg CPG_MOD 408>;
142                         clock-names = "clk";
143                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
144                         resets = <&cpg 408>;
145                 };
146
147                 gpio0: gpio@e6050000 {
148                         compatible = "renesas,gpio-r8a7745",
149                                      "renesas,rcar-gen2-gpio";
150                         reg = <0 0xe6050000 0 0x50>;
151                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
152                         #gpio-cells = <2>;
153                         gpio-controller;
154                         gpio-ranges = <&pfc 0 0 32>;
155                         #interrupt-cells = <2>;
156                         interrupt-controller;
157                         clocks = <&cpg CPG_MOD 912>;
158                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
159                         resets = <&cpg 912>;
160                 };
161
162                 gpio1: gpio@e6051000 {
163                         compatible = "renesas,gpio-r8a7745",
164                                      "renesas,rcar-gen2-gpio";
165                         reg = <0 0xe6051000 0 0x50>;
166                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
167                         #gpio-cells = <2>;
168                         gpio-controller;
169                         gpio-ranges = <&pfc 0 32 26>;
170                         #interrupt-cells = <2>;
171                         interrupt-controller;
172                         clocks = <&cpg CPG_MOD 911>;
173                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
174                         resets = <&cpg 911>;
175                 };
176
177                 gpio2: gpio@e6052000 {
178                         compatible = "renesas,gpio-r8a7745",
179                                      "renesas,rcar-gen2-gpio";
180                         reg = <0 0xe6052000 0 0x50>;
181                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
182                         #gpio-cells = <2>;
183                         gpio-controller;
184                         gpio-ranges = <&pfc 0 64 32>;
185                         #interrupt-cells = <2>;
186                         interrupt-controller;
187                         clocks = <&cpg CPG_MOD 910>;
188                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
189                         resets = <&cpg 910>;
190                 };
191
192                 gpio3: gpio@e6053000 {
193                         compatible = "renesas,gpio-r8a7745",
194                                      "renesas,rcar-gen2-gpio";
195                         reg = <0 0xe6053000 0 0x50>;
196                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
197                         #gpio-cells = <2>;
198                         gpio-controller;
199                         gpio-ranges = <&pfc 0 96 32>;
200                         #interrupt-cells = <2>;
201                         interrupt-controller;
202                         clocks = <&cpg CPG_MOD 909>;
203                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
204                         resets = <&cpg 909>;
205                 };
206
207                 gpio4: gpio@e6054000 {
208                         compatible = "renesas,gpio-r8a7745",
209                                      "renesas,rcar-gen2-gpio";
210                         reg = <0 0xe6054000 0 0x50>;
211                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
212                         #gpio-cells = <2>;
213                         gpio-controller;
214                         gpio-ranges = <&pfc 0 128 32>;
215                         #interrupt-cells = <2>;
216                         interrupt-controller;
217                         clocks = <&cpg CPG_MOD 908>;
218                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
219                         resets = <&cpg 908>;
220                 };
221
222                 gpio5: gpio@e6055000 {
223                         compatible = "renesas,gpio-r8a7745",
224                                      "renesas,rcar-gen2-gpio";
225                         reg = <0 0xe6055000 0 0x50>;
226                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
227                         #gpio-cells = <2>;
228                         gpio-controller;
229                         gpio-ranges = <&pfc 0 160 28>;
230                         #interrupt-cells = <2>;
231                         interrupt-controller;
232                         clocks = <&cpg CPG_MOD 907>;
233                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
234                         resets = <&cpg 907>;
235                 };
236
237                 gpio6: gpio@e6055400 {
238                         compatible = "renesas,gpio-r8a7745",
239                                      "renesas,rcar-gen2-gpio";
240                         reg = <0 0xe6055400 0 0x50>;
241                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
242                         #gpio-cells = <2>;
243                         gpio-controller;
244                         gpio-ranges = <&pfc 0 192 26>;
245                         #interrupt-cells = <2>;
246                         interrupt-controller;
247                         clocks = <&cpg CPG_MOD 905>;
248                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
249                         resets = <&cpg 905>;
250                 };
251
252                 irqc: interrupt-controller@e61c0000 {
253                         compatible = "renesas,irqc-r8a7745", "renesas,irqc";
254                         #interrupt-cells = <2>;
255                         interrupt-controller;
256                         reg = <0 0xe61c0000 0 0x200>;
257                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
258                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
259                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
260                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
261                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
262                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
263                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
264                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
265                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
266                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
267                         clocks = <&cpg CPG_MOD 407>;
268                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
269                         resets = <&cpg 407>;
270                 };
271
272                 cmt0: timer@ffca0000 {
273                         compatible = "renesas,r8a7745-cmt0",
274                                      "renesas,rcar-gen2-cmt0";
275                         reg = <0 0xffca0000 0 0x1004>;
276                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
277                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
278                         clocks = <&cpg CPG_MOD 124>;
279                         clock-names = "fck";
280                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
281                         resets = <&cpg 124>;
282                         status = "disabled";
283                 };
284
285                 cmt1: timer@e6130000 {
286                         compatible = "renesas,r8a7745-cmt1",
287                                      "renesas,rcar-gen2-cmt1";
288                         reg = <0 0xe6130000 0 0x1004>;
289                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
290                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
291                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
292                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
293                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
294                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
295                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
296                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
297                         clocks = <&cpg CPG_MOD 329>;
298                         clock-names = "fck";
299                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
300                         resets = <&cpg 329>;
301                         status = "disabled";
302                 };
303
304                 cpg: clock-controller@e6150000 {
305                         compatible = "renesas,r8a7745-cpg-mssr";
306                         reg = <0 0xe6150000 0 0x1000>;
307                         clocks = <&extal_clk>, <&usb_extal_clk>;
308                         clock-names = "extal", "usb_extal";
309                         #clock-cells = <2>;
310                         #power-domain-cells = <0>;
311                         #reset-cells = <1>;
312                 };
313
314                 prr: chipid@ff000044 {
315                         compatible = "renesas,prr";
316                         reg = <0 0xff000044 0 4>;
317                 };
318
319                 rst: reset-controller@e6160000 {
320                         compatible = "renesas,r8a7745-rst";
321                         reg = <0 0xe6160000 0 0x100>;
322                 };
323
324                 sysc: system-controller@e6180000 {
325                         compatible = "renesas,r8a7745-sysc";
326                         reg = <0 0xe6180000 0 0x200>;
327                         #power-domain-cells = <1>;
328                 };
329
330                 pfc: pin-controller@e6060000 {
331                         compatible = "renesas,pfc-r8a7745";
332                         reg = <0 0xe6060000 0 0x11c>;
333                 };
334
335                 dmac0: dma-controller@e6700000 {
336                         compatible = "renesas,dmac-r8a7745",
337                                      "renesas,rcar-dmac";
338                         reg = <0 0xe6700000 0 0x20000>;
339                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
340                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
341                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
342                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
343                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
344                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
345                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
346                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
347                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
348                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
349                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
350                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
351                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
352                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
353                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
354                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
355                         interrupt-names = "error",
356                                         "ch0", "ch1", "ch2", "ch3",
357                                         "ch4", "ch5", "ch6", "ch7",
358                                         "ch8", "ch9", "ch10", "ch11",
359                                         "ch12", "ch13", "ch14";
360                         clocks = <&cpg CPG_MOD 219>;
361                         clock-names = "fck";
362                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
363                         resets = <&cpg 219>;
364                         #dma-cells = <1>;
365                         dma-channels = <15>;
366                 };
367
368                 dmac1: dma-controller@e6720000 {
369                         compatible = "renesas,dmac-r8a7745",
370                                      "renesas,rcar-dmac";
371                         reg = <0 0xe6720000 0 0x20000>;
372                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
373                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
374                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
375                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
376                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
377                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
378                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
379                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
380                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
381                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
382                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
383                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
384                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
385                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
386                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
387                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
388                         interrupt-names = "error",
389                                         "ch0", "ch1", "ch2", "ch3",
390                                         "ch4", "ch5", "ch6", "ch7",
391                                         "ch8", "ch9", "ch10", "ch11",
392                                         "ch12", "ch13", "ch14";
393                         clocks = <&cpg CPG_MOD 218>;
394                         clock-names = "fck";
395                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
396                         resets = <&cpg 218>;
397                         #dma-cells = <1>;
398                         dma-channels = <15>;
399                 };
400
401                 audma0: dma-controller@ec700000 {
402                         compatible = "renesas,dmac-r8a7745",
403                                      "renesas,rcar-dmac";
404                         reg = <0 0xec700000 0 0x10000>;
405                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
406                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
407                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
408                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
409                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
410                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
411                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
412                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
413                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
414                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
415                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
416                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
417                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
418                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
419                         interrupt-names = "error",
420                                           "ch0", "ch1", "ch2", "ch3",
421                                           "ch4", "ch5", "ch6", "ch7",
422                                           "ch8", "ch9", "ch10", "ch11",
423                                           "ch12";
424                         clocks = <&cpg CPG_MOD 502>;
425                         clock-names = "fck";
426                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
427                         resets = <&cpg 502>;
428                         #dma-cells = <1>;
429                         dma-channels = <13>;
430                 };
431
432                 usb_dmac0: dma-controller@e65a0000 {
433                         compatible = "renesas,r8a7745-usb-dmac",
434                                      "renesas,usb-dmac";
435                         reg = <0 0xe65a0000 0 0x100>;
436                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
437                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
438                         interrupt-names = "ch0", "ch1";
439                         clocks = <&cpg CPG_MOD 330>;
440                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
441                         resets = <&cpg 330>;
442                         #dma-cells = <1>;
443                         dma-channels = <2>;
444                 };
445
446                 usb_dmac1: dma-controller@e65b0000 {
447                         compatible = "renesas,r8a7745-usb-dmac",
448                                      "renesas,usb-dmac";
449                         reg = <0 0xe65b0000 0 0x100>;
450                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
451                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
452                         interrupt-names = "ch0", "ch1";
453                         clocks = <&cpg CPG_MOD 331>;
454                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
455                         resets = <&cpg 331>;
456                         #dma-cells = <1>;
457                         dma-channels = <2>;
458                 };
459
460                 scifa0: serial@e6c40000 {
461                         compatible = "renesas,scifa-r8a7745",
462                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
463                         reg = <0 0xe6c40000 0 0x40>;
464                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
465                         clocks = <&cpg CPG_MOD 204>;
466                         clock-names = "fck";
467                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
468                                <&dmac1 0x21>, <&dmac1 0x22>;
469                         dma-names = "tx", "rx", "tx", "rx";
470                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
471                         resets = <&cpg 204>;
472                         status = "disabled";
473                 };
474
475                 scifa1: serial@e6c50000 {
476                         compatible = "renesas,scifa-r8a7745",
477                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
478                         reg = <0 0xe6c50000 0 0x40>;
479                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
480                         clocks = <&cpg CPG_MOD 203>;
481                         clock-names = "fck";
482                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
483                                <&dmac1 0x25>, <&dmac1 0x26>;
484                         dma-names = "tx", "rx", "tx", "rx";
485                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
486                         resets = <&cpg 203>;
487                         status = "disabled";
488                 };
489
490                 scifa2: serial@e6c60000 {
491                         compatible = "renesas,scifa-r8a7745",
492                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
493                         reg = <0 0xe6c60000 0 0x40>;
494                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
495                         clocks = <&cpg CPG_MOD 202>;
496                         clock-names = "fck";
497                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
498                                <&dmac1 0x27>, <&dmac1 0x28>;
499                         dma-names = "tx", "rx", "tx", "rx";
500                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
501                         resets = <&cpg 202>;
502                         status = "disabled";
503                 };
504
505                 scifa3: serial@e6c70000 {
506                         compatible = "renesas,scifa-r8a7745",
507                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
508                         reg = <0 0xe6c70000 0 0x40>;
509                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
510                         clocks = <&cpg CPG_MOD 1106>;
511                         clock-names = "fck";
512                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
513                                <&dmac1 0x1b>, <&dmac1 0x1c>;
514                         dma-names = "tx", "rx", "tx", "rx";
515                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
516                         resets = <&cpg 1106>;
517                         status = "disabled";
518                 };
519
520                 scifa4: serial@e6c78000 {
521                         compatible = "renesas,scifa-r8a7745",
522                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
523                         reg = <0 0xe6c78000 0 0x40>;
524                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
525                         clocks = <&cpg CPG_MOD 1107>;
526                         clock-names = "fck";
527                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
528                                <&dmac1 0x1f>, <&dmac1 0x20>;
529                         dma-names = "tx", "rx", "tx", "rx";
530                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
531                         resets = <&cpg 1107>;
532                         status = "disabled";
533                 };
534
535                 scifa5: serial@e6c80000 {
536                         compatible = "renesas,scifa-r8a7745",
537                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
538                         reg = <0 0xe6c80000 0 0x40>;
539                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
540                         clocks = <&cpg CPG_MOD 1108>;
541                         clock-names = "fck";
542                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
543                                <&dmac1 0x23>, <&dmac1 0x24>;
544                         dma-names = "tx", "rx", "tx", "rx";
545                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
546                         resets = <&cpg 1108>;
547                         status = "disabled";
548                 };
549
550                 scifb0: serial@e6c20000 {
551                         compatible = "renesas,scifb-r8a7745",
552                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
553                         reg = <0 0xe6c20000 0 0x100>;
554                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
555                         clocks = <&cpg CPG_MOD 206>;
556                         clock-names = "fck";
557                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
558                                <&dmac1 0x3d>, <&dmac1 0x3e>;
559                         dma-names = "tx", "rx", "tx", "rx";
560                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
561                         resets = <&cpg 206>;
562                         status = "disabled";
563                 };
564
565                 scifb1: serial@e6c30000 {
566                         compatible = "renesas,scifb-r8a7745",
567                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
568                         reg = <0 0xe6c30000 0 0x100>;
569                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
570                         clocks = <&cpg CPG_MOD 207>;
571                         clock-names = "fck";
572                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
573                                <&dmac1 0x19>, <&dmac1 0x1a>;
574                         dma-names = "tx", "rx", "tx", "rx";
575                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
576                         resets = <&cpg 207>;
577                         status = "disabled";
578                 };
579
580                 scifb2: serial@e6ce0000 {
581                         compatible = "renesas,scifb-r8a7745",
582                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
583                         reg = <0 0xe6ce0000 0 0x100>;
584                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
585                         clocks = <&cpg CPG_MOD 216>;
586                         clock-names = "fck";
587                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
588                                <&dmac1 0x1d>, <&dmac1 0x1e>;
589                         dma-names = "tx", "rx", "tx", "rx";
590                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
591                         resets = <&cpg 216>;
592                         status = "disabled";
593                 };
594
595                 scif0: serial@e6e60000 {
596                         compatible = "renesas,scif-r8a7745",
597                                      "renesas,rcar-gen2-scif", "renesas,scif";
598                         reg = <0 0xe6e60000 0 0x40>;
599                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
600                         clocks = <&cpg CPG_MOD 721>,
601                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
602                         clock-names = "fck", "brg_int", "scif_clk";
603                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
604                                <&dmac1 0x29>, <&dmac1 0x2a>;
605                         dma-names = "tx", "rx", "tx", "rx";
606                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
607                         resets = <&cpg 721>;
608                         status = "disabled";
609                 };
610
611                 scif1: serial@e6e68000 {
612                         compatible = "renesas,scif-r8a7745",
613                                      "renesas,rcar-gen2-scif", "renesas,scif";
614                         reg = <0 0xe6e68000 0 0x40>;
615                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
616                         clocks = <&cpg CPG_MOD 720>,
617                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
618                         clock-names = "fck", "brg_int", "scif_clk";
619                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
620                                <&dmac1 0x2d>, <&dmac1 0x2e>;
621                         dma-names = "tx", "rx", "tx", "rx";
622                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
623                         resets = <&cpg 720>;
624                         status = "disabled";
625                 };
626
627                 scif2: serial@e6e58000 {
628                         compatible = "renesas,scif-r8a7745",
629                                      "renesas,rcar-gen2-scif", "renesas,scif";
630                         reg = <0 0xe6e58000 0 0x40>;
631                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
632                         clocks = <&cpg CPG_MOD 719>,
633                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
634                         clock-names = "fck", "brg_int", "scif_clk";
635                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
636                                <&dmac1 0x2b>, <&dmac1 0x2c>;
637                         dma-names = "tx", "rx", "tx", "rx";
638                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
639                         resets = <&cpg 719>;
640                         status = "disabled";
641                 };
642
643                 scif3: serial@e6ea8000 {
644                         compatible = "renesas,scif-r8a7745",
645                                      "renesas,rcar-gen2-scif", "renesas,scif";
646                         reg = <0 0xe6ea8000 0 0x40>;
647                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
648                         clocks = <&cpg CPG_MOD 718>,
649                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
650                         clock-names = "fck", "brg_int", "scif_clk";
651                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
652                                <&dmac1 0x2f>, <&dmac1 0x30>;
653                         dma-names = "tx", "rx", "tx", "rx";
654                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
655                         resets = <&cpg 718>;
656                         status = "disabled";
657                 };
658
659                 scif4: serial@e6ee0000 {
660                         compatible = "renesas,scif-r8a7745",
661                                      "renesas,rcar-gen2-scif", "renesas,scif";
662                         reg = <0 0xe6ee0000 0 0x40>;
663                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
664                         clocks = <&cpg CPG_MOD 715>,
665                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
666                         clock-names = "fck", "brg_int", "scif_clk";
667                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
668                                <&dmac1 0xfb>, <&dmac1 0xfc>;
669                         dma-names = "tx", "rx", "tx", "rx";
670                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
671                         resets = <&cpg 715>;
672                         status = "disabled";
673                 };
674
675                 scif5: serial@e6ee8000 {
676                         compatible = "renesas,scif-r8a7745",
677                                      "renesas,rcar-gen2-scif", "renesas,scif";
678                         reg = <0 0xe6ee8000 0 0x40>;
679                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
680                         clocks = <&cpg CPG_MOD 714>,
681                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
682                         clock-names = "fck", "brg_int", "scif_clk";
683                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
684                                <&dmac1 0xfd>, <&dmac1 0xfe>;
685                         dma-names = "tx", "rx", "tx", "rx";
686                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
687                         resets = <&cpg 714>;
688                         status = "disabled";
689                 };
690
691                 hscif0: serial@e62c0000 {
692                         compatible = "renesas,hscif-r8a7745",
693                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
694                         reg = <0 0xe62c0000 0 0x60>;
695                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
696                         clocks = <&cpg CPG_MOD 717>,
697                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
698                         clock-names = "fck", "brg_int", "scif_clk";
699                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
700                                <&dmac1 0x39>, <&dmac1 0x3a>;
701                         dma-names = "tx", "rx", "tx", "rx";
702                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
703                         resets = <&cpg 717>;
704                         status = "disabled";
705                 };
706
707                 hscif1: serial@e62c8000 {
708                         compatible = "renesas,hscif-r8a7745",
709                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
710                         reg = <0 0xe62c8000 0 0x60>;
711                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
712                         clocks = <&cpg CPG_MOD 716>,
713                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
714                         clock-names = "fck", "brg_int", "scif_clk";
715                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
716                                <&dmac1 0x4d>, <&dmac1 0x4e>;
717                         dma-names = "tx", "rx", "tx", "rx";
718                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
719                         resets = <&cpg 716>;
720                         status = "disabled";
721                 };
722
723                 hscif2: serial@e62d0000 {
724                         compatible = "renesas,hscif-r8a7745",
725                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
726                         reg = <0 0xe62d0000 0 0x60>;
727                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
728                         clocks = <&cpg CPG_MOD 713>,
729                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
730                         clock-names = "fck", "brg_int", "scif_clk";
731                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
732                                <&dmac1 0x3b>, <&dmac1 0x3c>;
733                         dma-names = "tx", "rx", "tx", "rx";
734                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
735                         resets = <&cpg 713>;
736                         status = "disabled";
737                 };
738
739                 icram2: sram@e6300000 {
740                         compatible = "mmio-sram";
741                         reg = <0 0xe6300000 0 0x40000>;
742                 };
743
744                 icram0: sram@e63a0000 {
745                         compatible = "mmio-sram";
746                         reg = <0 0xe63a0000 0 0x12000>;
747                 };
748
749                 icram1: sram@e63c0000 {
750                         compatible = "mmio-sram";
751                         reg = <0 0xe63c0000 0 0x1000>;
752                         #address-cells = <1>;
753                         #size-cells = <1>;
754                         ranges = <0 0 0xe63c0000 0x1000>;
755
756                         smp-sram@0 {
757                                 compatible = "renesas,smp-sram";
758                                 reg = <0 0x10>;
759                         };
760                 };
761
762                 ether: ethernet@ee700000 {
763                         compatible = "renesas,ether-r8a7745",
764                                      "renesas,rcar-gen2-ether";
765                         reg = <0 0xee700000 0 0x400>;
766                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
767                         clocks = <&cpg CPG_MOD 813>;
768                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
769                         resets = <&cpg 813>;
770                         phy-mode = "rmii";
771                         #address-cells = <1>;
772                         #size-cells = <0>;
773                         status = "disabled";
774                 };
775
776                 avb: ethernet@e6800000 {
777                         compatible = "renesas,etheravb-r8a7745",
778                                      "renesas,etheravb-rcar-gen2";
779                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
780                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
781                         clocks = <&cpg CPG_MOD 812>;
782                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
783                         resets = <&cpg 812>;
784                         #address-cells = <1>;
785                         #size-cells = <0>;
786                         status = "disabled";
787                 };
788
789                 i2c0: i2c@e6508000 {
790                         #address-cells = <1>;
791                         #size-cells = <0>;
792                         compatible = "renesas,i2c-r8a7745",
793                                      "renesas,rcar-gen2-i2c";
794                         reg = <0 0xe6508000 0 0x40>;
795                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
796                         clocks = <&cpg CPG_MOD 931>;
797                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
798                         resets = <&cpg 931>;
799                         i2c-scl-internal-delay-ns = <6>;
800                         status = "disabled";
801                 };
802
803                 i2c1: i2c@e6518000 {
804                         #address-cells = <1>;
805                         #size-cells = <0>;
806                         compatible = "renesas,i2c-r8a7745",
807                                      "renesas,rcar-gen2-i2c";
808                         reg = <0 0xe6518000 0 0x40>;
809                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
810                         clocks = <&cpg CPG_MOD 930>;
811                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
812                         resets = <&cpg 930>;
813                         i2c-scl-internal-delay-ns = <6>;
814                         status = "disabled";
815                 };
816
817                 i2c2: i2c@e6530000 {
818                         #address-cells = <1>;
819                         #size-cells = <0>;
820                         compatible = "renesas,i2c-r8a7745",
821                                      "renesas,rcar-gen2-i2c";
822                         reg = <0 0xe6530000 0 0x40>;
823                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
824                         clocks = <&cpg CPG_MOD 929>;
825                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
826                         resets = <&cpg 929>;
827                         i2c-scl-internal-delay-ns = <6>;
828                         status = "disabled";
829                 };
830
831                 i2c3: i2c@e6540000 {
832                         #address-cells = <1>;
833                         #size-cells = <0>;
834                         compatible = "renesas,i2c-r8a7745",
835                                      "renesas,rcar-gen2-i2c";
836                         reg = <0 0xe6540000 0 0x40>;
837                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
838                         clocks = <&cpg CPG_MOD 928>;
839                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
840                         resets = <&cpg 928>;
841                         i2c-scl-internal-delay-ns = <6>;
842                         status = "disabled";
843                 };
844
845                 i2c4: i2c@e6520000 {
846                         #address-cells = <1>;
847                         #size-cells = <0>;
848                         compatible = "renesas,i2c-r8a7745",
849                                      "renesas,rcar-gen2-i2c";
850                         reg = <0 0xe6520000 0 0x40>;
851                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
852                         clocks = <&cpg CPG_MOD 927>;
853                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
854                         resets = <&cpg 927>;
855                         i2c-scl-internal-delay-ns = <6>;
856                         status = "disabled";
857                 };
858
859                 i2c5: i2c@e6528000 {
860                         #address-cells = <1>;
861                         #size-cells = <0>;
862                         compatible = "renesas,i2c-r8a7745",
863                                      "renesas,rcar-gen2-i2c";
864                         reg = <0 0xe6528000 0 0x40>;
865                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
866                         clocks = <&cpg CPG_MOD 925>;
867                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
868                         resets = <&cpg 925>;
869                         i2c-scl-internal-delay-ns = <6>;
870                         status = "disabled";
871                 };
872
873                 iic0: i2c@e6500000 {
874                         #address-cells = <1>;
875                         #size-cells = <0>;
876                         compatible = "renesas,iic-r8a7745",
877                                      "renesas,rcar-gen2-iic",
878                                      "renesas,rmobile-iic";
879                         reg = <0 0xe6500000 0 0x425>;
880                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
881                         clocks = <&cpg CPG_MOD 318>;
882                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
883                                <&dmac1 0x61>, <&dmac1 0x62>;
884                         dma-names = "tx", "rx", "tx", "rx";
885                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
886                         resets = <&cpg 318>;
887                         status = "disabled";
888                 };
889
890                 iic1: i2c@e6510000 {
891                         #address-cells = <1>;
892                         #size-cells = <0>;
893                         compatible = "renesas,iic-r8a7745",
894                                      "renesas,rcar-gen2-iic",
895                                      "renesas,rmobile-iic";
896                         reg = <0 0xe6510000 0 0x425>;
897                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
898                         clocks = <&cpg CPG_MOD 323>;
899                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
900                                <&dmac1 0x65>, <&dmac1 0x66>;
901                         dma-names = "tx", "rx", "tx", "rx";
902                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
903                         resets = <&cpg 323>;
904                         status = "disabled";
905                 };
906
907                 mmcif0: mmc@ee200000 {
908                         compatible = "renesas,mmcif-r8a7745",
909                                      "renesas,sh-mmcif";
910                         reg = <0 0xee200000 0 0x80>;
911                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
912                         clocks = <&cpg CPG_MOD 315>;
913                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
914                                <&dmac1 0xd1>, <&dmac1 0xd2>;
915                         dma-names = "tx", "rx", "tx", "rx";
916                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
917                         resets = <&cpg 315>;
918                         reg-io-width = <4>;
919                         max-frequency = <97500000>;
920                         status = "disabled";
921                 };
922
923                 qspi: spi@e6b10000 {
924                         compatible = "renesas,qspi-r8a7745", "renesas,qspi";
925                         reg = <0 0xe6b10000 0 0x2c>;
926                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
927                         clocks = <&cpg CPG_MOD 917>;
928                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
929                                <&dmac1 0x17>, <&dmac1 0x18>;
930                         dma-names = "tx", "rx", "tx", "rx";
931                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
932                         num-cs = <1>;
933                         #address-cells = <1>;
934                         #size-cells = <0>;
935                         resets = <&cpg 917>;
936                         status = "disabled";
937                 };
938
939                 vin0: video@e6ef0000 {
940                         compatible = "renesas,vin-r8a7745",
941                                      "renesas,rcar-gen2-vin";
942                         reg = <0 0xe6ef0000 0 0x1000>;
943                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
944                         clocks = <&cpg CPG_MOD 811>;
945                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
946                         resets = <&cpg 811>;
947                         status = "disabled";
948                 };
949
950                 vin1: video@e6ef1000 {
951                         compatible = "renesas,vin-r8a7745",
952                                      "renesas,rcar-gen2-vin";
953                         reg = <0 0xe6ef1000 0 0x1000>;
954                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
955                         clocks = <&cpg CPG_MOD 810>;
956                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
957                         resets = <&cpg 810>;
958                         status = "disabled";
959                 };
960
961                 du: display@feb00000 {
962                         compatible = "renesas,du-r8a7745";
963                         reg = <0 0xfeb00000 0 0x40000>;
964                         reg-names = "du";
965                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
966                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
967                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
968                         clock-names = "du.0", "du.1";
969                         status = "disabled";
970
971                         ports {
972                                 #address-cells = <1>;
973                                 #size-cells = <0>;
974
975                                 port@0 {
976                                         reg = <0>;
977                                         du_out_rgb0: endpoint {
978                                         };
979                                 };
980                                 port@1 {
981                                         reg = <1>;
982                                         du_out_rgb1: endpoint {
983                                         };
984                                 };
985                         };
986                 };
987
988                 msiof0: spi@e6e20000 {
989                         compatible = "renesas,msiof-r8a7745",
990                                      "renesas,rcar-gen2-msiof";
991                         reg = <0 0xe6e20000 0 0x0064>;
992                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
993                         clocks = <&cpg CPG_MOD 000>;
994                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
995                                <&dmac1 0x51>, <&dmac1 0x52>;
996                         dma-names = "tx", "rx", "tx", "rx";
997                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
998                         #address-cells = <1>;
999                         #size-cells = <0>;
1000                         resets = <&cpg 000>;
1001                         status = "disabled";
1002                 };
1003
1004                 msiof1: spi@e6e10000 {
1005                         compatible = "renesas,msiof-r8a7745",
1006                                      "renesas,rcar-gen2-msiof";
1007                         reg = <0 0xe6e10000 0 0x0064>;
1008                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1009                         clocks = <&cpg CPG_MOD 208>;
1010                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1011                                <&dmac1 0x55>, <&dmac1 0x56>;
1012                         dma-names = "tx", "rx", "tx", "rx";
1013                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1014                         #address-cells = <1>;
1015                         #size-cells = <0>;
1016                         resets = <&cpg 208>;
1017                         status = "disabled";
1018                 };
1019
1020                 msiof2: spi@e6e00000 {
1021                         compatible = "renesas,msiof-r8a7745",
1022                                      "renesas,rcar-gen2-msiof";
1023                         reg = <0 0xe6e00000 0 0x0064>;
1024                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1025                         clocks = <&cpg CPG_MOD 205>;
1026                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1027                                <&dmac1 0x41>, <&dmac1 0x42>;
1028                         dma-names = "tx", "rx", "tx", "rx";
1029                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1030                         #address-cells = <1>;
1031                         #size-cells = <0>;
1032                         resets = <&cpg 205>;
1033                         status = "disabled";
1034                 };
1035
1036                 pwm0: pwm@e6e30000 {
1037                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1038                         reg = <0 0xe6e30000 0 0x8>;
1039                         clocks = <&cpg CPG_MOD 523>;
1040                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1041                         resets = <&cpg 523>;
1042                         #pwm-cells = <2>;
1043                         status = "disabled";
1044                 };
1045
1046                 pwm1: pwm@e6e31000 {
1047                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1048                         reg = <0 0xe6e31000 0 0x8>;
1049                         clocks = <&cpg CPG_MOD 523>;
1050                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1051                         resets = <&cpg 523>;
1052                         #pwm-cells = <2>;
1053                         status = "disabled";
1054                 };
1055
1056                 pwm2: pwm@e6e32000 {
1057                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1058                         reg = <0 0xe6e32000 0 0x8>;
1059                         clocks = <&cpg CPG_MOD 523>;
1060                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1061                         resets = <&cpg 523>;
1062                         #pwm-cells = <2>;
1063                         status = "disabled";
1064                 };
1065
1066                 pwm3: pwm@e6e33000 {
1067                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1068                         reg = <0 0xe6e33000 0 0x8>;
1069                         clocks = <&cpg CPG_MOD 523>;
1070                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1071                         resets = <&cpg 523>;
1072                         #pwm-cells = <2>;
1073                         status = "disabled";
1074                 };
1075
1076                 pwm4: pwm@e6e34000 {
1077                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1078                         reg = <0 0xe6e34000 0 0x8>;
1079                         clocks = <&cpg CPG_MOD 523>;
1080                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1081                         resets = <&cpg 523>;
1082                         #pwm-cells = <2>;
1083                         status = "disabled";
1084                 };
1085
1086                 pwm5: pwm@e6e35000 {
1087                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1088                         reg = <0 0xe6e35000 0 0x8>;
1089                         clocks = <&cpg CPG_MOD 523>;
1090                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1091                         resets = <&cpg 523>;
1092                         #pwm-cells = <2>;
1093                         status = "disabled";
1094                 };
1095
1096                 pwm6: pwm@e6e36000 {
1097                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1098                         reg = <0 0xe6e36000 0 0x8>;
1099                         clocks = <&cpg CPG_MOD 523>;
1100                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1101                         resets = <&cpg 523>;
1102                         #pwm-cells = <2>;
1103                         status = "disabled";
1104                 };
1105
1106                 tpu: pwm@e60f0000 {
1107                         compatible = "renesas,tpu-r8a7745", "renesas,tpu";
1108                         reg = <0 0xe60f0000 0 0x148>;
1109                         clocks = <&cpg CPG_MOD 304>;
1110                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1111                         resets = <&cpg 304>;
1112                         #pwm-cells = <3>;
1113                         status = "disabled";
1114                 };
1115
1116                 sdhi0: sd@ee100000 {
1117                         compatible = "renesas,sdhi-r8a7745",
1118                                      "renesas,rcar-gen2-sdhi";
1119                         reg = <0 0xee100000 0 0x328>;
1120                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1121                         clocks = <&cpg CPG_MOD 314>;
1122                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1123                                <&dmac1 0xcd>, <&dmac1 0xce>;
1124                         dma-names = "tx", "rx", "tx", "rx";
1125                         max-frequency = <195000000>;
1126                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1127                         resets = <&cpg 314>;
1128                         status = "disabled";
1129                 };
1130
1131                 sdhi1: sd@ee140000 {
1132                         compatible = "renesas,sdhi-r8a7745",
1133                                      "renesas,rcar-gen2-sdhi";
1134                         reg = <0 0xee140000 0 0x100>;
1135                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1136                         clocks = <&cpg CPG_MOD 312>;
1137                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1138                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1139                         dma-names = "tx", "rx", "tx", "rx";
1140                         max-frequency = <97500000>;
1141                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1142                         resets = <&cpg 312>;
1143                         status = "disabled";
1144                 };
1145
1146                 sdhi2: sd@ee160000 {
1147                         compatible = "renesas,sdhi-r8a7745",
1148                                      "renesas,rcar-gen2-sdhi";
1149                         reg = <0 0xee160000 0 0x100>;
1150                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1151                         clocks = <&cpg CPG_MOD 311>;
1152                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1153                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1154                         dma-names = "tx", "rx", "tx", "rx";
1155                         max-frequency = <97500000>;
1156                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1157                         resets = <&cpg 311>;
1158                         status = "disabled";
1159                 };
1160
1161                 pci0: pci@ee090000 {
1162                         compatible = "renesas,pci-r8a7745",
1163                                      "renesas,pci-rcar-gen2";
1164                         device_type = "pci";
1165                         reg = <0 0xee090000 0 0xc00>,
1166                               <0 0xee080000 0 0x1100>;
1167                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1168                         clocks = <&cpg CPG_MOD 703>;
1169                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1170                         resets = <&cpg 703>;
1171                         status = "disabled";
1172
1173                         bus-range = <0 0>;
1174                         #address-cells = <3>;
1175                         #size-cells = <2>;
1176                         #interrupt-cells = <1>;
1177                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1178                         interrupt-map-mask = <0xff00 0 0 0x7>;
1179                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1180                                          0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1181                                          0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1182
1183                         usb@1,0 {
1184                                 reg = <0x800 0 0 0 0>;
1185                                 phys = <&usb0 0>;
1186                                 phy-names = "usb";
1187                         };
1188
1189                         usb@2,0 {
1190                                 reg = <0x1000 0 0 0 0>;
1191                                 phys = <&usb0 0>;
1192                                 phy-names = "usb";
1193                         };
1194                 };
1195
1196                 pci1: pci@ee0d0000 {
1197                         compatible = "renesas,pci-r8a7745",
1198                                      "renesas,pci-rcar-gen2";
1199                         device_type = "pci";
1200                         reg = <0 0xee0d0000 0 0xc00>,
1201                               <0 0xee0c0000 0 0x1100>;
1202                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1203                         clocks = <&cpg CPG_MOD 703>;
1204                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1205                         resets = <&cpg 703>;
1206                         status = "disabled";
1207
1208                         bus-range = <1 1>;
1209                         #address-cells = <3>;
1210                         #size-cells = <2>;
1211                         #interrupt-cells = <1>;
1212                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1213                         interrupt-map-mask = <0xff00 0 0 0x7>;
1214                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1215                                          0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1216                                          0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1217
1218                         usb@1,0 {
1219                                 reg = <0x10800 0 0 0 0>;
1220                                 phys = <&usb2 0>;
1221                                 phy-names = "usb";
1222                         };
1223
1224                         usb@2,0 {
1225                                 reg = <0x11000 0 0 0 0>;
1226                                 phys = <&usb2 0>;
1227                                 phy-names = "usb";
1228                         };
1229                 };
1230
1231                 hsusb: usb@e6590000 {
1232                         compatible = "renesas,usbhs-r8a7745",
1233                                      "renesas,rcar-gen2-usbhs";
1234                         reg = <0 0xe6590000 0 0x100>;
1235                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1236                         clocks = <&cpg CPG_MOD 704>;
1237                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1238                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1239                         dma-names = "ch0", "ch1", "ch2", "ch3";
1240                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1241                         resets = <&cpg 704>;
1242                         renesas,buswait = <4>;
1243                         phys = <&usb0 1>;
1244                         phy-names = "usb";
1245                         status = "disabled";
1246                 };
1247
1248                 usbphy: usb-phy@e6590100 {
1249                         compatible = "renesas,usb-phy-r8a7745",
1250                                      "renesas,rcar-gen2-usb-phy";
1251                         reg = <0 0xe6590100 0 0x100>;
1252                         #address-cells = <1>;
1253                         #size-cells = <0>;
1254                         clocks = <&cpg CPG_MOD 704>;
1255                         clock-names = "usbhs";
1256                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1257                         resets = <&cpg 704>;
1258                         status = "disabled";
1259
1260                         usb0: usb-channel@0 {
1261                                 reg = <0>;
1262                                 #phy-cells = <1>;
1263                         };
1264                         usb2: usb-channel@2 {
1265                                 reg = <2>;
1266                                 #phy-cells = <1>;
1267                         };
1268                 };
1269
1270                 can0: can@e6e80000 {
1271                         compatible = "renesas,can-r8a7745",
1272                                      "renesas,rcar-gen2-can";
1273                         reg = <0 0xe6e80000 0 0x1000>;
1274                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1275                         clocks = <&cpg CPG_MOD 916>,
1276                                  <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1277                                  <&can_clk>;
1278                         clock-names = "clkp1", "clkp2", "can_clk";
1279                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1280                         resets = <&cpg 916>;
1281                         status = "disabled";
1282                 };
1283
1284                 can1: can@e6e88000 {
1285                         compatible = "renesas,can-r8a7745",
1286                                      "renesas,rcar-gen2-can";
1287                         reg = <0 0xe6e88000 0 0x1000>;
1288                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1289                         clocks = <&cpg CPG_MOD 915>,
1290                                  <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1291                                  <&can_clk>;
1292                         clock-names = "clkp1", "clkp2", "can_clk";
1293                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1294                         resets = <&cpg 915>;
1295                         status = "disabled";
1296                 };
1297
1298                 rcar_sound: sound@ec500000 {
1299                         /*
1300                          * #sound-dai-cells is required
1301                          *
1302                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1303                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1304                          */
1305                         compatible = "renesas,rcar_sound-r8a7745",
1306                                      "renesas,rcar_sound-gen2";
1307                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1308                               <0 0xec5a0000 0 0x100>,  /* ADG */
1309                               <0 0xec540000 0 0x1000>, /* SSIU */
1310                               <0 0xec541000 0 0x280>,  /* SSI */
1311                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
1312                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1313
1314                         clocks = <&cpg CPG_MOD 1005>,
1315                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1316                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1317                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1318                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1319                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1320                                  <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1321                                  <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
1322                                  <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
1323                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1324                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1325                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1326                                  <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
1327                                  <&cpg CPG_CORE R8A7745_CLK_M2>;
1328                         clock-names = "ssi-all",
1329                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1330                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1331                                       "ssi.1", "ssi.0",
1332                                       "src.6", "src.5", "src.4", "src.3",
1333                                       "src.2", "src.1",
1334                                       "ctu.0", "ctu.1",
1335                                       "mix.0", "mix.1",
1336                                       "dvc.0", "dvc.1",
1337                                       "clk_a", "clk_b", "clk_c", "clk_i";
1338                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1339                         resets = <&cpg 1005>,
1340                                  <&cpg 1006>, <&cpg 1007>, <&cpg 1008>,
1341                                  <&cpg 1009>, <&cpg 1010>, <&cpg 1011>,
1342                                  <&cpg 1012>, <&cpg 1013>, <&cpg 1014>,
1343                                  <&cpg 1015>;
1344                         reset-names = "ssi-all",
1345                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1346                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1347                                       "ssi.1", "ssi.0";
1348
1349                         status = "disabled";
1350
1351                         rcar_sound,dvc {
1352                                 dvc0: dvc-0 {
1353                                         dmas = <&audma0 0xbc>;
1354                                         dma-names = "tx";
1355                                 };
1356                                 dvc1: dvc-1 {
1357                                         dmas = <&audma0 0xbe>;
1358                                         dma-names = "tx";
1359                                 };
1360                         };
1361
1362                         rcar_sound,mix {
1363                                 mix0: mix-0 { };
1364                                 mix1: mix-1 { };
1365                         };
1366
1367                         rcar_sound,ctu {
1368                                 ctu00: ctu-0 { };
1369                                 ctu01: ctu-1 { };
1370                                 ctu02: ctu-2 { };
1371                                 ctu03: ctu-3 { };
1372                                 ctu10: ctu-4 { };
1373                                 ctu11: ctu-5 { };
1374                                 ctu12: ctu-6 { };
1375                                 ctu13: ctu-7 { };
1376                         };
1377
1378                         rcar_sound,src {
1379                                 src-0 {
1380                                         status = "disabled";
1381                                 };
1382                                 src1: src-1 {
1383                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1384                                         dmas = <&audma0 0x87>, <&audma0 0x9c>;
1385                                         dma-names = "rx", "tx";
1386                                 };
1387                                 src2: src-2 {
1388                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1389                                         dmas = <&audma0 0x89>, <&audma0 0x9e>;
1390                                         dma-names = "rx", "tx";
1391                                 };
1392                                 src3: src-3 {
1393                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1394                                         dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1395                                         dma-names = "rx", "tx";
1396                                 };
1397                                 src4: src-4 {
1398                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1399                                         dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1400                                         dma-names = "rx", "tx";
1401                                 };
1402                                 src5: src-5 {
1403                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1404                                         dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1405                                         dma-names = "rx", "tx";
1406                                 };
1407                                 src6: src-6 {
1408                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1409                                         dmas = <&audma0 0x91>, <&audma0 0xb4>;
1410                                         dma-names = "rx", "tx";
1411                                 };
1412                         };
1413
1414                         rcar_sound,ssi {
1415                                 ssi0: ssi-0 {
1416                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1417                                         dmas = <&audma0 0x01>, <&audma0 0x02>,
1418                                                <&audma0 0x15>, <&audma0 0x16>;
1419                                         dma-names = "rx", "tx", "rxu", "txu";
1420                                 };
1421                                 ssi1: ssi-1 {
1422                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1423                                         dmas = <&audma0 0x03>, <&audma0 0x04>,
1424                                                <&audma0 0x49>, <&audma0 0x4a>;
1425                                         dma-names = "rx", "tx", "rxu", "txu";
1426                                 };
1427                                 ssi2: ssi-2 {
1428                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1429                                         dmas = <&audma0 0x05>, <&audma0 0x06>,
1430                                                <&audma0 0x63>, <&audma0 0x64>;
1431                                         dma-names = "rx", "tx", "rxu", "txu";
1432                                 };
1433                                 ssi3: ssi-3 {
1434                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1435                                         dmas = <&audma0 0x07>, <&audma0 0x08>,
1436                                                <&audma0 0x6f>, <&audma0 0x70>;
1437                                         dma-names = "rx", "tx", "rxu", "txu";
1438                                 };
1439                                 ssi4: ssi-4 {
1440                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1441                                         dmas = <&audma0 0x09>, <&audma0 0x0a>,
1442                                                <&audma0 0x71>, <&audma0 0x72>;
1443                                         dma-names = "rx", "tx", "rxu", "txu";
1444                                 };
1445                                 ssi5: ssi-5 {
1446                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1447                                         dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1448                                                <&audma0 0x73>, <&audma0 0x74>;
1449                                         dma-names = "rx", "tx", "rxu", "txu";
1450                                 };
1451                                 ssi6: ssi-6 {
1452                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1453                                         dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1454                                                <&audma0 0x75>, <&audma0 0x76>;
1455                                         dma-names = "rx", "tx", "rxu", "txu";
1456                                 };
1457                                 ssi7: ssi-7 {
1458                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1459                                         dmas = <&audma0 0x0f>, <&audma0 0x10>,
1460                                                <&audma0 0x79>, <&audma0 0x7a>;
1461                                         dma-names = "rx", "tx", "rxu", "txu";
1462                                 };
1463                                 ssi8: ssi-8 {
1464                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1465                                         dmas = <&audma0 0x11>, <&audma0 0x12>,
1466                                                <&audma0 0x7b>, <&audma0 0x7c>;
1467                                         dma-names = "rx", "tx", "rxu", "txu";
1468                                 };
1469                                 ssi9: ssi-9 {
1470                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1471                                         dmas = <&audma0 0x13>, <&audma0 0x14>,
1472                                                <&audma0 0x7d>, <&audma0 0x7e>;
1473                                         dma-names = "rx", "tx", "rxu", "txu";
1474                                 };
1475                         };
1476                 };
1477         };
1478
1479         timer {
1480                 compatible = "arm,armv7-timer";
1481                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1482                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1483                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1484                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1485         };
1486
1487         /* External USB clock - can be overridden by the board */
1488         usb_extal_clk: usb_extal {
1489                 compatible = "fixed-clock";
1490                 #clock-cells = <0>;
1491                 clock-frequency = <48000000>;
1492         };
1493 };