arch/arm/boot/dts/r8a7745.dtsi

   1 /*
   2  * Device Tree Source for the r8a7745 SoC
   3  *
   4  * Copyright (C) 2016-2017 Cogent Embedded Inc.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2. This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
  14 #include <dt-bindings/power/r8a7745-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7745";
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 i2c3 = &i2c3;
  26                 i2c4 = &i2c4;
  27                 i2c5 = &i2c5;
  28                 spi0 = &qspi;
  29                 spi1 = &msiof0;
  30                 spi2 = &msiof1;
  31                 spi3 = &msiof2;
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 cpu0: cpu@0 {
  39                         device_type = "cpu";
  40                         compatible = "arm,cortex-a7";
  41                         reg = <0>;
  42                         clock-frequency = <1000000000>;
  43                         clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
  44                         power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
  45                         next-level-cache = <&L2_CA7>;
  46                 };
  47
  48                 L2_CA7: cache-controller-0 {
  49                         compatible = "cache";
  50                         cache-unified;
  51                         cache-level = <2>;
  52                         power-domains = <&sysc R8A7745_PD_CA7_SCU>;
  53                 };
  54         };
  55
  56         soc {
  57                 compatible = "simple-bus";
  58                 interrupt-parent = <&gic>;
  59
  60                 #address-cells = <2>;
  61                 #size-cells = <2>;
  62                 ranges;
  63
  64                 gic: interrupt-controller@f1001000 {
  65                         compatible = "arm,gic-400";
  66                         #interrupt-cells = <3>;
  67                         #address-cells = <0>;
  68                         interrupt-controller;
  69                         reg = <0 0xf1001000 0 0x1000>,
  70                               <0 0xf1002000 0 0x2000>,
  71                               <0 0xf1004000 0 0x2000>,
  72                               <0 0xf1006000 0 0x2000>;
  73                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
  74                                                  IRQ_TYPE_LEVEL_HIGH)>;
  75                         clocks = <&cpg CPG_MOD 408>;
  76                         clock-names = "clk";
  77                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
  78                         resets = <&cpg 408>;
  79                 };
  80
  81                 gpio0: gpio@e6050000 {
  82                         compatible = "renesas,gpio-r8a7745",
  83                                      "renesas,rcar-gen2-gpio";
  84                         reg = <0 0xe6050000 0 0x50>;
  85                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  86                         #gpio-cells = <2>;
  87                         gpio-controller;
  88                         gpio-ranges = <&pfc 0 0 32>;
  89                         #interrupt-cells = <2>;
  90                         interrupt-controller;
  91                         clocks = <&cpg CPG_MOD 912>;
  92                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
  93                         resets = <&cpg 912>;
  94                 };
  95
  96                 gpio1: gpio@e6051000 {
  97                         compatible = "renesas,gpio-r8a7745",
  98                                      "renesas,rcar-gen2-gpio";
  99                         reg = <0 0xe6051000 0 0x50>;
 100                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 101                         #gpio-cells = <2>;
 102                         gpio-controller;
 103                         gpio-ranges = <&pfc 0 32 26>;
 104                         #interrupt-cells = <2>;
 105                         interrupt-controller;
 106                         clocks = <&cpg CPG_MOD 911>;
 107                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 108                         resets = <&cpg 911>;
 109                 };
 110
 111                 gpio2: gpio@e6052000 {
 112                         compatible = "renesas,gpio-r8a7745",
 113                                      "renesas,rcar-gen2-gpio";
 114                         reg = <0 0xe6052000 0 0x50>;
 115                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 116                         #gpio-cells = <2>;
 117                         gpio-controller;
 118                         gpio-ranges = <&pfc 0 64 32>;
 119                         #interrupt-cells = <2>;
 120                         interrupt-controller;
 121                         clocks = <&cpg CPG_MOD 910>;
 122                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 123                         resets = <&cpg 910>;
 124                 };
 125
 126                 gpio3: gpio@e6053000 {
 127                         compatible = "renesas,gpio-r8a7745",
 128                                      "renesas,rcar-gen2-gpio";
 129                         reg = <0 0xe6053000 0 0x50>;
 130                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 131                         #gpio-cells = <2>;
 132                         gpio-controller;
 133                         gpio-ranges = <&pfc 0 96 32>;
 134                         #interrupt-cells = <2>;
 135                         interrupt-controller;
 136                         clocks = <&cpg CPG_MOD 909>;
 137                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 138                         resets = <&cpg 909>;
 139                 };
 140
 141                 gpio4: gpio@e6054000 {
 142                         compatible = "renesas,gpio-r8a7745",
 143                                      "renesas,rcar-gen2-gpio";
 144                         reg = <0 0xe6054000 0 0x50>;
 145                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 146                         #gpio-cells = <2>;
 147                         gpio-controller;
 148                         gpio-ranges = <&pfc 0 128 32>;
 149                         #interrupt-cells = <2>;
 150                         interrupt-controller;
 151                         clocks = <&cpg CPG_MOD 908>;
 152                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 153                         resets = <&cpg 908>;
 154                 };
 155
 156                 gpio5: gpio@e6055000 {
 157                         compatible = "renesas,gpio-r8a7745",
 158                                      "renesas,rcar-gen2-gpio";
 159                         reg = <0 0xe6055000 0 0x50>;
 160                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 161                         #gpio-cells = <2>;
 162                         gpio-controller;
 163                         gpio-ranges = <&pfc 0 160 28>;
 164                         #interrupt-cells = <2>;
 165                         interrupt-controller;
 166                         clocks = <&cpg CPG_MOD 907>;
 167                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 168                         resets = <&cpg 907>;
 169                 };
 170
 171                 gpio6: gpio@e6055400 {
 172                         compatible = "renesas,gpio-r8a7745",
 173                                      "renesas,rcar-gen2-gpio";
 174                         reg = <0 0xe6055400 0 0x50>;
 175                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 176                         #gpio-cells = <2>;
 177                         gpio-controller;
 178                         gpio-ranges = <&pfc 0 192 26>;
 179                         #interrupt-cells = <2>;
 180                         interrupt-controller;
 181                         clocks = <&cpg CPG_MOD 905>;
 182                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 183                         resets = <&cpg 905>;
 184                 };
 185
 186                 irqc: interrupt-controller@e61c0000 {
 187                         compatible = "renesas,irqc-r8a7745", "renesas,irqc";
 188                         #interrupt-cells = <2>;
 189                         interrupt-controller;
 190                         reg = <0 0xe61c0000 0 0x200>;
 191                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 192                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 193                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 194                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 195                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 196                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 197                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 198                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 199                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 200                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 201                         clocks = <&cpg CPG_MOD 407>;
 202                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 203                         resets = <&cpg 407>;
 204                 };
 205
 206                 timer {
 207                         compatible = "arm,armv7-timer";
 208                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
 209                                                   IRQ_TYPE_LEVEL_LOW)>,
 210                                      <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
 211                                                   IRQ_TYPE_LEVEL_LOW)>,
 212                                      <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
 213                                                   IRQ_TYPE_LEVEL_LOW)>,
 214                                      <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
 215                                                   IRQ_TYPE_LEVEL_LOW)>;
 216                 };
 217
 218                 cpg: clock-controller@e6150000 {
 219                         compatible = "renesas,r8a7745-cpg-mssr";
 220                         reg = <0 0xe6150000 0 0x1000>;
 221                         clocks = <&extal_clk>, <&usb_extal_clk>;
 222                         clock-names = "extal", "usb_extal";
 223                         #clock-cells = <2>;
 224                         #power-domain-cells = <0>;
 225                         #reset-cells = <1>;
 226                 };
 227
 228                 prr: chipid@ff000044 {
 229                         compatible = "renesas,prr";
 230                         reg = <0 0xff000044 0 4>;
 231                 };
 232
 233                 rst: reset-controller@e6160000 {
 234                         compatible = "renesas,r8a7745-rst";
 235                         reg = <0 0xe6160000 0 0x100>;
 236                 };
 237
 238                 sysc: system-controller@e6180000 {
 239                         compatible = "renesas,r8a7745-sysc";
 240                         reg = <0 0xe6180000 0 0x200>;
 241                         #power-domain-cells = <1>;
 242                 };
 243
 244                 pfc: pin-controller@e6060000 {
 245                         compatible = "renesas,pfc-r8a7745";
 246                         reg = <0 0xe6060000 0 0x11c>;
 247                 };
 248
 249                 dmac0: dma-controller@e6700000 {
 250                         compatible = "renesas,dmac-r8a7745",
 251                                      "renesas,rcar-dmac";
 252                         reg = <0 0xe6700000 0 0x20000>;
 253                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 254                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 255                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 256                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 257                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 258                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 259                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 260                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 261                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 262                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 263                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 264                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 265                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 266                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 267                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 268                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 269                         interrupt-names = "error",
 270                                         "ch0", "ch1", "ch2", "ch3",
 271                                         "ch4", "ch5", "ch6", "ch7",
 272                                         "ch8", "ch9", "ch10", "ch11",
 273                                         "ch12", "ch13", "ch14";
 274                         clocks = <&cpg CPG_MOD 219>;
 275                         clock-names = "fck";
 276                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 277                         resets = <&cpg 219>;
 278                         #dma-cells = <1>;
 279                         dma-channels = <15>;
 280                 };
 281
 282                 dmac1: dma-controller@e6720000 {
 283                         compatible = "renesas,dmac-r8a7745",
 284                                      "renesas,rcar-dmac";
 285                         reg = <0 0xe6720000 0 0x20000>;
 286                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 287                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 288                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 289                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 290                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 291                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 292                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 293                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 294                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 295                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 296                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 297                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 298                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 299                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 300                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 301                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 302                         interrupt-names = "error",
 303                                         "ch0", "ch1", "ch2", "ch3",
 304                                         "ch4", "ch5", "ch6", "ch7",
 305                                         "ch8", "ch9", "ch10", "ch11",
 306                                         "ch12", "ch13", "ch14";
 307                         clocks = <&cpg CPG_MOD 218>;
 308                         clock-names = "fck";
 309                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 310                         resets = <&cpg 218>;
 311                         #dma-cells = <1>;
 312                         dma-channels = <15>;
 313                 };
 314
 315                 scifa0: serial@e6c40000 {
 316                         compatible = "renesas,scifa-r8a7745",
 317                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 318                         reg = <0 0xe6c40000 0 0x40>;
 319                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 320                         clocks = <&cpg CPG_MOD 204>;
 321                         clock-names = "fck";
 322                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 323                                <&dmac1 0x21>, <&dmac1 0x22>;
 324                         dma-names = "tx", "rx", "tx", "rx";
 325                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 326                         resets = <&cpg 204>;
 327                         status = "disabled";
 328                 };
 329
 330                 scifa1: serial@e6c50000 {
 331                         compatible = "renesas,scifa-r8a7745",
 332                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 333                         reg = <0 0xe6c50000 0 0x40>;
 334                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 335                         clocks = <&cpg CPG_MOD 203>;
 336                         clock-names = "fck";
 337                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 338                                <&dmac1 0x25>, <&dmac1 0x26>;
 339                         dma-names = "tx", "rx", "tx", "rx";
 340                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 341                         resets = <&cpg 203>;
 342                         status = "disabled";
 343                 };
 344
 345                 scifa2: serial@e6c60000 {
 346                         compatible = "renesas,scifa-r8a7745",
 347                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 348                         reg = <0 0xe6c60000 0 0x40>;
 349                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 350                         clocks = <&cpg CPG_MOD 202>;
 351                         clock-names = "fck";
 352                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 353                                <&dmac1 0x27>, <&dmac1 0x28>;
 354                         dma-names = "tx", "rx", "tx", "rx";
 355                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 356                         resets = <&cpg 202>;
 357                         status = "disabled";
 358                 };
 359
 360                 scifa3: serial@e6c70000 {
 361                         compatible = "renesas,scifa-r8a7745",
 362                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 363                         reg = <0 0xe6c70000 0 0x40>;
 364                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 365                         clocks = <&cpg CPG_MOD 1106>;
 366                         clock-names = "fck";
 367                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 368                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 369                         dma-names = "tx", "rx", "tx", "rx";
 370                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 371                         resets = <&cpg 1106>;
 372                         status = "disabled";
 373                 };
 374
 375                 scifa4: serial@e6c78000 {
 376                         compatible = "renesas,scifa-r8a7745",
 377                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 378                         reg = <0 0xe6c78000 0 0x40>;
 379                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 380                         clocks = <&cpg CPG_MOD 1107>;
 381                         clock-names = "fck";
 382                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 383                                <&dmac1 0x1f>, <&dmac1 0x20>;
 384                         dma-names = "tx", "rx", "tx", "rx";
 385                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 386                         resets = <&cpg 1107>;
 387                         status = "disabled";
 388                 };
 389
 390                 scifa5: serial@e6c80000 {
 391                         compatible = "renesas,scifa-r8a7745",
 392                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 393                         reg = <0 0xe6c80000 0 0x40>;
 394                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 395                         clocks = <&cpg CPG_MOD 1108>;
 396                         clock-names = "fck";
 397                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 398                                <&dmac1 0x23>, <&dmac1 0x24>;
 399                         dma-names = "tx", "rx", "tx", "rx";
 400                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 401                         resets = <&cpg 1108>;
 402                         status = "disabled";
 403                 };
 404
 405                 scifb0: serial@e6c20000 {
 406                         compatible = "renesas,scifb-r8a7745",
 407                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 408                         reg = <0 0xe6c20000 0 0x100>;
 409                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 410                         clocks = <&cpg CPG_MOD 206>;
 411                         clock-names = "fck";
 412                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 413                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 414                         dma-names = "tx", "rx", "tx", "rx";
 415                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 416                         resets = <&cpg 206>;
 417                         status = "disabled";
 418                 };
 419
 420                 scifb1: serial@e6c30000 {
 421                         compatible = "renesas,scifb-r8a7745",
 422                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 423                         reg = <0 0xe6c30000 0 0x100>;
 424                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 425                         clocks = <&cpg CPG_MOD 207>;
 426                         clock-names = "fck";
 427                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 428                                <&dmac1 0x19>, <&dmac1 0x1a>;
 429                         dma-names = "tx", "rx", "tx", "rx";
 430                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 431                         resets = <&cpg 207>;
 432                         status = "disabled";
 433                 };
 434
 435                 scifb2: serial@e6ce0000 {
 436                         compatible = "renesas,scifb-r8a7745",
 437                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 438                         reg = <0 0xe6ce0000 0 0x100>;
 439                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 440                         clocks = <&cpg CPG_MOD 216>;
 441                         clock-names = "fck";
 442                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 443                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 444                         dma-names = "tx", "rx", "tx", "rx";
 445                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 446                         resets = <&cpg 216>;
 447                         status = "disabled";
 448                 };
 449
 450                 scif0: serial@e6e60000 {
 451                         compatible = "renesas,scif-r8a7745",
 452                                      "renesas,rcar-gen2-scif", "renesas,scif";
 453                         reg = <0 0xe6e60000 0 0x40>;
 454                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 455                         clocks = <&cpg CPG_MOD 721>,
 456                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 457                         clock-names = "fck", "brg_int", "scif_clk";
 458                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 459                                <&dmac1 0x29>, <&dmac1 0x2a>;
 460                         dma-names = "tx", "rx", "tx", "rx";
 461                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 462                         resets = <&cpg 721>;
 463                         status = "disabled";
 464                 };
 465
 466                 scif1: serial@e6e68000 {
 467                         compatible = "renesas,scif-r8a7745",
 468                                      "renesas,rcar-gen2-scif", "renesas,scif";
 469                         reg = <0 0xe6e68000 0 0x40>;
 470                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 471                         clocks = <&cpg CPG_MOD 720>,
 472                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 473                         clock-names = "fck", "brg_int", "scif_clk";
 474                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 475                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 476                         dma-names = "tx", "rx", "tx", "rx";
 477                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 478                         resets = <&cpg 720>;
 479                         status = "disabled";
 480                 };
 481
 482                 scif2: serial@e6e58000 {
 483                         compatible = "renesas,scif-r8a7745",
 484                                      "renesas,rcar-gen2-scif", "renesas,scif";
 485                         reg = <0 0xe6e58000 0 0x40>;
 486                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 487                         clocks = <&cpg CPG_MOD 719>,
 488                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 489                         clock-names = "fck", "brg_int", "scif_clk";
 490                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 491                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 492                         dma-names = "tx", "rx", "tx", "rx";
 493                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 494                         resets = <&cpg 719>;
 495                         status = "disabled";
 496                 };
 497
 498                 scif3: serial@e6ea8000 {
 499                         compatible = "renesas,scif-r8a7745",
 500                                      "renesas,rcar-gen2-scif", "renesas,scif";
 501                         reg = <0 0xe6ea8000 0 0x40>;
 502                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 503                         clocks = <&cpg CPG_MOD 718>,
 504                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 505                         clock-names = "fck", "brg_int", "scif_clk";
 506                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 507                                <&dmac1 0x2f>, <&dmac1 0x30>;
 508                         dma-names = "tx", "rx", "tx", "rx";
 509                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 510                         resets = <&cpg 718>;
 511                         status = "disabled";
 512                 };
 513
 514                 scif4: serial@e6ee0000 {
 515                         compatible = "renesas,scif-r8a7745",
 516                                      "renesas,rcar-gen2-scif", "renesas,scif";
 517                         reg = <0 0xe6ee0000 0 0x40>;
 518                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 519                         clocks = <&cpg CPG_MOD 715>,
 520                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 521                         clock-names = "fck", "brg_int", "scif_clk";
 522                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 523                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 524                         dma-names = "tx", "rx", "tx", "rx";
 525                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 526                         resets = <&cpg 715>;
 527                         status = "disabled";
 528                 };
 529
 530                 scif5: serial@e6ee8000 {
 531                         compatible = "renesas,scif-r8a7745",
 532                                      "renesas,rcar-gen2-scif", "renesas,scif";
 533                         reg = <0 0xe6ee8000 0 0x40>;
 534                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 535                         clocks = <&cpg CPG_MOD 714>,
 536                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 537                         clock-names = "fck", "brg_int", "scif_clk";
 538                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 539                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 540                         dma-names = "tx", "rx", "tx", "rx";
 541                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 542                         resets = <&cpg 714>;
 543                         status = "disabled";
 544                 };
 545
 546                 hscif0: serial@e62c0000 {
 547                         compatible = "renesas,hscif-r8a7745",
 548                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 549                         reg = <0 0xe62c0000 0 0x60>;
 550                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 551                         clocks = <&cpg CPG_MOD 717>,
 552                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 553                         clock-names = "fck", "brg_int", "scif_clk";
 554                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 555                                <&dmac1 0x39>, <&dmac1 0x3a>;
 556                         dma-names = "tx", "rx", "tx", "rx";
 557                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 558                         resets = <&cpg 717>;
 559                         status = "disabled";
 560                 };
 561
 562                 hscif1: serial@e62c8000 {
 563                         compatible = "renesas,hscif-r8a7745",
 564                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 565                         reg = <0 0xe62c8000 0 0x60>;
 566                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 567                         clocks = <&cpg CPG_MOD 716>,
 568                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 569                         clock-names = "fck", "brg_int", "scif_clk";
 570                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 571                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 572                         dma-names = "tx", "rx", "tx", "rx";
 573                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 574                         resets = <&cpg 716>;
 575                         status = "disabled";
 576                 };
 577
 578                 hscif2: serial@e62d0000 {
 579                         compatible = "renesas,hscif-r8a7745",
 580                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 581                         reg = <0 0xe62d0000 0 0x60>;
 582                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 583                         clocks = <&cpg CPG_MOD 713>,
 584                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 585                         clock-names = "fck", "brg_int", "scif_clk";
 586                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 587                                <&dmac1 0x3b>, <&dmac1 0x3c>;
 588                         dma-names = "tx", "rx", "tx", "rx";
 589                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 590                         resets = <&cpg 713>;
 591                         status = "disabled";
 592                 };
 593
 594                 icram2: sram@e6300000 {
 595                         compatible = "mmio-sram";
 596                         reg = <0 0xe6300000 0 0x40000>;
 597                 };
 598
 599                 icram0: sram@e63a0000 {
 600                         compatible = "mmio-sram";
 601                         reg = <0 0xe63a0000 0 0x12000>;
 602                 };
 603
 604                 icram1: sram@e63c0000 {
 605                         compatible = "mmio-sram";
 606                         reg = <0 0xe63c0000 0 0x1000>;
 607                         #address-cells = <1>;
 608                         #size-cells = <1>;
 609                         ranges = <0 0 0xe63c0000 0x1000>;
 610
 611                         smp-sram@0 {
 612                                 compatible = "renesas,smp-sram";
 613                                 reg = <0 0x10>;
 614                         };
 615                 };
 616
 617                 ether: ethernet@ee700000 {
 618                         compatible = "renesas,ether-r8a7745";
 619                         reg = <0 0xee700000 0 0x400>;
 620                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 621                         clocks = <&cpg CPG_MOD 813>;
 622                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 623                         resets = <&cpg 813>;
 624                         phy-mode = "rmii";
 625                         #address-cells = <1>;
 626                         #size-cells = <0>;
 627                         status = "disabled";
 628                 };
 629
 630                 avb: ethernet@e6800000 {
 631                         compatible = "renesas,etheravb-r8a7745",
 632                                      "renesas,etheravb-rcar-gen2";
 633                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 634                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 635                         clocks = <&cpg CPG_MOD 812>;
 636                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 637                         resets = <&cpg 812>;
 638                         #address-cells = <1>;
 639                         #size-cells = <0>;
 640                         status = "disabled";
 641                 };
 642
 643                 i2c0: i2c@e6508000 {
 644                         #address-cells = <1>;
 645                         #size-cells = <0>;
 646                         compatible = "renesas,i2c-r8a7745",
 647                                      "renesas,rcar-gen2-i2c";
 648                         reg = <0 0xe6508000 0 0x40>;
 649                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 650                         clocks = <&cpg CPG_MOD 931>;
 651                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 652                         resets = <&cpg 931>;
 653                         i2c-scl-internal-delay-ns = <6>;
 654                         status = "disabled";
 655                 };
 656
 657                 i2c1: i2c@e6518000 {
 658                         #address-cells = <1>;
 659                         #size-cells = <0>;
 660                         compatible = "renesas,i2c-r8a7745",
 661                                      "renesas,rcar-gen2-i2c";
 662                         reg = <0 0xe6518000 0 0x40>;
 663                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 664                         clocks = <&cpg CPG_MOD 930>;
 665                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 666                         resets = <&cpg 930>;
 667                         i2c-scl-internal-delay-ns = <6>;
 668                         status = "disabled";
 669                 };
 670
 671                 i2c2: i2c@e6530000 {
 672                         #address-cells = <1>;
 673                         #size-cells = <0>;
 674                         compatible = "renesas,i2c-r8a7745",
 675                                      "renesas,rcar-gen2-i2c";
 676                         reg = <0 0xe6530000 0 0x40>;
 677                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 678                         clocks = <&cpg CPG_MOD 929>;
 679                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 680                         resets = <&cpg 929>;
 681                         i2c-scl-internal-delay-ns = <6>;
 682                         status = "disabled";
 683                 };
 684
 685                 i2c3: i2c@e6540000 {
 686                         #address-cells = <1>;
 687                         #size-cells = <0>;
 688                         compatible = "renesas,i2c-r8a7745",
 689                                      "renesas,rcar-gen2-i2c";
 690                         reg = <0 0xe6540000 0 0x40>;
 691                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 692                         clocks = <&cpg CPG_MOD 928>;
 693                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 694                         resets = <&cpg 928>;
 695                         i2c-scl-internal-delay-ns = <6>;
 696                         status = "disabled";
 697                 };
 698
 699                 i2c4: i2c@e6520000 {
 700                         #address-cells = <1>;
 701                         #size-cells = <0>;
 702                         compatible = "renesas,i2c-r8a7745",
 703                                      "renesas,rcar-gen2-i2c";
 704                         reg = <0 0xe6520000 0 0x40>;
 705                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 706                         clocks = <&cpg CPG_MOD 927>;
 707                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 708                         resets = <&cpg 927>;
 709                         i2c-scl-internal-delay-ns = <6>;
 710                         status = "disabled";
 711                 };
 712
 713                 i2c5: i2c@e6528000 {
 714                         #address-cells = <1>;
 715                         #size-cells = <0>;
 716                         compatible = "renesas,i2c-r8a7745",
 717                                      "renesas,rcar-gen2-i2c";
 718                         reg = <0 0xe6528000 0 0x40>;
 719                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 720                         clocks = <&cpg CPG_MOD 925>;
 721                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 722                         resets = <&cpg 925>;
 723                         i2c-scl-internal-delay-ns = <6>;
 724                         status = "disabled";
 725                 };
 726
 727                 mmcif0: mmc@ee200000 {
 728                         compatible = "renesas,mmcif-r8a7745",
 729                                      "renesas,sh-mmcif";
 730                         reg = <0 0xee200000 0 0x80>;
 731                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 732                         clocks = <&cpg CPG_MOD 315>;
 733                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 734                                <&dmac1 0xd1>, <&dmac1 0xd2>;
 735                         dma-names = "tx", "rx", "tx", "rx";
 736                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 737                         resets = <&cpg 315>;
 738                         reg-io-width = <4>;
 739                         max-frequency = <97500000>;
 740                         status = "disabled";
 741                 };
 742
 743                 qspi: spi@e6b10000 {
 744                         compatible = "renesas,qspi-r8a7745", "renesas,qspi";
 745                         reg = <0 0xe6b10000 0 0x2c>;
 746                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 747                         clocks = <&cpg CPG_MOD 917>;
 748                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 749                                <&dmac1 0x17>, <&dmac1 0x18>;
 750                         dma-names = "tx", "rx", "tx", "rx";
 751                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 752                         num-cs = <1>;
 753                         #address-cells = <1>;
 754                         #size-cells = <0>;
 755                         resets = <&cpg 917>;
 756                         status = "disabled";
 757                 };
 758
 759                 msiof0: spi@e6e20000 {
 760                         compatible = "renesas,msiof-r8a7745",
 761                                      "renesas,rcar-gen2-msiof";
 762                         reg = <0 0xe6e20000 0 0x0064>;
 763                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 764                         clocks = <&cpg CPG_MOD 000>;
 765                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
 766                                <&dmac1 0x51>, <&dmac1 0x52>;
 767                         dma-names = "tx", "rx", "tx", "rx";
 768                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 769                         #address-cells = <1>;
 770                         #size-cells = <0>;
 771                         resets = <&cpg 000>;
 772                         status = "disabled";
 773                 };
 774
 775                 msiof1: spi@e6e10000 {
 776                         compatible = "renesas,msiof-r8a7745",
 777                                      "renesas,rcar-gen2-msiof";
 778                         reg = <0 0xe6e10000 0 0x0064>;
 779                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 780                         clocks = <&cpg CPG_MOD 208>;
 781                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
 782                                <&dmac1 0x55>, <&dmac1 0x56>;
 783                         dma-names = "tx", "rx", "tx", "rx";
 784                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 785                         #address-cells = <1>;
 786                         #size-cells = <0>;
 787                         resets = <&cpg 208>;
 788                         status = "disabled";
 789                 };
 790
 791                 msiof2: spi@e6e00000 {
 792                         compatible = "renesas,msiof-r8a7745",
 793                                      "renesas,rcar-gen2-msiof";
 794                         reg = <0 0xe6e00000 0 0x0064>;
 795                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 796                         clocks = <&cpg CPG_MOD 205>;
 797                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
 798                                <&dmac1 0x41>, <&dmac1 0x42>;
 799                         dma-names = "tx", "rx", "tx", "rx";
 800                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 801                         #address-cells = <1>;
 802                         #size-cells = <0>;
 803                         resets = <&cpg 205>;
 804                         status = "disabled";
 805                 };
 806
 807                 sdhi0: sd@ee100000 {
 808                         compatible = "renesas,sdhi-r8a7745";
 809                         reg = <0 0xee100000 0 0x328>;
 810                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 811                         clocks = <&cpg CPG_MOD 314>;
 812                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 813                                <&dmac1 0xcd>, <&dmac1 0xce>;
 814                         dma-names = "tx", "rx", "tx", "rx";
 815                         max-frequency = <195000000>;
 816                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 817                         resets = <&cpg 314>;
 818                         status = "disabled";
 819                 };
 820
 821                 sdhi1: sd@ee140000 {
 822                         compatible = "renesas,sdhi-r8a7745";
 823                         reg = <0 0xee140000 0 0x100>;
 824                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 825                         clocks = <&cpg CPG_MOD 312>;
 826                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 827                                <&dmac1 0xc1>, <&dmac1 0xc2>;
 828                         dma-names = "tx", "rx", "tx", "rx";
 829                         max-frequency = <97500000>;
 830                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 831                         resets = <&cpg 312>;
 832                         status = "disabled";
 833                 };
 834
 835                 sdhi2: sd@ee160000 {
 836                         compatible = "renesas,sdhi-r8a7745";
 837                         reg = <0 0xee160000 0 0x100>;
 838                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 839                         clocks = <&cpg CPG_MOD 311>;
 840                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 841                                <&dmac1 0xd3>, <&dmac1 0xd4>;
 842                         dma-names = "tx", "rx", "tx", "rx";
 843                         max-frequency = <97500000>;
 844                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 845                         resets = <&cpg 311>;
 846                         status = "disabled";
 847                 };
 848
 849                 pci0: pci@ee090000 {
 850                         compatible = "renesas,pci-r8a7745",
 851                                      "renesas,pci-rcar-gen2";
 852                         device_type = "pci";
 853                         reg = <0 0xee090000 0 0xc00>,
 854                               <0 0xee080000 0 0x1100>;
 855                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 856                         clocks = <&cpg CPG_MOD 703>;
 857                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 858                         resets = <&cpg 703>;
 859                         status = "disabled";
 860
 861                         bus-range = <0 0>;
 862                         #address-cells = <3>;
 863                         #size-cells = <2>;
 864                         #interrupt-cells = <1>;
 865                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
 866                         interrupt-map-mask = <0xff00 0 0 0x7>;
 867                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 868                                          0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 869                                          0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 870
 871                         usb@1,0 {
 872                                 reg = <0x800 0 0 0 0>;
 873                                 phys = <&usb0 0>;
 874                                 phy-names = "usb";
 875                         };
 876
 877                         usb@2,0 {
 878                                 reg = <0x1000 0 0 0 0>;
 879                                 phys = <&usb0 0>;
 880                                 phy-names = "usb";
 881                         };
 882                 };
 883
 884                 pci1: pci@ee0d0000 {
 885                         compatible = "renesas,pci-r8a7745",
 886                                      "renesas,pci-rcar-gen2";
 887                         device_type = "pci";
 888                         reg = <0 0xee0d0000 0 0xc00>,
 889                               <0 0xee0c0000 0 0x1100>;
 890                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 891                         clocks = <&cpg CPG_MOD 703>;
 892                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 893                         resets = <&cpg 703>;
 894                         status = "disabled";
 895
 896                         bus-range = <1 1>;
 897                         #address-cells = <3>;
 898                         #size-cells = <2>;
 899                         #interrupt-cells = <1>;
 900                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
 901                         interrupt-map-mask = <0xff00 0 0 0x7>;
 902                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 903                                          0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 904                                          0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 905
 906                         usb@1,0 {
 907                                 reg = <0x10800 0 0 0 0>;
 908                                 phys = <&usb2 0>;
 909                                 phy-names = "usb";
 910                         };
 911
 912                         usb@2,0 {
 913                                 reg = <0x11000 0 0 0 0>;
 914                                 phys = <&usb2 0>;
 915                                 phy-names = "usb";
 916                         };
 917                 };
 918
 919                 usbphy: usb-phy@e6590100 {
 920                         compatible = "renesas,usb-phy-r8a7745",
 921                                      "renesas,rcar-gen2-usb-phy";
 922                         reg = <0 0xe6590100 0 0x100>;
 923                         #address-cells = <1>;
 924                         #size-cells = <0>;
 925                         clocks = <&cpg CPG_MOD 704>;
 926                         clock-names = "usbhs";
 927                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 928                         resets = <&cpg 704>;
 929                         status = "disabled";
 930
 931                         usb0: usb-channel@0 {
 932                                 reg = <0>;
 933                                 #phy-cells = <1>;
 934                         };
 935                         usb2: usb-channel@2 {
 936                                 reg = <2>;
 937                                 #phy-cells = <1>;
 938                         };
 939                 };
 940         };
 941
 942         /* External root clock */
 943         extal_clk: extal {
 944                 compatible = "fixed-clock";
 945                 #clock-cells = <0>;
 946                 /* This value must be overridden by the board. */
 947                 clock-frequency = <0>;
 948         };
 949
 950         /* External USB clock - can be overridden by the board */
 951         usb_extal_clk: usb_extal {
 952                 compatible = "fixed-clock";
 953                 #clock-cells = <0>;
 954                 clock-frequency = <48000000>;
 955         };
 956
 957         /* External SCIF clock */
 958         scif_clk: scif {
 959                 compatible = "fixed-clock";
 960                 #clock-cells = <0>;
 961                 /* This value must be overridden by the board. */
 962                 clock-frequency = <0>;
 963         };
 964 };