Merge branch 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / r8a7745.dtsi
1 /*
2  * Device Tree Source for the r8a7745 SoC
3  *
4  * Copyright (C) 2016-2017 Cogent Embedded Inc.
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2. This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
14 #include <dt-bindings/power/r8a7745-sysc.h>
15
16 / {
17         compatible = "renesas,r8a7745";
18         #address-cells = <2>;
19         #size-cells = <2>;
20
21         aliases {
22                 i2c0 = &i2c0;
23                 i2c1 = &i2c1;
24                 i2c2 = &i2c2;
25                 i2c3 = &i2c3;
26                 i2c4 = &i2c4;
27                 i2c5 = &i2c5;
28                 i2c6 = &iic0;
29                 i2c7 = &iic1;
30                 spi0 = &qspi;
31                 spi1 = &msiof0;
32                 spi2 = &msiof1;
33                 spi3 = &msiof2;
34                 vin0 = &vin0;
35                 vin1 = &vin1;
36         };
37
38         /*
39          * The external audio clocks are configured  as 0 Hz fixed
40          * frequency clocks by default.  Boards that provide audio
41          * clocks should override them.
42          */
43         audio_clka: audio_clka {
44                 compatible = "fixed-clock";
45                 #clock-cells = <0>;
46                 clock-frequency = <0>;
47         };
48         audio_clkb: audio_clkb {
49                 compatible = "fixed-clock";
50                 #clock-cells = <0>;
51                 clock-frequency = <0>;
52         };
53         audio_clkc: audio_clkc {
54                 compatible = "fixed-clock";
55                 #clock-cells = <0>;
56                 clock-frequency = <0>;
57         };
58
59         /* External CAN clock */
60         can_clk: can {
61                 compatible = "fixed-clock";
62                 #clock-cells = <0>;
63                 /* This value must be overridden by the board. */
64                 clock-frequency = <0>;
65         };
66
67         cpus {
68                 #address-cells = <1>;
69                 #size-cells = <0>;
70                 enable-method = "renesas,apmu";
71
72                 cpu0: cpu@0 {
73                         device_type = "cpu";
74                         compatible = "arm,cortex-a7";
75                         reg = <0>;
76                         clock-frequency = <1000000000>;
77                         clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
78                         power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
79                         next-level-cache = <&L2_CA7>;
80                 };
81
82                 cpu1: cpu@1 {
83                         device_type = "cpu";
84                         compatible = "arm,cortex-a7";
85                         reg = <1>;
86                         clock-frequency = <1000000000>;
87                         clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
88                         power-domains = <&sysc R8A7745_PD_CA7_CPU1>;
89                         next-level-cache = <&L2_CA7>;
90                 };
91
92                 L2_CA7: cache-controller-0 {
93                         compatible = "cache";
94                         cache-unified;
95                         cache-level = <2>;
96                         power-domains = <&sysc R8A7745_PD_CA7_SCU>;
97                 };
98         };
99
100         /* External root clock */
101         extal_clk: extal {
102                 compatible = "fixed-clock";
103                 #clock-cells = <0>;
104                 /* This value must be overridden by the board. */
105                 clock-frequency = <0>;
106         };
107
108         pmu {
109                 compatible = "arm,cortex-a7-pmu";
110                 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
111                                       <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
112                 interrupt-affinity = <&cpu0>, <&cpu1>;
113         };
114
115         /* External SCIF clock */
116         scif_clk: scif {
117                 compatible = "fixed-clock";
118                 #clock-cells = <0>;
119                 /* This value must be overridden by the board. */
120                 clock-frequency = <0>;
121         };
122
123         soc {
124                 compatible = "simple-bus";
125                 interrupt-parent = <&gic>;
126
127                 #address-cells = <2>;
128                 #size-cells = <2>;
129                 ranges;
130
131                 gpio0: gpio@e6050000 {
132                         compatible = "renesas,gpio-r8a7745",
133                                      "renesas,rcar-gen2-gpio";
134                         reg = <0 0xe6050000 0 0x50>;
135                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
136                         #gpio-cells = <2>;
137                         gpio-controller;
138                         gpio-ranges = <&pfc 0 0 32>;
139                         #interrupt-cells = <2>;
140                         interrupt-controller;
141                         clocks = <&cpg CPG_MOD 912>;
142                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
143                         resets = <&cpg 912>;
144                 };
145
146                 gpio1: gpio@e6051000 {
147                         compatible = "renesas,gpio-r8a7745",
148                                      "renesas,rcar-gen2-gpio";
149                         reg = <0 0xe6051000 0 0x50>;
150                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
151                         #gpio-cells = <2>;
152                         gpio-controller;
153                         gpio-ranges = <&pfc 0 32 26>;
154                         #interrupt-cells = <2>;
155                         interrupt-controller;
156                         clocks = <&cpg CPG_MOD 911>;
157                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
158                         resets = <&cpg 911>;
159                 };
160
161                 gpio2: gpio@e6052000 {
162                         compatible = "renesas,gpio-r8a7745",
163                                      "renesas,rcar-gen2-gpio";
164                         reg = <0 0xe6052000 0 0x50>;
165                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
166                         #gpio-cells = <2>;
167                         gpio-controller;
168                         gpio-ranges = <&pfc 0 64 32>;
169                         #interrupt-cells = <2>;
170                         interrupt-controller;
171                         clocks = <&cpg CPG_MOD 910>;
172                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
173                         resets = <&cpg 910>;
174                 };
175
176                 gpio3: gpio@e6053000 {
177                         compatible = "renesas,gpio-r8a7745",
178                                      "renesas,rcar-gen2-gpio";
179                         reg = <0 0xe6053000 0 0x50>;
180                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
181                         #gpio-cells = <2>;
182                         gpio-controller;
183                         gpio-ranges = <&pfc 0 96 32>;
184                         #interrupt-cells = <2>;
185                         interrupt-controller;
186                         clocks = <&cpg CPG_MOD 909>;
187                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
188                         resets = <&cpg 909>;
189                 };
190
191                 gpio4: gpio@e6054000 {
192                         compatible = "renesas,gpio-r8a7745",
193                                      "renesas,rcar-gen2-gpio";
194                         reg = <0 0xe6054000 0 0x50>;
195                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
196                         #gpio-cells = <2>;
197                         gpio-controller;
198                         gpio-ranges = <&pfc 0 128 32>;
199                         #interrupt-cells = <2>;
200                         interrupt-controller;
201                         clocks = <&cpg CPG_MOD 908>;
202                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
203                         resets = <&cpg 908>;
204                 };
205
206                 gpio5: gpio@e6055000 {
207                         compatible = "renesas,gpio-r8a7745",
208                                      "renesas,rcar-gen2-gpio";
209                         reg = <0 0xe6055000 0 0x50>;
210                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
211                         #gpio-cells = <2>;
212                         gpio-controller;
213                         gpio-ranges = <&pfc 0 160 28>;
214                         #interrupt-cells = <2>;
215                         interrupt-controller;
216                         clocks = <&cpg CPG_MOD 907>;
217                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
218                         resets = <&cpg 907>;
219                 };
220
221                 gpio6: gpio@e6055400 {
222                         compatible = "renesas,gpio-r8a7745",
223                                      "renesas,rcar-gen2-gpio";
224                         reg = <0 0xe6055400 0 0x50>;
225                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
226                         #gpio-cells = <2>;
227                         gpio-controller;
228                         gpio-ranges = <&pfc 0 192 26>;
229                         #interrupt-cells = <2>;
230                         interrupt-controller;
231                         clocks = <&cpg CPG_MOD 905>;
232                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
233                         resets = <&cpg 905>;
234                 };
235
236                 pfc: pin-controller@e6060000 {
237                         compatible = "renesas,pfc-r8a7745";
238                         reg = <0 0xe6060000 0 0x11c>;
239                 };
240
241                 tpu: pwm@e60f0000 {
242                         compatible = "renesas,tpu-r8a7745", "renesas,tpu";
243                         reg = <0 0xe60f0000 0 0x148>;
244                         clocks = <&cpg CPG_MOD 304>;
245                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
246                         resets = <&cpg 304>;
247                         #pwm-cells = <3>;
248                         status = "disabled";
249                 };
250
251                 cpg: clock-controller@e6150000 {
252                         compatible = "renesas,r8a7745-cpg-mssr";
253                         reg = <0 0xe6150000 0 0x1000>;
254                         clocks = <&extal_clk>, <&usb_extal_clk>;
255                         clock-names = "extal", "usb_extal";
256                         #clock-cells = <2>;
257                         #power-domain-cells = <0>;
258                         #reset-cells = <1>;
259                 };
260
261                 apmu@e6151000 {
262                         compatible = "renesas,r8a7745-apmu", "renesas,apmu";
263                         reg = <0 0xe6151000 0 0x188>;
264                         cpus = <&cpu0 &cpu1>;
265                 };
266
267                 rst: reset-controller@e6160000 {
268                         compatible = "renesas,r8a7745-rst";
269                         reg = <0 0xe6160000 0 0x100>;
270                 };
271
272                 rwdt: watchdog@e6020000 {
273                         compatible = "renesas,r8a7745-wdt",
274                                      "renesas,rcar-gen2-wdt";
275                         reg = <0 0xe6020000 0 0x0c>;
276                         clocks = <&cpg CPG_MOD 402>;
277                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
278                         resets = <&cpg 402>;
279                         status = "disabled";
280                 };
281
282                 sysc: system-controller@e6180000 {
283                         compatible = "renesas,r8a7745-sysc";
284                         reg = <0 0xe6180000 0 0x200>;
285                         #power-domain-cells = <1>;
286                 };
287
288                 irqc: interrupt-controller@e61c0000 {
289                         compatible = "renesas,irqc-r8a7745", "renesas,irqc";
290                         #interrupt-cells = <2>;
291                         interrupt-controller;
292                         reg = <0 0xe61c0000 0 0x200>;
293                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
294                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
295                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
296                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
297                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
298                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
299                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
300                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
301                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
302                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
303                         clocks = <&cpg CPG_MOD 407>;
304                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
305                         resets = <&cpg 407>;
306                 };
307
308                 ipmmu_sy0: mmu@e6280000 {
309                         compatible = "renesas,ipmmu-r8a7745",
310                                      "renesas,ipmmu-vmsa";
311                         reg = <0 0xe6280000 0 0x1000>;
312                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
313                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
314                         #iommu-cells = <1>;
315                         status = "disabled";
316                 };
317
318                 ipmmu_sy1: mmu@e6290000 {
319                         compatible = "renesas,ipmmu-r8a7745",
320                                      "renesas,ipmmu-vmsa";
321                         reg = <0 0xe6290000 0 0x1000>;
322                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
323                         #iommu-cells = <1>;
324                         status = "disabled";
325                 };
326
327                 ipmmu_ds: mmu@e6740000 {
328                         compatible = "renesas,ipmmu-r8a7745",
329                                      "renesas,ipmmu-vmsa";
330                         reg = <0 0xe6740000 0 0x1000>;
331                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
332                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
333                         #iommu-cells = <1>;
334                         status = "disabled";
335                 };
336
337                 ipmmu_mp: mmu@ec680000 {
338                         compatible = "renesas,ipmmu-r8a7745",
339                                      "renesas,ipmmu-vmsa";
340                         reg = <0 0xec680000 0 0x1000>;
341                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
342                         #iommu-cells = <1>;
343                         status = "disabled";
344                 };
345
346                 ipmmu_mx: mmu@fe951000 {
347                         compatible = "renesas,ipmmu-r8a7745",
348                                      "renesas,ipmmu-vmsa";
349                         reg = <0 0xfe951000 0 0x1000>;
350                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
351                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
352                         #iommu-cells = <1>;
353                         status = "disabled";
354                 };
355
356                 ipmmu_gp: mmu@e62a0000 {
357                         compatible = "renesas,ipmmu-r8a7745",
358                                      "renesas,ipmmu-vmsa";
359                         reg = <0 0xe62a0000 0 0x1000>;
360                         interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
361                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
362                         #iommu-cells = <1>;
363                         status = "disabled";
364                 };
365
366                 icram0: sram@e63a0000 {
367                         compatible = "mmio-sram";
368                         reg = <0 0xe63a0000 0 0x12000>;
369                 };
370
371                 icram1: sram@e63c0000 {
372                         compatible = "mmio-sram";
373                         reg = <0 0xe63c0000 0 0x1000>;
374                         #address-cells = <1>;
375                         #size-cells = <1>;
376                         ranges = <0 0 0xe63c0000 0x1000>;
377
378                         smp-sram@0 {
379                                 compatible = "renesas,smp-sram";
380                                 reg = <0 0x100>;
381                         };
382                 };
383
384                 icram2: sram@e6300000 {
385                         compatible = "mmio-sram";
386                         reg = <0 0xe6300000 0 0x40000>;
387                 };
388                 i2c0: i2c@e6508000 {
389                         #address-cells = <1>;
390                         #size-cells = <0>;
391                         compatible = "renesas,i2c-r8a7745",
392                                      "renesas,rcar-gen2-i2c";
393                         reg = <0 0xe6508000 0 0x40>;
394                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
395                         clocks = <&cpg CPG_MOD 931>;
396                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
397                         resets = <&cpg 931>;
398                         i2c-scl-internal-delay-ns = <6>;
399                         status = "disabled";
400                 };
401
402                 i2c1: i2c@e6518000 {
403                         #address-cells = <1>;
404                         #size-cells = <0>;
405                         compatible = "renesas,i2c-r8a7745",
406                                      "renesas,rcar-gen2-i2c";
407                         reg = <0 0xe6518000 0 0x40>;
408                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
409                         clocks = <&cpg CPG_MOD 930>;
410                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
411                         resets = <&cpg 930>;
412                         i2c-scl-internal-delay-ns = <6>;
413                         status = "disabled";
414                 };
415
416                 i2c2: i2c@e6530000 {
417                         #address-cells = <1>;
418                         #size-cells = <0>;
419                         compatible = "renesas,i2c-r8a7745",
420                                      "renesas,rcar-gen2-i2c";
421                         reg = <0 0xe6530000 0 0x40>;
422                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
423                         clocks = <&cpg CPG_MOD 929>;
424                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
425                         resets = <&cpg 929>;
426                         i2c-scl-internal-delay-ns = <6>;
427                         status = "disabled";
428                 };
429
430                 i2c3: i2c@e6540000 {
431                         #address-cells = <1>;
432                         #size-cells = <0>;
433                         compatible = "renesas,i2c-r8a7745",
434                                      "renesas,rcar-gen2-i2c";
435                         reg = <0 0xe6540000 0 0x40>;
436                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
437                         clocks = <&cpg CPG_MOD 928>;
438                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
439                         resets = <&cpg 928>;
440                         i2c-scl-internal-delay-ns = <6>;
441                         status = "disabled";
442                 };
443
444                 i2c4: i2c@e6520000 {
445                         #address-cells = <1>;
446                         #size-cells = <0>;
447                         compatible = "renesas,i2c-r8a7745",
448                                      "renesas,rcar-gen2-i2c";
449                         reg = <0 0xe6520000 0 0x40>;
450                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
451                         clocks = <&cpg CPG_MOD 927>;
452                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
453                         resets = <&cpg 927>;
454                         i2c-scl-internal-delay-ns = <6>;
455                         status = "disabled";
456                 };
457
458                 i2c5: i2c@e6528000 {
459                         #address-cells = <1>;
460                         #size-cells = <0>;
461                         compatible = "renesas,i2c-r8a7745",
462                                      "renesas,rcar-gen2-i2c";
463                         reg = <0 0xe6528000 0 0x40>;
464                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
465                         clocks = <&cpg CPG_MOD 925>;
466                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
467                         resets = <&cpg 925>;
468                         i2c-scl-internal-delay-ns = <6>;
469                         status = "disabled";
470                 };
471
472                 iic0: i2c@e6500000 {
473                         #address-cells = <1>;
474                         #size-cells = <0>;
475                         compatible = "renesas,iic-r8a7745",
476                                      "renesas,rcar-gen2-iic",
477                                      "renesas,rmobile-iic";
478                         reg = <0 0xe6500000 0 0x425>;
479                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
480                         clocks = <&cpg CPG_MOD 318>;
481                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
482                                <&dmac1 0x61>, <&dmac1 0x62>;
483                         dma-names = "tx", "rx", "tx", "rx";
484                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
485                         resets = <&cpg 318>;
486                         status = "disabled";
487                 };
488
489                 iic1: i2c@e6510000 {
490                         #address-cells = <1>;
491                         #size-cells = <0>;
492                         compatible = "renesas,iic-r8a7745",
493                                      "renesas,rcar-gen2-iic",
494                                      "renesas,rmobile-iic";
495                         reg = <0 0xe6510000 0 0x425>;
496                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
497                         clocks = <&cpg CPG_MOD 323>;
498                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
499                                <&dmac1 0x65>, <&dmac1 0x66>;
500                         dma-names = "tx", "rx", "tx", "rx";
501                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
502                         resets = <&cpg 323>;
503                         status = "disabled";
504                 };
505
506                 hsusb: usb@e6590000 {
507                         compatible = "renesas,usbhs-r8a7745",
508                                      "renesas,rcar-gen2-usbhs";
509                         reg = <0 0xe6590000 0 0x100>;
510                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
511                         clocks = <&cpg CPG_MOD 704>;
512                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
513                                <&usb_dmac1 0>, <&usb_dmac1 1>;
514                         dma-names = "ch0", "ch1", "ch2", "ch3";
515                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
516                         resets = <&cpg 704>;
517                         renesas,buswait = <4>;
518                         phys = <&usb0 1>;
519                         phy-names = "usb";
520                         status = "disabled";
521                 };
522
523                 usbphy: usb-phy@e6590100 {
524                         compatible = "renesas,usb-phy-r8a7745",
525                                      "renesas,rcar-gen2-usb-phy";
526                         reg = <0 0xe6590100 0 0x100>;
527                         #address-cells = <1>;
528                         #size-cells = <0>;
529                         clocks = <&cpg CPG_MOD 704>;
530                         clock-names = "usbhs";
531                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
532                         resets = <&cpg 704>;
533                         status = "disabled";
534
535                         usb0: usb-channel@0 {
536                                 reg = <0>;
537                                 #phy-cells = <1>;
538                         };
539                         usb2: usb-channel@2 {
540                                 reg = <2>;
541                                 #phy-cells = <1>;
542                         };
543                 };
544
545                 usb_dmac0: dma-controller@e65a0000 {
546                         compatible = "renesas,r8a7745-usb-dmac",
547                                      "renesas,usb-dmac";
548                         reg = <0 0xe65a0000 0 0x100>;
549                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
550                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
551                         interrupt-names = "ch0", "ch1";
552                         clocks = <&cpg CPG_MOD 330>;
553                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
554                         resets = <&cpg 330>;
555                         #dma-cells = <1>;
556                         dma-channels = <2>;
557                 };
558
559                 usb_dmac1: dma-controller@e65b0000 {
560                         compatible = "renesas,r8a7745-usb-dmac",
561                                      "renesas,usb-dmac";
562                         reg = <0 0xe65b0000 0 0x100>;
563                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
564                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
565                         interrupt-names = "ch0", "ch1";
566                         clocks = <&cpg CPG_MOD 331>;
567                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
568                         resets = <&cpg 331>;
569                         #dma-cells = <1>;
570                         dma-channels = <2>;
571                 };
572
573                 dmac0: dma-controller@e6700000 {
574                         compatible = "renesas,dmac-r8a7745",
575                                      "renesas,rcar-dmac";
576                         reg = <0 0xe6700000 0 0x20000>;
577                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
578                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
579                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
580                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
581                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
582                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
583                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
584                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
585                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
586                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
587                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
588                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
589                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
590                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
591                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
592                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
593                         interrupt-names = "error",
594                                           "ch0", "ch1", "ch2", "ch3",
595                                           "ch4", "ch5", "ch6", "ch7",
596                                           "ch8", "ch9", "ch10", "ch11",
597                                           "ch12", "ch13", "ch14";
598                         clocks = <&cpg CPG_MOD 219>;
599                         clock-names = "fck";
600                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
601                         resets = <&cpg 219>;
602                         #dma-cells = <1>;
603                         dma-channels = <15>;
604                 };
605
606                 dmac1: dma-controller@e6720000 {
607                         compatible = "renesas,dmac-r8a7745",
608                                      "renesas,rcar-dmac";
609                         reg = <0 0xe6720000 0 0x20000>;
610                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
611                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
612                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
613                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
614                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
615                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
616                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
617                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
618                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
619                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
620                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
621                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
622                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
623                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
624                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
625                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
626                         interrupt-names = "error",
627                                           "ch0", "ch1", "ch2", "ch3",
628                                           "ch4", "ch5", "ch6", "ch7",
629                                           "ch8", "ch9", "ch10", "ch11",
630                                           "ch12", "ch13", "ch14";
631                         clocks = <&cpg CPG_MOD 218>;
632                         clock-names = "fck";
633                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
634                         resets = <&cpg 218>;
635                         #dma-cells = <1>;
636                         dma-channels = <15>;
637                 };
638
639                 avb: ethernet@e6800000 {
640                         compatible = "renesas,etheravb-r8a7745",
641                                      "renesas,etheravb-rcar-gen2";
642                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
643                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
644                         clocks = <&cpg CPG_MOD 812>;
645                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
646                         resets = <&cpg 812>;
647                         #address-cells = <1>;
648                         #size-cells = <0>;
649                         status = "disabled";
650                 };
651
652                 qspi: spi@e6b10000 {
653                         compatible = "renesas,qspi-r8a7745", "renesas,qspi";
654                         reg = <0 0xe6b10000 0 0x2c>;
655                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
656                         clocks = <&cpg CPG_MOD 917>;
657                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
658                                <&dmac1 0x17>, <&dmac1 0x18>;
659                         dma-names = "tx", "rx", "tx", "rx";
660                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
661                         num-cs = <1>;
662                         #address-cells = <1>;
663                         #size-cells = <0>;
664                         resets = <&cpg 917>;
665                         status = "disabled";
666                 };
667
668                 scifa0: serial@e6c40000 {
669                         compatible = "renesas,scifa-r8a7745",
670                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
671                         reg = <0 0xe6c40000 0 0x40>;
672                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
673                         clocks = <&cpg CPG_MOD 204>;
674                         clock-names = "fck";
675                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
676                                <&dmac1 0x21>, <&dmac1 0x22>;
677                         dma-names = "tx", "rx", "tx", "rx";
678                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
679                         resets = <&cpg 204>;
680                         status = "disabled";
681                 };
682
683                 scifa1: serial@e6c50000 {
684                         compatible = "renesas,scifa-r8a7745",
685                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
686                         reg = <0 0xe6c50000 0 0x40>;
687                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
688                         clocks = <&cpg CPG_MOD 203>;
689                         clock-names = "fck";
690                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
691                                <&dmac1 0x25>, <&dmac1 0x26>;
692                         dma-names = "tx", "rx", "tx", "rx";
693                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
694                         resets = <&cpg 203>;
695                         status = "disabled";
696                 };
697
698                 scifa2: serial@e6c60000 {
699                         compatible = "renesas,scifa-r8a7745",
700                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
701                         reg = <0 0xe6c60000 0 0x40>;
702                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
703                         clocks = <&cpg CPG_MOD 202>;
704                         clock-names = "fck";
705                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
706                                <&dmac1 0x27>, <&dmac1 0x28>;
707                         dma-names = "tx", "rx", "tx", "rx";
708                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
709                         resets = <&cpg 202>;
710                         status = "disabled";
711                 };
712
713                 scifa3: serial@e6c70000 {
714                         compatible = "renesas,scifa-r8a7745",
715                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
716                         reg = <0 0xe6c70000 0 0x40>;
717                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
718                         clocks = <&cpg CPG_MOD 1106>;
719                         clock-names = "fck";
720                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
721                                <&dmac1 0x1b>, <&dmac1 0x1c>;
722                         dma-names = "tx", "rx", "tx", "rx";
723                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
724                         resets = <&cpg 1106>;
725                         status = "disabled";
726                 };
727
728                 scifa4: serial@e6c78000 {
729                         compatible = "renesas,scifa-r8a7745",
730                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
731                         reg = <0 0xe6c78000 0 0x40>;
732                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
733                         clocks = <&cpg CPG_MOD 1107>;
734                         clock-names = "fck";
735                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
736                                <&dmac1 0x1f>, <&dmac1 0x20>;
737                         dma-names = "tx", "rx", "tx", "rx";
738                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
739                         resets = <&cpg 1107>;
740                         status = "disabled";
741                 };
742
743                 scifa5: serial@e6c80000 {
744                         compatible = "renesas,scifa-r8a7745",
745                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
746                         reg = <0 0xe6c80000 0 0x40>;
747                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
748                         clocks = <&cpg CPG_MOD 1108>;
749                         clock-names = "fck";
750                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
751                                <&dmac1 0x23>, <&dmac1 0x24>;
752                         dma-names = "tx", "rx", "tx", "rx";
753                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
754                         resets = <&cpg 1108>;
755                         status = "disabled";
756                 };
757
758                 scifb0: serial@e6c20000 {
759                         compatible = "renesas,scifb-r8a7745",
760                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
761                         reg = <0 0xe6c20000 0 0x100>;
762                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
763                         clocks = <&cpg CPG_MOD 206>;
764                         clock-names = "fck";
765                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
766                                <&dmac1 0x3d>, <&dmac1 0x3e>;
767                         dma-names = "tx", "rx", "tx", "rx";
768                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
769                         resets = <&cpg 206>;
770                         status = "disabled";
771                 };
772
773                 scifb1: serial@e6c30000 {
774                         compatible = "renesas,scifb-r8a7745",
775                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
776                         reg = <0 0xe6c30000 0 0x100>;
777                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
778                         clocks = <&cpg CPG_MOD 207>;
779                         clock-names = "fck";
780                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
781                                <&dmac1 0x19>, <&dmac1 0x1a>;
782                         dma-names = "tx", "rx", "tx", "rx";
783                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
784                         resets = <&cpg 207>;
785                         status = "disabled";
786                 };
787
788                 scifb2: serial@e6ce0000 {
789                         compatible = "renesas,scifb-r8a7745",
790                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
791                         reg = <0 0xe6ce0000 0 0x100>;
792                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
793                         clocks = <&cpg CPG_MOD 216>;
794                         clock-names = "fck";
795                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
796                                <&dmac1 0x1d>, <&dmac1 0x1e>;
797                         dma-names = "tx", "rx", "tx", "rx";
798                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
799                         resets = <&cpg 216>;
800                         status = "disabled";
801                 };
802
803                 scif0: serial@e6e60000 {
804                         compatible = "renesas,scif-r8a7745",
805                                      "renesas,rcar-gen2-scif", "renesas,scif";
806                         reg = <0 0xe6e60000 0 0x40>;
807                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
808                         clocks = <&cpg CPG_MOD 721>,
809                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
810                         clock-names = "fck", "brg_int", "scif_clk";
811                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
812                                <&dmac1 0x29>, <&dmac1 0x2a>;
813                         dma-names = "tx", "rx", "tx", "rx";
814                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
815                         resets = <&cpg 721>;
816                         status = "disabled";
817                 };
818
819                 scif1: serial@e6e68000 {
820                         compatible = "renesas,scif-r8a7745",
821                                      "renesas,rcar-gen2-scif", "renesas,scif";
822                         reg = <0 0xe6e68000 0 0x40>;
823                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
824                         clocks = <&cpg CPG_MOD 720>,
825                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
826                         clock-names = "fck", "brg_int", "scif_clk";
827                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
828                                <&dmac1 0x2d>, <&dmac1 0x2e>;
829                         dma-names = "tx", "rx", "tx", "rx";
830                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
831                         resets = <&cpg 720>;
832                         status = "disabled";
833                 };
834
835                 scif2: serial@e6e58000 {
836                         compatible = "renesas,scif-r8a7745",
837                                      "renesas,rcar-gen2-scif", "renesas,scif";
838                         reg = <0 0xe6e58000 0 0x40>;
839                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
840                         clocks = <&cpg CPG_MOD 719>,
841                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
842                         clock-names = "fck", "brg_int", "scif_clk";
843                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
844                                <&dmac1 0x2b>, <&dmac1 0x2c>;
845                         dma-names = "tx", "rx", "tx", "rx";
846                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
847                         resets = <&cpg 719>;
848                         status = "disabled";
849                 };
850
851                 scif3: serial@e6ea8000 {
852                         compatible = "renesas,scif-r8a7745",
853                                      "renesas,rcar-gen2-scif", "renesas,scif";
854                         reg = <0 0xe6ea8000 0 0x40>;
855                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
856                         clocks = <&cpg CPG_MOD 718>,
857                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
858                         clock-names = "fck", "brg_int", "scif_clk";
859                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
860                                <&dmac1 0x2f>, <&dmac1 0x30>;
861                         dma-names = "tx", "rx", "tx", "rx";
862                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
863                         resets = <&cpg 718>;
864                         status = "disabled";
865                 };
866
867                 scif4: serial@e6ee0000 {
868                         compatible = "renesas,scif-r8a7745",
869                                      "renesas,rcar-gen2-scif", "renesas,scif";
870                         reg = <0 0xe6ee0000 0 0x40>;
871                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
872                         clocks = <&cpg CPG_MOD 715>,
873                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
874                         clock-names = "fck", "brg_int", "scif_clk";
875                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
876                                <&dmac1 0xfb>, <&dmac1 0xfc>;
877                         dma-names = "tx", "rx", "tx", "rx";
878                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
879                         resets = <&cpg 715>;
880                         status = "disabled";
881                 };
882
883                 scif5: serial@e6ee8000 {
884                         compatible = "renesas,scif-r8a7745",
885                                      "renesas,rcar-gen2-scif", "renesas,scif";
886                         reg = <0 0xe6ee8000 0 0x40>;
887                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
888                         clocks = <&cpg CPG_MOD 714>,
889                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
890                         clock-names = "fck", "brg_int", "scif_clk";
891                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
892                                <&dmac1 0xfd>, <&dmac1 0xfe>;
893                         dma-names = "tx", "rx", "tx", "rx";
894                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
895                         resets = <&cpg 714>;
896                         status = "disabled";
897                 };
898
899                 hscif0: serial@e62c0000 {
900                         compatible = "renesas,hscif-r8a7745",
901                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
902                         reg = <0 0xe62c0000 0 0x60>;
903                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
904                         clocks = <&cpg CPG_MOD 717>,
905                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
906                         clock-names = "fck", "brg_int", "scif_clk";
907                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
908                                <&dmac1 0x39>, <&dmac1 0x3a>;
909                         dma-names = "tx", "rx", "tx", "rx";
910                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
911                         resets = <&cpg 717>;
912                         status = "disabled";
913                 };
914
915                 hscif1: serial@e62c8000 {
916                         compatible = "renesas,hscif-r8a7745",
917                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
918                         reg = <0 0xe62c8000 0 0x60>;
919                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
920                         clocks = <&cpg CPG_MOD 716>,
921                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
922                         clock-names = "fck", "brg_int", "scif_clk";
923                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
924                                <&dmac1 0x4d>, <&dmac1 0x4e>;
925                         dma-names = "tx", "rx", "tx", "rx";
926                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
927                         resets = <&cpg 716>;
928                         status = "disabled";
929                 };
930
931                 hscif2: serial@e62d0000 {
932                         compatible = "renesas,hscif-r8a7745",
933                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
934                         reg = <0 0xe62d0000 0 0x60>;
935                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
936                         clocks = <&cpg CPG_MOD 713>,
937                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
938                         clock-names = "fck", "brg_int", "scif_clk";
939                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
940                                <&dmac1 0x3b>, <&dmac1 0x3c>;
941                         dma-names = "tx", "rx", "tx", "rx";
942                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
943                         resets = <&cpg 713>;
944                         status = "disabled";
945                 };
946
947                 msiof0: spi@e6e20000 {
948                         compatible = "renesas,msiof-r8a7745",
949                                      "renesas,rcar-gen2-msiof";
950                         reg = <0 0xe6e20000 0 0x0064>;
951                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
952                         clocks = <&cpg CPG_MOD 000>;
953                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
954                                <&dmac1 0x51>, <&dmac1 0x52>;
955                         dma-names = "tx", "rx", "tx", "rx";
956                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
957                         #address-cells = <1>;
958                         #size-cells = <0>;
959                         resets = <&cpg 000>;
960                         status = "disabled";
961                 };
962
963                 msiof1: spi@e6e10000 {
964                         compatible = "renesas,msiof-r8a7745",
965                                      "renesas,rcar-gen2-msiof";
966                         reg = <0 0xe6e10000 0 0x0064>;
967                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
968                         clocks = <&cpg CPG_MOD 208>;
969                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
970                                <&dmac1 0x55>, <&dmac1 0x56>;
971                         dma-names = "tx", "rx", "tx", "rx";
972                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
973                         #address-cells = <1>;
974                         #size-cells = <0>;
975                         resets = <&cpg 208>;
976                         status = "disabled";
977                 };
978
979                 msiof2: spi@e6e00000 {
980                         compatible = "renesas,msiof-r8a7745",
981                                      "renesas,rcar-gen2-msiof";
982                         reg = <0 0xe6e00000 0 0x0064>;
983                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
984                         clocks = <&cpg CPG_MOD 205>;
985                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
986                                <&dmac1 0x41>, <&dmac1 0x42>;
987                         dma-names = "tx", "rx", "tx", "rx";
988                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
989                         #address-cells = <1>;
990                         #size-cells = <0>;
991                         resets = <&cpg 205>;
992                         status = "disabled";
993                 };
994
995                 pwm0: pwm@e6e30000 {
996                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
997                         reg = <0 0xe6e30000 0 0x8>;
998                         clocks = <&cpg CPG_MOD 523>;
999                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1000                         resets = <&cpg 523>;
1001                         #pwm-cells = <2>;
1002                         status = "disabled";
1003                 };
1004
1005                 pwm1: pwm@e6e31000 {
1006                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1007                         reg = <0 0xe6e31000 0 0x8>;
1008                         clocks = <&cpg CPG_MOD 523>;
1009                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1010                         resets = <&cpg 523>;
1011                         #pwm-cells = <2>;
1012                         status = "disabled";
1013                 };
1014
1015                 pwm2: pwm@e6e32000 {
1016                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1017                         reg = <0 0xe6e32000 0 0x8>;
1018                         clocks = <&cpg CPG_MOD 523>;
1019                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1020                         resets = <&cpg 523>;
1021                         #pwm-cells = <2>;
1022                         status = "disabled";
1023                 };
1024
1025                 pwm3: pwm@e6e33000 {
1026                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1027                         reg = <0 0xe6e33000 0 0x8>;
1028                         clocks = <&cpg CPG_MOD 523>;
1029                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1030                         resets = <&cpg 523>;
1031                         #pwm-cells = <2>;
1032                         status = "disabled";
1033                 };
1034
1035                 pwm4: pwm@e6e34000 {
1036                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1037                         reg = <0 0xe6e34000 0 0x8>;
1038                         clocks = <&cpg CPG_MOD 523>;
1039                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1040                         resets = <&cpg 523>;
1041                         #pwm-cells = <2>;
1042                         status = "disabled";
1043                 };
1044
1045                 pwm5: pwm@e6e35000 {
1046                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1047                         reg = <0 0xe6e35000 0 0x8>;
1048                         clocks = <&cpg CPG_MOD 523>;
1049                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1050                         resets = <&cpg 523>;
1051                         #pwm-cells = <2>;
1052                         status = "disabled";
1053                 };
1054
1055                 pwm6: pwm@e6e36000 {
1056                         compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1057                         reg = <0 0xe6e36000 0 0x8>;
1058                         clocks = <&cpg CPG_MOD 523>;
1059                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1060                         resets = <&cpg 523>;
1061                         #pwm-cells = <2>;
1062                         status = "disabled";
1063                 };
1064
1065                 can0: can@e6e80000 {
1066                         compatible = "renesas,can-r8a7745",
1067                                      "renesas,rcar-gen2-can";
1068                         reg = <0 0xe6e80000 0 0x1000>;
1069                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1070                         clocks = <&cpg CPG_MOD 916>,
1071                                  <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1072                                  <&can_clk>;
1073                         clock-names = "clkp1", "clkp2", "can_clk";
1074                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1075                         resets = <&cpg 916>;
1076                         status = "disabled";
1077                 };
1078
1079                 can1: can@e6e88000 {
1080                         compatible = "renesas,can-r8a7745",
1081                                      "renesas,rcar-gen2-can";
1082                         reg = <0 0xe6e88000 0 0x1000>;
1083                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1084                         clocks = <&cpg CPG_MOD 915>,
1085                                  <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1086                                  <&can_clk>;
1087                         clock-names = "clkp1", "clkp2", "can_clk";
1088                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1089                         resets = <&cpg 915>;
1090                         status = "disabled";
1091                 };
1092
1093                 vin0: video@e6ef0000 {
1094                         compatible = "renesas,vin-r8a7745",
1095                                      "renesas,rcar-gen2-vin";
1096                         reg = <0 0xe6ef0000 0 0x1000>;
1097                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1098                         clocks = <&cpg CPG_MOD 811>;
1099                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1100                         resets = <&cpg 811>;
1101                         status = "disabled";
1102                 };
1103
1104                 vin1: video@e6ef1000 {
1105                         compatible = "renesas,vin-r8a7745",
1106                                      "renesas,rcar-gen2-vin";
1107                         reg = <0 0xe6ef1000 0 0x1000>;
1108                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1109                         clocks = <&cpg CPG_MOD 810>;
1110                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1111                         resets = <&cpg 810>;
1112                         status = "disabled";
1113                 };
1114
1115                 rcar_sound: sound@ec500000 {
1116                         /*
1117                          * #sound-dai-cells is required
1118                          *
1119                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1120                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1121                          */
1122                         compatible = "renesas,rcar_sound-r8a7745",
1123                                      "renesas,rcar_sound-gen2";
1124                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1125                               <0 0xec5a0000 0 0x100>,  /* ADG */
1126                               <0 0xec540000 0 0x1000>, /* SSIU */
1127                               <0 0xec541000 0 0x280>,  /* SSI */
1128                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
1129                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1130
1131                         clocks = <&cpg CPG_MOD 1005>,
1132                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1133                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1134                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1135                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1136                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1137                                  <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1138                                  <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
1139                                  <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
1140                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1141                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1142                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1143                                  <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
1144                                  <&cpg CPG_CORE R8A7745_CLK_M2>;
1145                         clock-names = "ssi-all",
1146                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1147                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1148                                       "ssi.1", "ssi.0",
1149                                       "src.6", "src.5", "src.4", "src.3",
1150                                       "src.2", "src.1",
1151                                       "ctu.0", "ctu.1",
1152                                       "mix.0", "mix.1",
1153                                       "dvc.0", "dvc.1",
1154                                       "clk_a", "clk_b", "clk_c", "clk_i";
1155                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1156                         resets = <&cpg 1005>,
1157                                  <&cpg 1006>, <&cpg 1007>, <&cpg 1008>,
1158                                  <&cpg 1009>, <&cpg 1010>, <&cpg 1011>,
1159                                  <&cpg 1012>, <&cpg 1013>, <&cpg 1014>,
1160                                  <&cpg 1015>;
1161                         reset-names = "ssi-all",
1162                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1163                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1164                                       "ssi.1", "ssi.0";
1165
1166                         status = "disabled";
1167
1168                         rcar_sound,dvc {
1169                                 dvc0: dvc-0 {
1170                                         dmas = <&audma0 0xbc>;
1171                                         dma-names = "tx";
1172                                 };
1173                                 dvc1: dvc-1 {
1174                                         dmas = <&audma0 0xbe>;
1175                                         dma-names = "tx";
1176                                 };
1177                         };
1178
1179                         rcar_sound,mix {
1180                                 mix0: mix-0 { };
1181                                 mix1: mix-1 { };
1182                         };
1183
1184                         rcar_sound,ctu {
1185                                 ctu00: ctu-0 { };
1186                                 ctu01: ctu-1 { };
1187                                 ctu02: ctu-2 { };
1188                                 ctu03: ctu-3 { };
1189                                 ctu10: ctu-4 { };
1190                                 ctu11: ctu-5 { };
1191                                 ctu12: ctu-6 { };
1192                                 ctu13: ctu-7 { };
1193                         };
1194
1195                         rcar_sound,src {
1196                                 src-0 {
1197                                         status = "disabled";
1198                                 };
1199                                 src1: src-1 {
1200                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1201                                         dmas = <&audma0 0x87>, <&audma0 0x9c>;
1202                                         dma-names = "rx", "tx";
1203                                 };
1204                                 src2: src-2 {
1205                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1206                                         dmas = <&audma0 0x89>, <&audma0 0x9e>;
1207                                         dma-names = "rx", "tx";
1208                                 };
1209                                 src3: src-3 {
1210                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1211                                         dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1212                                         dma-names = "rx", "tx";
1213                                 };
1214                                 src4: src-4 {
1215                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1216                                         dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1217                                         dma-names = "rx", "tx";
1218                                 };
1219                                 src5: src-5 {
1220                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1221                                         dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1222                                         dma-names = "rx", "tx";
1223                                 };
1224                                 src6: src-6 {
1225                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1226                                         dmas = <&audma0 0x91>, <&audma0 0xb4>;
1227                                         dma-names = "rx", "tx";
1228                                 };
1229                         };
1230
1231                         rcar_sound,ssi {
1232                                 ssi0: ssi-0 {
1233                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1234                                         dmas = <&audma0 0x01>, <&audma0 0x02>,
1235                                                <&audma0 0x15>, <&audma0 0x16>;
1236                                         dma-names = "rx", "tx", "rxu", "txu";
1237                                 };
1238                                 ssi1: ssi-1 {
1239                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1240                                         dmas = <&audma0 0x03>, <&audma0 0x04>,
1241                                                <&audma0 0x49>, <&audma0 0x4a>;
1242                                         dma-names = "rx", "tx", "rxu", "txu";
1243                                 };
1244                                 ssi2: ssi-2 {
1245                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1246                                         dmas = <&audma0 0x05>, <&audma0 0x06>,
1247                                                <&audma0 0x63>, <&audma0 0x64>;
1248                                         dma-names = "rx", "tx", "rxu", "txu";
1249                                 };
1250                                 ssi3: ssi-3 {
1251                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1252                                         dmas = <&audma0 0x07>, <&audma0 0x08>,
1253                                                <&audma0 0x6f>, <&audma0 0x70>;
1254                                         dma-names = "rx", "tx", "rxu", "txu";
1255                                 };
1256                                 ssi4: ssi-4 {
1257                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1258                                         dmas = <&audma0 0x09>, <&audma0 0x0a>,
1259                                                <&audma0 0x71>, <&audma0 0x72>;
1260                                         dma-names = "rx", "tx", "rxu", "txu";
1261                                 };
1262                                 ssi5: ssi-5 {
1263                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1264                                         dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1265                                                <&audma0 0x73>, <&audma0 0x74>;
1266                                         dma-names = "rx", "tx", "rxu", "txu";
1267                                 };
1268                                 ssi6: ssi-6 {
1269                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1270                                         dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1271                                                <&audma0 0x75>, <&audma0 0x76>;
1272                                         dma-names = "rx", "tx", "rxu", "txu";
1273                                 };
1274                                 ssi7: ssi-7 {
1275                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1276                                         dmas = <&audma0 0x0f>, <&audma0 0x10>,
1277                                                <&audma0 0x79>, <&audma0 0x7a>;
1278                                         dma-names = "rx", "tx", "rxu", "txu";
1279                                 };
1280                                 ssi8: ssi-8 {
1281                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1282                                         dmas = <&audma0 0x11>, <&audma0 0x12>,
1283                                                <&audma0 0x7b>, <&audma0 0x7c>;
1284                                         dma-names = "rx", "tx", "rxu", "txu";
1285                                 };
1286                                 ssi9: ssi-9 {
1287                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1288                                         dmas = <&audma0 0x13>, <&audma0 0x14>,
1289                                                <&audma0 0x7d>, <&audma0 0x7e>;
1290                                         dma-names = "rx", "tx", "rxu", "txu";
1291                                 };
1292                         };
1293                 };
1294
1295                 audma0: dma-controller@ec700000 {
1296                         compatible = "renesas,dmac-r8a7745",
1297                                      "renesas,rcar-dmac";
1298                         reg = <0 0xec700000 0 0x10000>;
1299                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1300                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1301                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1302                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1303                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1304                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1305                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1306                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1307                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1308                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1309                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1310                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1311                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1312                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1313                         interrupt-names = "error",
1314                                           "ch0", "ch1", "ch2", "ch3",
1315                                           "ch4", "ch5", "ch6", "ch7",
1316                                           "ch8", "ch9", "ch10", "ch11",
1317                                           "ch12";
1318                         clocks = <&cpg CPG_MOD 502>;
1319                         clock-names = "fck";
1320                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1321                         resets = <&cpg 502>;
1322                         #dma-cells = <1>;
1323                         dma-channels = <13>;
1324                 };
1325
1326                 pci0: pci@ee090000 {
1327                         compatible = "renesas,pci-r8a7745",
1328                                      "renesas,pci-rcar-gen2";
1329                         device_type = "pci";
1330                         reg = <0 0xee090000 0 0xc00>,
1331                               <0 0xee080000 0 0x1100>;
1332                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1333                         clocks = <&cpg CPG_MOD 703>;
1334                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1335                         resets = <&cpg 703>;
1336                         status = "disabled";
1337
1338                         bus-range = <0 0>;
1339                         #address-cells = <3>;
1340                         #size-cells = <2>;
1341                         #interrupt-cells = <1>;
1342                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1343                         interrupt-map-mask = <0xff00 0 0 0x7>;
1344                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1345                                          0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1346                                          0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1347
1348                         usb@1,0 {
1349                                 reg = <0x800 0 0 0 0>;
1350                                 phys = <&usb0 0>;
1351                                 phy-names = "usb";
1352                         };
1353
1354                         usb@2,0 {
1355                                 reg = <0x1000 0 0 0 0>;
1356                                 phys = <&usb0 0>;
1357                                 phy-names = "usb";
1358                         };
1359                 };
1360
1361                 pci1: pci@ee0d0000 {
1362                         compatible = "renesas,pci-r8a7745",
1363                                      "renesas,pci-rcar-gen2";
1364                         device_type = "pci";
1365                         reg = <0 0xee0d0000 0 0xc00>,
1366                               <0 0xee0c0000 0 0x1100>;
1367                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1368                         clocks = <&cpg CPG_MOD 703>;
1369                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1370                         resets = <&cpg 703>;
1371                         status = "disabled";
1372
1373                         bus-range = <1 1>;
1374                         #address-cells = <3>;
1375                         #size-cells = <2>;
1376                         #interrupt-cells = <1>;
1377                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1378                         interrupt-map-mask = <0xff00 0 0 0x7>;
1379                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1380                                          0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1381                                          0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1382
1383                         usb@1,0 {
1384                                 reg = <0x10800 0 0 0 0>;
1385                                 phys = <&usb2 0>;
1386                                 phy-names = "usb";
1387                         };
1388
1389                         usb@2,0 {
1390                                 reg = <0x11000 0 0 0 0>;
1391                                 phys = <&usb2 0>;
1392                                 phy-names = "usb";
1393                         };
1394                 };
1395
1396                 sdhi0: sd@ee100000 {
1397                         compatible = "renesas,sdhi-r8a7745",
1398                                      "renesas,rcar-gen2-sdhi";
1399                         reg = <0 0xee100000 0 0x328>;
1400                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1401                         clocks = <&cpg CPG_MOD 314>;
1402                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1403                                <&dmac1 0xcd>, <&dmac1 0xce>;
1404                         dma-names = "tx", "rx", "tx", "rx";
1405                         max-frequency = <195000000>;
1406                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1407                         resets = <&cpg 314>;
1408                         status = "disabled";
1409                 };
1410
1411                 sdhi1: sd@ee140000 {
1412                         compatible = "renesas,sdhi-r8a7745",
1413                                      "renesas,rcar-gen2-sdhi";
1414                         reg = <0 0xee140000 0 0x100>;
1415                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1416                         clocks = <&cpg CPG_MOD 312>;
1417                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1418                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1419                         dma-names = "tx", "rx", "tx", "rx";
1420                         max-frequency = <97500000>;
1421                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1422                         resets = <&cpg 312>;
1423                         status = "disabled";
1424                 };
1425
1426                 sdhi2: sd@ee160000 {
1427                         compatible = "renesas,sdhi-r8a7745",
1428                                      "renesas,rcar-gen2-sdhi";
1429                         reg = <0 0xee160000 0 0x100>;
1430                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1431                         clocks = <&cpg CPG_MOD 311>;
1432                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1433                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1434                         dma-names = "tx", "rx", "tx", "rx";
1435                         max-frequency = <97500000>;
1436                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1437                         resets = <&cpg 311>;
1438                         status = "disabled";
1439                 };
1440
1441                 mmcif0: mmc@ee200000 {
1442                         compatible = "renesas,mmcif-r8a7745",
1443                                      "renesas,sh-mmcif";
1444                         reg = <0 0xee200000 0 0x80>;
1445                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1446                         clocks = <&cpg CPG_MOD 315>;
1447                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1448                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1449                         dma-names = "tx", "rx", "tx", "rx";
1450                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1451                         resets = <&cpg 315>;
1452                         reg-io-width = <4>;
1453                         max-frequency = <97500000>;
1454                         status = "disabled";
1455                 };
1456
1457                 ether: ethernet@ee700000 {
1458                         compatible = "renesas,ether-r8a7745",
1459                                      "renesas,rcar-gen2-ether";
1460                         reg = <0 0xee700000 0 0x400>;
1461                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1462                         clocks = <&cpg CPG_MOD 813>;
1463                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1464                         resets = <&cpg 813>;
1465                         phy-mode = "rmii";
1466                         #address-cells = <1>;
1467                         #size-cells = <0>;
1468                         status = "disabled";
1469                 };
1470
1471                 gic: interrupt-controller@f1001000 {
1472                         compatible = "arm,gic-400";
1473                         #interrupt-cells = <3>;
1474                         #address-cells = <0>;
1475                         interrupt-controller;
1476                         reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1477                               <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1478                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1479                         clocks = <&cpg CPG_MOD 408>;
1480                         clock-names = "clk";
1481                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1482                         resets = <&cpg 408>;
1483                 };
1484
1485                 vsp@fe928000 {
1486                         compatible = "renesas,vsp1";
1487                         reg = <0 0xfe928000 0 0x8000>;
1488                         interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1489                         clocks = <&cpg CPG_MOD 131>;
1490                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1491                         resets = <&cpg 131>;
1492                 };
1493
1494                 vsp@fe930000 {
1495                         compatible = "renesas,vsp1";
1496                         reg = <0 0xfe930000 0 0x8000>;
1497                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1498                         clocks = <&cpg CPG_MOD 128>;
1499                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1500                         resets = <&cpg 128>;
1501                 };
1502
1503                 du: display@feb00000 {
1504                         compatible = "renesas,du-r8a7745";
1505                         reg = <0 0xfeb00000 0 0x40000>;
1506                         reg-names = "du";
1507                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1508                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1509                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1510                         clock-names = "du.0", "du.1";
1511                         status = "disabled";
1512
1513                         ports {
1514                                 #address-cells = <1>;
1515                                 #size-cells = <0>;
1516
1517                                 port@0 {
1518                                         reg = <0>;
1519                                         du_out_rgb0: endpoint {
1520                                         };
1521                                 };
1522                                 port@1 {
1523                                         reg = <1>;
1524                                         du_out_rgb1: endpoint {
1525                                         };
1526                                 };
1527                         };
1528                 };
1529
1530                 prr: chipid@ff000044 {
1531                         compatible = "renesas,prr";
1532                         reg = <0 0xff000044 0 4>;
1533                 };
1534
1535                 cmt0: timer@ffca0000 {
1536                         compatible = "renesas,r8a7745-cmt0",
1537                                      "renesas,rcar-gen2-cmt0";
1538                         reg = <0 0xffca0000 0 0x1004>;
1539                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1540                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1541                         clocks = <&cpg CPG_MOD 124>;
1542                         clock-names = "fck";
1543                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1544                         resets = <&cpg 124>;
1545                         status = "disabled";
1546                 };
1547
1548                 cmt1: timer@e6130000 {
1549                         compatible = "renesas,r8a7745-cmt1",
1550                                      "renesas,rcar-gen2-cmt1";
1551                         reg = <0 0xe6130000 0 0x1004>;
1552                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1553                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1554                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1555                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1556                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1557                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1558                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1559                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1560                         clocks = <&cpg CPG_MOD 329>;
1561                         clock-names = "fck";
1562                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1563                         resets = <&cpg 329>;
1564                         status = "disabled";
1565                 };
1566         };
1567
1568         timer {
1569                 compatible = "arm,armv7-timer";
1570                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1571                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1572                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1573                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1574         };
1575
1576         /* External USB clock - can be overridden by the board */
1577         usb_extal_clk: usb_extal {
1578                 compatible = "fixed-clock";
1579                 #clock-cells = <0>;
1580                 clock-frequency = <48000000>;
1581         };
1582 };