arch/arm/boot/dts/r8a7743.dtsi

   1 /*
   2  * Device Tree Source for the r8a7743 SoC
   3  *
   4  * Copyright (C) 2016-2017 Cogent Embedded Inc.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2. This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
  14 #include <dt-bindings/power/r8a7743-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7743";
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 i2c3 = &i2c3;
  26                 i2c4 = &i2c4;
  27                 i2c5 = &i2c5;
  28                 i2c6 = &iic0;
  29                 i2c7 = &iic1;
  30                 i2c8 = &iic3;
  31                 spi0 = &qspi;
  32                 spi1 = &msiof0;
  33                 spi2 = &msiof1;
  34                 spi3 = &msiof2;
  35         };
  36
  37         cpus {
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40                 enable-method = "renesas,apmu";
  41
  42                 cpu0: cpu@0 {
  43                         device_type = "cpu";
  44                         compatible = "arm,cortex-a15";
  45                         reg = <0>;
  46                         clock-frequency = <1500000000>;
  47                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
  48                         clock-latency = <300000>; /* 300 us */
  49                         power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
  50                         next-level-cache = <&L2_CA15>;
  51
  52                         /* kHz - uV - OPPs unknown yet */
  53                         operating-points = <1500000 1000000>,
  54                                            <1312500 1000000>,
  55                                            <1125000 1000000>,
  56                                            < 937500 1000000>,
  57                                            < 750000 1000000>,
  58                                            < 375000 1000000>;
  59                 };
  60
  61                 cpu1: cpu@1 {
  62                         device_type = "cpu";
  63                         compatible = "arm,cortex-a15";
  64                         reg = <1>;
  65                         clock-frequency = <1500000000>;
  66                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
  67                         power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
  68                         next-level-cache = <&L2_CA15>;
  69                 };
  70
  71                 L2_CA15: cache-controller-0 {
  72                         compatible = "cache";
  73                         cache-unified;
  74                         cache-level = <2>;
  75                         power-domains = <&sysc R8A7743_PD_CA15_SCU>;
  76                 };
  77         };
  78
  79         soc {
  80                 compatible = "simple-bus";
  81                 interrupt-parent = <&gic>;
  82
  83                 #address-cells = <2>;
  84                 #size-cells = <2>;
  85                 ranges;
  86
  87                 apmu@e6152000 {
  88                         compatible = "renesas,r8a7743-apmu", "renesas,apmu";
  89                         reg = <0 0xe6152000 0 0x188>;
  90                         cpus = <&cpu0 &cpu1>;
  91                 };
  92
  93                 gic: interrupt-controller@f1001000 {
  94                         compatible = "arm,gic-400";
  95                         #interrupt-cells = <3>;
  96                         #address-cells = <0>;
  97                         interrupt-controller;
  98                         reg = <0 0xf1001000 0 0x1000>,
  99                               <0 0xf1002000 0 0x2000>,
 100                               <0 0xf1004000 0 0x2000>,
 101                               <0 0xf1006000 0 0x2000>;
 102                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
 103                                                  IRQ_TYPE_LEVEL_HIGH)>;
 104                         clocks = <&cpg CPG_MOD 408>;
 105                         clock-names = "clk";
 106                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 107                         resets = <&cpg 408>;
 108                 };
 109
 110                 gpio0: gpio@e6050000 {
 111                         compatible = "renesas,gpio-r8a7743",
 112                                      "renesas,rcar-gen2-gpio";
 113                         reg = <0 0xe6050000 0 0x50>;
 114                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 115                         #gpio-cells = <2>;
 116                         gpio-controller;
 117                         gpio-ranges = <&pfc 0 0 32>;
 118                         #interrupt-cells = <2>;
 119                         interrupt-controller;
 120                         clocks = <&cpg CPG_MOD 912>;
 121                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 122                         resets = <&cpg 912>;
 123                 };
 124
 125                 gpio1: gpio@e6051000 {
 126                         compatible = "renesas,gpio-r8a7743",
 127                                      "renesas,rcar-gen2-gpio";
 128                         reg = <0 0xe6051000 0 0x50>;
 129                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 130                         #gpio-cells = <2>;
 131                         gpio-controller;
 132                         gpio-ranges = <&pfc 0 32 26>;
 133                         #interrupt-cells = <2>;
 134                         interrupt-controller;
 135                         clocks = <&cpg CPG_MOD 911>;
 136                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 137                         resets = <&cpg 911>;
 138                 };
 139
 140                 gpio2: gpio@e6052000 {
 141                         compatible = "renesas,gpio-r8a7743",
 142                                      "renesas,rcar-gen2-gpio";
 143                         reg = <0 0xe6052000 0 0x50>;
 144                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 145                         #gpio-cells = <2>;
 146                         gpio-controller;
 147                         gpio-ranges = <&pfc 0 64 32>;
 148                         #interrupt-cells = <2>;
 149                         interrupt-controller;
 150                         clocks = <&cpg CPG_MOD 910>;
 151                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 152                         resets = <&cpg 910>;
 153                 };
 154
 155                 gpio3: gpio@e6053000 {
 156                         compatible = "renesas,gpio-r8a7743",
 157                                      "renesas,rcar-gen2-gpio";
 158                         reg = <0 0xe6053000 0 0x50>;
 159                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 160                         #gpio-cells = <2>;
 161                         gpio-controller;
 162                         gpio-ranges = <&pfc 0 96 32>;
 163                         #interrupt-cells = <2>;
 164                         interrupt-controller;
 165                         clocks = <&cpg CPG_MOD 909>;
 166                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 167                         resets = <&cpg 909>;
 168                 };
 169
 170                 gpio4: gpio@e6054000 {
 171                         compatible = "renesas,gpio-r8a7743",
 172                                      "renesas,rcar-gen2-gpio";
 173                         reg = <0 0xe6054000 0 0x50>;
 174                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 175                         #gpio-cells = <2>;
 176                         gpio-controller;
 177                         gpio-ranges = <&pfc 0 128 32>;
 178                         #interrupt-cells = <2>;
 179                         interrupt-controller;
 180                         clocks = <&cpg CPG_MOD 908>;
 181                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 182                         resets = <&cpg 908>;
 183                 };
 184
 185                 gpio5: gpio@e6055000 {
 186                         compatible = "renesas,gpio-r8a7743",
 187                                      "renesas,rcar-gen2-gpio";
 188                         reg = <0 0xe6055000 0 0x50>;
 189                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 190                         #gpio-cells = <2>;
 191                         gpio-controller;
 192                         gpio-ranges = <&pfc 0 160 32>;
 193                         #interrupt-cells = <2>;
 194                         interrupt-controller;
 195                         clocks = <&cpg CPG_MOD 907>;
 196                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 197                         resets = <&cpg 907>;
 198                 };
 199
 200                 gpio6: gpio@e6055400 {
 201                         compatible = "renesas,gpio-r8a7743",
 202                                      "renesas,rcar-gen2-gpio";
 203                         reg = <0 0xe6055400 0 0x50>;
 204                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 205                         #gpio-cells = <2>;
 206                         gpio-controller;
 207                         gpio-ranges = <&pfc 0 192 32>;
 208                         #interrupt-cells = <2>;
 209                         interrupt-controller;
 210                         clocks = <&cpg CPG_MOD 905>;
 211                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 212                         resets = <&cpg 905>;
 213                 };
 214
 215                 gpio7: gpio@e6055800 {
 216                         compatible = "renesas,gpio-r8a7743",
 217                                      "renesas,rcar-gen2-gpio";
 218                         reg = <0 0xe6055800 0 0x50>;
 219                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 220                         #gpio-cells = <2>;
 221                         gpio-controller;
 222                         gpio-ranges = <&pfc 0 224 26>;
 223                         #interrupt-cells = <2>;
 224                         interrupt-controller;
 225                         clocks = <&cpg CPG_MOD 904>;
 226                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 227                         resets = <&cpg 904>;
 228                 };
 229
 230                 irqc: interrupt-controller@e61c0000 {
 231                         compatible = "renesas,irqc-r8a7743", "renesas,irqc";
 232                         #interrupt-cells = <2>;
 233                         interrupt-controller;
 234                         reg = <0 0xe61c0000 0 0x200>;
 235                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 236                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 237                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 238                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 239                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 240                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 241                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 242                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 243                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 244                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 245                         clocks = <&cpg CPG_MOD 407>;
 246                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 247                         resets = <&cpg 407>;
 248                 };
 249
 250                 timer {
 251                         compatible = "arm,armv7-timer";
 252                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
 253                                                   IRQ_TYPE_LEVEL_LOW)>,
 254                                      <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
 255                                                   IRQ_TYPE_LEVEL_LOW)>,
 256                                      <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
 257                                                   IRQ_TYPE_LEVEL_LOW)>,
 258                                      <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
 259                                                   IRQ_TYPE_LEVEL_LOW)>;
 260                 };
 261
 262                 cpg: clock-controller@e6150000 {
 263                         compatible = "renesas,r8a7743-cpg-mssr";
 264                         reg = <0 0xe6150000 0 0x1000>;
 265                         clocks = <&extal_clk>, <&usb_extal_clk>;
 266                         clock-names = "extal", "usb_extal";
 267                         #clock-cells = <2>;
 268                         #power-domain-cells = <0>;
 269                         #reset-cells = <1>;
 270                 };
 271
 272                 prr: chipid@ff000044 {
 273                         compatible = "renesas,prr";
 274                         reg = <0 0xff000044 0 4>;
 275                 };
 276
 277                 rst: reset-controller@e6160000 {
 278                         compatible = "renesas,r8a7743-rst";
 279                         reg = <0 0xe6160000 0 0x100>;
 280                 };
 281
 282                 sysc: system-controller@e6180000 {
 283                         compatible = "renesas,r8a7743-sysc";
 284                         reg = <0 0xe6180000 0 0x200>;
 285                         #power-domain-cells = <1>;
 286                 };
 287
 288                 pfc: pin-controller@e6060000 {
 289                         compatible = "renesas,pfc-r8a7743";
 290                         reg = <0 0xe6060000 0 0x250>;
 291                 };
 292
 293                 dmac0: dma-controller@e6700000 {
 294                         compatible = "renesas,dmac-r8a7743",
 295                                      "renesas,rcar-dmac";
 296                         reg = <0 0xe6700000 0 0x20000>;
 297                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 298                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 299                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 300                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 301                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 302                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 303                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 304                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 305                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 306                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 307                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 308                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 309                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 310                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 311                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 312                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 313                         interrupt-names = "error",
 314                                         "ch0", "ch1", "ch2", "ch3",
 315                                         "ch4", "ch5", "ch6", "ch7",
 316                                         "ch8", "ch9", "ch10", "ch11",
 317                                         "ch12", "ch13", "ch14";
 318                         clocks = <&cpg CPG_MOD 219>;
 319                         clock-names = "fck";
 320                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 321                         resets = <&cpg 219>;
 322                         #dma-cells = <1>;
 323                         dma-channels = <15>;
 324                 };
 325
 326                 dmac1: dma-controller@e6720000 {
 327                         compatible = "renesas,dmac-r8a7743",
 328                                      "renesas,rcar-dmac";
 329                         reg = <0 0xe6720000 0 0x20000>;
 330                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 331                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 332                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 333                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 334                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 335                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 336                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 337                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 338                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 339                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 340                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 341                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 342                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 343                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 344                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 345                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 346                         interrupt-names = "error",
 347                                         "ch0", "ch1", "ch2", "ch3",
 348                                         "ch4", "ch5", "ch6", "ch7",
 349                                         "ch8", "ch9", "ch10", "ch11",
 350                                         "ch12", "ch13", "ch14";
 351                         clocks = <&cpg CPG_MOD 218>;
 352                         clock-names = "fck";
 353                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 354                         resets = <&cpg 218>;
 355                         #dma-cells = <1>;
 356                         dma-channels = <15>;
 357                 };
 358
 359                 usb_dmac0: dma-controller@e65a0000 {
 360                         compatible = "renesas,r8a7743-usb-dmac",
 361                                      "renesas,usb-dmac";
 362                         reg = <0 0xe65a0000 0 0x100>;
 363                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 364                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 365                         interrupt-names = "ch0", "ch1";
 366                         clocks = <&cpg CPG_MOD 330>;
 367                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 368                         resets = <&cpg 330>;
 369                         #dma-cells = <1>;
 370                         dma-channels = <2>;
 371                 };
 372
 373                 usb_dmac1: dma-controller@e65b0000 {
 374                         compatible = "renesas,r8a7743-usb-dmac",
 375                                      "renesas,usb-dmac";
 376                         reg = <0 0xe65b0000 0 0x100>;
 377                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 378                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 379                         interrupt-names = "ch0", "ch1";
 380                         clocks = <&cpg CPG_MOD 331>;
 381                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 382                         resets = <&cpg 331>;
 383                         #dma-cells = <1>;
 384                         dma-channels = <2>;
 385                 };
 386
 387                 /* The memory map in the User's Manual maps the cores to bus
 388                  *  numbers
 389                  */
 390                 i2c0: i2c@e6508000 {
 391                         #address-cells = <1>;
 392                         #size-cells = <0>;
 393                         compatible = "renesas,i2c-r8a7743",
 394                                      "renesas,rcar-gen2-i2c";
 395                         reg = <0 0xe6508000 0 0x40>;
 396                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 397                         clocks = <&cpg CPG_MOD 931>;
 398                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 399                         resets = <&cpg 931>;
 400                         i2c-scl-internal-delay-ns = <6>;
 401                         status = "disabled";
 402                 };
 403
 404                 i2c1: i2c@e6518000 {
 405                         #address-cells = <1>;
 406                         #size-cells = <0>;
 407                         compatible = "renesas,i2c-r8a7743",
 408                                      "renesas,rcar-gen2-i2c";
 409                         reg = <0 0xe6518000 0 0x40>;
 410                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 411                         clocks = <&cpg CPG_MOD 930>;
 412                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 413                         resets = <&cpg 930>;
 414                         i2c-scl-internal-delay-ns = <6>;
 415                         status = "disabled";
 416                 };
 417
 418                 i2c2: i2c@e6530000 {
 419                         #address-cells = <1>;
 420                         #size-cells = <0>;
 421                         compatible = "renesas,i2c-r8a7743",
 422                                      "renesas,rcar-gen2-i2c";
 423                         reg = <0 0xe6530000 0 0x40>;
 424                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 425                         clocks = <&cpg CPG_MOD 929>;
 426                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 427                         resets = <&cpg 929>;
 428                         i2c-scl-internal-delay-ns = <6>;
 429                         status = "disabled";
 430                 };
 431
 432                 i2c3: i2c@e6540000 {
 433                         #address-cells = <1>;
 434                         #size-cells = <0>;
 435                         compatible = "renesas,i2c-r8a7743",
 436                                      "renesas,rcar-gen2-i2c";
 437                         reg = <0 0xe6540000 0 0x40>;
 438                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 439                         clocks = <&cpg CPG_MOD 928>;
 440                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 441                         resets = <&cpg 928>;
 442                         i2c-scl-internal-delay-ns = <6>;
 443                         status = "disabled";
 444                 };
 445
 446                 i2c4: i2c@e6520000 {
 447                         #address-cells = <1>;
 448                         #size-cells = <0>;
 449                         compatible = "renesas,i2c-r8a7743",
 450                                      "renesas,rcar-gen2-i2c";
 451                         reg = <0 0xe6520000 0 0x40>;
 452                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 453                         clocks = <&cpg CPG_MOD 927>;
 454                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 455                         resets = <&cpg 927>;
 456                         i2c-scl-internal-delay-ns = <6>;
 457                         status = "disabled";
 458                 };
 459
 460                 i2c5: i2c@e6528000 {
 461                         /* doesn't need pinmux */
 462                         #address-cells = <1>;
 463                         #size-cells = <0>;
 464                         compatible = "renesas,i2c-r8a7743",
 465                                      "renesas,rcar-gen2-i2c";
 466                         reg = <0 0xe6528000 0 0x40>;
 467                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 468                         clocks = <&cpg CPG_MOD 925>;
 469                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 470                         resets = <&cpg 925>;
 471                         i2c-scl-internal-delay-ns = <110>;
 472                         status = "disabled";
 473                 };
 474
 475                 iic0: i2c@e6500000 {
 476                         #address-cells = <1>;
 477                         #size-cells = <0>;
 478                         compatible = "renesas,iic-r8a7743",
 479                                      "renesas,rcar-gen2-iic",
 480                                      "renesas,rmobile-iic";
 481                         reg = <0 0xe6500000 0 0x425>;
 482                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 483                         clocks = <&cpg CPG_MOD 318>;
 484                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 485                                <&dmac1 0x61>, <&dmac1 0x62>;
 486                         dma-names = "tx", "rx", "tx", "rx";
 487                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 488                         resets = <&cpg 318>;
 489                         status = "disabled";
 490                 };
 491
 492                 iic1: i2c@e6510000 {
 493                         #address-cells = <1>;
 494                         #size-cells = <0>;
 495                         compatible = "renesas,iic-r8a7743",
 496                                      "renesas,rcar-gen2-iic",
 497                                      "renesas,rmobile-iic";
 498                         reg = <0 0xe6510000 0 0x425>;
 499                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 500                         clocks = <&cpg CPG_MOD 323>;
 501                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 502                                <&dmac1 0x65>, <&dmac1 0x66>;
 503                         dma-names = "tx", "rx", "tx", "rx";
 504                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 505                         resets = <&cpg 323>;
 506                         status = "disabled";
 507                 };
 508
 509                 iic3: i2c@e60b0000 {
 510                         /* doesn't need pinmux */
 511                         #address-cells = <1>;
 512                         #size-cells = <0>;
 513                         compatible = "renesas,iic-r8a7743",
 514                                      "renesas,rcar-gen2-iic",
 515                                      "renesas,rmobile-iic";
 516                         reg = <0 0xe60b0000 0 0x425>;
 517                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 518                         clocks = <&cpg CPG_MOD 926>;
 519                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 520                                <&dmac1 0x77>, <&dmac1 0x78>;
 521                         dma-names = "tx", "rx", "tx", "rx";
 522                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 523                         resets = <&cpg 926>;
 524                         status = "disabled";
 525                 };
 526
 527                 scifa0: serial@e6c40000 {
 528                         compatible = "renesas,scifa-r8a7743",
 529                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 530                         reg = <0 0xe6c40000 0 0x40>;
 531                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 532                         clocks = <&cpg CPG_MOD 204>;
 533                         clock-names = "fck";
 534                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 535                                <&dmac1 0x21>, <&dmac1 0x22>;
 536                         dma-names = "tx", "rx", "tx", "rx";
 537                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 538                         resets = <&cpg 204>;
 539                         status = "disabled";
 540                 };
 541
 542                 scifa1: serial@e6c50000 {
 543                         compatible = "renesas,scifa-r8a7743",
 544                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 545                         reg = <0 0xe6c50000 0 0x40>;
 546                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 547                         clocks = <&cpg CPG_MOD 203>;
 548                         clock-names = "fck";
 549                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 550                                <&dmac1 0x25>, <&dmac1 0x26>;
 551                         dma-names = "tx", "rx", "tx", "rx";
 552                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 553                         resets = <&cpg 203>;
 554                         status = "disabled";
 555                 };
 556
 557                 scifa2: serial@e6c60000 {
 558                         compatible = "renesas,scifa-r8a7743",
 559                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 560                         reg = <0 0xe6c60000 0 0x40>;
 561                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 562                         clocks = <&cpg CPG_MOD 202>;
 563                         clock-names = "fck";
 564                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 565                                <&dmac1 0x27>, <&dmac1 0x28>;
 566                         dma-names = "tx", "rx", "tx", "rx";
 567                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 568                         resets = <&cpg 202>;
 569                         status = "disabled";
 570                 };
 571
 572                 scifa3: serial@e6c70000 {
 573                         compatible = "renesas,scifa-r8a7743",
 574                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 575                         reg = <0 0xe6c70000 0 0x40>;
 576                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 577                         clocks = <&cpg CPG_MOD 1106>;
 578                         clock-names = "fck";
 579                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 580                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 581                         dma-names = "tx", "rx", "tx", "rx";
 582                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 583                         resets = <&cpg 1106>;
 584                         status = "disabled";
 585                 };
 586
 587                 scifa4: serial@e6c78000 {
 588                         compatible = "renesas,scifa-r8a7743",
 589                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 590                         reg = <0 0xe6c78000 0 0x40>;
 591                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 592                         clocks = <&cpg CPG_MOD 1107>;
 593                         clock-names = "fck";
 594                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 595                                <&dmac1 0x1f>, <&dmac1 0x20>;
 596                         dma-names = "tx", "rx", "tx", "rx";
 597                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 598                         resets = <&cpg 1107>;
 599                         status = "disabled";
 600                 };
 601
 602                 scifa5: serial@e6c80000 {
 603                         compatible = "renesas,scifa-r8a7743",
 604                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 605                         reg = <0 0xe6c80000 0 0x40>;
 606                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 607                         clocks = <&cpg CPG_MOD 1108>;
 608                         clock-names = "fck";
 609                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 610                                <&dmac1 0x23>, <&dmac1 0x24>;
 611                         dma-names = "tx", "rx", "tx", "rx";
 612                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 613                         resets = <&cpg 1108>;
 614                         status = "disabled";
 615                 };
 616
 617                 scifb0: serial@e6c20000 {
 618                         compatible = "renesas,scifb-r8a7743",
 619                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 620                         reg = <0 0xe6c20000 0 0x100>;
 621                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 622                         clocks = <&cpg CPG_MOD 206>;
 623                         clock-names = "fck";
 624                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 625                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 626                         dma-names = "tx", "rx", "tx", "rx";
 627                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 628                         resets = <&cpg 206>;
 629                         status = "disabled";
 630                 };
 631
 632                 scifb1: serial@e6c30000 {
 633                         compatible = "renesas,scifb-r8a7743",
 634                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 635                         reg = <0 0xe6c30000 0 0x100>;
 636                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 637                         clocks = <&cpg CPG_MOD 207>;
 638                         clock-names = "fck";
 639                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 640                                <&dmac1 0x19>, <&dmac1 0x1a>;
 641                         dma-names = "tx", "rx", "tx", "rx";
 642                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 643                         resets = <&cpg 207>;
 644                         status = "disabled";
 645                 };
 646
 647                 scifb2: serial@e6ce0000 {
 648                         compatible = "renesas,scifb-r8a7743",
 649                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 650                         reg = <0 0xe6ce0000 0 0x100>;
 651                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 652                         clocks = <&cpg CPG_MOD 216>;
 653                         clock-names = "fck";
 654                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 655                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 656                         dma-names = "tx", "rx", "tx", "rx";
 657                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 658                         resets = <&cpg 216>;
 659                         status = "disabled";
 660                 };
 661
 662                 scif0: serial@e6e60000 {
 663                         compatible = "renesas,scif-r8a7743",
 664                                      "renesas,rcar-gen2-scif", "renesas,scif";
 665                         reg = <0 0xe6e60000 0 0x40>;
 666                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 667                         clocks = <&cpg CPG_MOD 721>,
 668                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 669                         clock-names = "fck", "brg_int", "scif_clk";
 670                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 671                                <&dmac1 0x29>, <&dmac1 0x2a>;
 672                         dma-names = "tx", "rx", "tx", "rx";
 673                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 674                         resets = <&cpg 721>;
 675                         status = "disabled";
 676                 };
 677
 678                 scif1: serial@e6e68000 {
 679                         compatible = "renesas,scif-r8a7743",
 680                                      "renesas,rcar-gen2-scif", "renesas,scif";
 681                         reg = <0 0xe6e68000 0 0x40>;
 682                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 683                         clocks = <&cpg CPG_MOD 720>,
 684                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 685                         clock-names = "fck", "brg_int", "scif_clk";
 686                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 687                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 688                         dma-names = "tx", "rx", "tx", "rx";
 689                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 690                         resets = <&cpg 720>;
 691                         status = "disabled";
 692                 };
 693
 694                 scif2: serial@e6e58000 {
 695                         compatible = "renesas,scif-r8a7743",
 696                                      "renesas,rcar-gen2-scif", "renesas,scif";
 697                         reg = <0 0xe6e58000 0 0x40>;
 698                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 699                         clocks = <&cpg CPG_MOD 719>,
 700                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 701                         clock-names = "fck", "brg_int", "scif_clk";
 702                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 703                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 704                         dma-names = "tx", "rx", "tx", "rx";
 705                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 706                         resets = <&cpg 719>;
 707                         status = "disabled";
 708                 };
 709
 710                 scif3: serial@e6ea8000 {
 711                         compatible = "renesas,scif-r8a7743",
 712                                      "renesas,rcar-gen2-scif", "renesas,scif";
 713                         reg = <0 0xe6ea8000 0 0x40>;
 714                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 715                         clocks = <&cpg CPG_MOD 718>,
 716                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 717                         clock-names = "fck", "brg_int", "scif_clk";
 718                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 719                                <&dmac1 0x2f>, <&dmac1 0x30>;
 720                         dma-names = "tx", "rx", "tx", "rx";
 721                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 722                         resets = <&cpg 718>;
 723                         status = "disabled";
 724                 };
 725
 726                 scif4: serial@e6ee0000 {
 727                         compatible = "renesas,scif-r8a7743",
 728                                      "renesas,rcar-gen2-scif", "renesas,scif";
 729                         reg = <0 0xe6ee0000 0 0x40>;
 730                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 731                         clocks = <&cpg CPG_MOD 715>,
 732                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 733                         clock-names = "fck", "brg_int", "scif_clk";
 734                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 735                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 736                         dma-names = "tx", "rx", "tx", "rx";
 737                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 738                         resets = <&cpg 715>;
 739                         status = "disabled";
 740                 };
 741
 742                 scif5: serial@e6ee8000 {
 743                         compatible = "renesas,scif-r8a7743",
 744                                      "renesas,rcar-gen2-scif", "renesas,scif";
 745                         reg = <0 0xe6ee8000 0 0x40>;
 746                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 747                         clocks = <&cpg CPG_MOD 714>,
 748                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 749                         clock-names = "fck", "brg_int", "scif_clk";
 750                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 751                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 752                         dma-names = "tx", "rx", "tx", "rx";
 753                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 754                         resets = <&cpg 714>;
 755                         status = "disabled";
 756                 };
 757
 758                 hscif0: serial@e62c0000 {
 759                         compatible = "renesas,hscif-r8a7743",
 760                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 761                         reg = <0 0xe62c0000 0 0x60>;
 762                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 763                         clocks = <&cpg CPG_MOD 717>,
 764                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 765                         clock-names = "fck", "brg_int", "scif_clk";
 766                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 767                                <&dmac1 0x39>, <&dmac1 0x3a>;
 768                         dma-names = "tx", "rx", "tx", "rx";
 769                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 770                         resets = <&cpg 717>;
 771                         status = "disabled";
 772                 };
 773
 774                 hscif1: serial@e62c8000 {
 775                         compatible = "renesas,hscif-r8a7743",
 776                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 777                         reg = <0 0xe62c8000 0 0x60>;
 778                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 779                         clocks = <&cpg CPG_MOD 716>,
 780                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 781                         clock-names = "fck", "brg_int", "scif_clk";
 782                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 783                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 784                         dma-names = "tx", "rx", "tx", "rx";
 785                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 786                         resets = <&cpg 716>;
 787                         status = "disabled";
 788                 };
 789
 790                 hscif2: serial@e62d0000 {
 791                         compatible = "renesas,hscif-r8a7743",
 792                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 793                         reg = <0 0xe62d0000 0 0x60>;
 794                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 795                         clocks = <&cpg CPG_MOD 713>,
 796                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 797                         clock-names = "fck", "brg_int", "scif_clk";
 798                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 799                                <&dmac1 0x3b>, <&dmac1 0x3c>;
 800                         dma-names = "tx", "rx", "tx", "rx";
 801                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 802                         resets = <&cpg 713>;
 803                         status = "disabled";
 804                 };
 805
 806                 icram2: sram@e6300000 {
 807                         compatible = "mmio-sram";
 808                         reg = <0 0xe6300000 0 0x40000>;
 809                 };
 810
 811                 icram0: sram@e63a0000 {
 812                         compatible = "mmio-sram";
 813                         reg = <0 0xe63a0000 0 0x12000>;
 814                 };
 815
 816                 icram1: sram@e63c0000 {
 817                         compatible = "mmio-sram";
 818                         reg = <0 0xe63c0000 0 0x1000>;
 819                         #address-cells = <1>;
 820                         #size-cells = <1>;
 821                         ranges = <0 0 0xe63c0000 0x1000>;
 822
 823                         smp-sram@0 {
 824                                 compatible = "renesas,smp-sram";
 825                                 reg = <0 0x10>;
 826                         };
 827                 };
 828
 829                 ether: ethernet@ee700000 {
 830                         compatible = "renesas,ether-r8a7743";
 831                         reg = <0 0xee700000 0 0x400>;
 832                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 833                         clocks = <&cpg CPG_MOD 813>;
 834                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 835                         resets = <&cpg 813>;
 836                         phy-mode = "rmii";
 837                         #address-cells = <1>;
 838                         #size-cells = <0>;
 839                         status = "disabled";
 840                 };
 841
 842                 avb: ethernet@e6800000 {
 843                         compatible = "renesas,etheravb-r8a7743",
 844                                      "renesas,etheravb-rcar-gen2";
 845                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 846                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 847                         clocks = <&cpg CPG_MOD 812>;
 848                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 849                         resets = <&cpg 812>;
 850                         #address-cells = <1>;
 851                         #size-cells = <0>;
 852                         status = "disabled";
 853                 };
 854
 855                 mmcif0: mmc@ee200000 {
 856                         compatible = "renesas,mmcif-r8a7743",
 857                                      "renesas,sh-mmcif";
 858                         reg = <0 0xee200000 0 0x80>;
 859                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 860                         clocks = <&cpg CPG_MOD 315>;
 861                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 862                                <&dmac1 0xd1>, <&dmac1 0xd2>;
 863                         dma-names = "tx", "rx", "tx", "rx";
 864                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 865                         resets = <&cpg 315>;
 866                         reg-io-width = <4>;
 867                         max-frequency = <97500000>;
 868                         status = "disabled";
 869                 };
 870
 871                 qspi: spi@e6b10000 {
 872                         compatible = "renesas,qspi-r8a7743", "renesas,qspi";
 873                         reg = <0 0xe6b10000 0 0x2c>;
 874                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 875                         clocks = <&cpg CPG_MOD 917>;
 876                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 877                                <&dmac1 0x17>, <&dmac1 0x18>;
 878                         dma-names = "tx", "rx", "tx", "rx";
 879                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 880                         num-cs = <1>;
 881                         #address-cells = <1>;
 882                         #size-cells = <0>;
 883                         resets = <&cpg 917>;
 884                         status = "disabled";
 885                 };
 886
 887                 msiof0: spi@e6e20000 {
 888                         compatible = "renesas,msiof-r8a7743",
 889                                      "renesas,rcar-gen2-msiof";
 890                         reg = <0 0xe6e20000 0 0x0064>;
 891                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 892                         clocks = <&cpg CPG_MOD 000>;
 893                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
 894                                <&dmac1 0x51>, <&dmac1 0x52>;
 895                         dma-names = "tx", "rx", "tx", "rx";
 896                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 897                         #address-cells = <1>;
 898                         #size-cells = <0>;
 899                         resets = <&cpg 000>;
 900                         status = "disabled";
 901                 };
 902
 903                 msiof1: spi@e6e10000 {
 904                         compatible = "renesas,msiof-r8a7743",
 905                                      "renesas,rcar-gen2-msiof";
 906                         reg = <0 0xe6e10000 0 0x0064>;
 907                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 908                         clocks = <&cpg CPG_MOD 208>;
 909                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
 910                                <&dmac1 0x55>, <&dmac1 0x56>;
 911                         dma-names = "tx", "rx", "tx", "rx";
 912                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 913                         #address-cells = <1>;
 914                         #size-cells = <0>;
 915                         resets = <&cpg 208>;
 916                         status = "disabled";
 917                 };
 918
 919                 msiof2: spi@e6e00000 {
 920                         compatible = "renesas,msiof-r8a7743",
 921                                      "renesas,rcar-gen2-msiof";
 922                         reg = <0 0xe6e00000 0 0x0064>;
 923                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 924                         clocks = <&cpg CPG_MOD 205>;
 925                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
 926                                <&dmac1 0x41>, <&dmac1 0x42>;
 927                         dma-names = "tx", "rx", "tx", "rx";
 928                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 929                         #address-cells = <1>;
 930                         #size-cells = <0>;
 931                         resets = <&cpg 205>;
 932                         status = "disabled";
 933                 };
 934
 935                 /*
 936                  * pci1 and xhci share the same phy, therefore only one of them
 937                  * can be active at any one time. If both of them are enabled,
 938                  * a race condition will determine who'll control the phy.
 939                  * A firmware file is needed by the xhci driver in order for
 940                  * USB 3.0 to work properly.
 941                  */
 942                 xhci: usb@ee000000 {
 943                         compatible = "renesas,xhci-r8a7743",
 944                                      "renesas,rcar-gen2-xhci";
 945                         reg = <0 0xee000000 0 0xc00>;
 946                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
 947                         clocks = <&cpg CPG_MOD 328>;
 948                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 949                         resets = <&cpg 328>;
 950                         phys = <&usb2 1>;
 951                         phy-names = "usb";
 952                         status = "disabled";
 953                 };
 954
 955                 sdhi0: sd@ee100000 {
 956                         compatible = "renesas,sdhi-r8a7743";
 957                         reg = <0 0xee100000 0 0x328>;
 958                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 959                         clocks = <&cpg CPG_MOD 314>;
 960                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 961                                <&dmac1 0xcd>, <&dmac1 0xce>;
 962                         dma-names = "tx", "rx", "tx", "rx";
 963                         max-frequency = <195000000>;
 964                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 965                         resets = <&cpg 314>;
 966                         status = "disabled";
 967                 };
 968
 969                 sdhi1: sd@ee140000 {
 970                         compatible = "renesas,sdhi-r8a7743";
 971                         reg = <0 0xee140000 0 0x100>;
 972                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 973                         clocks = <&cpg CPG_MOD 312>;
 974                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 975                                <&dmac1 0xc1>, <&dmac1 0xc2>;
 976                         dma-names = "tx", "rx", "tx", "rx";
 977                         max-frequency = <97500000>;
 978                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 979                         resets = <&cpg 312>;
 980                         status = "disabled";
 981                 };
 982
 983                 sdhi2: sd@ee160000 {
 984                         compatible = "renesas,sdhi-r8a7743";
 985                         reg = <0 0xee160000 0 0x100>;
 986                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 987                         clocks = <&cpg CPG_MOD 311>;
 988                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 989                                <&dmac1 0xd3>, <&dmac1 0xd4>;
 990                         dma-names = "tx", "rx", "tx", "rx";
 991                         max-frequency = <97500000>;
 992                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 993                         resets = <&cpg 311>;
 994                         status = "disabled";
 995                 };
 996
 997                 hsusb: usb@e6590000 {
 998                         compatible = "renesas,usbhs-r8a7743",
 999                                      "renesas,rcar-gen2-usbhs";
1000                         reg = <0 0xe6590000 0 0x100>;
1001                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1002                         clocks = <&cpg CPG_MOD 704>;
1003                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1004                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1005                         dma-names = "ch0", "ch1", "ch2", "ch3";
1006                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1007                         resets = <&cpg 704>;
1008                         renesas,buswait = <4>;
1009                         phys = <&usb0 1>;
1010                         phy-names = "usb";
1011                         status = "disabled";
1012                 };
1013
1014                 usbphy: usb-phy@e6590100 {
1015                         compatible = "renesas,usb-phy-r8a7743",
1016                                      "renesas,rcar-gen2-usb-phy";
1017                         reg = <0 0xe6590100 0 0x100>;
1018                         #address-cells = <1>;
1019                         #size-cells = <0>;
1020                         clocks = <&cpg CPG_MOD 704>;
1021                         clock-names = "usbhs";
1022                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1023                         resets = <&cpg 704>;
1024                         status = "disabled";
1025
1026                         usb0: usb-channel@0 {
1027                                 reg = <0>;
1028                                 #phy-cells = <1>;
1029                         };
1030                         usb2: usb-channel@2 {
1031                                 reg = <2>;
1032                                 #phy-cells = <1>;
1033                         };
1034                 };
1035
1036                 pci0: pci@ee090000 {
1037                         compatible = "renesas,pci-r8a7743",
1038                                      "renesas,pci-rcar-gen2";
1039                         device_type = "pci";
1040                         reg = <0 0xee090000 0 0xc00>,
1041                               <0 0xee080000 0 0x1100>;
1042                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1043                         clocks = <&cpg CPG_MOD 703>;
1044                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1045                         resets = <&cpg 703>;
1046                         status = "disabled";
1047
1048                         bus-range = <0 0>;
1049                         #address-cells = <3>;
1050                         #size-cells = <2>;
1051                         #interrupt-cells = <1>;
1052                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1053                         interrupt-map-mask = <0xff00 0 0 0x7>;
1054                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1055                                          0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1056                                          0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1057
1058                         usb@1,0 {
1059                                 reg = <0x800 0 0 0 0>;
1060                                 phys = <&usb0 0>;
1061                                 phy-names = "usb";
1062                         };
1063
1064                         usb@2,0 {
1065                                 reg = <0x1000 0 0 0 0>;
1066                                 phys = <&usb0 0>;
1067                                 phy-names = "usb";
1068                         };
1069                 };
1070
1071                 pci1: pci@ee0d0000 {
1072                         compatible = "renesas,pci-r8a7743",
1073                                      "renesas,pci-rcar-gen2";
1074                         device_type = "pci";
1075                         reg = <0 0xee0d0000 0 0xc00>,
1076                               <0 0xee0c0000 0 0x1100>;
1077                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1078                         clocks = <&cpg CPG_MOD 703>;
1079                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1080                         resets = <&cpg 703>;
1081                         status = "disabled";
1082
1083                         bus-range = <1 1>;
1084                         #address-cells = <3>;
1085                         #size-cells = <2>;
1086                         #interrupt-cells = <1>;
1087                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1088                         interrupt-map-mask = <0xff00 0 0 0x7>;
1089                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1090                                          0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1091                                          0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1092
1093                         usb@1,0 {
1094                                 reg = <0x10800 0 0 0 0>;
1095                                 phys = <&usb2 0>;
1096                                 phy-names = "usb";
1097                         };
1098
1099                         usb@2,0 {
1100                                 reg = <0x11000 0 0 0 0>;
1101                                 phys = <&usb2 0>;
1102                                 phy-names = "usb";
1103                         };
1104                 };
1105         };
1106
1107         /* External root clock */
1108         extal_clk: extal {
1109                 compatible = "fixed-clock";
1110                 #clock-cells = <0>;
1111                 /* This value must be overridden by the board. */
1112                 clock-frequency = <0>;
1113         };
1114
1115         /* External USB clock - can be overridden by the board */
1116         usb_extal_clk: usb_extal {
1117                 compatible = "fixed-clock";
1118                 #clock-cells = <0>;
1119                 clock-frequency = <48000000>;
1120         };
1121
1122         /* External SCIF clock */
1123         scif_clk: scif {
1124                 compatible = "fixed-clock";
1125                 #clock-cells = <0>;
1126                 /* This value must be overridden by the board. */
1127                 clock-frequency = <0>;
1128         };
1129 };