Merge tag 'rpmsg-v4.16' of git://github.com/andersson/remoteproc
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / r8a7743.dtsi
1 /*
2  * Device Tree Source for the r8a7743 SoC
3  *
4  * Copyright (C) 2016-2017 Cogent Embedded Inc.
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2. This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
14 #include <dt-bindings/power/r8a7743-sysc.h>
15
16 / {
17         compatible = "renesas,r8a7743";
18         #address-cells = <2>;
19         #size-cells = <2>;
20
21         aliases {
22                 i2c0 = &i2c0;
23                 i2c1 = &i2c1;
24                 i2c2 = &i2c2;
25                 i2c3 = &i2c3;
26                 i2c4 = &i2c4;
27                 i2c5 = &i2c5;
28                 i2c6 = &iic0;
29                 i2c7 = &iic1;
30                 i2c8 = &iic3;
31                 spi0 = &qspi;
32                 spi1 = &msiof0;
33                 spi2 = &msiof1;
34                 spi3 = &msiof2;
35                 vin0 = &vin0;
36                 vin1 = &vin1;
37                 vin2 = &vin2;
38         };
39
40         /*
41          * The external audio clocks are configured as 0 Hz fixed frequency
42          * clocks by default.
43          * Boards that provide audio clocks should override them.
44          */
45         audio_clk_a: audio_clk_a {
46                 compatible = "fixed-clock";
47                 #clock-cells = <0>;
48                 clock-frequency = <0>;
49         };
50
51         audio_clk_b: audio_clk_b {
52                 compatible = "fixed-clock";
53                 #clock-cells = <0>;
54                 clock-frequency = <0>;
55         };
56
57         audio_clk_c: audio_clk_c {
58                 compatible = "fixed-clock";
59                 #clock-cells = <0>;
60                 clock-frequency = <0>;
61         };
62
63         /* External CAN clock */
64         can_clk: can {
65                 compatible = "fixed-clock";
66                 #clock-cells = <0>;
67                 /* This value must be overridden by the board. */
68                 clock-frequency = <0>;
69         };
70
71         cpus {
72                 #address-cells = <1>;
73                 #size-cells = <0>;
74                 enable-method = "renesas,apmu";
75
76                 cpu0: cpu@0 {
77                         device_type = "cpu";
78                         compatible = "arm,cortex-a15";
79                         reg = <0>;
80                         clock-frequency = <1500000000>;
81                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
82                         clock-latency = <300000>; /* 300 us */
83                         power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
84                         next-level-cache = <&L2_CA15>;
85
86                         /* kHz - uV - OPPs unknown yet */
87                         operating-points = <1500000 1000000>,
88                                            <1312500 1000000>,
89                                            <1125000 1000000>,
90                                            < 937500 1000000>,
91                                            < 750000 1000000>,
92                                            < 375000 1000000>;
93                 };
94
95                 cpu1: cpu@1 {
96                         device_type = "cpu";
97                         compatible = "arm,cortex-a15";
98                         reg = <1>;
99                         clock-frequency = <1500000000>;
100                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
101                         power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
102                         next-level-cache = <&L2_CA15>;
103                 };
104
105                 L2_CA15: cache-controller-0 {
106                         compatible = "cache";
107                         cache-unified;
108                         cache-level = <2>;
109                         power-domains = <&sysc R8A7743_PD_CA15_SCU>;
110                 };
111         };
112
113         /* External root clock */
114         extal_clk: extal {
115                 compatible = "fixed-clock";
116                 #clock-cells = <0>;
117                 /* This value must be overridden by the board. */
118                 clock-frequency = <0>;
119         };
120
121         /* External PCIe clock - can be overridden by the board */
122         pcie_bus_clk: pcie_bus {
123                 compatible = "fixed-clock";
124                 #clock-cells = <0>;
125                 clock-frequency = <0>;
126         };
127
128         /* External SCIF clock */
129         scif_clk: scif {
130                 compatible = "fixed-clock";
131                 #clock-cells = <0>;
132                 /* This value must be overridden by the board. */
133                 clock-frequency = <0>;
134         };
135
136         soc {
137                 compatible = "simple-bus";
138                 interrupt-parent = <&gic>;
139
140                 #address-cells = <2>;
141                 #size-cells = <2>;
142                 ranges;
143
144                 apmu@e6152000 {
145                         compatible = "renesas,r8a7743-apmu", "renesas,apmu";
146                         reg = <0 0xe6152000 0 0x188>;
147                         cpus = <&cpu0 &cpu1>;
148                 };
149
150                 gic: interrupt-controller@f1001000 {
151                         compatible = "arm,gic-400";
152                         #interrupt-cells = <3>;
153                         #address-cells = <0>;
154                         interrupt-controller;
155                         reg = <0 0xf1001000 0 0x1000>,
156                               <0 0xf1002000 0 0x2000>,
157                               <0 0xf1004000 0 0x2000>,
158                               <0 0xf1006000 0 0x2000>;
159                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
160                                                  IRQ_TYPE_LEVEL_HIGH)>;
161                         clocks = <&cpg CPG_MOD 408>;
162                         clock-names = "clk";
163                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
164                         resets = <&cpg 408>;
165                 };
166
167                 gpio0: gpio@e6050000 {
168                         compatible = "renesas,gpio-r8a7743",
169                                      "renesas,rcar-gen2-gpio";
170                         reg = <0 0xe6050000 0 0x50>;
171                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
172                         #gpio-cells = <2>;
173                         gpio-controller;
174                         gpio-ranges = <&pfc 0 0 32>;
175                         #interrupt-cells = <2>;
176                         interrupt-controller;
177                         clocks = <&cpg CPG_MOD 912>;
178                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
179                         resets = <&cpg 912>;
180                 };
181
182                 gpio1: gpio@e6051000 {
183                         compatible = "renesas,gpio-r8a7743",
184                                      "renesas,rcar-gen2-gpio";
185                         reg = <0 0xe6051000 0 0x50>;
186                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
187                         #gpio-cells = <2>;
188                         gpio-controller;
189                         gpio-ranges = <&pfc 0 32 26>;
190                         #interrupt-cells = <2>;
191                         interrupt-controller;
192                         clocks = <&cpg CPG_MOD 911>;
193                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
194                         resets = <&cpg 911>;
195                 };
196
197                 gpio2: gpio@e6052000 {
198                         compatible = "renesas,gpio-r8a7743",
199                                      "renesas,rcar-gen2-gpio";
200                         reg = <0 0xe6052000 0 0x50>;
201                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
202                         #gpio-cells = <2>;
203                         gpio-controller;
204                         gpio-ranges = <&pfc 0 64 32>;
205                         #interrupt-cells = <2>;
206                         interrupt-controller;
207                         clocks = <&cpg CPG_MOD 910>;
208                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
209                         resets = <&cpg 910>;
210                 };
211
212                 gpio3: gpio@e6053000 {
213                         compatible = "renesas,gpio-r8a7743",
214                                      "renesas,rcar-gen2-gpio";
215                         reg = <0 0xe6053000 0 0x50>;
216                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
217                         #gpio-cells = <2>;
218                         gpio-controller;
219                         gpio-ranges = <&pfc 0 96 32>;
220                         #interrupt-cells = <2>;
221                         interrupt-controller;
222                         clocks = <&cpg CPG_MOD 909>;
223                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
224                         resets = <&cpg 909>;
225                 };
226
227                 gpio4: gpio@e6054000 {
228                         compatible = "renesas,gpio-r8a7743",
229                                      "renesas,rcar-gen2-gpio";
230                         reg = <0 0xe6054000 0 0x50>;
231                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
232                         #gpio-cells = <2>;
233                         gpio-controller;
234                         gpio-ranges = <&pfc 0 128 32>;
235                         #interrupt-cells = <2>;
236                         interrupt-controller;
237                         clocks = <&cpg CPG_MOD 908>;
238                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
239                         resets = <&cpg 908>;
240                 };
241
242                 gpio5: gpio@e6055000 {
243                         compatible = "renesas,gpio-r8a7743",
244                                      "renesas,rcar-gen2-gpio";
245                         reg = <0 0xe6055000 0 0x50>;
246                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
247                         #gpio-cells = <2>;
248                         gpio-controller;
249                         gpio-ranges = <&pfc 0 160 32>;
250                         #interrupt-cells = <2>;
251                         interrupt-controller;
252                         clocks = <&cpg CPG_MOD 907>;
253                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
254                         resets = <&cpg 907>;
255                 };
256
257                 gpio6: gpio@e6055400 {
258                         compatible = "renesas,gpio-r8a7743",
259                                      "renesas,rcar-gen2-gpio";
260                         reg = <0 0xe6055400 0 0x50>;
261                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
262                         #gpio-cells = <2>;
263                         gpio-controller;
264                         gpio-ranges = <&pfc 0 192 32>;
265                         #interrupt-cells = <2>;
266                         interrupt-controller;
267                         clocks = <&cpg CPG_MOD 905>;
268                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
269                         resets = <&cpg 905>;
270                 };
271
272                 gpio7: gpio@e6055800 {
273                         compatible = "renesas,gpio-r8a7743",
274                                      "renesas,rcar-gen2-gpio";
275                         reg = <0 0xe6055800 0 0x50>;
276                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
277                         #gpio-cells = <2>;
278                         gpio-controller;
279                         gpio-ranges = <&pfc 0 224 26>;
280                         #interrupt-cells = <2>;
281                         interrupt-controller;
282                         clocks = <&cpg CPG_MOD 904>;
283                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
284                         resets = <&cpg 904>;
285                 };
286
287                 irqc: interrupt-controller@e61c0000 {
288                         compatible = "renesas,irqc-r8a7743", "renesas,irqc";
289                         #interrupt-cells = <2>;
290                         interrupt-controller;
291                         reg = <0 0xe61c0000 0 0x200>;
292                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
293                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
294                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
295                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
296                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
297                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
298                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
299                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
300                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
301                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
302                         clocks = <&cpg CPG_MOD 407>;
303                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
304                         resets = <&cpg 407>;
305                 };
306
307                 thermal: thermal@e61f0000 {
308                         compatible = "renesas,thermal-r8a7743",
309                                      "renesas,rcar-gen2-thermal",
310                                      "renesas,rcar-thermal";
311                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
312                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
313                         clocks = <&cpg CPG_MOD 522>;
314                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
315                         resets = <&cpg 522>;
316                         #thermal-sensor-cells = <0>;
317                 };
318
319                 cmt0: timer@ffca0000 {
320                         compatible = "renesas,r8a7743-cmt0",
321                                      "renesas,rcar-gen2-cmt0";
322                         reg = <0 0xffca0000 0 0x1004>;
323                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
324                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
325                         clocks = <&cpg CPG_MOD 124>;
326                         clock-names = "fck";
327                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
328                         resets = <&cpg 124>;
329                         status = "disabled";
330                 };
331
332                 cmt1: timer@e6130000 {
333                         compatible = "renesas,r8a7743-cmt1",
334                                      "renesas,rcar-gen2-cmt1";
335                         reg = <0 0xe6130000 0 0x1004>;
336                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
337                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
338                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
339                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
340                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
341                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
342                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
343                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
344                         clocks = <&cpg CPG_MOD 329>;
345                         clock-names = "fck";
346                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
347                         resets = <&cpg 329>;
348                         status = "disabled";
349                 };
350
351                 cpg: clock-controller@e6150000 {
352                         compatible = "renesas,r8a7743-cpg-mssr";
353                         reg = <0 0xe6150000 0 0x1000>;
354                         clocks = <&extal_clk>, <&usb_extal_clk>;
355                         clock-names = "extal", "usb_extal";
356                         #clock-cells = <2>;
357                         #power-domain-cells = <0>;
358                         #reset-cells = <1>;
359                 };
360
361                 prr: chipid@ff000044 {
362                         compatible = "renesas,prr";
363                         reg = <0 0xff000044 0 4>;
364                 };
365
366                 rst: reset-controller@e6160000 {
367                         compatible = "renesas,r8a7743-rst";
368                         reg = <0 0xe6160000 0 0x100>;
369                 };
370
371                 sysc: system-controller@e6180000 {
372                         compatible = "renesas,r8a7743-sysc";
373                         reg = <0 0xe6180000 0 0x200>;
374                         #power-domain-cells = <1>;
375                 };
376
377                 pfc: pin-controller@e6060000 {
378                         compatible = "renesas,pfc-r8a7743";
379                         reg = <0 0xe6060000 0 0x250>;
380                 };
381
382                 dmac0: dma-controller@e6700000 {
383                         compatible = "renesas,dmac-r8a7743",
384                                      "renesas,rcar-dmac";
385                         reg = <0 0xe6700000 0 0x20000>;
386                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
387                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
388                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
389                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
390                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
391                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
392                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
393                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
394                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
395                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
396                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
397                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
398                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
399                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
400                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
401                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
402                         interrupt-names = "error",
403                                         "ch0", "ch1", "ch2", "ch3",
404                                         "ch4", "ch5", "ch6", "ch7",
405                                         "ch8", "ch9", "ch10", "ch11",
406                                         "ch12", "ch13", "ch14";
407                         clocks = <&cpg CPG_MOD 219>;
408                         clock-names = "fck";
409                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
410                         resets = <&cpg 219>;
411                         #dma-cells = <1>;
412                         dma-channels = <15>;
413                 };
414
415                 dmac1: dma-controller@e6720000 {
416                         compatible = "renesas,dmac-r8a7743",
417                                      "renesas,rcar-dmac";
418                         reg = <0 0xe6720000 0 0x20000>;
419                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
420                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
421                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
422                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
423                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
424                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
425                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
426                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
427                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
428                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
429                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
430                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
431                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
432                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
433                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
434                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
435                         interrupt-names = "error",
436                                         "ch0", "ch1", "ch2", "ch3",
437                                         "ch4", "ch5", "ch6", "ch7",
438                                         "ch8", "ch9", "ch10", "ch11",
439                                         "ch12", "ch13", "ch14";
440                         clocks = <&cpg CPG_MOD 218>;
441                         clock-names = "fck";
442                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
443                         resets = <&cpg 218>;
444                         #dma-cells = <1>;
445                         dma-channels = <15>;
446                 };
447
448                 audma0: dma-controller@ec700000 {
449                         compatible = "renesas,dmac-r8a7743",
450                                      "renesas,rcar-dmac";
451                         reg = <0 0xec700000 0 0x10000>;
452                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
453                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
454                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
455                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
456                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
457                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
458                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
459                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
460                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
461                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
462                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
463                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
464                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
465                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
466                         interrupt-names = "error",
467                                           "ch0", "ch1", "ch2", "ch3",
468                                           "ch4", "ch5", "ch6", "ch7",
469                                           "ch8", "ch9", "ch10", "ch11",
470                                           "ch12";
471                         clocks = <&cpg CPG_MOD 502>;
472                         clock-names = "fck";
473                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
474                         resets = <&cpg 502>;
475                         #dma-cells = <1>;
476                         dma-channels = <13>;
477                 };
478
479                 audma1: dma-controller@ec720000 {
480                         compatible = "renesas,dmac-r8a7743",
481                                      "renesas,rcar-dmac";
482                         reg = <0 0xec720000 0 0x10000>;
483                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
484                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
485                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
486                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
487                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
488                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
489                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
490                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
491                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
492                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
493                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
494                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
495                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
496                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
497                         interrupt-names = "error",
498                                           "ch0", "ch1", "ch2", "ch3",
499                                           "ch4", "ch5", "ch6", "ch7",
500                                           "ch8", "ch9", "ch10", "ch11",
501                                           "ch12";
502                         clocks = <&cpg CPG_MOD 501>;
503                         clock-names = "fck";
504                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
505                         resets = <&cpg 501>;
506                         #dma-cells = <1>;
507                         dma-channels = <13>;
508                 };
509
510                 usb_dmac0: dma-controller@e65a0000 {
511                         compatible = "renesas,r8a7743-usb-dmac",
512                                      "renesas,usb-dmac";
513                         reg = <0 0xe65a0000 0 0x100>;
514                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
515                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
516                         interrupt-names = "ch0", "ch1";
517                         clocks = <&cpg CPG_MOD 330>;
518                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
519                         resets = <&cpg 330>;
520                         #dma-cells = <1>;
521                         dma-channels = <2>;
522                 };
523
524                 usb_dmac1: dma-controller@e65b0000 {
525                         compatible = "renesas,r8a7743-usb-dmac",
526                                      "renesas,usb-dmac";
527                         reg = <0 0xe65b0000 0 0x100>;
528                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
529                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
530                         interrupt-names = "ch0", "ch1";
531                         clocks = <&cpg CPG_MOD 331>;
532                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
533                         resets = <&cpg 331>;
534                         #dma-cells = <1>;
535                         dma-channels = <2>;
536                 };
537
538                 /* The memory map in the User's Manual maps the cores to bus
539                  *  numbers
540                  */
541                 i2c0: i2c@e6508000 {
542                         #address-cells = <1>;
543                         #size-cells = <0>;
544                         compatible = "renesas,i2c-r8a7743",
545                                      "renesas,rcar-gen2-i2c";
546                         reg = <0 0xe6508000 0 0x40>;
547                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
548                         clocks = <&cpg CPG_MOD 931>;
549                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
550                         resets = <&cpg 931>;
551                         i2c-scl-internal-delay-ns = <6>;
552                         status = "disabled";
553                 };
554
555                 i2c1: i2c@e6518000 {
556                         #address-cells = <1>;
557                         #size-cells = <0>;
558                         compatible = "renesas,i2c-r8a7743",
559                                      "renesas,rcar-gen2-i2c";
560                         reg = <0 0xe6518000 0 0x40>;
561                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
562                         clocks = <&cpg CPG_MOD 930>;
563                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
564                         resets = <&cpg 930>;
565                         i2c-scl-internal-delay-ns = <6>;
566                         status = "disabled";
567                 };
568
569                 i2c2: i2c@e6530000 {
570                         #address-cells = <1>;
571                         #size-cells = <0>;
572                         compatible = "renesas,i2c-r8a7743",
573                                      "renesas,rcar-gen2-i2c";
574                         reg = <0 0xe6530000 0 0x40>;
575                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
576                         clocks = <&cpg CPG_MOD 929>;
577                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
578                         resets = <&cpg 929>;
579                         i2c-scl-internal-delay-ns = <6>;
580                         status = "disabled";
581                 };
582
583                 i2c3: i2c@e6540000 {
584                         #address-cells = <1>;
585                         #size-cells = <0>;
586                         compatible = "renesas,i2c-r8a7743",
587                                      "renesas,rcar-gen2-i2c";
588                         reg = <0 0xe6540000 0 0x40>;
589                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
590                         clocks = <&cpg CPG_MOD 928>;
591                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
592                         resets = <&cpg 928>;
593                         i2c-scl-internal-delay-ns = <6>;
594                         status = "disabled";
595                 };
596
597                 i2c4: i2c@e6520000 {
598                         #address-cells = <1>;
599                         #size-cells = <0>;
600                         compatible = "renesas,i2c-r8a7743",
601                                      "renesas,rcar-gen2-i2c";
602                         reg = <0 0xe6520000 0 0x40>;
603                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
604                         clocks = <&cpg CPG_MOD 927>;
605                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
606                         resets = <&cpg 927>;
607                         i2c-scl-internal-delay-ns = <6>;
608                         status = "disabled";
609                 };
610
611                 i2c5: i2c@e6528000 {
612                         /* doesn't need pinmux */
613                         #address-cells = <1>;
614                         #size-cells = <0>;
615                         compatible = "renesas,i2c-r8a7743",
616                                      "renesas,rcar-gen2-i2c";
617                         reg = <0 0xe6528000 0 0x40>;
618                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
619                         clocks = <&cpg CPG_MOD 925>;
620                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
621                         resets = <&cpg 925>;
622                         i2c-scl-internal-delay-ns = <110>;
623                         status = "disabled";
624                 };
625
626                 iic0: i2c@e6500000 {
627                         #address-cells = <1>;
628                         #size-cells = <0>;
629                         compatible = "renesas,iic-r8a7743",
630                                      "renesas,rcar-gen2-iic",
631                                      "renesas,rmobile-iic";
632                         reg = <0 0xe6500000 0 0x425>;
633                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
634                         clocks = <&cpg CPG_MOD 318>;
635                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
636                                <&dmac1 0x61>, <&dmac1 0x62>;
637                         dma-names = "tx", "rx", "tx", "rx";
638                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
639                         resets = <&cpg 318>;
640                         status = "disabled";
641                 };
642
643                 iic1: i2c@e6510000 {
644                         #address-cells = <1>;
645                         #size-cells = <0>;
646                         compatible = "renesas,iic-r8a7743",
647                                      "renesas,rcar-gen2-iic",
648                                      "renesas,rmobile-iic";
649                         reg = <0 0xe6510000 0 0x425>;
650                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
651                         clocks = <&cpg CPG_MOD 323>;
652                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
653                                <&dmac1 0x65>, <&dmac1 0x66>;
654                         dma-names = "tx", "rx", "tx", "rx";
655                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
656                         resets = <&cpg 323>;
657                         status = "disabled";
658                 };
659
660                 iic3: i2c@e60b0000 {
661                         /* doesn't need pinmux */
662                         #address-cells = <1>;
663                         #size-cells = <0>;
664                         compatible = "renesas,iic-r8a7743",
665                                      "renesas,rcar-gen2-iic",
666                                      "renesas,rmobile-iic";
667                         reg = <0 0xe60b0000 0 0x425>;
668                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
669                         clocks = <&cpg CPG_MOD 926>;
670                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
671                                <&dmac1 0x77>, <&dmac1 0x78>;
672                         dma-names = "tx", "rx", "tx", "rx";
673                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
674                         resets = <&cpg 926>;
675                         status = "disabled";
676                 };
677
678                 scifa0: serial@e6c40000 {
679                         compatible = "renesas,scifa-r8a7743",
680                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
681                         reg = <0 0xe6c40000 0 0x40>;
682                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
683                         clocks = <&cpg CPG_MOD 204>;
684                         clock-names = "fck";
685                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
686                                <&dmac1 0x21>, <&dmac1 0x22>;
687                         dma-names = "tx", "rx", "tx", "rx";
688                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
689                         resets = <&cpg 204>;
690                         status = "disabled";
691                 };
692
693                 scifa1: serial@e6c50000 {
694                         compatible = "renesas,scifa-r8a7743",
695                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
696                         reg = <0 0xe6c50000 0 0x40>;
697                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
698                         clocks = <&cpg CPG_MOD 203>;
699                         clock-names = "fck";
700                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
701                                <&dmac1 0x25>, <&dmac1 0x26>;
702                         dma-names = "tx", "rx", "tx", "rx";
703                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
704                         resets = <&cpg 203>;
705                         status = "disabled";
706                 };
707
708                 scifa2: serial@e6c60000 {
709                         compatible = "renesas,scifa-r8a7743",
710                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
711                         reg = <0 0xe6c60000 0 0x40>;
712                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
713                         clocks = <&cpg CPG_MOD 202>;
714                         clock-names = "fck";
715                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
716                                <&dmac1 0x27>, <&dmac1 0x28>;
717                         dma-names = "tx", "rx", "tx", "rx";
718                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
719                         resets = <&cpg 202>;
720                         status = "disabled";
721                 };
722
723                 scifa3: serial@e6c70000 {
724                         compatible = "renesas,scifa-r8a7743",
725                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
726                         reg = <0 0xe6c70000 0 0x40>;
727                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
728                         clocks = <&cpg CPG_MOD 1106>;
729                         clock-names = "fck";
730                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
731                                <&dmac1 0x1b>, <&dmac1 0x1c>;
732                         dma-names = "tx", "rx", "tx", "rx";
733                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
734                         resets = <&cpg 1106>;
735                         status = "disabled";
736                 };
737
738                 scifa4: serial@e6c78000 {
739                         compatible = "renesas,scifa-r8a7743",
740                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
741                         reg = <0 0xe6c78000 0 0x40>;
742                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
743                         clocks = <&cpg CPG_MOD 1107>;
744                         clock-names = "fck";
745                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
746                                <&dmac1 0x1f>, <&dmac1 0x20>;
747                         dma-names = "tx", "rx", "tx", "rx";
748                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
749                         resets = <&cpg 1107>;
750                         status = "disabled";
751                 };
752
753                 scifa5: serial@e6c80000 {
754                         compatible = "renesas,scifa-r8a7743",
755                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
756                         reg = <0 0xe6c80000 0 0x40>;
757                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
758                         clocks = <&cpg CPG_MOD 1108>;
759                         clock-names = "fck";
760                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
761                                <&dmac1 0x23>, <&dmac1 0x24>;
762                         dma-names = "tx", "rx", "tx", "rx";
763                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
764                         resets = <&cpg 1108>;
765                         status = "disabled";
766                 };
767
768                 scifb0: serial@e6c20000 {
769                         compatible = "renesas,scifb-r8a7743",
770                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
771                         reg = <0 0xe6c20000 0 0x100>;
772                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
773                         clocks = <&cpg CPG_MOD 206>;
774                         clock-names = "fck";
775                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
776                                <&dmac1 0x3d>, <&dmac1 0x3e>;
777                         dma-names = "tx", "rx", "tx", "rx";
778                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
779                         resets = <&cpg 206>;
780                         status = "disabled";
781                 };
782
783                 scifb1: serial@e6c30000 {
784                         compatible = "renesas,scifb-r8a7743",
785                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
786                         reg = <0 0xe6c30000 0 0x100>;
787                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
788                         clocks = <&cpg CPG_MOD 207>;
789                         clock-names = "fck";
790                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
791                                <&dmac1 0x19>, <&dmac1 0x1a>;
792                         dma-names = "tx", "rx", "tx", "rx";
793                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
794                         resets = <&cpg 207>;
795                         status = "disabled";
796                 };
797
798                 scifb2: serial@e6ce0000 {
799                         compatible = "renesas,scifb-r8a7743",
800                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
801                         reg = <0 0xe6ce0000 0 0x100>;
802                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
803                         clocks = <&cpg CPG_MOD 216>;
804                         clock-names = "fck";
805                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
806                                <&dmac1 0x1d>, <&dmac1 0x1e>;
807                         dma-names = "tx", "rx", "tx", "rx";
808                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
809                         resets = <&cpg 216>;
810                         status = "disabled";
811                 };
812
813                 scif0: serial@e6e60000 {
814                         compatible = "renesas,scif-r8a7743",
815                                      "renesas,rcar-gen2-scif", "renesas,scif";
816                         reg = <0 0xe6e60000 0 0x40>;
817                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
818                         clocks = <&cpg CPG_MOD 721>,
819                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
820                         clock-names = "fck", "brg_int", "scif_clk";
821                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
822                                <&dmac1 0x29>, <&dmac1 0x2a>;
823                         dma-names = "tx", "rx", "tx", "rx";
824                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
825                         resets = <&cpg 721>;
826                         status = "disabled";
827                 };
828
829                 scif1: serial@e6e68000 {
830                         compatible = "renesas,scif-r8a7743",
831                                      "renesas,rcar-gen2-scif", "renesas,scif";
832                         reg = <0 0xe6e68000 0 0x40>;
833                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
834                         clocks = <&cpg CPG_MOD 720>,
835                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
836                         clock-names = "fck", "brg_int", "scif_clk";
837                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
838                                <&dmac1 0x2d>, <&dmac1 0x2e>;
839                         dma-names = "tx", "rx", "tx", "rx";
840                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
841                         resets = <&cpg 720>;
842                         status = "disabled";
843                 };
844
845                 scif2: serial@e6e58000 {
846                         compatible = "renesas,scif-r8a7743",
847                                      "renesas,rcar-gen2-scif", "renesas,scif";
848                         reg = <0 0xe6e58000 0 0x40>;
849                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
850                         clocks = <&cpg CPG_MOD 719>,
851                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
852                         clock-names = "fck", "brg_int", "scif_clk";
853                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
854                                <&dmac1 0x2b>, <&dmac1 0x2c>;
855                         dma-names = "tx", "rx", "tx", "rx";
856                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
857                         resets = <&cpg 719>;
858                         status = "disabled";
859                 };
860
861                 scif3: serial@e6ea8000 {
862                         compatible = "renesas,scif-r8a7743",
863                                      "renesas,rcar-gen2-scif", "renesas,scif";
864                         reg = <0 0xe6ea8000 0 0x40>;
865                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
866                         clocks = <&cpg CPG_MOD 718>,
867                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
868                         clock-names = "fck", "brg_int", "scif_clk";
869                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
870                                <&dmac1 0x2f>, <&dmac1 0x30>;
871                         dma-names = "tx", "rx", "tx", "rx";
872                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
873                         resets = <&cpg 718>;
874                         status = "disabled";
875                 };
876
877                 scif4: serial@e6ee0000 {
878                         compatible = "renesas,scif-r8a7743",
879                                      "renesas,rcar-gen2-scif", "renesas,scif";
880                         reg = <0 0xe6ee0000 0 0x40>;
881                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
882                         clocks = <&cpg CPG_MOD 715>,
883                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
884                         clock-names = "fck", "brg_int", "scif_clk";
885                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
886                                <&dmac1 0xfb>, <&dmac1 0xfc>;
887                         dma-names = "tx", "rx", "tx", "rx";
888                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
889                         resets = <&cpg 715>;
890                         status = "disabled";
891                 };
892
893                 scif5: serial@e6ee8000 {
894                         compatible = "renesas,scif-r8a7743",
895                                      "renesas,rcar-gen2-scif", "renesas,scif";
896                         reg = <0 0xe6ee8000 0 0x40>;
897                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
898                         clocks = <&cpg CPG_MOD 714>,
899                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
900                         clock-names = "fck", "brg_int", "scif_clk";
901                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
902                                <&dmac1 0xfd>, <&dmac1 0xfe>;
903                         dma-names = "tx", "rx", "tx", "rx";
904                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
905                         resets = <&cpg 714>;
906                         status = "disabled";
907                 };
908
909                 hscif0: serial@e62c0000 {
910                         compatible = "renesas,hscif-r8a7743",
911                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
912                         reg = <0 0xe62c0000 0 0x60>;
913                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
914                         clocks = <&cpg CPG_MOD 717>,
915                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
916                         clock-names = "fck", "brg_int", "scif_clk";
917                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
918                                <&dmac1 0x39>, <&dmac1 0x3a>;
919                         dma-names = "tx", "rx", "tx", "rx";
920                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
921                         resets = <&cpg 717>;
922                         status = "disabled";
923                 };
924
925                 hscif1: serial@e62c8000 {
926                         compatible = "renesas,hscif-r8a7743",
927                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
928                         reg = <0 0xe62c8000 0 0x60>;
929                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
930                         clocks = <&cpg CPG_MOD 716>,
931                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
932                         clock-names = "fck", "brg_int", "scif_clk";
933                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
934                                <&dmac1 0x4d>, <&dmac1 0x4e>;
935                         dma-names = "tx", "rx", "tx", "rx";
936                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
937                         resets = <&cpg 716>;
938                         status = "disabled";
939                 };
940
941                 hscif2: serial@e62d0000 {
942                         compatible = "renesas,hscif-r8a7743",
943                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
944                         reg = <0 0xe62d0000 0 0x60>;
945                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
946                         clocks = <&cpg CPG_MOD 713>,
947                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
948                         clock-names = "fck", "brg_int", "scif_clk";
949                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
950                                <&dmac1 0x3b>, <&dmac1 0x3c>;
951                         dma-names = "tx", "rx", "tx", "rx";
952                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
953                         resets = <&cpg 713>;
954                         status = "disabled";
955                 };
956
957                 icram2: sram@e6300000 {
958                         compatible = "mmio-sram";
959                         reg = <0 0xe6300000 0 0x40000>;
960                 };
961
962                 icram0: sram@e63a0000 {
963                         compatible = "mmio-sram";
964                         reg = <0 0xe63a0000 0 0x12000>;
965                 };
966
967                 icram1: sram@e63c0000 {
968                         compatible = "mmio-sram";
969                         reg = <0 0xe63c0000 0 0x1000>;
970                         #address-cells = <1>;
971                         #size-cells = <1>;
972                         ranges = <0 0 0xe63c0000 0x1000>;
973
974                         smp-sram@0 {
975                                 compatible = "renesas,smp-sram";
976                                 reg = <0 0x10>;
977                         };
978                 };
979
980                 ether: ethernet@ee700000 {
981                         compatible = "renesas,ether-r8a7743",
982                                      "renesas,rcar-gen2-ether";
983                         reg = <0 0xee700000 0 0x400>;
984                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
985                         clocks = <&cpg CPG_MOD 813>;
986                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
987                         resets = <&cpg 813>;
988                         phy-mode = "rmii";
989                         #address-cells = <1>;
990                         #size-cells = <0>;
991                         status = "disabled";
992                 };
993
994                 avb: ethernet@e6800000 {
995                         compatible = "renesas,etheravb-r8a7743",
996                                      "renesas,etheravb-rcar-gen2";
997                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
998                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
999                         clocks = <&cpg CPG_MOD 812>;
1000                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1001                         resets = <&cpg 812>;
1002                         #address-cells = <1>;
1003                         #size-cells = <0>;
1004                         status = "disabled";
1005                 };
1006
1007                 mmcif0: mmc@ee200000 {
1008                         compatible = "renesas,mmcif-r8a7743",
1009                                      "renesas,sh-mmcif";
1010                         reg = <0 0xee200000 0 0x80>;
1011                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1012                         clocks = <&cpg CPG_MOD 315>;
1013                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1014                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1015                         dma-names = "tx", "rx", "tx", "rx";
1016                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1017                         resets = <&cpg 315>;
1018                         reg-io-width = <4>;
1019                         max-frequency = <97500000>;
1020                         status = "disabled";
1021                 };
1022
1023                 qspi: spi@e6b10000 {
1024                         compatible = "renesas,qspi-r8a7743", "renesas,qspi";
1025                         reg = <0 0xe6b10000 0 0x2c>;
1026                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1027                         clocks = <&cpg CPG_MOD 917>;
1028                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1029                                <&dmac1 0x17>, <&dmac1 0x18>;
1030                         dma-names = "tx", "rx", "tx", "rx";
1031                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1032                         num-cs = <1>;
1033                         #address-cells = <1>;
1034                         #size-cells = <0>;
1035                         resets = <&cpg 917>;
1036                         status = "disabled";
1037                 };
1038
1039                 msiof0: spi@e6e20000 {
1040                         compatible = "renesas,msiof-r8a7743",
1041                                      "renesas,rcar-gen2-msiof";
1042                         reg = <0 0xe6e20000 0 0x0064>;
1043                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1044                         clocks = <&cpg CPG_MOD 000>;
1045                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1046                                <&dmac1 0x51>, <&dmac1 0x52>;
1047                         dma-names = "tx", "rx", "tx", "rx";
1048                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1049                         #address-cells = <1>;
1050                         #size-cells = <0>;
1051                         resets = <&cpg 000>;
1052                         status = "disabled";
1053                 };
1054
1055                 msiof1: spi@e6e10000 {
1056                         compatible = "renesas,msiof-r8a7743",
1057                                      "renesas,rcar-gen2-msiof";
1058                         reg = <0 0xe6e10000 0 0x0064>;
1059                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1060                         clocks = <&cpg CPG_MOD 208>;
1061                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1062                                <&dmac1 0x55>, <&dmac1 0x56>;
1063                         dma-names = "tx", "rx", "tx", "rx";
1064                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1065                         #address-cells = <1>;
1066                         #size-cells = <0>;
1067                         resets = <&cpg 208>;
1068                         status = "disabled";
1069                 };
1070
1071                 msiof2: spi@e6e00000 {
1072                         compatible = "renesas,msiof-r8a7743",
1073                                      "renesas,rcar-gen2-msiof";
1074                         reg = <0 0xe6e00000 0 0x0064>;
1075                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1076                         clocks = <&cpg CPG_MOD 205>;
1077                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1078                                <&dmac1 0x41>, <&dmac1 0x42>;
1079                         dma-names = "tx", "rx", "tx", "rx";
1080                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1081                         #address-cells = <1>;
1082                         #size-cells = <0>;
1083                         resets = <&cpg 205>;
1084                         status = "disabled";
1085                 };
1086
1087                 /*
1088                  * pci1 and xhci share the same phy, therefore only one of them
1089                  * can be active at any one time. If both of them are enabled,
1090                  * a race condition will determine who'll control the phy.
1091                  * A firmware file is needed by the xhci driver in order for
1092                  * USB 3.0 to work properly.
1093                  */
1094                 xhci: usb@ee000000 {
1095                         compatible = "renesas,xhci-r8a7743",
1096                                      "renesas,rcar-gen2-xhci";
1097                         reg = <0 0xee000000 0 0xc00>;
1098                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1099                         clocks = <&cpg CPG_MOD 328>;
1100                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1101                         resets = <&cpg 328>;
1102                         phys = <&usb2 1>;
1103                         phy-names = "usb";
1104                         status = "disabled";
1105                 };
1106
1107                 pwm0: pwm@e6e30000 {
1108                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1109                         reg = <0 0xe6e30000 0 0x8>;
1110                         clocks = <&cpg CPG_MOD 523>;
1111                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1112                         resets = <&cpg 523>;
1113                         #pwm-cells = <2>;
1114                         status = "disabled";
1115                 };
1116
1117                 pwm1: pwm@e6e31000 {
1118                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1119                         reg = <0 0xe6e31000 0 0x8>;
1120                         clocks = <&cpg CPG_MOD 523>;
1121                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1122                         resets = <&cpg 523>;
1123                         #pwm-cells = <2>;
1124                         status = "disabled";
1125                 };
1126
1127                 pwm2: pwm@e6e32000 {
1128                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1129                         reg = <0 0xe6e32000 0 0x8>;
1130                         clocks = <&cpg CPG_MOD 523>;
1131                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1132                         resets = <&cpg 523>;
1133                         #pwm-cells = <2>;
1134                         status = "disabled";
1135                 };
1136
1137                 pwm3: pwm@e6e33000 {
1138                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1139                         reg = <0 0xe6e33000 0 0x8>;
1140                         clocks = <&cpg CPG_MOD 523>;
1141                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1142                         resets = <&cpg 523>;
1143                         #pwm-cells = <2>;
1144                         status = "disabled";
1145                 };
1146
1147                 pwm4: pwm@e6e34000 {
1148                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1149                         reg = <0 0xe6e34000 0 0x8>;
1150                         clocks = <&cpg CPG_MOD 523>;
1151                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1152                         resets = <&cpg 523>;
1153                         #pwm-cells = <2>;
1154                         status = "disabled";
1155                 };
1156
1157                 pwm5: pwm@e6e35000 {
1158                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1159                         reg = <0 0xe6e35000 0 0x8>;
1160                         clocks = <&cpg CPG_MOD 523>;
1161                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1162                         resets = <&cpg 523>;
1163                         #pwm-cells = <2>;
1164                         status = "disabled";
1165                 };
1166
1167                 pwm6: pwm@e6e36000 {
1168                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1169                         reg = <0 0xe6e36000 0 0x8>;
1170                         clocks = <&cpg CPG_MOD 523>;
1171                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1172                         resets = <&cpg 523>;
1173                         #pwm-cells = <2>;
1174                         status = "disabled";
1175                 };
1176
1177                 tpu: pwm@e60f0000 {
1178                         compatible = "renesas,tpu-r8a7743", "renesas,tpu";
1179                         reg = <0 0xe60f0000 0 0x148>;
1180                         clocks = <&cpg CPG_MOD 304>;
1181                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1182                         resets = <&cpg 304>;
1183                         #pwm-cells = <3>;
1184                         status = "disabled";
1185                 };
1186
1187                 sdhi0: sd@ee100000 {
1188                         compatible = "renesas,sdhi-r8a7743",
1189                                      "renesas,rcar-gen2-sdhi";
1190                         reg = <0 0xee100000 0 0x328>;
1191                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1192                         clocks = <&cpg CPG_MOD 314>;
1193                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1194                                <&dmac1 0xcd>, <&dmac1 0xce>;
1195                         dma-names = "tx", "rx", "tx", "rx";
1196                         max-frequency = <195000000>;
1197                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1198                         resets = <&cpg 314>;
1199                         status = "disabled";
1200                 };
1201
1202                 sdhi1: sd@ee140000 {
1203                         compatible = "renesas,sdhi-r8a7743",
1204                                      "renesas,rcar-gen2-sdhi";
1205                         reg = <0 0xee140000 0 0x100>;
1206                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1207                         clocks = <&cpg CPG_MOD 312>;
1208                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1209                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1210                         dma-names = "tx", "rx", "tx", "rx";
1211                         max-frequency = <97500000>;
1212                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1213                         resets = <&cpg 312>;
1214                         status = "disabled";
1215                 };
1216
1217                 sdhi2: sd@ee160000 {
1218                         compatible = "renesas,sdhi-r8a7743",
1219                                      "renesas,rcar-gen2-sdhi";
1220                         reg = <0 0xee160000 0 0x100>;
1221                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1222                         clocks = <&cpg CPG_MOD 311>;
1223                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1224                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1225                         dma-names = "tx", "rx", "tx", "rx";
1226                         max-frequency = <97500000>;
1227                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1228                         resets = <&cpg 311>;
1229                         status = "disabled";
1230                 };
1231
1232                 hsusb: usb@e6590000 {
1233                         compatible = "renesas,usbhs-r8a7743",
1234                                      "renesas,rcar-gen2-usbhs";
1235                         reg = <0 0xe6590000 0 0x100>;
1236                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1237                         clocks = <&cpg CPG_MOD 704>;
1238                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1239                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1240                         dma-names = "ch0", "ch1", "ch2", "ch3";
1241                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1242                         resets = <&cpg 704>;
1243                         renesas,buswait = <4>;
1244                         phys = <&usb0 1>;
1245                         phy-names = "usb";
1246                         status = "disabled";
1247                 };
1248
1249                 usbphy: usb-phy@e6590100 {
1250                         compatible = "renesas,usb-phy-r8a7743",
1251                                      "renesas,rcar-gen2-usb-phy";
1252                         reg = <0 0xe6590100 0 0x100>;
1253                         #address-cells = <1>;
1254                         #size-cells = <0>;
1255                         clocks = <&cpg CPG_MOD 704>;
1256                         clock-names = "usbhs";
1257                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1258                         resets = <&cpg 704>;
1259                         status = "disabled";
1260
1261                         usb0: usb-channel@0 {
1262                                 reg = <0>;
1263                                 #phy-cells = <1>;
1264                         };
1265                         usb2: usb-channel@2 {
1266                                 reg = <2>;
1267                                 #phy-cells = <1>;
1268                         };
1269                 };
1270
1271                 vin0: video@e6ef0000 {
1272                         compatible = "renesas,vin-r8a7743",
1273                                      "renesas,rcar-gen2-vin";
1274                         reg = <0 0xe6ef0000 0 0x1000>;
1275                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1276                         clocks = <&cpg CPG_MOD 811>;
1277                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1278                         resets = <&cpg 811>;
1279                         status = "disabled";
1280                 };
1281
1282                 vin1: video@e6ef1000 {
1283                         compatible = "renesas,vin-r8a7743",
1284                                      "renesas,rcar-gen2-vin";
1285                         reg = <0 0xe6ef1000 0 0x1000>;
1286                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1287                         clocks = <&cpg CPG_MOD 810>;
1288                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1289                         resets = <&cpg 810>;
1290                         status = "disabled";
1291                 };
1292
1293                 vin2: video@e6ef2000 {
1294                         compatible = "renesas,vin-r8a7743",
1295                                      "renesas,rcar-gen2-vin";
1296                         reg = <0 0xe6ef2000 0 0x1000>;
1297                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1298                         clocks = <&cpg CPG_MOD 809>;
1299                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1300                         resets = <&cpg 809>;
1301                         status = "disabled";
1302                 };
1303
1304                 du: display@feb00000 {
1305                         compatible = "renesas,du-r8a7743";
1306                         reg = <0 0xfeb00000 0 0x40000>,
1307                               <0 0xfeb90000 0 0x1c>;
1308                         reg-names = "du", "lvds.0";
1309                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1310                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1311                         clocks = <&cpg CPG_MOD 724>,
1312                                  <&cpg CPG_MOD 723>,
1313                                  <&cpg CPG_MOD 726>;
1314                         clock-names = "du.0", "du.1", "lvds.0";
1315                         status = "disabled";
1316
1317                         ports {
1318                                 #address-cells = <1>;
1319                                 #size-cells = <0>;
1320
1321                                 port@0 {
1322                                         reg = <0>;
1323                                         du_out_rgb: endpoint {
1324                                         };
1325                                 };
1326                                 port@1 {
1327                                         reg = <1>;
1328                                         du_out_lvds0: endpoint {
1329                                         };
1330                                 };
1331                         };
1332                 };
1333
1334                 can0: can@e6e80000 {
1335                         compatible = "renesas,can-r8a7743",
1336                                      "renesas,rcar-gen2-can";
1337                         reg = <0 0xe6e80000 0 0x1000>;
1338                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1339                         clocks = <&cpg CPG_MOD 916>,
1340                                  <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1341                                  <&can_clk>;
1342                         clock-names = "clkp1", "clkp2", "can_clk";
1343                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1344                         resets = <&cpg 916>;
1345                         status = "disabled";
1346                 };
1347
1348                 can1: can@e6e88000 {
1349                         compatible = "renesas,can-r8a7743",
1350                                      "renesas,rcar-gen2-can";
1351                         reg = <0 0xe6e88000 0 0x1000>;
1352                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1353                         clocks = <&cpg CPG_MOD 915>,
1354                                  <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1355                                  <&can_clk>;
1356                         clock-names = "clkp1", "clkp2", "can_clk";
1357                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1358                         resets = <&cpg 915>;
1359                         status = "disabled";
1360                 };
1361
1362                 pci0: pci@ee090000 {
1363                         compatible = "renesas,pci-r8a7743",
1364                                      "renesas,pci-rcar-gen2";
1365                         device_type = "pci";
1366                         reg = <0 0xee090000 0 0xc00>,
1367                               <0 0xee080000 0 0x1100>;
1368                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1369                         clocks = <&cpg CPG_MOD 703>;
1370                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1371                         resets = <&cpg 703>;
1372                         status = "disabled";
1373
1374                         bus-range = <0 0>;
1375                         #address-cells = <3>;
1376                         #size-cells = <2>;
1377                         #interrupt-cells = <1>;
1378                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1379                         interrupt-map-mask = <0xff00 0 0 0x7>;
1380                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1381                                          0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1382                                          0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1383
1384                         usb@1,0 {
1385                                 reg = <0x800 0 0 0 0>;
1386                                 phys = <&usb0 0>;
1387                                 phy-names = "usb";
1388                         };
1389
1390                         usb@2,0 {
1391                                 reg = <0x1000 0 0 0 0>;
1392                                 phys = <&usb0 0>;
1393                                 phy-names = "usb";
1394                         };
1395                 };
1396
1397                 pci1: pci@ee0d0000 {
1398                         compatible = "renesas,pci-r8a7743",
1399                                      "renesas,pci-rcar-gen2";
1400                         device_type = "pci";
1401                         reg = <0 0xee0d0000 0 0xc00>,
1402                               <0 0xee0c0000 0 0x1100>;
1403                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1404                         clocks = <&cpg CPG_MOD 703>;
1405                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1406                         resets = <&cpg 703>;
1407                         status = "disabled";
1408
1409                         bus-range = <1 1>;
1410                         #address-cells = <3>;
1411                         #size-cells = <2>;
1412                         #interrupt-cells = <1>;
1413                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1414                         interrupt-map-mask = <0xff00 0 0 0x7>;
1415                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1416                                          0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1417                                          0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1418
1419                         usb@1,0 {
1420                                 reg = <0x10800 0 0 0 0>;
1421                                 phys = <&usb2 0>;
1422                                 phy-names = "usb";
1423                         };
1424
1425                         usb@2,0 {
1426                                 reg = <0x11000 0 0 0 0>;
1427                                 phys = <&usb2 0>;
1428                                 phy-names = "usb";
1429                         };
1430                 };
1431
1432                 pciec: pcie@fe000000 {
1433                         compatible = "renesas,pcie-r8a7743",
1434                                      "renesas,pcie-rcar-gen2";
1435                         reg = <0 0xfe000000 0 0x80000>;
1436                         #address-cells = <3>;
1437                         #size-cells = <2>;
1438                         bus-range = <0x00 0xff>;
1439                         device_type = "pci";
1440                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1441                                   0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1442                                   0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1443                                   0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1444                         /* Map all possible DDR as inbound ranges */
1445                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1446                                       0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1447                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1448                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1449                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1450                         #interrupt-cells = <1>;
1451                         interrupt-map-mask = <0 0 0 0>;
1452                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1453                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1454                         clock-names = "pcie", "pcie_bus";
1455                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1456                         resets = <&cpg 319>;
1457                         status = "disabled";
1458                 };
1459
1460                 rcar_sound: sound@ec500000 {
1461                         /*
1462                          * #sound-dai-cells is required
1463                          *
1464                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1465                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1466                          */
1467                         compatible = "renesas,rcar_sound-r8a7743",
1468                                      "renesas,rcar_sound-gen2";
1469                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1470                               <0 0xec5a0000 0 0x100>,  /* ADG */
1471                               <0 0xec540000 0 0x1000>, /* SSIU */
1472                               <0 0xec541000 0 0x280>,  /* SSI */
1473                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1474                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1475
1476                         clocks = <&cpg CPG_MOD 1005>,
1477                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1478                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1479                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1480                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1481                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1482                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1483                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1484                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1485                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1486                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1487                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1488                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1489                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1490                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1491                                  <&cpg CPG_CORE R8A7743_CLK_M2>;
1492                         clock-names = "ssi-all",
1493                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1494                                       "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1495                                       "src.9", "src.8", "src.7", "src.6", "src.5",
1496                                       "src.4", "src.3", "src.2", "src.1", "src.0",
1497                                       "ctu.0", "ctu.1",
1498                                       "mix.0", "mix.1",
1499                                       "dvc.0", "dvc.1",
1500                                       "clk_a", "clk_b", "clk_c", "clk_i";
1501                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1502                         resets = <&cpg 1005>,
1503                                  <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1504                                  <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1505                                  <&cpg 1014>, <&cpg 1015>;
1506                         reset-names = "ssi-all",
1507                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1508                                       "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1509                         status = "disabled";
1510
1511                         rcar_sound,dvc {
1512                                 dvc0: dvc-0 {
1513                                         dmas = <&audma1 0xbc>;
1514                                         dma-names = "tx";
1515                                 };
1516                                 dvc1: dvc-1 {
1517                                         dmas = <&audma1 0xbe>;
1518                                         dma-names = "tx";
1519                                 };
1520                         };
1521
1522                         rcar_sound,mix {
1523                                 mix0: mix-0 { };
1524                                 mix1: mix-1 { };
1525                         };
1526
1527                         rcar_sound,ctu {
1528                                 ctu00: ctu-0 { };
1529                                 ctu01: ctu-1 { };
1530                                 ctu02: ctu-2 { };
1531                                 ctu03: ctu-3 { };
1532                                 ctu10: ctu-4 { };
1533                                 ctu11: ctu-5 { };
1534                                 ctu12: ctu-6 { };
1535                                 ctu13: ctu-7 { };
1536                         };
1537
1538                         rcar_sound,src {
1539                                 src0: src-0 {
1540                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1541                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1542                                         dma-names = "rx", "tx";
1543                                 };
1544                                 src1: src-1 {
1545                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1546                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1547                                         dma-names = "rx", "tx";
1548                                 };
1549                                 src2: src-2 {
1550                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1551                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1552                                         dma-names = "rx", "tx";
1553                                 };
1554                                 src3: src-3 {
1555                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1556                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1557                                         dma-names = "rx", "tx";
1558                                 };
1559                                 src4: src-4 {
1560                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1561                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1562                                         dma-names = "rx", "tx";
1563                                 };
1564                                 src5: src-5 {
1565                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1566                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1567                                         dma-names = "rx", "tx";
1568                                 };
1569                                 src6: src-6 {
1570                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1571                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1572                                         dma-names = "rx", "tx";
1573                                 };
1574                                 src7: src-7 {
1575                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1576                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1577                                         dma-names = "rx", "tx";
1578                                 };
1579                                 src8: src-8 {
1580                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1581                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1582                                         dma-names = "rx", "tx";
1583                                 };
1584                                 src9: src-9 {
1585                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1586                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1587                                         dma-names = "rx", "tx";
1588                                 };
1589                         };
1590
1591                         rcar_sound,ssi {
1592                                 ssi0: ssi-0 {
1593                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1594                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1595                                         dma-names = "rx", "tx", "rxu", "txu";
1596                                 };
1597                                 ssi1: ssi-1 {
1598                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1599                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1600                                         dma-names = "rx", "tx", "rxu", "txu";
1601                                 };
1602                                 ssi2: ssi-2 {
1603                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1604                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1605                                         dma-names = "rx", "tx", "rxu", "txu";
1606                                 };
1607                                 ssi3: ssi-3 {
1608                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1609                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1610                                         dma-names = "rx", "tx", "rxu", "txu";
1611                                 };
1612                                 ssi4: ssi-4 {
1613                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1614                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1615                                         dma-names = "rx", "tx", "rxu", "txu";
1616                                 };
1617                                 ssi5: ssi-5 {
1618                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1619                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1620                                         dma-names = "rx", "tx", "rxu", "txu";
1621                                 };
1622                                 ssi6: ssi-6 {
1623                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1624                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1625                                         dma-names = "rx", "tx", "rxu", "txu";
1626                                 };
1627                                 ssi7: ssi-7 {
1628                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1629                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1630                                         dma-names = "rx", "tx", "rxu", "txu";
1631                                 };
1632                                 ssi8: ssi-8 {
1633                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1634                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1635                                         dma-names = "rx", "tx", "rxu", "txu";
1636                                 };
1637                                 ssi9: ssi-9 {
1638                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1639                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1640                                         dma-names = "rx", "tx", "rxu", "txu";
1641                                 };
1642                         };
1643                 };
1644         };
1645
1646         thermal-zones {
1647                 cpu_thermal: cpu-thermal {
1648                         polling-delay-passive = <0>;
1649                         polling-delay = <0>;
1650
1651                         thermal-sensors = <&thermal>;
1652
1653                         trips {
1654                                 cpu-crit {
1655                                         temperature = <95000>;
1656                                         hysteresis = <0>;
1657                                         type = "critical";
1658                                 };
1659                         };
1660
1661                         cooling-maps {
1662                         };
1663                 };
1664         };
1665
1666         timer {
1667                 compatible = "arm,armv7-timer";
1668                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1669                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1670                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1671                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1672         };
1673
1674         /* External USB clock - can be overridden by the board */
1675         usb_extal_clk: usb_extal {
1676                 compatible = "fixed-clock";
1677                 #clock-cells = <0>;
1678                 clock-frequency = <48000000>;
1679         };
1680 };