arch/arm/boot/dts/pxa168.dtsi

   1 /*
   2  *  Copyright (C) 2012 Marvell Technology Group Ltd.
   3  *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
   4  *
   5  *  This program is free software; you can redistribute it and/or modify
   6  *  it under the terms of the GNU General Public License version 2 as
   7  *  publishhed by the Free Software Foundation.
   8  */
   9
  10 #include <dt-bindings/clock/marvell,pxa168.h>
  11
  12 / {
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15
  16         aliases {
  17                 serial0 = &uart1;
  18                 serial1 = &uart2;
  19                 serial2 = &uart3;
  20                 i2c0 = &twsi1;
  21                 i2c1 = &twsi2;
  22         };
  23
  24         soc {
  25                 #address-cells = <1>;
  26                 #size-cells = <1>;
  27                 compatible = "simple-bus";
  28                 interrupt-parent = <&intc>;
  29                 ranges;
  30
  31                 axi@d4200000 {  /* AXI */
  32                         compatible = "mrvl,axi-bus", "simple-bus";
  33                         #address-cells = <1>;
  34                         #size-cells = <1>;
  35                         reg = <0xd4200000 0x00200000>;
  36                         ranges;
  37
  38                         intc: interrupt-controller@d4282000 {
  39                                 compatible = "mrvl,mmp-intc";
  40                                 interrupt-controller;
  41                                 #interrupt-cells = <1>;
  42                                 reg = <0xd4282000 0x1000>;
  43                                 mrvl,intc-nr-irqs = <64>;
  44                         };
  45
  46                 };
  47
  48                 apb@d4000000 {  /* APB */
  49                         compatible = "mrvl,apb-bus", "simple-bus";
  50                         #address-cells = <1>;
  51                         #size-cells = <1>;
  52                         reg = <0xd4000000 0x00200000>;
  53                         ranges;
  54
  55                         timer0: timer@d4014000 {
  56                                 compatible = "mrvl,mmp-timer";
  57                                 reg = <0xd4014000 0x100>;
  58                                 interrupts = <13>;
  59                         };
  60
  61                         uart1: uart@d4017000 {
  62                                 compatible = "mrvl,mmp-uart";
  63                                 reg = <0xd4017000 0x1000>;
  64                                 interrupts = <27>;
  65                                 clocks = <&soc_clocks PXA168_CLK_UART0>;
  66                                 resets = <&soc_clocks PXA168_CLK_UART0>;
  67                                 status = "disabled";
  68                         };
  69
  70                         uart2: uart@d4018000 {
  71                                 compatible = "mrvl,mmp-uart";
  72                                 reg = <0xd4018000 0x1000>;
  73                                 interrupts = <28>;
  74                                 clocks = <&soc_clocks PXA168_CLK_UART1>;
  75                                 resets = <&soc_clocks PXA168_CLK_UART1>;
  76                                 status = "disabled";
  77                         };
  78
  79                         uart3: uart@d4026000 {
  80                                 compatible = "mrvl,mmp-uart";
  81                                 reg = <0xd4026000 0x1000>;
  82                                 interrupts = <29>;
  83                                 clocks = <&soc_clocks PXA168_CLK_UART2>;
  84                                 resets = <&soc_clocks PXA168_CLK_UART2>;
  85                                 status = "disabled";
  86                         };
  87
  88                         gpio@d4019000 {
  89                                 compatible = "marvell,mmp-gpio";
  90                                 #address-cells = <1>;
  91                                 #size-cells = <1>;
  92                                 reg = <0xd4019000 0x1000>;
  93                                 gpio-controller;
  94                                 #gpio-cells = <2>;
  95                                 interrupts = <49>;
  96                                 clocks = <&soc_clocks PXA168_CLK_GPIO>;
  97                                 resets = <&soc_clocks PXA168_CLK_GPIO>;
  98                                 interrupt-names = "gpio_mux";
  99                                 interrupt-controller;
 100                                 #interrupt-cells = <1>;
 101                                 ranges;
 102
 103                                 gcb0: gpio@d4019000 {
 104                                         reg = <0xd4019000 0x4>;
 105                                 };
 106
 107                                 gcb1: gpio@d4019004 {
 108                                         reg = <0xd4019004 0x4>;
 109                                 };
 110
 111                                 gcb2: gpio@d4019008 {
 112                                         reg = <0xd4019008 0x4>;
 113                                 };
 114
 115                                 gcb3: gpio@d4019100 {
 116                                         reg = <0xd4019100 0x4>;
 117                                 };
 118                         };
 119
 120                         twsi1: i2c@d4011000 {
 121                                 compatible = "mrvl,mmp-twsi";
 122                                 reg = <0xd4011000 0x1000>;
 123                                 interrupts = <7>;
 124                                 clocks = <&soc_clocks PXA168_CLK_TWSI0>;
 125                                 resets = <&soc_clocks PXA168_CLK_TWSI0>;
 126                                 mrvl,i2c-fast-mode;
 127                                 status = "disabled";
 128                         };
 129
 130                         twsi2: i2c@d4025000 {
 131                                 compatible = "mrvl,mmp-twsi";
 132                                 reg = <0xd4025000 0x1000>;
 133                                 interrupts = <58>;
 134                                 clocks = <&soc_clocks PXA168_CLK_TWSI1>;
 135                                 resets = <&soc_clocks PXA168_CLK_TWSI1>;
 136                                 status = "disabled";
 137                         };
 138
 139                         rtc: rtc@d4010000 {
 140                                 compatible = "mrvl,mmp-rtc";
 141                                 reg = <0xd4010000 0x1000>;
 142                                 interrupts = <5 6>;
 143                                 interrupt-names = "rtc 1Hz", "rtc alarm";
 144                                 clocks = <&soc_clocks PXA168_CLK_RTC>;
 145                                 resets = <&soc_clocks PXA168_CLK_RTC>;
 146                                 status = "disabled";
 147                         };
 148                 };
 149
 150                 soc_clocks: clocks{
 151                         compatible = "marvell,pxa168-clock";
 152                         reg = <0xd4050000 0x1000>,
 153                               <0xd4282800 0x400>,
 154                               <0xd4015000 0x1000>;
 155                         reg-names = "mpmu", "apmu", "apbc";
 156                         #clock-cells = <1>;
 157                         #reset-cells = <1>;
 158                 };
 159         };
 160 };