arch/arm/boot/dts/picoxcell-pc3x2.dtsi

   1 /*
   2  *  Copyright (C) 2011 Picochip, Jamie Iles
   3  *
   4  * This software is licensed under the terms of the GNU General Public
   5  * License version 2, as published by the Free Software Foundation, and
   6  * may be copied, distributed, and modified under those terms.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13 / {
  14         model = "Picochip picoXcell PC3X2";
  15         compatible = "picochip,pc3x2";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18
  19         cpus {
  20                 #address-cells = <0>;
  21                 #size-cells = <0>;
  22
  23                 cpu {
  24                         compatible = "arm,arm1176jz-s";
  25                         device_type = "cpu";
  26                         clock-frequency = <400000000>;
  27                         d-cache-line-size = <32>;
  28                         d-cache-size = <32768>;
  29                         i-cache-line-size = <32>;
  30                         i-cache-size = <32768>;
  31                 };
  32         };
  33
  34         clocks {
  35                 #address-cells = <1>;
  36                 #size-cells = <1>;
  37                 ranges;
  38
  39                 pclk: clock@0 {
  40                         compatible = "fixed-clock";
  41                         clock-outputs = "bus", "pclk";
  42                         clock-frequency = <200000000>;
  43                         ref-clock = <&ref_clk>, "ref";
  44                 };
  45         };
  46
  47         paxi {
  48                 compatible = "simple-bus";
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51                 ranges = <0 0x80000000 0x400000>;
  52
  53                 emac: gem@30000 {
  54                         compatible = "cadence,gem";
  55                         reg = <0x30000 0x10000>;
  56                         interrupts = <31>;
  57                 };
  58
  59                 dmac1: dmac@40000 {
  60                         compatible = "snps,dw-dmac";
  61                         reg = <0x40000 0x10000>;
  62                         interrupts = <25>;
  63                 };
  64
  65                 dmac2: dmac@50000 {
  66                         compatible = "snps,dw-dmac";
  67                         reg = <0x50000 0x10000>;
  68                         interrupts = <26>;
  69                 };
  70
  71                 vic0: interrupt-controller@60000 {
  72                         compatible = "arm,pl192-vic";
  73                         interrupt-controller;
  74                         reg = <0x60000 0x1000>;
  75                         #interrupt-cells = <1>;
  76                 };
  77
  78                 vic1: interrupt-controller@64000 {
  79                         compatible = "arm,pl192-vic";
  80                         interrupt-controller;
  81                         reg = <0x64000 0x1000>;
  82                         #interrupt-cells = <1>;
  83                 };
  84
  85                 fuse: picoxcell-fuse@80000 {
  86                         compatible = "picoxcell,fuse-pc3x2";
  87                         reg = <0x80000 0x10000>;
  88                 };
  89
  90                 ssi: picoxcell-spi@90000 {
  91                         compatible = "picoxcell,spi";
  92                         reg = <0x90000 0x10000>;
  93                         interrupt-parent = <&vic0>;
  94                         interrupts = <10>;
  95                 };
  96
  97                 ipsec: spacc@100000 {
  98                         compatible = "picochip,spacc-ipsec";
  99                         reg = <0x100000 0x10000>;
 100                         interrupt-parent = <&vic0>;
 101                         interrupts = <24>;
 102                         ref-clock = <&pclk>, "ref";
 103                 };
 104
 105                 srtp: spacc@140000 {
 106                         compatible = "picochip,spacc-srtp";
 107                         reg = <0x140000 0x10000>;
 108                         interrupt-parent = <&vic0>;
 109                         interrupts = <23>;
 110                 };
 111
 112                 l2_engine: spacc@180000 {
 113                         compatible = "picochip,spacc-l2";
 114                         reg = <0x180000 0x10000>;
 115                         interrupt-parent = <&vic0>;
 116                         interrupts = <22>;
 117                         ref-clock = <&pclk>, "ref";
 118                 };
 119
 120                 apb {
 121                         compatible = "simple-bus";
 122                         #address-cells = <1>;
 123                         #size-cells = <1>;
 124                         ranges = <0 0x200000 0x80000>;
 125
 126                         rtc0: rtc@0 {
 127                                 compatible = "picochip,pc3x2-rtc";
 128                                 clock-freq = <200000000>;
 129                                 reg = <0x00000 0xf>;
 130                                 interrupt-parent = <&vic1>;
 131                                 interrupts = <8>;
 132                         };
 133
 134                         timer0: timer@10000 {
 135                                 compatible = "picochip,pc3x2-timer";
 136                                 interrupt-parent = <&vic0>;
 137                                 interrupts = <4>;
 138                                 clock-freq = <200000000>;
 139                                 reg = <0x10000 0x14>;
 140                         };
 141
 142                         timer1: timer@10014 {
 143                                 compatible = "picochip,pc3x2-timer";
 144                                 interrupt-parent = <&vic0>;
 145                                 interrupts = <5>;
 146                                 clock-freq = <200000000>;
 147                                 reg = <0x10014 0x14>;
 148                         };
 149
 150                         timer2: timer@10028 {
 151                                 compatible = "picochip,pc3x2-timer";
 152                                 interrupt-parent = <&vic0>;
 153                                 interrupts = <6>;
 154                                 clock-freq = <200000000>;
 155                                 reg = <0x10028 0x14>;
 156                         };
 157
 158                         timer3: timer@1003c {
 159                                 compatible = "picochip,pc3x2-timer";
 160                                 interrupt-parent = <&vic0>;
 161                                 interrupts = <7>;
 162                                 clock-freq = <200000000>;
 163                                 reg = <0x1003c 0x14>;
 164                         };
 165
 166                         gpio: gpio@20000 {
 167                                 compatible = "snps,dw-apb-gpio";
 168                                 reg = <0x20000 0x1000>;
 169                                 #address-cells = <1>;
 170                                 #size-cells = <0>;
 171                                 reg-io-width = <4>;
 172
 173                                 banka: gpio-controller@0 {
 174                                         compatible = "snps,dw-apb-gpio-bank";
 175                                         gpio-controller;
 176                                         #gpio-cells = <2>;
 177                                         gpio-generic,nr-gpio = <8>;
 178
 179                                         regoffset-dat = <0x50>;
 180                                         regoffset-set = <0x00>;
 181                                         regoffset-dirout = <0x04>;
 182                                 };
 183
 184                                 bankb: gpio-controller@1 {
 185                                         compatible = "snps,dw-apb-gpio-bank";
 186                                         gpio-controller;
 187                                         #gpio-cells = <2>;
 188                                         gpio-generic,nr-gpio = <8>;
 189
 190                                         regoffset-dat = <0x54>;
 191                                         regoffset-set = <0x0c>;
 192                                         regoffset-dirout = <0x10>;
 193                                 };
 194                         };
 195
 196                         uart0: uart@30000 {
 197                                 compatible = "snps,dw-apb-uart";
 198                                 reg = <0x30000 0x1000>;
 199                                 interrupt-parent = <&vic1>;
 200                                 interrupts = <10>;
 201                                 clock-frequency = <3686400>;
 202                                 reg-shift = <2>;
 203                                 reg-io-width = <4>;
 204                         };
 205
 206                         uart1: uart@40000 {
 207                                 compatible = "snps,dw-apb-uart";
 208                                 reg = <0x40000 0x1000>;
 209                                 interrupt-parent = <&vic1>;
 210                                 interrupts = <9>;
 211                                 clock-frequency = <3686400>;
 212                                 reg-shift = <2>;
 213                                 reg-io-width = <4>;
 214                         };
 215
 216                         wdog: watchdog@50000 {
 217                                 compatible = "snps,dw-apb-wdg";
 218                                 reg = <0x50000 0x10000>;
 219                                 interrupt-parent = <&vic0>;
 220                                 interrupts = <11>;
 221                                 bus-clock = <&pclk>, "bus";
 222                         };
 223                 };
 224         };
 225
 226         rwid-axi {
 227                 #address-cells = <1>;
 228                 #size-cells = <1>;
 229                 compatible = "simple-bus";
 230                 ranges;
 231
 232                 ebi@50000000 {
 233                         compatible = "simple-bus";
 234                         #address-cells = <2>;
 235                         #size-cells = <1>;
 236                         ranges = <0 0 0x40000000 0x08000000
 237                                   1 0 0x48000000 0x08000000
 238                                   2 0 0x50000000 0x08000000
 239                                   3 0 0x58000000 0x08000000>;
 240                 };
 241
 242                 axi2pico@c0000000 {
 243                         compatible = "picochip,axi2pico-pc3x2";
 244                         reg = <0xc0000000 0x10000>;
 245                         interrupts = <13 14 15 16 17 18 19 20 21>;
 246                 };
 247         };
 248 };