arch/arm/boot/dts/omap5-l4.dtsi

   1 &l4_cfg {                                               /* 0x4a000000 */
   2         compatible = "ti,omap5-l4-cfg", "simple-bus";
   3         reg = <0x4a000000 0x800>,
   4               <0x4a000800 0x800>,
   5               <0x4a001000 0x1000>;
   6         reg-names = "ap", "la", "ia0";
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  10                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  11                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  12                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  13                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  14                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  15                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  16
  17         segment@0 {                                     /* 0x4a000000 */
  18                 compatible = "simple-bus";
  19                 #address-cells = <1>;
  20                 #size-cells = <1>;
  21                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  22                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  23                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  24                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  25                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  26                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  27                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  28                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  29                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  30                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  31                          <0x00058000 0x00058000 0x001000>,      /* ap 10 */
  32                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  33                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  34                          <0x00008000 0x00008000 0x002000>,      /* ap 21 */
  35                          <0x0000a000 0x0000a000 0x001000>,      /* ap 22 */
  36                          <0x00066000 0x00066000 0x001000>,      /* ap 23 */
  37                          <0x00067000 0x00067000 0x001000>,      /* ap 24 */
  38                          <0x0005e000 0x0005e000 0x002000>,      /* ap 69 */
  39                          <0x00060000 0x00060000 0x001000>,      /* ap 70 */
  40                          <0x00064000 0x00064000 0x001000>,      /* ap 71 */
  41                          <0x00065000 0x00065000 0x001000>,      /* ap 72 */
  42                          <0x0005a000 0x0005a000 0x001000>,      /* ap 77 */
  43                          <0x0005b000 0x0005b000 0x001000>,      /* ap 78 */
  44                          <0x00070000 0x00070000 0x004000>,      /* ap 79 */
  45                          <0x00074000 0x00074000 0x001000>,      /* ap 80 */
  46                          <0x00075000 0x00075000 0x001000>,      /* ap 81 */
  47                          <0x00076000 0x00076000 0x001000>,      /* ap 82 */
  48                          <0x00020000 0x00020000 0x020000>,      /* ap 109 */
  49                          <0x00040000 0x00040000 0x001000>,      /* ap 110 */
  50                          <0x00059000 0x00059000 0x001000>;      /* ap 111 */
  51
  52                 target-module@2000 {                    /* 0x4a002000, ap 3 44.0 */
  53                         compatible = "ti,sysc-omap4", "ti,sysc";
  54                         reg = <0x2000 0x4>;
  55                         reg-names = "rev";
  56                         #address-cells = <1>;
  57                         #size-cells = <1>;
  58                         ranges = <0x0 0x2000 0x1000>;
  59
  60                         scm_core: scm@0 {
  61                                 compatible = "ti,omap5-scm-core", "simple-bus";
  62                                 reg = <0x0 0x1000>;
  63                                 #address-cells = <1>;
  64                                 #size-cells = <1>;
  65                                 ranges = <0 0 0x800>;
  66
  67                                 scm_conf: scm_conf@0 {
  68                                         compatible = "syscon";
  69                                         reg = <0x0 0x800>;
  70                                         #address-cells = <1>;
  71                                         #size-cells = <1>;
  72                                 };
  73                         };
  74
  75                         scm_padconf_core: scm@800 {
  76                                 compatible = "ti,omap5-scm-padconf-core",
  77                                              "simple-bus";
  78                                 #address-cells = <1>;
  79                                 #size-cells = <1>;
  80                                 ranges = <0 0x800 0x800>;
  81
  82                                 omap5_pmx_core: pinmux@40 {
  83                                         compatible = "ti,omap5-padconf",
  84                                                      "pinctrl-single";
  85                                         reg = <0x40 0x01b6>;
  86                                         #address-cells = <1>;
  87                                         #size-cells = <0>;
  88                                         #pinctrl-cells = <1>;
  89                                         #interrupt-cells = <1>;
  90                                         interrupt-controller;
  91                                         pinctrl-single,register-width = <16>;
  92                                         pinctrl-single,function-mask = <0x7fff>;
  93                                 };
  94
  95                                 omap5_padconf_global: omap5_padconf_global@5a0 {
  96                                         compatible = "syscon",
  97                                                      "simple-bus";
  98                                         reg = <0x5a0 0xec>;
  99                                         #address-cells = <1>;
 100                                         #size-cells = <1>;
 101                                         ranges = <0 0x5a0 0xec>;
 102
 103                                         pbias_regulator: pbias_regulator@60 {
 104                                                 compatible = "ti,pbias-omap5", "ti,pbias-omap";
 105                                                 reg = <0x60 0x4>;
 106                                                 syscon = <&omap5_padconf_global>;
 107                                                 pbias_mmc_reg: pbias_mmc_omap5 {
 108                                                         regulator-name = "pbias_mmc_omap5";
 109                                                         regulator-min-microvolt = <1800000>;
 110                                                         regulator-max-microvolt = <3300000>;
 111                                                 };
 112                                         };
 113                                 };
 114                         };
 115                 };
 116
 117                 target-module@4000 {                    /* 0x4a004000, ap 5 5c.0 */
 118                         compatible = "ti,sysc-omap4", "ti,sysc";
 119                         reg = <0x4000 0x4>;
 120                         reg-names = "rev";
 121                         #address-cells = <1>;
 122                         #size-cells = <1>;
 123                         ranges = <0x0 0x4000 0x1000>;
 124
 125                         cm_core_aon: cm_core_aon@0 {
 126                                 compatible = "ti,omap5-cm-core-aon",
 127                                              "simple-bus";
 128                                 reg = <0x0 0x2000>;
 129                                 #address-cells = <1>;
 130                                 #size-cells = <1>;
 131                                 ranges = <0 0 0x1000>;
 132
 133                                 cm_core_aon_clocks: clocks {
 134                                         #address-cells = <1>;
 135                                         #size-cells = <0>;
 136                                 };
 137
 138                                 cm_core_aon_clockdomains: clockdomains {
 139                                 };
 140                         };
 141                 };
 142
 143                 target-module@8000 {                    /* 0x4a008000, ap 21 4c.0 */
 144                         compatible = "ti,sysc-omap4", "ti,sysc";
 145                         reg = <0x8000 0x4>;
 146                         reg-names = "rev";
 147                         #address-cells = <1>;
 148                         #size-cells = <1>;
 149                         ranges = <0x0 0x8000 0x2000>;
 150
 151                         cm_core: cm_core@0 {
 152                                 compatible = "ti,omap5-cm-core", "simple-bus";
 153                                 reg = <0x0 0x2000>;
 154                                 #address-cells = <1>;
 155                                 #size-cells = <1>;
 156                                 ranges = <0 0 0x2000>;
 157
 158                                 cm_core_clocks: clocks {
 159                                         #address-cells = <1>;
 160                                         #size-cells = <0>;
 161                                 };
 162
 163                                 cm_core_clockdomains: clockdomains {
 164                                 };
 165                         };
 166                 };
 167
 168                 target-module@20000 {                   /* 0x4a020000, ap 109 08.0 */
 169                         compatible = "ti,sysc-omap4", "ti,sysc";
 170                         ti,hwmods = "usb_otg_ss";
 171                         reg = <0x20000 0x4>,
 172                               <0x20010 0x4>;
 173                         reg-names = "rev", "sysc";
 174                         ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
 175                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 176                                         <SYSC_IDLE_NO>,
 177                                         <SYSC_IDLE_SMART>,
 178                                         <SYSC_IDLE_SMART_WKUP>;
 179                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 180                                         <SYSC_IDLE_NO>,
 181                                         <SYSC_IDLE_SMART>,
 182                                         <SYSC_IDLE_SMART_WKUP>;
 183                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 184                         clocks = <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 0>;
 185                         clock-names = "fck";
 186                         #address-cells = <1>;
 187                         #size-cells = <1>;
 188                         ranges = <0x0 0x20000 0x20000>;
 189
 190                         usb3: omap_dwc3@0 {
 191                                 compatible = "ti,dwc3";
 192                                 reg = <0x0 0x10000>;
 193                                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 194                                 #address-cells = <1>;
 195                                 #size-cells = <1>;
 196                                 utmi-mode = <2>;
 197                                 ranges = <0 0 0x20000>;
 198                                 dwc3: dwc3@10000 {
 199                                         compatible = "snps,dwc3";
 200                                         reg = <0x10000 0x10000>;
 201                                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
 202                                                      <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
 203                                                      <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 204                                         interrupt-names = "peripheral",
 205                                                           "host",
 206                                                           "otg";
 207                                         phys = <&usb2_phy>, <&usb3_phy>;
 208                                         phy-names = "usb2-phy", "usb3-phy";
 209                                         dr_mode = "peripheral";
 210                                 };
 211                         };
 212                 };
 213
 214                 target-module@56000 {                   /* 0x4a056000, ap 7 02.0 */
 215                         compatible = "ti,sysc-omap2", "ti,sysc";
 216                         ti,hwmods = "dma_system";
 217                         reg = <0x56000 0x4>,
 218                               <0x5602c 0x4>,
 219                               <0x56028 0x4>;
 220                         reg-names = "rev", "sysc", "syss";
 221                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 222                                          SYSC_OMAP2_EMUFREE |
 223                                          SYSC_OMAP2_SOFTRESET |
 224                                          SYSC_OMAP2_AUTOIDLE)>;
 225                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 226                                         <SYSC_IDLE_NO>,
 227                                         <SYSC_IDLE_SMART>;
 228                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 229                                         <SYSC_IDLE_NO>,
 230                                         <SYSC_IDLE_SMART>;
 231                         ti,syss-mask = <1>;
 232                         /* Domains (V, P, C): core, core_pwrdm, dma_clkdm */
 233                         clocks = <&dma_clkctrl OMAP5_DMA_SYSTEM_CLKCTRL 0>;
 234                         clock-names = "fck";
 235                         #address-cells = <1>;
 236                         #size-cells = <1>;
 237                         ranges = <0x0 0x56000 0x1000>;
 238
 239                         sdma: dma-controller@0 {
 240                                 compatible = "ti,omap4430-sdma";
 241                                 reg = <0x0 0x1000>;
 242                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 243                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 244                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 245                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 246                                 #dma-cells = <1>;
 247                                 dma-channels = <32>;
 248                                 dma-requests = <127>;
 249                         };
 250                 };
 251
 252                 target-module@58000 {                   /* 0x4a058000, ap 10 06.0 */
 253                         compatible = "ti,sysc";
 254                         status = "disabled";
 255                         #address-cells = <1>;
 256                         #size-cells = <1>;
 257                         ranges = <0x00000000 0x00058000 0x00001000>,
 258                                  <0x00001000 0x00059000 0x00001000>,
 259                                  <0x00002000 0x0005a000 0x00001000>,
 260                                  <0x00003000 0x0005b000 0x00001000>;
 261                 };
 262
 263                 target-module@5e000 {                   /* 0x4a05e000, ap 69 2a.0 */
 264                         compatible = "ti,sysc";
 265                         status = "disabled";
 266                         #address-cells = <1>;
 267                         #size-cells = <1>;
 268                         ranges = <0x0 0x5e000 0x2000>;
 269                 };
 270
 271                 target-module@62000 {                   /* 0x4a062000, ap 11 0e.0 */
 272                         compatible = "ti,sysc-omap2", "ti,sysc";
 273                         ti,hwmods = "usb_tll_hs";
 274                         reg = <0x62000 0x4>,
 275                               <0x62010 0x4>,
 276                               <0x62014 0x4>;
 277                         reg-names = "rev", "sysc", "syss";
 278                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 279                                          SYSC_OMAP2_ENAWAKEUP |
 280                                          SYSC_OMAP2_SOFTRESET |
 281                                          SYSC_OMAP2_AUTOIDLE)>;
 282                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 283                                         <SYSC_IDLE_NO>,
 284                                         <SYSC_IDLE_SMART>;
 285                         ti,syss-mask = <1>;
 286                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 287                         clocks = <&l3init_clkctrl OMAP5_USB_TLL_HS_CLKCTRL 0>;
 288                         clock-names = "fck";
 289                         #address-cells = <1>;
 290                         #size-cells = <1>;
 291                         ranges = <0x0 0x62000 0x1000>;
 292
 293                         usbhstll: usbhstll@0 {
 294                                 compatible = "ti,usbhs-tll";
 295                                 reg = <0x0 0x1000>;
 296                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 297                         };
 298                 };
 299
 300                 target-module@64000 {                   /* 0x4a064000, ap 71 1e.0 */
 301                         compatible = "ti,sysc-omap4", "ti,sysc";
 302                         ti,hwmods = "usb_host_hs";
 303                         reg = <0x64000 0x4>,
 304                               <0x64010 0x4>;
 305                         reg-names = "rev", "sysc";
 306                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 307                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 308                                         <SYSC_IDLE_NO>,
 309                                         <SYSC_IDLE_SMART>,
 310                                         <SYSC_IDLE_SMART_WKUP>;
 311                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 312                                         <SYSC_IDLE_NO>,
 313                                         <SYSC_IDLE_SMART>,
 314                                         <SYSC_IDLE_SMART_WKUP>;
 315                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 316                         clocks = <&l3init_clkctrl OMAP5_USB_HOST_HS_CLKCTRL 0>;
 317                         clock-names = "fck";
 318                         #address-cells = <1>;
 319                         #size-cells = <1>;
 320                         ranges = <0x0 0x64000 0x1000>;
 321
 322                         usbhshost: usbhshost@0 {
 323                                 compatible = "ti,usbhs-host";
 324                                 reg = <0x0 0x800>;
 325                                 #address-cells = <1>;
 326                                 #size-cells = <1>;
 327                                 ranges = <0 0 0x1000>;
 328                                 clocks = <&l3init_60m_fclk>,
 329                                          <&xclk60mhsp1_ck>,
 330                                          <&xclk60mhsp2_ck>;
 331                                 clock-names = "refclk_60m_int",
 332                                               "refclk_60m_ext_p1",
 333                                               "refclk_60m_ext_p2";
 334
 335                                 usbhsohci: ohci@800 {
 336                                         compatible = "ti,ohci-omap3";
 337                                         reg = <0x800 0x400>;
 338                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 339                                         remote-wakeup-connected;
 340                                 };
 341
 342                                 usbhsehci: ehci@c00 {
 343                                         compatible = "ti,ehci-omap";
 344                                         reg = <0xc00 0x400>;
 345                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 346                                 };
 347                         };
 348                 };
 349
 350                 target-module@66000 {                   /* 0x4a066000, ap 23 0a.0 */
 351                         compatible = "ti,sysc-omap2", "ti,sysc";
 352                         ti,hwmods = "mmu_dsp";
 353                         reg = <0x66000 0x4>,
 354                               <0x66010 0x4>,
 355                               <0x66014 0x4>;
 356                         reg-names = "rev", "sysc", "syss";
 357                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 358                                          SYSC_OMAP2_SOFTRESET |
 359                                          SYSC_OMAP2_AUTOIDLE)>;
 360                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 361                                         <SYSC_IDLE_NO>,
 362                                         <SYSC_IDLE_SMART>;
 363                         ti,syss-mask = <1>;
 364                         /* Domains (V, P, C): mm, dsp_pwrdm, dsp_clkdm */
 365                         clocks = <&dsp_clkctrl OMAP5_MMU_DSP_CLKCTRL 0>;
 366                         clock-names = "fck";
 367                         #address-cells = <1>;
 368                         #size-cells = <1>;
 369                         ranges = <0x0 0x66000 0x1000>;
 370
 371                         /* mmu_dsp cannot be moved before reset driver */
 372                         status = "disabled";
 373                 };
 374
 375                 target-module@70000 {                   /* 0x4a070000, ap 79 2e.0 */
 376                         compatible = "ti,sysc";
 377                         status = "disabled";
 378                         #address-cells = <1>;
 379                         #size-cells = <1>;
 380                         ranges = <0x0 0x70000 0x4000>;
 381                 };
 382
 383                 target-module@75000 {                   /* 0x4a075000, ap 81 32.0 */
 384                         compatible = "ti,sysc";
 385                         status = "disabled";
 386                         #address-cells = <1>;
 387                         #size-cells = <1>;
 388                         ranges = <0x0 0x75000 0x1000>;
 389                 };
 390         };
 391
 392         segment@80000 {                                 /* 0x4a080000 */
 393                 compatible = "simple-bus";
 394                 #address-cells = <1>;
 395                 #size-cells = <1>;
 396                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 397                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 398                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 399                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 400                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 401                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 402                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 403                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 404                          <0x00074000 0x000f4000 0x001000>,      /* ap 25 */
 405                          <0x00075000 0x000f5000 0x001000>,      /* ap 26 */
 406                          <0x00076000 0x000f6000 0x001000>,      /* ap 27 */
 407                          <0x00077000 0x000f7000 0x001000>,      /* ap 28 */
 408                          <0x00036000 0x000b6000 0x001000>,      /* ap 65 */
 409                          <0x00037000 0x000b7000 0x001000>,      /* ap 66 */
 410                          <0x0004d000 0x000cd000 0x001000>,      /* ap 67 */
 411                          <0x0004e000 0x000ce000 0x001000>,      /* ap 68 */
 412                          <0x00000000 0x00080000 0x004000>,      /* ap 83 */
 413                          <0x00004000 0x00084000 0x001000>,      /* ap 84 */
 414                          <0x00005000 0x00085000 0x001000>,      /* ap 85 */
 415                          <0x00006000 0x00086000 0x001000>,      /* ap 86 */
 416                          <0x00007000 0x00087000 0x001000>,      /* ap 87 */
 417                          <0x00008000 0x00088000 0x001000>,      /* ap 88 */
 418                          <0x00010000 0x00090000 0x004000>,      /* ap 89 */
 419                          <0x00014000 0x00094000 0x001000>,      /* ap 90 */
 420                          <0x00015000 0x00095000 0x001000>,      /* ap 91 */
 421                          <0x00016000 0x00096000 0x001000>,      /* ap 92 */
 422                          <0x00017000 0x00097000 0x001000>,      /* ap 93 */
 423                          <0x00018000 0x00098000 0x001000>,      /* ap 94 */
 424                          <0x00020000 0x000a0000 0x004000>,      /* ap 95 */
 425                          <0x00024000 0x000a4000 0x001000>,      /* ap 96 */
 426                          <0x00025000 0x000a5000 0x001000>,      /* ap 97 */
 427                          <0x00026000 0x000a6000 0x001000>,      /* ap 98 */
 428                          <0x00027000 0x000a7000 0x001000>,      /* ap 99 */
 429                          <0x00028000 0x000a8000 0x001000>;      /* ap 100 */
 430
 431                 target-module@0 {                       /* 0x4a080000, ap 83 28.0 */
 432                         compatible = "ti,sysc-omap2", "ti,sysc";
 433                         ti,hwmods = "ocp2scp1";
 434                         reg = <0x0 0x4>,
 435                               <0x10 0x4>,
 436                               <0x14 0x4>;
 437                         reg-names = "rev", "sysc", "syss";
 438                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 439                                          SYSC_OMAP2_AUTOIDLE)>;
 440                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 441                                         <SYSC_IDLE_NO>,
 442                                         <SYSC_IDLE_SMART>;
 443                         ti,syss-mask = <1>;
 444                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 445                         clocks = <&l3init_clkctrl OMAP5_OCP2SCP1_CLKCTRL 0>;
 446                         clock-names = "fck";
 447                         #address-cells = <1>;
 448                         #size-cells = <1>;
 449                         ranges = <0x00000000 0x00000000 0x00004000>,
 450                                  <0x00004000 0x00004000 0x00001000>,
 451                                  <0x00005000 0x00005000 0x00001000>,
 452                                  <0x00006000 0x00006000 0x00001000>,
 453                                  <0x00007000 0x00007000 0x00001000>;
 454
 455                         ocp2scp@0 {
 456                                 compatible = "ti,omap-ocp2scp";
 457                                 #address-cells = <1>;
 458                                 #size-cells = <1>;
 459                                 reg = <0 0x20>;
 460                         };
 461
 462                         usb2_phy: usb2phy@4000 {
 463                                 compatible = "ti,omap-usb2";
 464                                 reg = <0x4000 0x7c>;
 465                                 syscon-phy-power = <&scm_conf 0x300>;
 466                                 clocks = <&usb_phy_cm_clk32k>,
 467                                 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
 468                                 clock-names = "wkupclk", "refclk";
 469                                 #phy-cells = <0>;
 470                         };
 471
 472                         usb3_phy: usb3phy@4400 {
 473                                 compatible = "ti,omap-usb3";
 474                                 reg = <0x4400 0x80>,
 475                                 <0x4800 0x64>,
 476                                 <0x4c00 0x40>;
 477                                 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
 478                                 syscon-phy-power = <&scm_conf 0x370>;
 479                                 clocks = <&usb_phy_cm_clk32k>,
 480                                 <&sys_clkin>,
 481                                 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
 482                                 clock-names =   "wkupclk",
 483                                 "sysclk",
 484                                 "refclk";
 485                                 #phy-cells = <0>;
 486                         };
 487                 };
 488
 489                 target-module@10000 {                   /* 0x4a090000, ap 89 36.0 */
 490                         compatible = "ti,sysc-omap2", "ti,sysc";
 491                         ti,hwmods = "ocp2scp3";
 492                         reg = <0x10000 0x4>,
 493                               <0x10010 0x4>,
 494                               <0x10014 0x4>;
 495                         reg-names = "rev", "sysc", "syss";
 496                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 497                                          SYSC_OMAP2_AUTOIDLE)>;
 498                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 499                                         <SYSC_IDLE_NO>,
 500                                         <SYSC_IDLE_SMART>;
 501                         ti,syss-mask = <1>;
 502                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 503                         clocks = <&l3init_clkctrl OMAP5_OCP2SCP3_CLKCTRL 0>;
 504                         clock-names = "fck";
 505                         #address-cells = <1>;
 506                         #size-cells = <1>;
 507                         ranges = <0x00000000 0x00010000 0x00004000>,
 508                                  <0x00004000 0x00014000 0x00001000>,
 509                                  <0x00005000 0x00015000 0x00001000>,
 510                                  <0x00006000 0x00016000 0x00001000>,
 511                                  <0x00007000 0x00017000 0x00001000>;
 512
 513                                 ocp2scp@0 {
 514                                         compatible = "ti,omap-ocp2scp";
 515                                         #address-cells = <1>;
 516                                         #size-cells = <1>;
 517                                         reg = <0x0 0x20>;
 518                                 };
 519
 520                                 sata_phy: phy@6000 {
 521                                         compatible = "ti,phy-pipe3-sata";
 522                                         reg = <0x6000 0x80>, /* phy_rx */
 523                                               <0x6400 0x64>, /* phy_tx */
 524                                               <0x6800 0x40>; /* pll_ctrl */
 525                                         reg-names = "phy_rx", "phy_tx", "pll_ctrl";
 526                                         syscon-phy-power = <&scm_conf 0x374>;
 527                                         clocks = <&sys_clkin>,
 528                                                  <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
 529                                         clock-names = "sysclk", "refclk";
 530                                         #phy-cells = <0>;
 531                                 };
 532                 };
 533
 534                 target-module@20000 {                   /* 0x4a0a0000, ap 95 50.0 */
 535                         compatible = "ti,sysc";
 536                         status = "disabled";
 537                         #address-cells = <1>;
 538                         #size-cells = <1>;
 539                         ranges = <0x00000000 0x00020000 0x00004000>,
 540                                  <0x00004000 0x00024000 0x00001000>,
 541                                  <0x00005000 0x00025000 0x00001000>,
 542                                  <0x00006000 0x00026000 0x00001000>,
 543                                  <0x00007000 0x00027000 0x00001000>;
 544                 };
 545
 546                 target-module@36000 {                   /* 0x4a0b6000, ap 65 6c.0 */
 547                         compatible = "ti,sysc";
 548                         status = "disabled";
 549                         #address-cells = <1>;
 550                         #size-cells = <1>;
 551                         ranges = <0x0 0x36000 0x1000>;
 552                 };
 553
 554                 target-module@4d000 {                   /* 0x4a0cd000, ap 67 64.0 */
 555                         compatible = "ti,sysc";
 556                         status = "disabled";
 557                         #address-cells = <1>;
 558                         #size-cells = <1>;
 559                         ranges = <0x0 0x4d000 0x1000>;
 560                 };
 561
 562                 target-module@59000 {                   /* 0x4a0d9000, ap 13 20.0 */
 563                         compatible = "ti,sysc";
 564                         status = "disabled";
 565                         #address-cells = <1>;
 566                         #size-cells = <1>;
 567                         ranges = <0x0 0x59000 0x1000>;
 568                 };
 569
 570                 target-module@5b000 {                   /* 0x4a0db000, ap 15 10.0 */
 571                         compatible = "ti,sysc";
 572                         status = "disabled";
 573                         #address-cells = <1>;
 574                         #size-cells = <1>;
 575                         ranges = <0x0 0x5b000 0x1000>;
 576                 };
 577
 578                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 18.0 */
 579                         compatible = "ti,sysc";
 580                         status = "disabled";
 581                         #address-cells = <1>;
 582                         #size-cells = <1>;
 583                         ranges = <0x0 0x5d000 0x1000>;
 584                 };
 585
 586                 target-module@60000 {                   /* 0x4a0e0000, ap 19 54.0 */
 587                         compatible = "ti,sysc";
 588                         status = "disabled";
 589                         #address-cells = <1>;
 590                         #size-cells = <1>;
 591                         ranges = <0x0 0x60000 0x1000>;
 592                 };
 593
 594                 target-module@74000 {                   /* 0x4a0f4000, ap 25 04.0 */
 595                         compatible = "ti,sysc-omap4", "ti,sysc";
 596                         ti,hwmods = "mailbox";
 597                         reg = <0x74000 0x4>,
 598                               <0x74010 0x4>;
 599                         reg-names = "rev", "sysc";
 600                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 601                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 602                                         <SYSC_IDLE_NO>,
 603                                         <SYSC_IDLE_SMART>;
 604                         /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
 605                         clocks = <&l4cfg_clkctrl OMAP5_MAILBOX_CLKCTRL 0>;
 606                         clock-names = "fck";
 607                         #address-cells = <1>;
 608                         #size-cells = <1>;
 609                         ranges = <0x0 0x74000 0x1000>;
 610
 611                         mailbox: mailbox@0 {
 612                                 compatible = "ti,omap4-mailbox";
 613                                 reg = <0x0 0x200>;
 614                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 615                                 #mbox-cells = <1>;
 616                                 ti,mbox-num-users = <3>;
 617                                 ti,mbox-num-fifos = <8>;
 618                                 mbox_ipu: mbox_ipu {
 619                                         ti,mbox-tx = <0 0 0>;
 620                                         ti,mbox-rx = <1 0 0>;
 621                                 };
 622                                 mbox_dsp: mbox_dsp {
 623                                         ti,mbox-tx = <3 0 0>;
 624                                         ti,mbox-rx = <2 0 0>;
 625                                 };
 626                         };
 627                 };
 628
 629                 target-module@76000 {                   /* 0x4a0f6000, ap 27 0c.0 */
 630                         compatible = "ti,sysc-omap2", "ti,sysc";
 631                         ti,hwmods = "spinlock";
 632                         reg = <0x76000 0x4>,
 633                               <0x76010 0x4>,
 634                               <0x76014 0x4>;
 635                         reg-names = "rev", "sysc", "syss";
 636                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 637                                          SYSC_OMAP2_ENAWAKEUP |
 638                                          SYSC_OMAP2_SOFTRESET |
 639                                          SYSC_OMAP2_AUTOIDLE)>;
 640                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 641                                         <SYSC_IDLE_NO>,
 642                                         <SYSC_IDLE_SMART>;
 643                         ti,syss-mask = <1>;
 644                         /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
 645                         clocks = <&l4cfg_clkctrl OMAP5_SPINLOCK_CLKCTRL 0>;
 646                         clock-names = "fck";
 647                         #address-cells = <1>;
 648                         #size-cells = <1>;
 649                         ranges = <0x0 0x76000 0x1000>;
 650
 651                         hwspinlock: spinlock@0 {
 652                                 compatible = "ti,omap4-hwspinlock";
 653                                 reg = <0x0 0x1000>;
 654                                 #hwlock-cells = <1>;
 655                         };
 656                 };
 657         };
 658
 659         segment@100000 {                                        /* 0x4a100000 */
 660                 compatible = "simple-bus";
 661                 #address-cells = <1>;
 662                 #size-cells = <1>;
 663                 ranges = <0x00002000 0x00102000 0x001000>,      /* ap 59 */
 664                          <0x00003000 0x00103000 0x001000>,      /* ap 60 */
 665                          <0x00008000 0x00108000 0x001000>,      /* ap 61 */
 666                          <0x00009000 0x00109000 0x001000>,      /* ap 62 */
 667                          <0x0000a000 0x0010a000 0x001000>,      /* ap 63 */
 668                          <0x0000b000 0x0010b000 0x001000>,      /* ap 64 */
 669                          <0x00040000 0x00140000 0x010000>,      /* ap 101 */
 670                          <0x00050000 0x00150000 0x001000>;      /* ap 102 */
 671
 672                 target-module@2000 {                    /* 0x4a102000, ap 59 2c.0 */
 673                         compatible = "ti,sysc";
 674                         status = "disabled";
 675                         #address-cells = <1>;
 676                         #size-cells = <1>;
 677                         ranges = <0x0 0x2000 0x1000>;
 678                 };
 679
 680                 target-module@8000 {                    /* 0x4a108000, ap 61 26.0 */
 681                         compatible = "ti,sysc";
 682                         status = "disabled";
 683                         #address-cells = <1>;
 684                         #size-cells = <1>;
 685                         ranges = <0x0 0x8000 0x1000>;
 686                 };
 687
 688                 target-module@a000 {                    /* 0x4a10a000, ap 63 22.0 */
 689                         compatible = "ti,sysc";
 690                         status = "disabled";
 691                         #address-cells = <1>;
 692                         #size-cells = <1>;
 693                         ranges = <0x0 0xa000 0x1000>;
 694                 };
 695
 696                 target-module@40000 {                   /* 0x4a140000, ap 101 16.0 */
 697                         compatible = "ti,sysc";
 698                         status = "disabled";
 699                         #address-cells = <1>;
 700                         #size-cells = <1>;
 701                         ranges = <0x0 0x40000 0x10000>;
 702                 };
 703         };
 704
 705         segment@180000 {                                        /* 0x4a180000 */
 706                 compatible = "simple-bus";
 707                 #address-cells = <1>;
 708                 #size-cells = <1>;
 709         };
 710
 711         segment@200000 {                                        /* 0x4a200000 */
 712                 compatible = "simple-bus";
 713                 #address-cells = <1>;
 714                 #size-cells = <1>;
 715                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 29 */
 716                          <0x0001f000 0x0021f000 0x001000>,      /* ap 30 */
 717                          <0x0000a000 0x0020a000 0x001000>,      /* ap 31 */
 718                          <0x0000b000 0x0020b000 0x001000>,      /* ap 32 */
 719                          <0x00006000 0x00206000 0x001000>,      /* ap 33 */
 720                          <0x00007000 0x00207000 0x001000>,      /* ap 34 */
 721                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 722                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 723                          <0x00012000 0x00212000 0x001000>,      /* ap 37 */
 724                          <0x00013000 0x00213000 0x001000>,      /* ap 38 */
 725                          <0x0000c000 0x0020c000 0x001000>,      /* ap 39 */
 726                          <0x0000d000 0x0020d000 0x001000>,      /* ap 40 */
 727                          <0x00010000 0x00210000 0x001000>,      /* ap 41 */
 728                          <0x00011000 0x00211000 0x001000>,      /* ap 42 */
 729                          <0x00016000 0x00216000 0x001000>,      /* ap 43 */
 730                          <0x00017000 0x00217000 0x001000>,      /* ap 44 */
 731                          <0x00014000 0x00214000 0x001000>,      /* ap 45 */
 732                          <0x00015000 0x00215000 0x001000>,      /* ap 46 */
 733                          <0x00018000 0x00218000 0x001000>,      /* ap 47 */
 734                          <0x00019000 0x00219000 0x001000>,      /* ap 48 */
 735                          <0x00020000 0x00220000 0x001000>,      /* ap 49 */
 736                          <0x00021000 0x00221000 0x001000>,      /* ap 50 */
 737                          <0x00026000 0x00226000 0x001000>,      /* ap 51 */
 738                          <0x00027000 0x00227000 0x001000>,      /* ap 52 */
 739                          <0x00028000 0x00228000 0x001000>,      /* ap 53 */
 740                          <0x00029000 0x00229000 0x001000>,      /* ap 54 */
 741                          <0x0002a000 0x0022a000 0x001000>,      /* ap 55 */
 742                          <0x0002b000 0x0022b000 0x001000>,      /* ap 56 */
 743                          <0x0001c000 0x0021c000 0x001000>,      /* ap 57 */
 744                          <0x0001d000 0x0021d000 0x001000>,      /* ap 58 */
 745                          <0x0001a000 0x0021a000 0x001000>,      /* ap 73 */
 746                          <0x0001b000 0x0021b000 0x001000>,      /* ap 74 */
 747                          <0x00024000 0x00224000 0x001000>,      /* ap 75 */
 748                          <0x00025000 0x00225000 0x001000>,      /* ap 76 */
 749                          <0x00002000 0x00202000 0x001000>,      /* ap 103 */
 750                          <0x00003000 0x00203000 0x001000>,      /* ap 104 */
 751                          <0x00008000 0x00208000 0x001000>,      /* ap 105 */
 752                          <0x00009000 0x00209000 0x001000>,      /* ap 106 */
 753                          <0x00022000 0x00222000 0x001000>,      /* ap 107 */
 754                          <0x00023000 0x00223000 0x001000>;      /* ap 108 */
 755
 756                 target-module@2000 {                    /* 0x4a202000, ap 103 3c.0 */
 757                         compatible = "ti,sysc";
 758                         status = "disabled";
 759                         #address-cells = <1>;
 760                         #size-cells = <1>;
 761                         ranges = <0x0 0x2000 0x1000>;
 762                 };
 763
 764                 target-module@4000 {                    /* 0x4a204000, ap 35 46.0 */
 765                         compatible = "ti,sysc";
 766                         status = "disabled";
 767                         #address-cells = <1>;
 768                         #size-cells = <1>;
 769                         ranges = <0x0 0x4000 0x1000>;
 770                 };
 771
 772                 target-module@6000 {                    /* 0x4a206000, ap 33 4e.0 */
 773                         compatible = "ti,sysc";
 774                         status = "disabled";
 775                         #address-cells = <1>;
 776                         #size-cells = <1>;
 777                         ranges = <0x0 0x6000 0x1000>;
 778                 };
 779
 780                 target-module@8000 {                    /* 0x4a208000, ap 105 34.0 */
 781                         compatible = "ti,sysc";
 782                         status = "disabled";
 783                         #address-cells = <1>;
 784                         #size-cells = <1>;
 785                         ranges = <0x0 0x8000 0x1000>;
 786                 };
 787
 788                 target-module@a000 {                    /* 0x4a20a000, ap 31 30.0 */
 789                         compatible = "ti,sysc";
 790                         status = "disabled";
 791                         #address-cells = <1>;
 792                         #size-cells = <1>;
 793                         ranges = <0x0 0xa000 0x1000>;
 794                 };
 795
 796                 target-module@c000 {                    /* 0x4a20c000, ap 39 14.0 */
 797                         compatible = "ti,sysc";
 798                         status = "disabled";
 799                         #address-cells = <1>;
 800                         #size-cells = <1>;
 801                         ranges = <0x0 0xc000 0x1000>;
 802                 };
 803
 804                 target-module@10000 {                   /* 0x4a210000, ap 41 56.0 */
 805                         compatible = "ti,sysc";
 806                         status = "disabled";
 807                         #address-cells = <1>;
 808                         #size-cells = <1>;
 809                         ranges = <0x0 0x10000 0x1000>;
 810                 };
 811
 812                 target-module@12000 {                   /* 0x4a212000, ap 37 52.0 */
 813                         compatible = "ti,sysc";
 814                         status = "disabled";
 815                         #address-cells = <1>;
 816                         #size-cells = <1>;
 817                         ranges = <0x0 0x12000 0x1000>;
 818                 };
 819
 820                 target-module@14000 {                   /* 0x4a214000, ap 45 1c.0 */
 821                         compatible = "ti,sysc";
 822                         status = "disabled";
 823                         #address-cells = <1>;
 824                         #size-cells = <1>;
 825                         ranges = <0x0 0x14000 0x1000>;
 826                 };
 827
 828                 target-module@16000 {                   /* 0x4a216000, ap 43 42.0 */
 829                         compatible = "ti,sysc";
 830                         status = "disabled";
 831                         #address-cells = <1>;
 832                         #size-cells = <1>;
 833                         ranges = <0x0 0x16000 0x1000>;
 834                 };
 835
 836                 target-module@18000 {                   /* 0x4a218000, ap 47 1a.0 */
 837                         compatible = "ti,sysc";
 838                         status = "disabled";
 839                         #address-cells = <1>;
 840                         #size-cells = <1>;
 841                         ranges = <0x0 0x18000 0x1000>;
 842                 };
 843
 844                 target-module@1a000 {                   /* 0x4a21a000, ap 73 3e.0 */
 845                         compatible = "ti,sysc";
 846                         status = "disabled";
 847                         #address-cells = <1>;
 848                         #size-cells = <1>;
 849                         ranges = <0x0 0x1a000 0x1000>;
 850                 };
 851
 852                 target-module@1c000 {                   /* 0x4a21c000, ap 57 40.0 */
 853                         compatible = "ti,sysc";
 854                         status = "disabled";
 855                         #address-cells = <1>;
 856                         #size-cells = <1>;
 857                         ranges = <0x0 0x1c000 0x1000>;
 858                 };
 859
 860                 target-module@1e000 {                   /* 0x4a21e000, ap 29 12.0 */
 861                         compatible = "ti,sysc";
 862                         status = "disabled";
 863                         #address-cells = <1>;
 864                         #size-cells = <1>;
 865                         ranges = <0x0 0x1e000 0x1000>;
 866                 };
 867
 868                 target-module@20000 {                   /* 0x4a220000, ap 49 4a.0 */
 869                         compatible = "ti,sysc";
 870                         status = "disabled";
 871                         #address-cells = <1>;
 872                         #size-cells = <1>;
 873                         ranges = <0x0 0x20000 0x1000>;
 874                 };
 875
 876                 target-module@22000 {                   /* 0x4a222000, ap 107 3a.0 */
 877                         compatible = "ti,sysc";
 878                         status = "disabled";
 879                         #address-cells = <1>;
 880                         #size-cells = <1>;
 881                         ranges = <0x0 0x22000 0x1000>;
 882                 };
 883
 884                 target-module@24000 {                   /* 0x4a224000, ap 75 48.0 */
 885                         compatible = "ti,sysc";
 886                         status = "disabled";
 887                         #address-cells = <1>;
 888                         #size-cells = <1>;
 889                         ranges = <0x0 0x24000 0x1000>;
 890                 };
 891
 892                 target-module@26000 {                   /* 0x4a226000, ap 51 24.0 */
 893                         compatible = "ti,sysc";
 894                         status = "disabled";
 895                         #address-cells = <1>;
 896                         #size-cells = <1>;
 897                         ranges = <0x0 0x26000 0x1000>;
 898                 };
 899
 900                 target-module@28000 {                   /* 0x4a228000, ap 53 38.0 */
 901                         compatible = "ti,sysc";
 902                         status = "disabled";
 903                         #address-cells = <1>;
 904                         #size-cells = <1>;
 905                         ranges = <0x0 0x28000 0x1000>;
 906                 };
 907
 908                 target-module@2a000 {                   /* 0x4a22a000, ap 55 5a.0 */
 909                         compatible = "ti,sysc";
 910                         status = "disabled";
 911                         #address-cells = <1>;
 912                         #size-cells = <1>;
 913                         ranges = <0x0 0x2a000 0x1000>;
 914                 };
 915         };
 916
 917         segment@280000 {                                        /* 0x4a280000 */
 918                 compatible = "simple-bus";
 919                 #address-cells = <1>;
 920                 #size-cells = <1>;
 921         };
 922
 923         segment@300000 {                                        /* 0x4a300000 */
 924                 compatible = "simple-bus";
 925                 #address-cells = <1>;
 926                 #size-cells = <1>;
 927         };
 928 };
 929
 930 &l4_per {                                               /* 0x48000000 */
 931         compatible = "ti,omap5-l4-per", "simple-bus";
 932         reg = <0x48000000 0x800>,
 933               <0x48000800 0x800>,
 934               <0x48001000 0x400>,
 935               <0x48001400 0x400>,
 936               <0x48001800 0x400>,
 937               <0x48001c00 0x400>;
 938         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
 939         #address-cells = <1>;
 940         #size-cells = <1>;
 941         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
 942                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
 943
 944         segment@0 {                                     /* 0x48000000 */
 945                 compatible = "simple-bus";
 946                 #address-cells = <1>;
 947                 #size-cells = <1>;
 948                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 949                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
 950                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 951                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
 952                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
 953                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
 954                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
 955                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
 956                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
 957                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
 958                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
 959                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
 960                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
 961                          <0x00055000 0x00055000 0x001000>,      /* ap 13 */
 962                          <0x00056000 0x00056000 0x001000>,      /* ap 14 */
 963                          <0x00057000 0x00057000 0x001000>,      /* ap 15 */
 964                          <0x00058000 0x00058000 0x001000>,      /* ap 16 */
 965                          <0x00059000 0x00059000 0x001000>,      /* ap 17 */
 966                          <0x0005a000 0x0005a000 0x001000>,      /* ap 18 */
 967                          <0x0005b000 0x0005b000 0x001000>,      /* ap 19 */
 968                          <0x0005c000 0x0005c000 0x001000>,      /* ap 20 */
 969                          <0x0005d000 0x0005d000 0x001000>,      /* ap 21 */
 970                          <0x0005e000 0x0005e000 0x001000>,      /* ap 22 */
 971                          <0x00060000 0x00060000 0x001000>,      /* ap 23 */
 972                          <0x0006a000 0x0006a000 0x001000>,      /* ap 24 */
 973                          <0x0006b000 0x0006b000 0x001000>,      /* ap 25 */
 974                          <0x0006c000 0x0006c000 0x001000>,      /* ap 26 */
 975                          <0x0006d000 0x0006d000 0x001000>,      /* ap 27 */
 976                          <0x0006e000 0x0006e000 0x001000>,      /* ap 28 */
 977                          <0x0006f000 0x0006f000 0x001000>,      /* ap 29 */
 978                          <0x00070000 0x00070000 0x001000>,      /* ap 30 */
 979                          <0x00071000 0x00071000 0x001000>,      /* ap 31 */
 980                          <0x00072000 0x00072000 0x001000>,      /* ap 32 */
 981                          <0x00073000 0x00073000 0x001000>,      /* ap 33 */
 982                          <0x00061000 0x00061000 0x001000>,      /* ap 34 */
 983                          <0x00053000 0x00053000 0x001000>,      /* ap 35 */
 984                          <0x00054000 0x00054000 0x001000>,      /* ap 36 */
 985                          <0x000b2000 0x000b2000 0x001000>,      /* ap 37 */
 986                          <0x000b3000 0x000b3000 0x001000>,      /* ap 38 */
 987                          <0x00078000 0x00078000 0x001000>,      /* ap 39 */
 988                          <0x00079000 0x00079000 0x001000>,      /* ap 40 */
 989                          <0x00086000 0x00086000 0x001000>,      /* ap 41 */
 990                          <0x00087000 0x00087000 0x001000>,      /* ap 42 */
 991                          <0x00088000 0x00088000 0x001000>,      /* ap 43 */
 992                          <0x00089000 0x00089000 0x001000>,      /* ap 44 */
 993                          <0x00051000 0x00051000 0x001000>,      /* ap 45 */
 994                          <0x00052000 0x00052000 0x001000>,      /* ap 46 */
 995                          <0x00098000 0x00098000 0x001000>,      /* ap 47 */
 996                          <0x00099000 0x00099000 0x001000>,      /* ap 48 */
 997                          <0x0009a000 0x0009a000 0x001000>,      /* ap 49 */
 998                          <0x0009b000 0x0009b000 0x001000>,      /* ap 50 */
 999                          <0x0009c000 0x0009c000 0x001000>,      /* ap 51 */
1000                          <0x0009d000 0x0009d000 0x001000>,      /* ap 52 */
1001                          <0x00068000 0x00068000 0x001000>,      /* ap 53 */
1002                          <0x00069000 0x00069000 0x001000>,      /* ap 54 */
1003                          <0x00090000 0x00090000 0x002000>,      /* ap 55 */
1004                          <0x00092000 0x00092000 0x001000>,      /* ap 56 */
1005                          <0x000a4000 0x000a4000 0x001000>,      /* ap 57 */
1006                          <0x000a6000 0x000a6000 0x001000>,      /* ap 58 */
1007                          <0x000a8000 0x000a8000 0x004000>,      /* ap 59 */
1008                          <0x000ac000 0x000ac000 0x001000>,      /* ap 60 */
1009                          <0x000ad000 0x000ad000 0x001000>,      /* ap 61 */
1010                          <0x000ae000 0x000ae000 0x001000>,      /* ap 62 */
1011                          <0x00066000 0x00066000 0x001000>,      /* ap 63 */
1012                          <0x00067000 0x00067000 0x001000>,      /* ap 64 */
1013                          <0x000b4000 0x000b4000 0x001000>,      /* ap 65 */
1014                          <0x000b5000 0x000b5000 0x001000>,      /* ap 66 */
1015                          <0x000b8000 0x000b8000 0x001000>,      /* ap 67 */
1016                          <0x000b9000 0x000b9000 0x001000>,      /* ap 68 */
1017                          <0x000ba000 0x000ba000 0x001000>,      /* ap 69 */
1018                          <0x000bb000 0x000bb000 0x001000>,      /* ap 70 */
1019                          <0x000d1000 0x000d1000 0x001000>,      /* ap 71 */
1020                          <0x000d2000 0x000d2000 0x001000>,      /* ap 72 */
1021                          <0x000d5000 0x000d5000 0x001000>,      /* ap 73 */
1022                          <0x000d6000 0x000d6000 0x001000>,      /* ap 74 */
1023                          <0x000a2000 0x000a2000 0x001000>,      /* ap 75 */
1024                          <0x000a3000 0x000a3000 0x001000>,      /* ap 76 */
1025                          <0x00001400 0x00001400 0x000400>,      /* ap 77 */
1026                          <0x00001800 0x00001800 0x000400>,      /* ap 78 */
1027                          <0x00001c00 0x00001c00 0x000400>,      /* ap 79 */
1028                          <0x000a5000 0x000a5000 0x001000>,      /* ap 80 */
1029                          <0x0007a000 0x0007a000 0x001000>,      /* ap 81 */
1030                          <0x0007b000 0x0007b000 0x001000>,      /* ap 82 */
1031                          <0x0007c000 0x0007c000 0x001000>,      /* ap 83 */
1032                          <0x0007d000 0x0007d000 0x001000>;      /* ap 84 */
1033
1034                 target-module@20000 {                   /* 0x48020000, ap 3 04.0 */
1035                         compatible = "ti,sysc-omap2", "ti,sysc";
1036                         ti,hwmods = "uart3";
1037                         reg = <0x20050 0x4>,
1038                               <0x20054 0x4>,
1039                               <0x20058 0x4>;
1040                         reg-names = "rev", "sysc", "syss";
1041                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1042                                          SYSC_OMAP2_SOFTRESET |
1043                                          SYSC_OMAP2_AUTOIDLE)>;
1044                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1045                                         <SYSC_IDLE_NO>,
1046                                         <SYSC_IDLE_SMART>,
1047                                         <SYSC_IDLE_SMART_WKUP>;
1048                         ti,syss-mask = <1>;
1049                         ti,no-reset-on-init;
1050                         ti,no-idle-on-init;
1051                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1052                         clocks = <&l4per_clkctrl OMAP5_UART3_CLKCTRL 0>;
1053                         clock-names = "fck";
1054                         #address-cells = <1>;
1055                         #size-cells = <1>;
1056                         ranges = <0x0 0x20000 0x1000>;
1057
1058                         uart3: serial@0 {
1059                                 compatible = "ti,omap4-uart";
1060                                 reg = <0x0 0x100>;
1061                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1062                                 clock-frequency = <48000000>;
1063                         };
1064                 };
1065
1066                 target-module@32000 {                   /* 0x48032000, ap 5 3e.0 */
1067                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1068                         ti,hwmods = "timer2";
1069                         reg = <0x32000 0x4>,
1070                               <0x32010 0x4>;
1071                         reg-names = "rev", "sysc";
1072                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1073                                          SYSC_OMAP4_SOFTRESET)>;
1074                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1075                                         <SYSC_IDLE_NO>,
1076                                         <SYSC_IDLE_SMART>,
1077                                         <SYSC_IDLE_SMART_WKUP>;
1078                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1079                         clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 0>;
1080                         clock-names = "fck";
1081                         #address-cells = <1>;
1082                         #size-cells = <1>;
1083                         ranges = <0x0 0x32000 0x1000>;
1084
1085                         timer2: timer@0 {
1086                                 compatible = "ti,omap5430-timer";
1087                                 reg = <0x0 0x80>;
1088                                 clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 24>;
1089                                 clock-names = "fck";
1090                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1091                         };
1092                 };
1093
1094                 target-module@34000 {                   /* 0x48034000, ap 7 46.0 */
1095                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1096                         ti,hwmods = "timer3";
1097                         reg = <0x34000 0x4>,
1098                               <0x34010 0x4>;
1099                         reg-names = "rev", "sysc";
1100                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1101                                          SYSC_OMAP4_SOFTRESET)>;
1102                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1103                                         <SYSC_IDLE_NO>,
1104                                         <SYSC_IDLE_SMART>,
1105                                         <SYSC_IDLE_SMART_WKUP>;
1106                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1107                         clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 0>;
1108                         clock-names = "fck";
1109                         #address-cells = <1>;
1110                         #size-cells = <1>;
1111                         ranges = <0x0 0x34000 0x1000>;
1112
1113                         timer3: timer@0 {
1114                                 compatible = "ti,omap5430-timer";
1115                                 reg = <0x0 0x80>;
1116                                 clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 24>;
1117                                 clock-names = "fck";
1118                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1119                         };
1120                 };
1121
1122                 target-module@36000 {                   /* 0x48036000, ap 9 4e.0 */
1123                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1124                         ti,hwmods = "timer4";
1125                         reg = <0x36000 0x4>,
1126                               <0x36010 0x4>;
1127                         reg-names = "rev", "sysc";
1128                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1129                                          SYSC_OMAP4_SOFTRESET)>;
1130                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1131                                         <SYSC_IDLE_NO>,
1132                                         <SYSC_IDLE_SMART>,
1133                                         <SYSC_IDLE_SMART_WKUP>;
1134                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1135                         clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 0>;
1136                         clock-names = "fck";
1137                         #address-cells = <1>;
1138                         #size-cells = <1>;
1139                         ranges = <0x0 0x36000 0x1000>;
1140
1141                         timer4: timer@0 {
1142                                 compatible = "ti,omap5430-timer";
1143                                 reg = <0x0 0x80>;
1144                                 clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 24>;
1145                                 clock-names = "fck";
1146                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1147                         };
1148                 };
1149
1150                 target-module@3e000 {                   /* 0x4803e000, ap 11 56.0 */
1151                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1152                         ti,hwmods = "timer9";
1153                         reg = <0x3e000 0x4>,
1154                               <0x3e010 0x4>;
1155                         reg-names = "rev", "sysc";
1156                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1157                                          SYSC_OMAP4_SOFTRESET)>;
1158                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1159                                         <SYSC_IDLE_NO>,
1160                                         <SYSC_IDLE_SMART>,
1161                                         <SYSC_IDLE_SMART_WKUP>;
1162                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1163                         clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 0>;
1164                         clock-names = "fck";
1165                         #address-cells = <1>;
1166                         #size-cells = <1>;
1167                         ranges = <0x0 0x3e000 0x1000>;
1168
1169                         timer9: timer@0 {
1170                                 compatible = "ti,omap5430-timer";
1171                                 reg = <0x0 0x80>;
1172                                 clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 24>;
1173                                 clock-names = "fck";
1174                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1175                                 ti,timer-pwm;
1176                         };
1177                 };
1178
1179                 target-module@51000 {                   /* 0x48051000, ap 45 2e.0 */
1180                         compatible = "ti,sysc-omap2", "ti,sysc";
1181                         ti,hwmods = "gpio7";
1182                         reg = <0x51000 0x4>,
1183                               <0x51010 0x4>,
1184                               <0x51114 0x4>;
1185                         reg-names = "rev", "sysc", "syss";
1186                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1187                                          SYSC_OMAP2_SOFTRESET |
1188                                          SYSC_OMAP2_AUTOIDLE)>;
1189                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1190                                         <SYSC_IDLE_NO>,
1191                                         <SYSC_IDLE_SMART>,
1192                                         <SYSC_IDLE_SMART_WKUP>;
1193                         ti,syss-mask = <1>;
1194                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1195                         clocks = <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 0>,
1196                                  <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 8>;
1197                         clock-names = "fck", "dbclk";
1198                         #address-cells = <1>;
1199                         #size-cells = <1>;
1200                         ranges = <0x0 0x51000 0x1000>;
1201
1202                         gpio7: gpio@0 {
1203                                 compatible = "ti,omap4-gpio";
1204                                 reg = <0x0 0x200>;
1205                                 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1206                                 gpio-controller;
1207                                 #gpio-cells = <2>;
1208                                 interrupt-controller;
1209                                 #interrupt-cells = <2>;
1210                         };
1211                 };
1212
1213                 target-module@53000 {                   /* 0x48053000, ap 35 36.0 */
1214                         compatible = "ti,sysc-omap2", "ti,sysc";
1215                         ti,hwmods = "gpio8";
1216                         reg = <0x53000 0x4>,
1217                               <0x53010 0x4>,
1218                               <0x53114 0x4>;
1219                         reg-names = "rev", "sysc", "syss";
1220                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1221                                          SYSC_OMAP2_SOFTRESET |
1222                                          SYSC_OMAP2_AUTOIDLE)>;
1223                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1224                                         <SYSC_IDLE_NO>,
1225                                         <SYSC_IDLE_SMART>,
1226                                         <SYSC_IDLE_SMART_WKUP>;
1227                         ti,syss-mask = <1>;
1228                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1229                         clocks = <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 0>,
1230                                  <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 8>;
1231                         clock-names = "fck", "dbclk";
1232                         #address-cells = <1>;
1233                         #size-cells = <1>;
1234                         ranges = <0x0 0x53000 0x1000>;
1235
1236                         gpio8: gpio@0 {
1237                                 compatible = "ti,omap4-gpio";
1238                                 reg = <0x0 0x200>;
1239                                 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1240                                 gpio-controller;
1241                                 #gpio-cells = <2>;
1242                                 interrupt-controller;
1243                                 #interrupt-cells = <2>;
1244                         };
1245                 };
1246
1247                 target-module@55000 {                   /* 0x48055000, ap 13 0e.0 */
1248                         compatible = "ti,sysc-omap2", "ti,sysc";
1249                         ti,hwmods = "gpio2";
1250                         reg = <0x55000 0x4>,
1251                               <0x55010 0x4>,
1252                               <0x55114 0x4>;
1253                         reg-names = "rev", "sysc", "syss";
1254                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1255                                          SYSC_OMAP2_SOFTRESET |
1256                                          SYSC_OMAP2_AUTOIDLE)>;
1257                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1258                                         <SYSC_IDLE_NO>,
1259                                         <SYSC_IDLE_SMART>,
1260                                         <SYSC_IDLE_SMART_WKUP>;
1261                         ti,syss-mask = <1>;
1262                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1263                         clocks = <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 0>,
1264                                  <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 8>;
1265                         clock-names = "fck", "dbclk";
1266                         #address-cells = <1>;
1267                         #size-cells = <1>;
1268                         ranges = <0x0 0x55000 0x1000>;
1269
1270                         gpio2: gpio@0 {
1271                                 compatible = "ti,omap4-gpio";
1272                                 reg = <0x0 0x200>;
1273                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1274                                 gpio-controller;
1275                                 #gpio-cells = <2>;
1276                                 interrupt-controller;
1277                                 #interrupt-cells = <2>;
1278                         };
1279                 };
1280
1281                 target-module@57000 {                   /* 0x48057000, ap 15 06.0 */
1282                         compatible = "ti,sysc-omap2", "ti,sysc";
1283                         ti,hwmods = "gpio3";
1284                         reg = <0x57000 0x4>,
1285                               <0x57010 0x4>,
1286                               <0x57114 0x4>;
1287                         reg-names = "rev", "sysc", "syss";
1288                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1289                                          SYSC_OMAP2_SOFTRESET |
1290                                          SYSC_OMAP2_AUTOIDLE)>;
1291                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1292                                         <SYSC_IDLE_NO>,
1293                                         <SYSC_IDLE_SMART>,
1294                                         <SYSC_IDLE_SMART_WKUP>;
1295                         ti,syss-mask = <1>;
1296                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1297                         clocks = <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 0>,
1298                                  <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 8>;
1299                         clock-names = "fck", "dbclk";
1300                         #address-cells = <1>;
1301                         #size-cells = <1>;
1302                         ranges = <0x0 0x57000 0x1000>;
1303
1304                         gpio3: gpio@0 {
1305                                 compatible = "ti,omap4-gpio";
1306                                 reg = <0x0 0x200>;
1307                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1308                                 gpio-controller;
1309                                 #gpio-cells = <2>;
1310                                 interrupt-controller;
1311                                 #interrupt-cells = <2>;
1312                         };
1313                 };
1314
1315                 target-module@59000 {                   /* 0x48059000, ap 17 16.0 */
1316                         compatible = "ti,sysc-omap2", "ti,sysc";
1317                         ti,hwmods = "gpio4";
1318                         reg = <0x59000 0x4>,
1319                               <0x59010 0x4>,
1320                               <0x59114 0x4>;
1321                         reg-names = "rev", "sysc", "syss";
1322                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1323                                          SYSC_OMAP2_SOFTRESET |
1324                                          SYSC_OMAP2_AUTOIDLE)>;
1325                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1326                                         <SYSC_IDLE_NO>,
1327                                         <SYSC_IDLE_SMART>,
1328                                         <SYSC_IDLE_SMART_WKUP>;
1329                         ti,syss-mask = <1>;
1330                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1331                         clocks = <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 0>,
1332                                  <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 8>;
1333                         clock-names = "fck", "dbclk";
1334                         #address-cells = <1>;
1335                         #size-cells = <1>;
1336                         ranges = <0x0 0x59000 0x1000>;
1337
1338                         gpio4: gpio@0 {
1339                                 compatible = "ti,omap4-gpio";
1340                                 reg = <0x0 0x200>;
1341                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1342                                 gpio-controller;
1343                                 #gpio-cells = <2>;
1344                                 interrupt-controller;
1345                                 #interrupt-cells = <2>;
1346                         };
1347                 };
1348
1349                 target-module@5b000 {                   /* 0x4805b000, ap 19 1e.0 */
1350                         compatible = "ti,sysc-omap2", "ti,sysc";
1351                         ti,hwmods = "gpio5";
1352                         reg = <0x5b000 0x4>,
1353                               <0x5b010 0x4>,
1354                               <0x5b114 0x4>;
1355                         reg-names = "rev", "sysc", "syss";
1356                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1357                                          SYSC_OMAP2_SOFTRESET |
1358                                          SYSC_OMAP2_AUTOIDLE)>;
1359                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1360                                         <SYSC_IDLE_NO>,
1361                                         <SYSC_IDLE_SMART>,
1362                                         <SYSC_IDLE_SMART_WKUP>;
1363                         ti,syss-mask = <1>;
1364                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1365                         clocks = <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 0>,
1366                                  <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 8>;
1367                         clock-names = "fck", "dbclk";
1368                         #address-cells = <1>;
1369                         #size-cells = <1>;
1370                         ranges = <0x0 0x5b000 0x1000>;
1371
1372                         gpio5: gpio@0 {
1373                                 compatible = "ti,omap4-gpio";
1374                                 reg = <0x0 0x200>;
1375                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1376                                 gpio-controller;
1377                                 #gpio-cells = <2>;
1378                                 interrupt-controller;
1379                                 #interrupt-cells = <2>;
1380                         };
1381                 };
1382
1383                 target-module@5d000 {                   /* 0x4805d000, ap 21 26.0 */
1384                         compatible = "ti,sysc-omap2", "ti,sysc";
1385                         ti,hwmods = "gpio6";
1386                         reg = <0x5d000 0x4>,
1387                               <0x5d010 0x4>,
1388                               <0x5d114 0x4>;
1389                         reg-names = "rev", "sysc", "syss";
1390                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1391                                          SYSC_OMAP2_SOFTRESET |
1392                                          SYSC_OMAP2_AUTOIDLE)>;
1393                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1394                                         <SYSC_IDLE_NO>,
1395                                         <SYSC_IDLE_SMART>,
1396                                         <SYSC_IDLE_SMART_WKUP>;
1397                         ti,syss-mask = <1>;
1398                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1399                         clocks = <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 0>,
1400                                  <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 8>;
1401                         clock-names = "fck", "dbclk";
1402                         #address-cells = <1>;
1403                         #size-cells = <1>;
1404                         ranges = <0x0 0x5d000 0x1000>;
1405
1406                         gpio6: gpio@0 {
1407                                 compatible = "ti,omap4-gpio";
1408                                 reg = <0x0 0x200>;
1409                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1410                                 gpio-controller;
1411                                 #gpio-cells = <2>;
1412                                 interrupt-controller;
1413                                 #interrupt-cells = <2>;
1414                         };
1415                 };
1416
1417                 target-module@60000 {                   /* 0x48060000, ap 23 24.0 */
1418                         compatible = "ti,sysc-omap2", "ti,sysc";
1419                         ti,hwmods = "i2c3";
1420                         reg = <0x60000 0x8>,
1421                               <0x60010 0x8>,
1422                               <0x60090 0x8>;
1423                         reg-names = "rev", "sysc", "syss";
1424                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1425                                          SYSC_OMAP2_ENAWAKEUP |
1426                                          SYSC_OMAP2_SOFTRESET |
1427                                          SYSC_OMAP2_AUTOIDLE)>;
1428                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1429                                         <SYSC_IDLE_NO>,
1430                                         <SYSC_IDLE_SMART>,
1431                                         <SYSC_IDLE_SMART_WKUP>;
1432                         ti,syss-mask = <1>;
1433                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1434                         clocks = <&l4per_clkctrl OMAP5_I2C3_CLKCTRL 0>;
1435                         clock-names = "fck";
1436                         #address-cells = <1>;
1437                         #size-cells = <1>;
1438                         ranges = <0x0 0x60000 0x1000>;
1439
1440                         i2c3: i2c@0 {
1441                                 compatible = "ti,omap4-i2c";
1442                                 reg = <0x0 0x100>;
1443                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1444                                 #address-cells = <1>;
1445                                 #size-cells = <0>;
1446                         };
1447                 };
1448
1449                 target-module@66000 {                   /* 0x48066000, ap 63 4c.0 */
1450                         compatible = "ti,sysc-omap2", "ti,sysc";
1451                         ti,hwmods = "uart5";
1452                         reg = <0x66050 0x4>,
1453                               <0x66054 0x4>,
1454                               <0x66058 0x4>;
1455                         reg-names = "rev", "sysc", "syss";
1456                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1457                                          SYSC_OMAP2_SOFTRESET |
1458                                          SYSC_OMAP2_AUTOIDLE)>;
1459                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1460                                         <SYSC_IDLE_NO>,
1461                                         <SYSC_IDLE_SMART>,
1462                                         <SYSC_IDLE_SMART_WKUP>;
1463                         ti,syss-mask = <1>;
1464                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1465                         clocks = <&l4per_clkctrl OMAP5_UART5_CLKCTRL 0>;
1466                         clock-names = "fck";
1467                         #address-cells = <1>;
1468                         #size-cells = <1>;
1469                         ranges = <0x0 0x66000 0x1000>;
1470
1471                         uart5: serial@0 {
1472                                 compatible = "ti,omap4-uart";
1473                                 reg = <0x0 0x100>;
1474                                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1475                                 clock-frequency = <48000000>;
1476                         };
1477                 };
1478
1479                 target-module@68000 {                   /* 0x48068000, ap 53 54.0 */
1480                         compatible = "ti,sysc-omap2", "ti,sysc";
1481                         ti,hwmods = "uart6";
1482                         reg = <0x68050 0x4>,
1483                               <0x68054 0x4>,
1484                               <0x68058 0x4>;
1485                         reg-names = "rev", "sysc", "syss";
1486                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1487                                          SYSC_OMAP2_SOFTRESET |
1488                                          SYSC_OMAP2_AUTOIDLE)>;
1489                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1490                                         <SYSC_IDLE_NO>,
1491                                         <SYSC_IDLE_SMART>,
1492                                         <SYSC_IDLE_SMART_WKUP>;
1493                         ti,syss-mask = <1>;
1494                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1495                         clocks = <&l4per_clkctrl OMAP5_UART6_CLKCTRL 0>;
1496                         clock-names = "fck";
1497                         #address-cells = <1>;
1498                         #size-cells = <1>;
1499                         ranges = <0x0 0x68000 0x1000>;
1500
1501                         uart6: serial@0 {
1502                                 compatible = "ti,omap4-uart";
1503                                 reg = <0x0 0x100>;
1504                                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1505                                 clock-frequency = <48000000>;
1506                         };
1507                 };
1508
1509                 target-module@6a000 {                   /* 0x4806a000, ap 24 0a.0 */
1510                         compatible = "ti,sysc-omap2", "ti,sysc";
1511                         ti,hwmods = "uart1";
1512                         reg = <0x6a050 0x4>,
1513                               <0x6a054 0x4>,
1514                               <0x6a058 0x4>;
1515                         reg-names = "rev", "sysc", "syss";
1516                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1517                                          SYSC_OMAP2_SOFTRESET |
1518                                          SYSC_OMAP2_AUTOIDLE)>;
1519                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1520                                         <SYSC_IDLE_NO>,
1521                                         <SYSC_IDLE_SMART>,
1522                                         <SYSC_IDLE_SMART_WKUP>;
1523                         ti,syss-mask = <1>;
1524                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1525                         clocks = <&l4per_clkctrl OMAP5_UART1_CLKCTRL 0>;
1526                         clock-names = "fck";
1527                         #address-cells = <1>;
1528                         #size-cells = <1>;
1529                         ranges = <0x0 0x6a000 0x1000>;
1530
1531                         uart1: serial@0 {
1532                                 compatible = "ti,omap4-uart";
1533                                 reg = <0x0 0x100>;
1534                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1535                                 clock-frequency = <48000000>;
1536                         };
1537                 };
1538
1539                 target-module@6c000 {                   /* 0x4806c000, ap 26 22.0 */
1540                         compatible = "ti,sysc-omap2", "ti,sysc";
1541                         ti,hwmods = "uart2";
1542                         reg = <0x6c050 0x4>,
1543                               <0x6c054 0x4>,
1544                               <0x6c058 0x4>;
1545                         reg-names = "rev", "sysc", "syss";
1546                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1547                                          SYSC_OMAP2_SOFTRESET |
1548                                          SYSC_OMAP2_AUTOIDLE)>;
1549                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1550                                         <SYSC_IDLE_NO>,
1551                                         <SYSC_IDLE_SMART>,
1552                                         <SYSC_IDLE_SMART_WKUP>;
1553                         ti,syss-mask = <1>;
1554                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1555                         clocks = <&l4per_clkctrl OMAP5_UART2_CLKCTRL 0>;
1556                         clock-names = "fck";
1557                         #address-cells = <1>;
1558                         #size-cells = <1>;
1559                         ranges = <0x0 0x6c000 0x1000>;
1560
1561                         uart2: serial@0 {
1562                                 compatible = "ti,omap4-uart";
1563                                 reg = <0x0 0x100>;
1564                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1565                                 clock-frequency = <48000000>;
1566                         };
1567                 };
1568
1569                 target-module@6e000 {                   /* 0x4806e000, ap 28 44.1 */
1570                         compatible = "ti,sysc-omap2", "ti,sysc";
1571                         ti,hwmods = "uart4";
1572                         reg = <0x6e050 0x4>,
1573                               <0x6e054 0x4>,
1574                               <0x6e058 0x4>;
1575                         reg-names = "rev", "sysc", "syss";
1576                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1577                                          SYSC_OMAP2_SOFTRESET |
1578                                          SYSC_OMAP2_AUTOIDLE)>;
1579                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1580                                         <SYSC_IDLE_NO>,
1581                                         <SYSC_IDLE_SMART>,
1582                                         <SYSC_IDLE_SMART_WKUP>;
1583                         ti,syss-mask = <1>;
1584                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1585                         clocks = <&l4per_clkctrl OMAP5_UART4_CLKCTRL 0>;
1586                         clock-names = "fck";
1587                         #address-cells = <1>;
1588                         #size-cells = <1>;
1589                         ranges = <0x0 0x6e000 0x1000>;
1590
1591                         uart4: serial@0 {
1592                                 compatible = "ti,omap4-uart";
1593                                 reg = <0x0 0x100>;
1594                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1595                                 clock-frequency = <48000000>;
1596                         };
1597                 };
1598
1599                 target-module@70000 {                   /* 0x48070000, ap 30 14.0 */
1600                         compatible = "ti,sysc-omap2", "ti,sysc";
1601                         ti,hwmods = "i2c1";
1602                         reg = <0x70000 0x8>,
1603                               <0x70010 0x8>,
1604                               <0x70090 0x8>;
1605                         reg-names = "rev", "sysc", "syss";
1606                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1607                                          SYSC_OMAP2_ENAWAKEUP |
1608                                          SYSC_OMAP2_SOFTRESET |
1609                                          SYSC_OMAP2_AUTOIDLE)>;
1610                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1611                                         <SYSC_IDLE_NO>,
1612                                         <SYSC_IDLE_SMART>,
1613                                         <SYSC_IDLE_SMART_WKUP>;
1614                         ti,syss-mask = <1>;
1615                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1616                         clocks = <&l4per_clkctrl OMAP5_I2C1_CLKCTRL 0>;
1617                         clock-names = "fck";
1618                         #address-cells = <1>;
1619                         #size-cells = <1>;
1620                         ranges = <0x0 0x70000 0x1000>;
1621
1622                         i2c1: i2c@0 {
1623                                 compatible = "ti,omap4-i2c";
1624                                 reg = <0x0 0x100>;
1625                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1626                                 #address-cells = <1>;
1627                                 #size-cells = <0>;
1628                         };
1629                 };
1630
1631                 target-module@72000 {                   /* 0x48072000, ap 32 1c.0 */
1632                         compatible = "ti,sysc-omap2", "ti,sysc";
1633                         ti,hwmods = "i2c2";
1634                         reg = <0x72000 0x8>,
1635                               <0x72010 0x8>,
1636                               <0x72090 0x8>;
1637                         reg-names = "rev", "sysc", "syss";
1638                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1639                                          SYSC_OMAP2_ENAWAKEUP |
1640                                          SYSC_OMAP2_SOFTRESET |
1641                                          SYSC_OMAP2_AUTOIDLE)>;
1642                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1643                                         <SYSC_IDLE_NO>,
1644                                         <SYSC_IDLE_SMART>,
1645                                         <SYSC_IDLE_SMART_WKUP>;
1646                         ti,syss-mask = <1>;
1647                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1648                         clocks = <&l4per_clkctrl OMAP5_I2C2_CLKCTRL 0>;
1649                         clock-names = "fck";
1650                         #address-cells = <1>;
1651                         #size-cells = <1>;
1652                         ranges = <0x0 0x72000 0x1000>;
1653
1654                         i2c2: i2c@0 {
1655                                 compatible = "ti,omap4-i2c";
1656                                 reg = <0x0 0x100>;
1657                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1658                                 #address-cells = <1>;
1659                                 #size-cells = <0>;
1660                         };
1661                 };
1662
1663                 target-module@78000 {                   /* 0x48078000, ap 39 12.0 */
1664                         compatible = "ti,sysc";
1665                         status = "disabled";
1666                         #address-cells = <1>;
1667                         #size-cells = <1>;
1668                         ranges = <0x0 0x78000 0x1000>;
1669                 };
1670
1671                 target-module@7a000 {                   /* 0x4807a000, ap 81 2c.0 */
1672                         compatible = "ti,sysc-omap2", "ti,sysc";
1673                         ti,hwmods = "i2c4";
1674                         reg = <0x7a000 0x8>,
1675                               <0x7a010 0x8>,
1676                               <0x7a090 0x8>;
1677                         reg-names = "rev", "sysc", "syss";
1678                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1679                                          SYSC_OMAP2_ENAWAKEUP |
1680                                          SYSC_OMAP2_SOFTRESET |
1681                                          SYSC_OMAP2_AUTOIDLE)>;
1682                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1683                                         <SYSC_IDLE_NO>,
1684                                         <SYSC_IDLE_SMART>,
1685                                         <SYSC_IDLE_SMART_WKUP>;
1686                         ti,syss-mask = <1>;
1687                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1688                         clocks = <&l4per_clkctrl OMAP5_I2C4_CLKCTRL 0>;
1689                         clock-names = "fck";
1690                         #address-cells = <1>;
1691                         #size-cells = <1>;
1692                         ranges = <0x0 0x7a000 0x1000>;
1693
1694                         i2c4: i2c@0 {
1695                                 compatible = "ti,omap4-i2c";
1696                                 reg = <0x0 0x100>;
1697                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1698                                 #address-cells = <1>;
1699                                 #size-cells = <0>;
1700                         };
1701                 };
1702
1703                 target-module@7c000 {                   /* 0x4807c000, ap 83 34.0 */
1704                         compatible = "ti,sysc-omap2", "ti,sysc";
1705                         ti,hwmods = "i2c5";
1706                         reg = <0x7c000 0x8>,
1707                               <0x7c010 0x8>,
1708                               <0x7c090 0x8>;
1709                         reg-names = "rev", "sysc", "syss";
1710                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1711                                          SYSC_OMAP2_ENAWAKEUP |
1712                                          SYSC_OMAP2_SOFTRESET |
1713                                          SYSC_OMAP2_AUTOIDLE)>;
1714                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1715                                         <SYSC_IDLE_NO>,
1716                                         <SYSC_IDLE_SMART>,
1717                                         <SYSC_IDLE_SMART_WKUP>;
1718                         ti,syss-mask = <1>;
1719                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1720                         clocks = <&l4per_clkctrl OMAP5_I2C5_CLKCTRL 0>;
1721                         clock-names = "fck";
1722                         #address-cells = <1>;
1723                         #size-cells = <1>;
1724                         ranges = <0x0 0x7c000 0x1000>;
1725
1726                         i2c5: i2c@0 {
1727                                 compatible = "ti,omap4-i2c";
1728                                 reg = <0x0 0x100>;
1729                                 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
1730                                 #address-cells = <1>;
1731                                 #size-cells = <0>;
1732                         };
1733                 };
1734
1735                 target-module@86000 {                   /* 0x48086000, ap 41 5e.0 */
1736                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1737                         ti,hwmods = "timer10";
1738                         reg = <0x86000 0x4>,
1739                               <0x86010 0x4>;
1740                         reg-names = "rev", "sysc";
1741                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1742                                          SYSC_OMAP4_SOFTRESET)>;
1743                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1744                                         <SYSC_IDLE_NO>,
1745                                         <SYSC_IDLE_SMART>,
1746                                         <SYSC_IDLE_SMART_WKUP>;
1747                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1748                         clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 0>;
1749                         clock-names = "fck";
1750                         #address-cells = <1>;
1751                         #size-cells = <1>;
1752                         ranges = <0x0 0x86000 0x1000>;
1753
1754                         timer10: timer@0 {
1755                                 compatible = "ti,omap5430-timer";
1756                                 reg = <0x0 0x80>;
1757                                 clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 24>;
1758                                 clock-names = "fck";
1759                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1760                                 ti,timer-pwm;
1761                         };
1762                 };
1763
1764                 target-module@88000 {                   /* 0x48088000, ap 43 66.0 */
1765                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1766                         ti,hwmods = "timer11";
1767                         reg = <0x88000 0x4>,
1768                               <0x88010 0x4>;
1769                         reg-names = "rev", "sysc";
1770                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1771                                          SYSC_OMAP4_SOFTRESET)>;
1772                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1773                                         <SYSC_IDLE_NO>,
1774                                         <SYSC_IDLE_SMART>,
1775                                         <SYSC_IDLE_SMART_WKUP>;
1776                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1777                         clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 0>;
1778                         clock-names = "fck";
1779                         #address-cells = <1>;
1780                         #size-cells = <1>;
1781                         ranges = <0x0 0x88000 0x1000>;
1782
1783                         timer11: timer@0 {
1784                                 compatible = "ti,omap5430-timer";
1785                                 reg = <0x0 0x80>;
1786                                 clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 24>;
1787                                 clock-names = "fck";
1788                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1789                                 ti,timer-pwm;
1790                         };
1791                 };
1792
1793                 target-module@90000 {                   /* 0x48090000, ap 55 1a.0 */
1794                         compatible = "ti,sysc";
1795                         status = "disabled";
1796                         #address-cells = <1>;
1797                         #size-cells = <1>;
1798                         ranges = <0x0 0x90000 0x2000>;
1799                 };
1800
1801                 target-module@98000 {                   /* 0x48098000, ap 47 08.0 */
1802                         compatible = "ti,sysc-omap4", "ti,sysc";
1803                         ti,hwmods = "mcspi1";
1804                         reg = <0x98000 0x4>,
1805                               <0x98010 0x4>;
1806                         reg-names = "rev", "sysc";
1807                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1808                                          SYSC_OMAP4_SOFTRESET)>;
1809                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1810                                         <SYSC_IDLE_NO>,
1811                                         <SYSC_IDLE_SMART>,
1812                                         <SYSC_IDLE_SMART_WKUP>;
1813                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1814                         clocks = <&l4per_clkctrl OMAP5_MCSPI1_CLKCTRL 0>;
1815                         clock-names = "fck";
1816                         #address-cells = <1>;
1817                         #size-cells = <1>;
1818                         ranges = <0x0 0x98000 0x1000>;
1819
1820                         mcspi1: spi@0 {
1821                                 compatible = "ti,omap4-mcspi";
1822                                 reg = <0x0 0x200>;
1823                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
1824                                 #address-cells = <1>;
1825                                 #size-cells = <0>;
1826                                 ti,spi-num-cs = <4>;
1827                                 dmas = <&sdma 35>,
1828                                        <&sdma 36>,
1829                                        <&sdma 37>,
1830                                        <&sdma 38>,
1831                                        <&sdma 39>,
1832                                        <&sdma 40>,
1833                                        <&sdma 41>,
1834                                        <&sdma 42>;
1835                                 dma-names = "tx0", "rx0", "tx1", "rx1",
1836                                             "tx2", "rx2", "tx3", "rx3";
1837                         };
1838                 };
1839
1840                 target-module@9a000 {                   /* 0x4809a000, ap 49 10.0 */
1841                         compatible = "ti,sysc-omap4", "ti,sysc";
1842                         ti,hwmods = "mcspi2";
1843                         reg = <0x9a000 0x4>,
1844                               <0x9a010 0x4>;
1845                         reg-names = "rev", "sysc";
1846                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1847                                          SYSC_OMAP4_SOFTRESET)>;
1848                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1849                                         <SYSC_IDLE_NO>,
1850                                         <SYSC_IDLE_SMART>,
1851                                         <SYSC_IDLE_SMART_WKUP>;
1852                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1853                         clocks = <&l4per_clkctrl OMAP5_MCSPI2_CLKCTRL 0>;
1854                         clock-names = "fck";
1855                         #address-cells = <1>;
1856                         #size-cells = <1>;
1857                         ranges = <0x0 0x9a000 0x1000>;
1858
1859                         mcspi2: spi@0 {
1860                                 compatible = "ti,omap4-mcspi";
1861                                 reg = <0x0 0x200>;
1862                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
1863                                 #address-cells = <1>;
1864                                 #size-cells = <0>;
1865                                 ti,spi-num-cs = <2>;
1866                                 dmas = <&sdma 43>,
1867                                        <&sdma 44>,
1868                                        <&sdma 45>,
1869                                        <&sdma 46>;
1870                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1871                         };
1872                 };
1873
1874                 target-module@9c000 {                   /* 0x4809c000, ap 51 3a.0 */
1875                         compatible = "ti,sysc-omap4", "ti,sysc";
1876                         ti,hwmods = "mmc1";
1877                         reg = <0x9c000 0x4>,
1878                               <0x9c010 0x4>;
1879                         reg-names = "rev", "sysc";
1880                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1881                                          SYSC_OMAP4_SOFTRESET)>;
1882                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1883                                         <SYSC_IDLE_NO>,
1884                                         <SYSC_IDLE_SMART>,
1885                                         <SYSC_IDLE_SMART_WKUP>;
1886                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1887                                         <SYSC_IDLE_NO>,
1888                                         <SYSC_IDLE_SMART>,
1889                                         <SYSC_IDLE_SMART_WKUP>;
1890                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
1891                         clocks = <&l3init_clkctrl OMAP5_MMC1_CLKCTRL 0>;
1892                         clock-names = "fck";
1893                         #address-cells = <1>;
1894                         #size-cells = <1>;
1895                         ranges = <0x0 0x9c000 0x1000>;
1896
1897                         mmc1: mmc@0 {
1898                                 compatible = "ti,omap4-hsmmc";
1899                                 reg = <0x0 0x400>;
1900                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
1901                                 ti,dual-volt;
1902                                 ti,needs-special-reset;
1903                                 dmas = <&sdma 61>, <&sdma 62>;
1904                                 dma-names = "tx", "rx";
1905                                 pbias-supply = <&pbias_mmc_reg>;
1906                         };
1907                 };
1908
1909                 target-module@a2000 {                   /* 0x480a2000, ap 75 02.0 */
1910                         compatible = "ti,sysc";
1911                         status = "disabled";
1912                         #address-cells = <1>;
1913                         #size-cells = <1>;
1914                         ranges = <0x0 0xa2000 0x1000>;
1915                 };
1916
1917                 target-module@a4000 {                   /* 0x480a4000, ap 57 3c.0 */
1918                         compatible = "ti,sysc";
1919                         status = "disabled";
1920                         #address-cells = <1>;
1921                         #size-cells = <1>;
1922                         ranges = <0x00000000 0x000a4000 0x00001000>,
1923                                  <0x00001000 0x000a5000 0x00001000>;
1924                 };
1925
1926                 target-module@a8000 {                   /* 0x480a8000, ap 59 2a.0 */
1927                         compatible = "ti,sysc";
1928                         status = "disabled";
1929                         #address-cells = <1>;
1930                         #size-cells = <1>;
1931                         ranges = <0x0 0xa8000 0x4000>;
1932                 };
1933
1934                 target-module@ad000 {                   /* 0x480ad000, ap 61 20.0 */
1935                         compatible = "ti,sysc-omap4", "ti,sysc";
1936                         ti,hwmods = "mmc3";
1937                         reg = <0xad000 0x4>,
1938                               <0xad010 0x4>;
1939                         reg-names = "rev", "sysc";
1940                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1941                                          SYSC_OMAP4_SOFTRESET)>;
1942                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1943                                         <SYSC_IDLE_NO>,
1944                                         <SYSC_IDLE_SMART>,
1945                                         <SYSC_IDLE_SMART_WKUP>;
1946                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1947                                         <SYSC_IDLE_NO>,
1948                                         <SYSC_IDLE_SMART>,
1949                                         <SYSC_IDLE_SMART_WKUP>;
1950                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1951                         clocks = <&l4per_clkctrl OMAP5_MMC3_CLKCTRL 0>;
1952                         clock-names = "fck";
1953                         #address-cells = <1>;
1954                         #size-cells = <1>;
1955                         ranges = <0x0 0xad000 0x1000>;
1956
1957                         mmc3: mmc@0 {
1958                                 compatible = "ti,omap4-hsmmc";
1959                                 reg = <0x0 0x400>;
1960                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1961                                 ti,needs-special-reset;
1962                                 dmas = <&sdma 77>, <&sdma 78>;
1963                                 dma-names = "tx", "rx";
1964                         };
1965                 };
1966
1967                 target-module@b2000 {                   /* 0x480b2000, ap 37 0c.0 */
1968                         compatible = "ti,sysc";
1969                         status = "disabled";
1970                         #address-cells = <1>;
1971                         #size-cells = <1>;
1972                         ranges = <0x0 0xb2000 0x1000>;
1973                 };
1974
1975                 target-module@b4000 {                   /* 0x480b4000, ap 65 42.0 */
1976                         compatible = "ti,sysc-omap4", "ti,sysc";
1977                         ti,hwmods = "mmc2";
1978                         reg = <0xb4000 0x4>,
1979                               <0xb4010 0x4>;
1980                         reg-names = "rev", "sysc";
1981                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1982                                          SYSC_OMAP4_SOFTRESET)>;
1983                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1984                                         <SYSC_IDLE_NO>,
1985                                         <SYSC_IDLE_SMART>,
1986                                         <SYSC_IDLE_SMART_WKUP>;
1987                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1988                                         <SYSC_IDLE_NO>,
1989                                         <SYSC_IDLE_SMART>,
1990                                         <SYSC_IDLE_SMART_WKUP>;
1991                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
1992                         clocks = <&l3init_clkctrl OMAP5_MMC2_CLKCTRL 0>;
1993                         clock-names = "fck";
1994                         #address-cells = <1>;
1995                         #size-cells = <1>;
1996                         ranges = <0x0 0xb4000 0x1000>;
1997
1998                         mmc2: mmc@0 {
1999                                 compatible = "ti,omap4-hsmmc";
2000                                 reg = <0x0 0x400>;
2001                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2002                                 ti,needs-special-reset;
2003                                 dmas = <&sdma 47>, <&sdma 48>;
2004                                 dma-names = "tx", "rx";
2005                         };
2006                 };
2007
2008                 target-module@b8000 {                   /* 0x480b8000, ap 67 32.0 */
2009                         compatible = "ti,sysc-omap4", "ti,sysc";
2010                         ti,hwmods = "mcspi3";
2011                         reg = <0xb8000 0x4>,
2012                               <0xb8010 0x4>;
2013                         reg-names = "rev", "sysc";
2014                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2015                                          SYSC_OMAP4_SOFTRESET)>;
2016                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2017                                         <SYSC_IDLE_NO>,
2018                                         <SYSC_IDLE_SMART>,
2019                                         <SYSC_IDLE_SMART_WKUP>;
2020                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2021                         clocks = <&l4per_clkctrl OMAP5_MCSPI3_CLKCTRL 0>;
2022                         clock-names = "fck";
2023                         #address-cells = <1>;
2024                         #size-cells = <1>;
2025                         ranges = <0x0 0xb8000 0x1000>;
2026
2027                         mcspi3: spi@0 {
2028                                 compatible = "ti,omap4-mcspi";
2029                                 reg = <0x0 0x200>;
2030                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2031                                 #address-cells = <1>;
2032                                 #size-cells = <0>;
2033                                 ti,spi-num-cs = <2>;
2034                                 dmas = <&sdma 15>, <&sdma 16>;
2035                                 dma-names = "tx0", "rx0";
2036                         };
2037                 };
2038
2039                 target-module@ba000 {                   /* 0x480ba000, ap 69 18.0 */
2040                         compatible = "ti,sysc-omap4", "ti,sysc";
2041                         ti,hwmods = "mcspi4";
2042                         reg = <0xba000 0x4>,
2043                               <0xba010 0x4>;
2044                         reg-names = "rev", "sysc";
2045                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2046                                          SYSC_OMAP4_SOFTRESET)>;
2047                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2048                                         <SYSC_IDLE_NO>,
2049                                         <SYSC_IDLE_SMART>,
2050                                         <SYSC_IDLE_SMART_WKUP>;
2051                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2052                         clocks = <&l4per_clkctrl OMAP5_MCSPI4_CLKCTRL 0>;
2053                         clock-names = "fck";
2054                         #address-cells = <1>;
2055                         #size-cells = <1>;
2056                         ranges = <0x0 0xba000 0x1000>;
2057
2058                         mcspi4: spi@0 {
2059                                 compatible = "ti,omap4-mcspi";
2060                                 reg = <0x0 0x200>;
2061                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2062                                 #address-cells = <1>;
2063                                 #size-cells = <0>;
2064                                 ti,spi-num-cs = <1>;
2065                                 dmas = <&sdma 70>, <&sdma 71>;
2066                                 dma-names = "tx0", "rx0";
2067                         };
2068                 };
2069
2070                 target-module@d1000 {                   /* 0x480d1000, ap 71 28.0 */
2071                         compatible = "ti,sysc-omap4", "ti,sysc";
2072                         ti,hwmods = "mmc4";
2073                         reg = <0xd1000 0x4>,
2074                               <0xd1010 0x4>;
2075                         reg-names = "rev", "sysc";
2076                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2077                                          SYSC_OMAP4_SOFTRESET)>;
2078                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2079                                         <SYSC_IDLE_NO>,
2080                                         <SYSC_IDLE_SMART>,
2081                                         <SYSC_IDLE_SMART_WKUP>;
2082                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2083                                         <SYSC_IDLE_NO>,
2084                                         <SYSC_IDLE_SMART>,
2085                                         <SYSC_IDLE_SMART_WKUP>;
2086                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2087                         clocks = <&l4per_clkctrl OMAP5_MMC4_CLKCTRL 0>;
2088                         clock-names = "fck";
2089                         #address-cells = <1>;
2090                         #size-cells = <1>;
2091                         ranges = <0x0 0xd1000 0x1000>;
2092
2093                         mmc4: mmc@0 {
2094                                 compatible = "ti,omap4-hsmmc";
2095                                 reg = <0x0 0x400>;
2096                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2097                                 ti,needs-special-reset;
2098                                 dmas = <&sdma 57>, <&sdma 58>;
2099                                 dma-names = "tx", "rx";
2100                         };
2101                 };
2102
2103                 target-module@d5000 {                   /* 0x480d5000, ap 73 30.0 */
2104                         compatible = "ti,sysc-omap4", "ti,sysc";
2105                         ti,hwmods = "mmc5";
2106                         reg = <0xd5000 0x4>,
2107                               <0xd5010 0x4>;
2108                         reg-names = "rev", "sysc";
2109                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2110                                          SYSC_OMAP4_SOFTRESET)>;
2111                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2112                                         <SYSC_IDLE_NO>,
2113                                         <SYSC_IDLE_SMART>,
2114                                         <SYSC_IDLE_SMART_WKUP>;
2115                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2116                                         <SYSC_IDLE_NO>,
2117                                         <SYSC_IDLE_SMART>,
2118                                         <SYSC_IDLE_SMART_WKUP>;
2119                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2120                         clocks = <&l4per_clkctrl OMAP5_MMC5_CLKCTRL 0>;
2121                         clock-names = "fck";
2122                         #address-cells = <1>;
2123                         #size-cells = <1>;
2124                         ranges = <0x0 0xd5000 0x1000>;
2125
2126                         mmc5: mmc@0 {
2127                                 compatible = "ti,omap4-hsmmc";
2128                                 reg = <0x0 0x400>;
2129                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2130                                 ti,needs-special-reset;
2131                                 dmas = <&sdma 59>, <&sdma 60>;
2132                                 dma-names = "tx", "rx";
2133                         };
2134                 };
2135         };
2136
2137         segment@200000 {                                        /* 0x48200000 */
2138                 compatible = "simple-bus";
2139                 #address-cells = <1>;
2140                 #size-cells = <1>;
2141         };
2142 };
2143
2144 &l4_wkup {                                              /* 0x4ae00000 */
2145         compatible = "ti,omap5-l4-wkup", "simple-bus";
2146         reg = <0x4ae00000 0x800>,
2147               <0x4ae00800 0x800>,
2148               <0x4ae01000 0x1000>;
2149         reg-names = "ap", "la", "ia0";
2150         #address-cells = <1>;
2151         #size-cells = <1>;
2152         ranges = <0x00000000 0x4ae00000 0x010000>,      /* segment 0 */
2153                  <0x00010000 0x4ae10000 0x010000>,      /* segment 1 */
2154                  <0x00020000 0x4ae20000 0x010000>;      /* segment 2 */
2155
2156         segment@0 {                                     /* 0x4ae00000 */
2157                 compatible = "simple-bus";
2158                 #address-cells = <1>;
2159                 #size-cells = <1>;
2160                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
2161                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
2162                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
2163                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
2164                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
2165                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
2166                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
2167                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
2168                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
2169                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
2170                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
2171
2172                 target-module@4000 {                    /* 0x4ae04000, ap 17 20.0 */
2173                         compatible = "ti,sysc-omap2", "ti,sysc";
2174                         ti,hwmods = "counter_32k";
2175                         reg = <0x4000 0x4>,
2176                               <0x4010 0x4>;
2177                         reg-names = "rev", "sysc";
2178                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2179                                         <SYSC_IDLE_NO>;
2180                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2181                         clocks = <&wkupaon_clkctrl OMAP5_COUNTER_32K_CLKCTRL 0>;
2182                         clock-names = "fck";
2183                         #address-cells = <1>;
2184                         #size-cells = <1>;
2185                         ranges = <0x0 0x4000 0x1000>;
2186
2187                         counter32k: counter@0 {
2188                                 compatible = "ti,omap-counter32k";
2189                                 reg = <0x0 0x40>;
2190                         };
2191                 };
2192
2193                 target-module@6000 {                    /* 0x4ae06000, ap 3 08.0 */
2194                         compatible = "ti,sysc-omap4", "ti,sysc";
2195                         reg = <0x6000 0x4>;
2196                         reg-names = "rev";
2197                         #address-cells = <1>;
2198                         #size-cells = <1>;
2199                         ranges = <0x0 0x6000 0x2000>;
2200
2201                         prm: prm@0 {
2202                                 compatible = "ti,omap5-prm", "simple-bus";
2203                                 reg = <0x0 0x2000>;
2204                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
2205                                 #address-cells = <1>;
2206                                 #size-cells = <1>;
2207                                 ranges = <0 0 0x2000>;
2208
2209                                 prm_clocks: clocks {
2210                                         #address-cells = <1>;
2211                                         #size-cells = <0>;
2212                                 };
2213
2214                                 prm_clockdomains: clockdomains {
2215                                 };
2216                         };
2217                 };
2218
2219                 target-module@a000 {                    /* 0x4ae0a000, ap 15 2c.0 */
2220                         compatible = "ti,sysc-omap4", "ti,sysc";
2221                         reg = <0xa000 0x4>;
2222                         reg-names = "rev";
2223                         #address-cells = <1>;
2224                         #size-cells = <1>;
2225                         ranges = <0x0 0xa000 0x1000>;
2226
2227                         scrm: scrm@0 {
2228                                 compatible = "ti,omap5-scrm";
2229                                 reg = <0x0 0x1000>;
2230
2231                                 scrm_clocks: clocks {
2232                                         #address-cells = <1>;
2233                                         #size-cells = <0>;
2234                                 };
2235
2236                                 scrm_clockdomains: clockdomains {
2237                                 };
2238                         };
2239                 };
2240
2241                 target-module@c000 {                    /* 0x4ae0c000, ap 19 28.0 */
2242                         compatible = "ti,sysc-omap4", "ti,sysc";
2243                         reg = <0xc000 0x4>;
2244                         reg-names = "rev";
2245                         #address-cells = <1>;
2246                         #size-cells = <1>;
2247                         ranges = <0x0 0xc000 0x1000>;
2248
2249                         omap5_pmx_wkup: pinmux@840 {
2250                                 compatible = "ti,omap5-padconf",
2251                                              "pinctrl-single";
2252                                 reg = <0x840 0x003c>;
2253                                 #address-cells = <1>;
2254                                 #size-cells = <0>;
2255                                 #pinctrl-cells = <1>;
2256                                 #interrupt-cells = <1>;
2257                                 interrupt-controller;
2258                                 pinctrl-single,register-width = <16>;
2259                                 pinctrl-single,function-mask = <0x7fff>;
2260                         };
2261
2262                         omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@da0 {
2263                                 compatible = "ti,omap5-scm-wkup-pad-conf",
2264                                              "simple-bus";
2265                                 reg = <0xda0 0x60>;
2266                                 #address-cells = <1>;
2267                                 #size-cells = <1>;
2268                                 ranges = <0 0 0x60>;
2269
2270                                 scm_wkup_pad_conf: scm_conf@0 {
2271                                         compatible = "syscon", "simple-bus";
2272                                         reg = <0x0 0x60>;
2273                                         #address-cells = <1>;
2274                                         #size-cells = <1>;
2275                                         ranges = <0 0x0 0x60>;
2276
2277                                         scm_wkup_pad_conf_clocks: clocks@0 {
2278                                                 #address-cells = <1>;
2279                                                 #size-cells = <0>;
2280                                         };
2281                                 };
2282                         };
2283                 };
2284         };
2285
2286         segment@10000 {                                 /* 0x4ae10000 */
2287                 compatible = "simple-bus";
2288                 #address-cells = <1>;
2289                 #size-cells = <1>;
2290                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
2291                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
2292                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
2293                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
2294                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
2295                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
2296                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
2297                          <0x0000d000 0x0001d000 0x001000>;      /* ap 12 */
2298
2299                 target-module@0 {                       /* 0x4ae10000, ap 5 10.0 */
2300                         compatible = "ti,sysc-omap2", "ti,sysc";
2301                         ti,hwmods = "gpio1";
2302                         reg = <0x0 0x4>,
2303                               <0x10 0x4>,
2304                               <0x114 0x4>;
2305                         reg-names = "rev", "sysc", "syss";
2306                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2307                                          SYSC_OMAP2_SOFTRESET |
2308                                          SYSC_OMAP2_AUTOIDLE)>;
2309                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2310                                         <SYSC_IDLE_NO>,
2311                                         <SYSC_IDLE_SMART>,
2312                                         <SYSC_IDLE_SMART_WKUP>;
2313                         ti,syss-mask = <1>;
2314                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2315                         clocks = <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 0>,
2316                                  <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 8>;
2317                         clock-names = "fck", "dbclk";
2318                         #address-cells = <1>;
2319                         #size-cells = <1>;
2320                         ranges = <0x0 0x0 0x1000>;
2321
2322                         gpio1: gpio@0 {
2323                                 compatible = "ti,omap4-gpio";
2324                                 reg = <0x0 0x200>;
2325                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
2326                                 ti,gpio-always-on;
2327                                 gpio-controller;
2328                                 #gpio-cells = <2>;
2329                                 interrupt-controller;
2330                                 #interrupt-cells = <2>;
2331                         };
2332                 };
2333
2334                 target-module@4000 {                    /* 0x4ae14000, ap 7 14.0 */
2335                         compatible = "ti,sysc-omap2", "ti,sysc";
2336                         ti,hwmods = "wd_timer2";
2337                         reg = <0x4000 0x4>,
2338                               <0x4010 0x4>,
2339                               <0x4014 0x4>;
2340                         reg-names = "rev", "sysc", "syss";
2341                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2342                                          SYSC_OMAP2_SOFTRESET)>;
2343                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2344                                         <SYSC_IDLE_NO>,
2345                                         <SYSC_IDLE_SMART>,
2346                                         <SYSC_IDLE_SMART_WKUP>;
2347                         ti,syss-mask = <1>;
2348                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2349                         clocks = <&wkupaon_clkctrl OMAP5_WD_TIMER2_CLKCTRL 0>;
2350                         clock-names = "fck";
2351                         #address-cells = <1>;
2352                         #size-cells = <1>;
2353                         ranges = <0x0 0x4000 0x1000>;
2354
2355                         wdt2: wdt@0 {
2356                                 compatible = "ti,omap5-wdt", "ti,omap3-wdt";
2357                                 reg = <0x0 0x80>;
2358                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
2359                         };
2360                 };
2361
2362                 target-module@8000 {                    /* 0x4ae18000, ap 9 18.0 */
2363                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
2364                         ti,hwmods = "timer1";
2365                         reg = <0x8000 0x4>,
2366                               <0x8010 0x4>;
2367                         reg-names = "rev", "sysc";
2368                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2369                                          SYSC_OMAP4_SOFTRESET)>;
2370                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2371                                         <SYSC_IDLE_NO>,
2372                                         <SYSC_IDLE_SMART>,
2373                                         <SYSC_IDLE_SMART_WKUP>;
2374                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2375                         clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 0>;
2376                         clock-names = "fck";
2377                         #address-cells = <1>;
2378                         #size-cells = <1>;
2379                         ranges = <0x0 0x8000 0x1000>;
2380
2381                         timer1: timer@0 {
2382                                 compatible = "ti,omap5430-timer";
2383                                 reg = <0x0 0x80>;
2384                                 clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>;
2385                                 clock-names = "fck";
2386                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
2387                                 ti,timer-alwon;
2388                         };
2389                 };
2390
2391                 target-module@c000 {                    /* 0x4ae1c000, ap 11 1c.0 */
2392                         compatible = "ti,sysc-omap2", "ti,sysc";
2393                         ti,hwmods = "kbd";
2394                         reg = <0xc000 0x4>,
2395                               <0xc010 0x4>;
2396                         reg-names = "rev", "sysc";
2397                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2398                                          SYSC_OMAP2_SOFTRESET)>;
2399                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2400                                         <SYSC_IDLE_NO>,
2401                                         <SYSC_IDLE_SMART>;
2402                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2403                         clocks = <&wkupaon_clkctrl OMAP5_KBD_CLKCTRL 0>;
2404                         clock-names = "fck";
2405                         #address-cells = <1>;
2406                         #size-cells = <1>;
2407                         ranges = <0x0 0xc000 0x1000>;
2408
2409                         keypad: keypad@0 {
2410                                 compatible = "ti,omap4-keypad";
2411                                 reg = <0x0 0x400>;
2412                         };
2413                 };
2414         };
2415
2416         segment@20000 {                                 /* 0x4ae20000 */
2417                 compatible = "simple-bus";
2418                 #address-cells = <1>;
2419                 #size-cells = <1>;
2420                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
2421                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
2422                          <0x00000000 0x00020000 0x001000>,      /* ap 21 */
2423                          <0x00001000 0x00021000 0x001000>,      /* ap 22 */
2424                          <0x00002000 0x00022000 0x001000>,      /* ap 23 */
2425                          <0x00003000 0x00023000 0x001000>,      /* ap 24 */
2426                          <0x00007000 0x00027000 0x000400>,      /* ap 25 */
2427                          <0x00008000 0x00028000 0x000800>,      /* ap 26 */
2428                          <0x00009000 0x00029000 0x000100>,      /* ap 27 */
2429                          <0x00008800 0x00028800 0x000200>,      /* ap 28 */
2430                          <0x00008a00 0x00028a00 0x000100>;      /* ap 29 */
2431
2432                 target-module@0 {                       /* 0x4ae20000, ap 21 04.0 */
2433                         compatible = "ti,sysc";
2434                         status = "disabled";
2435                         #address-cells = <1>;
2436                         #size-cells = <1>;
2437                         ranges = <0x0 0x0 0x1000>;
2438                 };
2439
2440                 target-module@2000 {                    /* 0x4ae22000, ap 23 0c.0 */
2441                         compatible = "ti,sysc";
2442                         status = "disabled";
2443                         #address-cells = <1>;
2444                         #size-cells = <1>;
2445                         ranges = <0x0 0x2000 0x1000>;
2446                 };
2447
2448                 target-module@6000 {                    /* 0x4ae26000, ap 13 24.0 */
2449                         compatible = "ti,sysc";
2450                         status = "disabled";
2451                         #address-cells = <1>;
2452                         #size-cells = <1>;
2453                         ranges = <0x00000000 0x00006000 0x00001000>,
2454                                  <0x00001000 0x00007000 0x00000400>,
2455                                  <0x00002000 0x00008000 0x00000800>,
2456                                  <0x00002800 0x00008800 0x00000200>,
2457                                  <0x00002a00 0x00008a00 0x00000100>,
2458                                  <0x00003000 0x00009000 0x00000100>;
2459                 };
2460         };
2461 };
2462