arch/arm/boot/dts/omap5-l4.dtsi

   1 &l4_cfg {                                               /* 0x4a000000 */
   2         compatible = "ti,omap5-l4-cfg", "simple-bus";
   3         reg = <0x4a000000 0x800>,
   4               <0x4a000800 0x800>,
   5               <0x4a001000 0x1000>;
   6         reg-names = "ap", "la", "ia0";
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  10                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  11                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  12                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  13                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  14                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  15                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  16
  17         segment@0 {                                     /* 0x4a000000 */
  18                 compatible = "simple-bus";
  19                 #address-cells = <1>;
  20                 #size-cells = <1>;
  21                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  22                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  23                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  24                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  25                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  26                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  27                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  28                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  29                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  30                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  31                          <0x00058000 0x00058000 0x001000>,      /* ap 10 */
  32                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  33                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  34                          <0x00008000 0x00008000 0x002000>,      /* ap 21 */
  35                          <0x0000a000 0x0000a000 0x001000>,      /* ap 22 */
  36                          <0x00066000 0x00066000 0x001000>,      /* ap 23 */
  37                          <0x00067000 0x00067000 0x001000>,      /* ap 24 */
  38                          <0x0005e000 0x0005e000 0x002000>,      /* ap 69 */
  39                          <0x00060000 0x00060000 0x001000>,      /* ap 70 */
  40                          <0x00064000 0x00064000 0x001000>,      /* ap 71 */
  41                          <0x00065000 0x00065000 0x001000>,      /* ap 72 */
  42                          <0x0005a000 0x0005a000 0x001000>,      /* ap 77 */
  43                          <0x0005b000 0x0005b000 0x001000>,      /* ap 78 */
  44                          <0x00070000 0x00070000 0x004000>,      /* ap 79 */
  45                          <0x00074000 0x00074000 0x001000>,      /* ap 80 */
  46                          <0x00075000 0x00075000 0x001000>,      /* ap 81 */
  47                          <0x00076000 0x00076000 0x001000>,      /* ap 82 */
  48                          <0x00020000 0x00020000 0x020000>,      /* ap 109 */
  49                          <0x00040000 0x00040000 0x001000>,      /* ap 110 */
  50                          <0x00059000 0x00059000 0x001000>;      /* ap 111 */
  51
  52                 target-module@2000 {                    /* 0x4a002000, ap 3 44.0 */
  53                         compatible = "ti,sysc-omap4", "ti,sysc";
  54                         reg = <0x2000 0x4>;
  55                         reg-names = "rev";
  56                         #address-cells = <1>;
  57                         #size-cells = <1>;
  58                         ranges = <0x0 0x2000 0x1000>;
  59
  60                         scm_core: scm@0 {
  61                                 compatible = "ti,omap5-scm-core", "simple-bus";
  62                                 reg = <0x0 0x1000>;
  63                                 #address-cells = <1>;
  64                                 #size-cells = <1>;
  65                                 ranges = <0 0 0x800>;
  66
  67                                 scm_conf: scm_conf@0 {
  68                                         compatible = "syscon";
  69                                         reg = <0x0 0x800>;
  70                                         #address-cells = <1>;
  71                                         #size-cells = <1>;
  72                                 };
  73                         };
  74
  75                         scm_padconf_core: scm@800 {
  76                                 compatible = "ti,omap5-scm-padconf-core",
  77                                              "simple-bus";
  78                                 #address-cells = <1>;
  79                                 #size-cells = <1>;
  80                                 ranges = <0 0x800 0x800>;
  81
  82                                 omap5_pmx_core: pinmux@40 {
  83                                         compatible = "ti,omap5-padconf",
  84                                                      "pinctrl-single";
  85                                         reg = <0x40 0x01b6>;
  86                                         #address-cells = <1>;
  87                                         #size-cells = <0>;
  88                                         #pinctrl-cells = <1>;
  89                                         #interrupt-cells = <1>;
  90                                         interrupt-controller;
  91                                         pinctrl-single,register-width = <16>;
  92                                         pinctrl-single,function-mask = <0x7fff>;
  93                                 };
  94
  95                                 omap5_padconf_global: omap5_padconf_global@5a0 {
  96                                         compatible = "syscon",
  97                                                      "simple-bus";
  98                                         reg = <0x5a0 0xec>;
  99                                         #address-cells = <1>;
 100                                         #size-cells = <1>;
 101                                         ranges = <0 0x5a0 0xec>;
 102
 103                                         pbias_regulator: pbias_regulator@60 {
 104                                                 compatible = "ti,pbias-omap5", "ti,pbias-omap";
 105                                                 reg = <0x60 0x4>;
 106                                                 syscon = <&omap5_padconf_global>;
 107                                                 pbias_mmc_reg: pbias_mmc_omap5 {
 108                                                         regulator-name = "pbias_mmc_omap5";
 109                                                         regulator-min-microvolt = <1800000>;
 110                                                         regulator-max-microvolt = <3300000>;
 111                                                 };
 112                                         };
 113                                 };
 114                         };
 115                 };
 116
 117                 target-module@4000 {                    /* 0x4a004000, ap 5 5c.0 */
 118                         compatible = "ti,sysc-omap4", "ti,sysc";
 119                         reg = <0x4000 0x4>;
 120                         reg-names = "rev";
 121                         #address-cells = <1>;
 122                         #size-cells = <1>;
 123                         ranges = <0x0 0x4000 0x1000>;
 124
 125                         cm_core_aon: cm_core_aon@0 {
 126                                 compatible = "ti,omap5-cm-core-aon",
 127                                              "simple-bus";
 128                                 reg = <0x0 0x2000>;
 129                                 #address-cells = <1>;
 130                                 #size-cells = <1>;
 131                                 ranges = <0 0 0x1000>;
 132
 133                                 cm_core_aon_clocks: clocks {
 134                                         #address-cells = <1>;
 135                                         #size-cells = <0>;
 136                                 };
 137
 138                                 cm_core_aon_clockdomains: clockdomains {
 139                                 };
 140                         };
 141                 };
 142
 143                 target-module@8000 {                    /* 0x4a008000, ap 21 4c.0 */
 144                         compatible = "ti,sysc-omap4", "ti,sysc";
 145                         reg = <0x8000 0x4>;
 146                         reg-names = "rev";
 147                         #address-cells = <1>;
 148                         #size-cells = <1>;
 149                         ranges = <0x0 0x8000 0x2000>;
 150
 151                         cm_core: cm_core@0 {
 152                                 compatible = "ti,omap5-cm-core", "simple-bus";
 153                                 reg = <0x0 0x2000>;
 154                                 #address-cells = <1>;
 155                                 #size-cells = <1>;
 156                                 ranges = <0 0 0x2000>;
 157
 158                                 cm_core_clocks: clocks {
 159                                         #address-cells = <1>;
 160                                         #size-cells = <0>;
 161                                 };
 162
 163                                 cm_core_clockdomains: clockdomains {
 164                                 };
 165                         };
 166                 };
 167
 168                 target-module@20000 {                   /* 0x4a020000, ap 109 08.0 */
 169                         compatible = "ti,sysc-omap4", "ti,sysc";
 170                         ti,hwmods = "usb_otg_ss";
 171                         reg = <0x20000 0x4>,
 172                               <0x20010 0x4>;
 173                         reg-names = "rev", "sysc";
 174                         ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
 175                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 176                                         <SYSC_IDLE_NO>,
 177                                         <SYSC_IDLE_SMART>,
 178                                         <SYSC_IDLE_SMART_WKUP>;
 179                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 180                                         <SYSC_IDLE_NO>,
 181                                         <SYSC_IDLE_SMART>,
 182                                         <SYSC_IDLE_SMART_WKUP>;
 183                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 184                         clocks = <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 0>;
 185                         clock-names = "fck";
 186                         #address-cells = <1>;
 187                         #size-cells = <1>;
 188                         ranges = <0x0 0x20000 0x20000>;
 189
 190                         usb3: omap_dwc3@0 {
 191                                 compatible = "ti,dwc3";
 192                                 reg = <0x0 0x10000>;
 193                                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 194                                 #address-cells = <1>;
 195                                 #size-cells = <1>;
 196                                 utmi-mode = <2>;
 197                                 ranges = <0 0 0x20000>;
 198                                 dwc3: dwc3@10000 {
 199                                         compatible = "snps,dwc3";
 200                                         reg = <0x10000 0x10000>;
 201                                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
 202                                                      <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
 203                                                      <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 204                                         interrupt-names = "peripheral",
 205                                                           "host",
 206                                                           "otg";
 207                                         phys = <&usb2_phy>, <&usb3_phy>;
 208                                         phy-names = "usb2-phy", "usb3-phy";
 209                                         dr_mode = "peripheral";
 210                                 };
 211                         };
 212                 };
 213
 214                 target-module@56000 {                   /* 0x4a056000, ap 7 02.0 */
 215                         compatible = "ti,sysc-omap2", "ti,sysc";
 216                         ti,hwmods = "dma_system";
 217                         reg = <0x56000 0x4>,
 218                               <0x5602c 0x4>,
 219                               <0x56028 0x4>;
 220                         reg-names = "rev", "sysc", "syss";
 221                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 222                                          SYSC_OMAP2_EMUFREE |
 223                                          SYSC_OMAP2_SOFTRESET |
 224                                          SYSC_OMAP2_AUTOIDLE)>;
 225                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 226                                         <SYSC_IDLE_NO>,
 227                                         <SYSC_IDLE_SMART>;
 228                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 229                                         <SYSC_IDLE_NO>,
 230                                         <SYSC_IDLE_SMART>;
 231                         ti,syss-mask = <1>;
 232                         /* Domains (V, P, C): core, core_pwrdm, dma_clkdm */
 233                         clocks = <&dma_clkctrl OMAP5_DMA_SYSTEM_CLKCTRL 0>;
 234                         clock-names = "fck";
 235                         #address-cells = <1>;
 236                         #size-cells = <1>;
 237                         ranges = <0x0 0x56000 0x1000>;
 238
 239                         sdma: dma-controller@0 {
 240                                 compatible = "ti,omap4430-sdma";
 241                                 reg = <0x0 0x1000>;
 242                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 243                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 244                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 245                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 246                                 #dma-cells = <1>;
 247                                 dma-channels = <32>;
 248                                 dma-requests = <127>;
 249                         };
 250                 };
 251
 252                 target-module@58000 {                   /* 0x4a058000, ap 10 06.0 */
 253                         compatible = "ti,sysc";
 254                         status = "disabled";
 255                         #address-cells = <1>;
 256                         #size-cells = <1>;
 257                         ranges = <0x00000000 0x00058000 0x00001000>,
 258                                  <0x00001000 0x00059000 0x00001000>,
 259                                  <0x00002000 0x0005a000 0x00001000>,
 260                                  <0x00003000 0x0005b000 0x00001000>;
 261                 };
 262
 263                 target-module@5e000 {                   /* 0x4a05e000, ap 69 2a.0 */
 264                         compatible = "ti,sysc";
 265                         status = "disabled";
 266                         #address-cells = <1>;
 267                         #size-cells = <1>;
 268                         ranges = <0x0 0x5e000 0x2000>;
 269                 };
 270
 271                 target-module@62000 {                   /* 0x4a062000, ap 11 0e.0 */
 272                         compatible = "ti,sysc-omap2", "ti,sysc";
 273                         ti,hwmods = "usb_tll_hs";
 274                         reg = <0x62000 0x4>,
 275                               <0x62010 0x4>,
 276                               <0x62014 0x4>;
 277                         reg-names = "rev", "sysc", "syss";
 278                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 279                                          SYSC_OMAP2_ENAWAKEUP |
 280                                          SYSC_OMAP2_SOFTRESET |
 281                                          SYSC_OMAP2_AUTOIDLE)>;
 282                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 283                                         <SYSC_IDLE_NO>,
 284                                         <SYSC_IDLE_SMART>;
 285                         ti,syss-mask = <1>;
 286                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 287                         clocks = <&l3init_clkctrl OMAP5_USB_TLL_HS_CLKCTRL 0>;
 288                         clock-names = "fck";
 289                         #address-cells = <1>;
 290                         #size-cells = <1>;
 291                         ranges = <0x0 0x62000 0x1000>;
 292
 293                         usbhstll: usbhstll@0 {
 294                                 compatible = "ti,usbhs-tll";
 295                                 reg = <0x0 0x1000>;
 296                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 297                         };
 298                 };
 299
 300                 target-module@64000 {                   /* 0x4a064000, ap 71 1e.0 */
 301                         compatible = "ti,sysc-omap4", "ti,sysc";
 302                         ti,hwmods = "usb_host_hs";
 303                         reg = <0x64000 0x4>,
 304                               <0x64010 0x4>;
 305                         reg-names = "rev", "sysc";
 306                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 307                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 308                                         <SYSC_IDLE_NO>,
 309                                         <SYSC_IDLE_SMART>,
 310                                         <SYSC_IDLE_SMART_WKUP>;
 311                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 312                                         <SYSC_IDLE_NO>,
 313                                         <SYSC_IDLE_SMART>,
 314                                         <SYSC_IDLE_SMART_WKUP>;
 315                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 316                         clocks = <&l3init_clkctrl OMAP5_USB_HOST_HS_CLKCTRL 0>;
 317                         clock-names = "fck";
 318                         #address-cells = <1>;
 319                         #size-cells = <1>;
 320                         ranges = <0x0 0x64000 0x1000>;
 321
 322                         usbhshost: usbhshost@0 {
 323                                 compatible = "ti,usbhs-host";
 324                                 reg = <0x0 0x800>;
 325                                 #address-cells = <1>;
 326                                 #size-cells = <1>;
 327                                 ranges = <0 0 0x1000>;
 328                                 clocks = <&l3init_60m_fclk>,
 329                                          <&xclk60mhsp1_ck>,
 330                                          <&xclk60mhsp2_ck>;
 331                                 clock-names = "refclk_60m_int",
 332                                               "refclk_60m_ext_p1",
 333                                               "refclk_60m_ext_p2";
 334
 335                                 usbhsohci: ohci@800 {
 336                                         compatible = "ti,ohci-omap3";
 337                                         reg = <0x800 0x400>;
 338                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 339                                         remote-wakeup-connected;
 340                                 };
 341
 342                                 usbhsehci: ehci@c00 {
 343                                         compatible = "ti,ehci-omap";
 344                                         reg = <0xc00 0x400>;
 345                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 346                                 };
 347                         };
 348                 };
 349
 350                 target-module@66000 {                   /* 0x4a066000, ap 23 0a.0 */
 351                         compatible = "ti,sysc-omap2", "ti,sysc";
 352                         ti,hwmods = "mmu_dsp";
 353                         reg = <0x66000 0x4>,
 354                               <0x66010 0x4>,
 355                               <0x66014 0x4>;
 356                         reg-names = "rev", "sysc", "syss";
 357                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 358                                          SYSC_OMAP2_SOFTRESET |
 359                                          SYSC_OMAP2_AUTOIDLE)>;
 360                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 361                                         <SYSC_IDLE_NO>,
 362                                         <SYSC_IDLE_SMART>;
 363                         ti,syss-mask = <1>;
 364                         /* Domains (V, P, C): mm, dsp_pwrdm, dsp_clkdm */
 365                         clocks = <&dsp_clkctrl OMAP5_MMU_DSP_CLKCTRL 0>;
 366                         clock-names = "fck";
 367                         #address-cells = <1>;
 368                         #size-cells = <1>;
 369                         ranges = <0x0 0x66000 0x1000>;
 370
 371                         /* mmu_dsp cannot be moved before reset driver */
 372                         status = "disabled";
 373                 };
 374
 375                 target-module@70000 {                   /* 0x4a070000, ap 79 2e.0 */
 376                         compatible = "ti,sysc";
 377                         status = "disabled";
 378                         #address-cells = <1>;
 379                         #size-cells = <1>;
 380                         ranges = <0x0 0x70000 0x4000>;
 381                 };
 382
 383                 target-module@75000 {                   /* 0x4a075000, ap 81 32.0 */
 384                         compatible = "ti,sysc";
 385                         status = "disabled";
 386                         #address-cells = <1>;
 387                         #size-cells = <1>;
 388                         ranges = <0x0 0x75000 0x1000>;
 389                 };
 390         };
 391
 392         segment@80000 {                                 /* 0x4a080000 */
 393                 compatible = "simple-bus";
 394                 #address-cells = <1>;
 395                 #size-cells = <1>;
 396                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 397                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 398                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 399                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 400                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 401                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 402                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 403                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 404                          <0x00074000 0x000f4000 0x001000>,      /* ap 25 */
 405                          <0x00075000 0x000f5000 0x001000>,      /* ap 26 */
 406                          <0x00076000 0x000f6000 0x001000>,      /* ap 27 */
 407                          <0x00077000 0x000f7000 0x001000>,      /* ap 28 */
 408                          <0x00036000 0x000b6000 0x001000>,      /* ap 65 */
 409                          <0x00037000 0x000b7000 0x001000>,      /* ap 66 */
 410                          <0x0004d000 0x000cd000 0x001000>,      /* ap 67 */
 411                          <0x0004e000 0x000ce000 0x001000>,      /* ap 68 */
 412                          <0x00000000 0x00080000 0x004000>,      /* ap 83 */
 413                          <0x00004000 0x00084000 0x001000>,      /* ap 84 */
 414                          <0x00005000 0x00085000 0x001000>,      /* ap 85 */
 415                          <0x00006000 0x00086000 0x001000>,      /* ap 86 */
 416                          <0x00007000 0x00087000 0x001000>,      /* ap 87 */
 417                          <0x00008000 0x00088000 0x001000>,      /* ap 88 */
 418                          <0x00010000 0x00090000 0x004000>,      /* ap 89 */
 419                          <0x00014000 0x00094000 0x001000>,      /* ap 90 */
 420                          <0x00015000 0x00095000 0x001000>,      /* ap 91 */
 421                          <0x00016000 0x00096000 0x001000>,      /* ap 92 */
 422                          <0x00017000 0x00097000 0x001000>,      /* ap 93 */
 423                          <0x00018000 0x00098000 0x001000>,      /* ap 94 */
 424                          <0x00020000 0x000a0000 0x004000>,      /* ap 95 */
 425                          <0x00024000 0x000a4000 0x001000>,      /* ap 96 */
 426                          <0x00025000 0x000a5000 0x001000>,      /* ap 97 */
 427                          <0x00026000 0x000a6000 0x001000>,      /* ap 98 */
 428                          <0x00027000 0x000a7000 0x001000>,      /* ap 99 */
 429                          <0x00028000 0x000a8000 0x001000>;      /* ap 100 */
 430
 431                 target-module@0 {                       /* 0x4a080000, ap 83 28.0 */
 432                         compatible = "ti,sysc-omap2", "ti,sysc";
 433                         ti,hwmods = "ocp2scp1";
 434                         reg = <0x0 0x4>,
 435                               <0x10 0x4>,
 436                               <0x14 0x4>;
 437                         reg-names = "rev", "sysc", "syss";
 438                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 439                                          SYSC_OMAP2_AUTOIDLE)>;
 440                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 441                                         <SYSC_IDLE_NO>,
 442                                         <SYSC_IDLE_SMART>;
 443                         ti,syss-mask = <1>;
 444                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 445                         clocks = <&l3init_clkctrl OMAP5_OCP2SCP1_CLKCTRL 0>;
 446                         clock-names = "fck";
 447                         #address-cells = <1>;
 448                         #size-cells = <1>;
 449                         ranges = <0x00000000 0x00000000 0x00004000>,
 450                                  <0x00004000 0x00004000 0x00001000>,
 451                                  <0x00005000 0x00005000 0x00001000>,
 452                                  <0x00006000 0x00006000 0x00001000>,
 453                                  <0x00007000 0x00007000 0x00001000>;
 454
 455                         ocp2scp@0 {
 456                                 compatible = "ti,omap-ocp2scp";
 457                                 #address-cells = <1>;
 458                                 #size-cells = <1>;
 459                                 reg = <0 0x20>;
 460                         };
 461
 462                         usb2_phy: usb2phy@4000 {
 463                                 compatible = "ti,omap-usb2";
 464                                 reg = <0x4000 0x7c>;
 465                                 syscon-phy-power = <&scm_conf 0x300>;
 466                                 clocks = <&usb_phy_cm_clk32k>,
 467                                 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
 468                                 clock-names = "wkupclk", "refclk";
 469                                 #phy-cells = <0>;
 470                         };
 471
 472                         usb3_phy: usb3phy@4400 {
 473                                 compatible = "ti,omap-usb3";
 474                                 reg = <0x4400 0x80>,
 475                                 <0x4800 0x64>,
 476                                 <0x4c00 0x40>;
 477                                 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
 478                                 syscon-phy-power = <&scm_conf 0x370>;
 479                                 clocks = <&usb_phy_cm_clk32k>,
 480                                 <&sys_clkin>,
 481                                 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
 482                                 clock-names =   "wkupclk",
 483                                 "sysclk",
 484                                 "refclk";
 485                                 #phy-cells = <0>;
 486                         };
 487                 };
 488
 489                 target-module@10000 {                   /* 0x4a090000, ap 89 36.0 */
 490                         compatible = "ti,sysc-omap2", "ti,sysc";
 491                         ti,hwmods = "ocp2scp3";
 492                         reg = <0x10000 0x4>,
 493                               <0x10010 0x4>,
 494                               <0x10014 0x4>;
 495                         reg-names = "rev", "sysc", "syss";
 496                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 497                                          SYSC_OMAP2_AUTOIDLE)>;
 498                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 499                                         <SYSC_IDLE_NO>,
 500                                         <SYSC_IDLE_SMART>;
 501                         ti,syss-mask = <1>;
 502                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 503                         clocks = <&l3init_clkctrl OMAP5_OCP2SCP3_CLKCTRL 0>;
 504                         clock-names = "fck";
 505                         #address-cells = <1>;
 506                         #size-cells = <1>;
 507                         ranges = <0x00000000 0x00010000 0x00004000>,
 508                                  <0x00004000 0x00014000 0x00001000>,
 509                                  <0x00005000 0x00015000 0x00001000>,
 510                                  <0x00006000 0x00016000 0x00001000>,
 511                                  <0x00007000 0x00017000 0x00001000>;
 512
 513                                 ocp2scp@0 {
 514                                         compatible = "ti,omap-ocp2scp";
 515                                         #address-cells = <1>;
 516                                         #size-cells = <1>;
 517                                         reg = <0x0 0x20>;
 518                                 };
 519
 520                                 sata_phy: phy@6000 {
 521                                         compatible = "ti,phy-pipe3-sata";
 522                                         reg = <0x6000 0x80>, /* phy_rx */
 523                                               <0x6400 0x64>, /* phy_tx */
 524                                               <0x6800 0x40>; /* pll_ctrl */
 525                                         reg-names = "phy_rx", "phy_tx", "pll_ctrl";
 526                                         syscon-phy-power = <&scm_conf 0x374>;
 527                                         clocks = <&sys_clkin>,
 528                                                  <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
 529                                         clock-names = "sysclk", "refclk";
 530                                         #phy-cells = <0>;
 531                                 };
 532                 };
 533
 534                 target-module@20000 {                   /* 0x4a0a0000, ap 95 50.0 */
 535                         compatible = "ti,sysc";
 536                         status = "disabled";
 537                         #address-cells = <1>;
 538                         #size-cells = <1>;
 539                         ranges = <0x00000000 0x00020000 0x00004000>,
 540                                  <0x00004000 0x00024000 0x00001000>,
 541                                  <0x00005000 0x00025000 0x00001000>,
 542                                  <0x00006000 0x00026000 0x00001000>,
 543                                  <0x00007000 0x00027000 0x00001000>;
 544                 };
 545
 546                 target-module@36000 {                   /* 0x4a0b6000, ap 65 6c.0 */
 547                         compatible = "ti,sysc";
 548                         status = "disabled";
 549                         #address-cells = <1>;
 550                         #size-cells = <1>;
 551                         ranges = <0x0 0x36000 0x1000>;
 552                 };
 553
 554                 target-module@4d000 {                   /* 0x4a0cd000, ap 67 64.0 */
 555                         compatible = "ti,sysc";
 556                         status = "disabled";
 557                         #address-cells = <1>;
 558                         #size-cells = <1>;
 559                         ranges = <0x0 0x4d000 0x1000>;
 560                 };
 561
 562                 target-module@59000 {                   /* 0x4a0d9000, ap 13 20.0 */
 563                         compatible = "ti,sysc";
 564                         status = "disabled";
 565                         #address-cells = <1>;
 566                         #size-cells = <1>;
 567                         ranges = <0x0 0x59000 0x1000>;
 568                 };
 569
 570                 target-module@5b000 {                   /* 0x4a0db000, ap 15 10.0 */
 571                         compatible = "ti,sysc";
 572                         status = "disabled";
 573                         #address-cells = <1>;
 574                         #size-cells = <1>;
 575                         ranges = <0x0 0x5b000 0x1000>;
 576                 };
 577
 578                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 18.0 */
 579                         compatible = "ti,sysc";
 580                         status = "disabled";
 581                         #address-cells = <1>;
 582                         #size-cells = <1>;
 583                         ranges = <0x0 0x5d000 0x1000>;
 584                 };
 585
 586                 target-module@60000 {                   /* 0x4a0e0000, ap 19 54.0 */
 587                         compatible = "ti,sysc";
 588                         status = "disabled";
 589                         #address-cells = <1>;
 590                         #size-cells = <1>;
 591                         ranges = <0x0 0x60000 0x1000>;
 592                 };
 593
 594                 target-module@74000 {                   /* 0x4a0f4000, ap 25 04.0 */
 595                         compatible = "ti,sysc-omap4", "ti,sysc";
 596                         ti,hwmods = "mailbox";
 597                         reg = <0x74000 0x4>,
 598                               <0x74010 0x4>;
 599                         reg-names = "rev", "sysc";
 600                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 601                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 602                                         <SYSC_IDLE_NO>,
 603                                         <SYSC_IDLE_SMART>;
 604                         /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
 605                         clocks = <&l4cfg_clkctrl OMAP5_MAILBOX_CLKCTRL 0>;
 606                         clock-names = "fck";
 607                         #address-cells = <1>;
 608                         #size-cells = <1>;
 609                         ranges = <0x0 0x74000 0x1000>;
 610
 611                         mailbox: mailbox@0 {
 612                                 compatible = "ti,omap4-mailbox";
 613                                 reg = <0x0 0x200>;
 614                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 615                                 #mbox-cells = <1>;
 616                                 ti,mbox-num-users = <3>;
 617                                 ti,mbox-num-fifos = <8>;
 618                                 mbox_ipu: mbox_ipu {
 619                                         ti,mbox-tx = <0 0 0>;
 620                                         ti,mbox-rx = <1 0 0>;
 621                                 };
 622                                 mbox_dsp: mbox_dsp {
 623                                         ti,mbox-tx = <3 0 0>;
 624                                         ti,mbox-rx = <2 0 0>;
 625                                 };
 626                         };
 627                 };
 628
 629                 target-module@76000 {                   /* 0x4a0f6000, ap 27 0c.0 */
 630                         compatible = "ti,sysc-omap2", "ti,sysc";
 631                         ti,hwmods = "spinlock";
 632                         reg = <0x76000 0x4>,
 633                               <0x76010 0x4>,
 634                               <0x76014 0x4>;
 635                         reg-names = "rev", "sysc", "syss";
 636                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 637                                          SYSC_OMAP2_ENAWAKEUP |
 638                                          SYSC_OMAP2_SOFTRESET |
 639                                          SYSC_OMAP2_AUTOIDLE)>;
 640                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 641                                         <SYSC_IDLE_NO>,
 642                                         <SYSC_IDLE_SMART>;
 643                         ti,syss-mask = <1>;
 644                         /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
 645                         clocks = <&l4cfg_clkctrl OMAP5_SPINLOCK_CLKCTRL 0>;
 646                         clock-names = "fck";
 647                         #address-cells = <1>;
 648                         #size-cells = <1>;
 649                         ranges = <0x0 0x76000 0x1000>;
 650
 651                         hwspinlock: spinlock@0 {
 652                                 compatible = "ti,omap4-hwspinlock";
 653                                 reg = <0x0 0x1000>;
 654                                 #hwlock-cells = <1>;
 655                         };
 656                 };
 657         };
 658
 659         segment@100000 {                                        /* 0x4a100000 */
 660                 compatible = "simple-bus";
 661                 #address-cells = <1>;
 662                 #size-cells = <1>;
 663                 ranges = <0x00002000 0x00102000 0x001000>,      /* ap 59 */
 664                          <0x00003000 0x00103000 0x001000>,      /* ap 60 */
 665                          <0x00008000 0x00108000 0x001000>,      /* ap 61 */
 666                          <0x00009000 0x00109000 0x001000>,      /* ap 62 */
 667                          <0x0000a000 0x0010a000 0x001000>,      /* ap 63 */
 668                          <0x0000b000 0x0010b000 0x001000>,      /* ap 64 */
 669                          <0x00040000 0x00140000 0x010000>,      /* ap 101 */
 670                          <0x00050000 0x00150000 0x001000>;      /* ap 102 */
 671
 672                 target-module@2000 {                    /* 0x4a102000, ap 59 2c.0 */
 673                         compatible = "ti,sysc";
 674                         status = "disabled";
 675                         #address-cells = <1>;
 676                         #size-cells = <1>;
 677                         ranges = <0x0 0x2000 0x1000>;
 678                 };
 679
 680                 target-module@8000 {                    /* 0x4a108000, ap 61 26.0 */
 681                         compatible = "ti,sysc";
 682                         status = "disabled";
 683                         #address-cells = <1>;
 684                         #size-cells = <1>;
 685                         ranges = <0x0 0x8000 0x1000>;
 686                 };
 687
 688                 target-module@a000 {                    /* 0x4a10a000, ap 63 22.0 */
 689                         compatible = "ti,sysc";
 690                         status = "disabled";
 691                         #address-cells = <1>;
 692                         #size-cells = <1>;
 693                         ranges = <0x0 0xa000 0x1000>;
 694                 };
 695
 696                 target-module@40000 {                   /* 0x4a140000, ap 101 16.0 */
 697                         compatible = "ti,sysc";
 698                         status = "disabled";
 699                         #address-cells = <1>;
 700                         #size-cells = <1>;
 701                         ranges = <0x0 0x40000 0x10000>;
 702                 };
 703         };
 704
 705         segment@180000 {                                        /* 0x4a180000 */
 706                 compatible = "simple-bus";
 707                 #address-cells = <1>;
 708                 #size-cells = <1>;
 709         };
 710
 711         segment@200000 {                                        /* 0x4a200000 */
 712                 compatible = "simple-bus";
 713                 #address-cells = <1>;
 714                 #size-cells = <1>;
 715                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 29 */
 716                          <0x0001f000 0x0021f000 0x001000>,      /* ap 30 */
 717                          <0x0000a000 0x0020a000 0x001000>,      /* ap 31 */
 718                          <0x0000b000 0x0020b000 0x001000>,      /* ap 32 */
 719                          <0x00006000 0x00206000 0x001000>,      /* ap 33 */
 720                          <0x00007000 0x00207000 0x001000>,      /* ap 34 */
 721                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 722                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 723                          <0x00012000 0x00212000 0x001000>,      /* ap 37 */
 724                          <0x00013000 0x00213000 0x001000>,      /* ap 38 */
 725                          <0x0000c000 0x0020c000 0x001000>,      /* ap 39 */
 726                          <0x0000d000 0x0020d000 0x001000>,      /* ap 40 */
 727                          <0x00010000 0x00210000 0x001000>,      /* ap 41 */
 728                          <0x00011000 0x00211000 0x001000>,      /* ap 42 */
 729                          <0x00016000 0x00216000 0x001000>,      /* ap 43 */
 730                          <0x00017000 0x00217000 0x001000>,      /* ap 44 */
 731                          <0x00014000 0x00214000 0x001000>,      /* ap 45 */
 732                          <0x00015000 0x00215000 0x001000>,      /* ap 46 */
 733                          <0x00018000 0x00218000 0x001000>,      /* ap 47 */
 734                          <0x00019000 0x00219000 0x001000>,      /* ap 48 */
 735                          <0x00020000 0x00220000 0x001000>,      /* ap 49 */
 736                          <0x00021000 0x00221000 0x001000>,      /* ap 50 */
 737                          <0x00026000 0x00226000 0x001000>,      /* ap 51 */
 738                          <0x00027000 0x00227000 0x001000>,      /* ap 52 */
 739                          <0x00028000 0x00228000 0x001000>,      /* ap 53 */
 740                          <0x00029000 0x00229000 0x001000>,      /* ap 54 */
 741                          <0x0002a000 0x0022a000 0x001000>,      /* ap 55 */
 742                          <0x0002b000 0x0022b000 0x001000>,      /* ap 56 */
 743                          <0x0001c000 0x0021c000 0x001000>,      /* ap 57 */
 744                          <0x0001d000 0x0021d000 0x001000>,      /* ap 58 */
 745                          <0x0001a000 0x0021a000 0x001000>,      /* ap 73 */
 746                          <0x0001b000 0x0021b000 0x001000>,      /* ap 74 */
 747                          <0x00024000 0x00224000 0x001000>,      /* ap 75 */
 748                          <0x00025000 0x00225000 0x001000>,      /* ap 76 */
 749                          <0x00002000 0x00202000 0x001000>,      /* ap 103 */
 750                          <0x00003000 0x00203000 0x001000>,      /* ap 104 */
 751                          <0x00008000 0x00208000 0x001000>,      /* ap 105 */
 752                          <0x00009000 0x00209000 0x001000>,      /* ap 106 */
 753                          <0x00022000 0x00222000 0x001000>,      /* ap 107 */
 754                          <0x00023000 0x00223000 0x001000>;      /* ap 108 */
 755
 756                 target-module@2000 {                    /* 0x4a202000, ap 103 3c.0 */
 757                         compatible = "ti,sysc";
 758                         status = "disabled";
 759                         #address-cells = <1>;
 760                         #size-cells = <1>;
 761                         ranges = <0x0 0x2000 0x1000>;
 762                 };
 763
 764                 target-module@4000 {                    /* 0x4a204000, ap 35 46.0 */
 765                         compatible = "ti,sysc";
 766                         status = "disabled";
 767                         #address-cells = <1>;
 768                         #size-cells = <1>;
 769                         ranges = <0x0 0x4000 0x1000>;
 770                 };
 771
 772                 target-module@6000 {                    /* 0x4a206000, ap 33 4e.0 */
 773                         compatible = "ti,sysc";
 774                         status = "disabled";
 775                         #address-cells = <1>;
 776                         #size-cells = <1>;
 777                         ranges = <0x0 0x6000 0x1000>;
 778                 };
 779
 780                 target-module@8000 {                    /* 0x4a208000, ap 105 34.0 */
 781                         compatible = "ti,sysc";
 782                         status = "disabled";
 783                         #address-cells = <1>;
 784                         #size-cells = <1>;
 785                         ranges = <0x0 0x8000 0x1000>;
 786                 };
 787
 788                 target-module@a000 {                    /* 0x4a20a000, ap 31 30.0 */
 789                         compatible = "ti,sysc";
 790                         status = "disabled";
 791                         #address-cells = <1>;
 792                         #size-cells = <1>;
 793                         ranges = <0x0 0xa000 0x1000>;
 794                 };
 795
 796                 target-module@c000 {                    /* 0x4a20c000, ap 39 14.0 */
 797                         compatible = "ti,sysc";
 798                         status = "disabled";
 799                         #address-cells = <1>;
 800                         #size-cells = <1>;
 801                         ranges = <0x0 0xc000 0x1000>;
 802                 };
 803
 804                 target-module@10000 {                   /* 0x4a210000, ap 41 56.0 */
 805                         compatible = "ti,sysc";
 806                         status = "disabled";
 807                         #address-cells = <1>;
 808                         #size-cells = <1>;
 809                         ranges = <0x0 0x10000 0x1000>;
 810                 };
 811
 812                 target-module@12000 {                   /* 0x4a212000, ap 37 52.0 */
 813                         compatible = "ti,sysc";
 814                         status = "disabled";
 815                         #address-cells = <1>;
 816                         #size-cells = <1>;
 817                         ranges = <0x0 0x12000 0x1000>;
 818                 };
 819
 820                 target-module@14000 {                   /* 0x4a214000, ap 45 1c.0 */
 821                         compatible = "ti,sysc";
 822                         status = "disabled";
 823                         #address-cells = <1>;
 824                         #size-cells = <1>;
 825                         ranges = <0x0 0x14000 0x1000>;
 826                 };
 827
 828                 target-module@16000 {                   /* 0x4a216000, ap 43 42.0 */
 829                         compatible = "ti,sysc";
 830                         status = "disabled";
 831                         #address-cells = <1>;
 832                         #size-cells = <1>;
 833                         ranges = <0x0 0x16000 0x1000>;
 834                 };
 835
 836                 target-module@18000 {                   /* 0x4a218000, ap 47 1a.0 */
 837                         compatible = "ti,sysc";
 838                         status = "disabled";
 839                         #address-cells = <1>;
 840                         #size-cells = <1>;
 841                         ranges = <0x0 0x18000 0x1000>;
 842                 };
 843
 844                 target-module@1a000 {                   /* 0x4a21a000, ap 73 3e.0 */
 845                         compatible = "ti,sysc";
 846                         status = "disabled";
 847                         #address-cells = <1>;
 848                         #size-cells = <1>;
 849                         ranges = <0x0 0x1a000 0x1000>;
 850                 };
 851
 852                 target-module@1c000 {                   /* 0x4a21c000, ap 57 40.0 */
 853                         compatible = "ti,sysc";
 854                         status = "disabled";
 855                         #address-cells = <1>;
 856                         #size-cells = <1>;
 857                         ranges = <0x0 0x1c000 0x1000>;
 858                 };
 859
 860                 target-module@1e000 {                   /* 0x4a21e000, ap 29 12.0 */
 861                         compatible = "ti,sysc";
 862                         status = "disabled";
 863                         #address-cells = <1>;
 864                         #size-cells = <1>;
 865                         ranges = <0x0 0x1e000 0x1000>;
 866                 };
 867
 868                 target-module@20000 {                   /* 0x4a220000, ap 49 4a.0 */
 869                         compatible = "ti,sysc";
 870                         status = "disabled";
 871                         #address-cells = <1>;
 872                         #size-cells = <1>;
 873                         ranges = <0x0 0x20000 0x1000>;
 874                 };
 875
 876                 target-module@22000 {                   /* 0x4a222000, ap 107 3a.0 */
 877                         compatible = "ti,sysc";
 878                         status = "disabled";
 879                         #address-cells = <1>;
 880                         #size-cells = <1>;
 881                         ranges = <0x0 0x22000 0x1000>;
 882                 };
 883
 884                 target-module@24000 {                   /* 0x4a224000, ap 75 48.0 */
 885                         compatible = "ti,sysc";
 886                         status = "disabled";
 887                         #address-cells = <1>;
 888                         #size-cells = <1>;
 889                         ranges = <0x0 0x24000 0x1000>;
 890                 };
 891
 892                 target-module@26000 {                   /* 0x4a226000, ap 51 24.0 */
 893                         compatible = "ti,sysc";
 894                         status = "disabled";
 895                         #address-cells = <1>;
 896                         #size-cells = <1>;
 897                         ranges = <0x0 0x26000 0x1000>;
 898                 };
 899
 900                 target-module@28000 {                   /* 0x4a228000, ap 53 38.0 */
 901                         compatible = "ti,sysc";
 902                         status = "disabled";
 903                         #address-cells = <1>;
 904                         #size-cells = <1>;
 905                         ranges = <0x0 0x28000 0x1000>;
 906                 };
 907
 908                 target-module@2a000 {                   /* 0x4a22a000, ap 55 5a.0 */
 909                         compatible = "ti,sysc";
 910                         status = "disabled";
 911                         #address-cells = <1>;
 912                         #size-cells = <1>;
 913                         ranges = <0x0 0x2a000 0x1000>;
 914                 };
 915         };
 916
 917         segment@280000 {                                        /* 0x4a280000 */
 918                 compatible = "simple-bus";
 919                 #address-cells = <1>;
 920                 #size-cells = <1>;
 921         };
 922
 923         segment@300000 {                                        /* 0x4a300000 */
 924                 compatible = "simple-bus";
 925                 #address-cells = <1>;
 926                 #size-cells = <1>;
 927         };
 928 };
 929
 930 &l4_per {                                               /* 0x48000000 */
 931         compatible = "ti,omap5-l4-per", "simple-bus";
 932         reg = <0x48000000 0x800>,
 933               <0x48000800 0x800>,
 934               <0x48001000 0x400>,
 935               <0x48001400 0x400>,
 936               <0x48001800 0x400>,
 937               <0x48001c00 0x400>;
 938         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
 939         #address-cells = <1>;
 940         #size-cells = <1>;
 941         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
 942                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
 943
 944         segment@0 {                                     /* 0x48000000 */
 945                 compatible = "simple-bus";
 946                 #address-cells = <1>;
 947                 #size-cells = <1>;
 948                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 949                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
 950                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 951                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
 952                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
 953                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
 954                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
 955                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
 956                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
 957                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
 958                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
 959                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
 960                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
 961                          <0x00055000 0x00055000 0x001000>,      /* ap 13 */
 962                          <0x00056000 0x00056000 0x001000>,      /* ap 14 */
 963                          <0x00057000 0x00057000 0x001000>,      /* ap 15 */
 964                          <0x00058000 0x00058000 0x001000>,      /* ap 16 */
 965                          <0x00059000 0x00059000 0x001000>,      /* ap 17 */
 966                          <0x0005a000 0x0005a000 0x001000>,      /* ap 18 */
 967                          <0x0005b000 0x0005b000 0x001000>,      /* ap 19 */
 968                          <0x0005c000 0x0005c000 0x001000>,      /* ap 20 */
 969                          <0x0005d000 0x0005d000 0x001000>,      /* ap 21 */
 970                          <0x0005e000 0x0005e000 0x001000>,      /* ap 22 */
 971                          <0x00060000 0x00060000 0x001000>,      /* ap 23 */
 972                          <0x0006a000 0x0006a000 0x001000>,      /* ap 24 */
 973                          <0x0006b000 0x0006b000 0x001000>,      /* ap 25 */
 974                          <0x0006c000 0x0006c000 0x001000>,      /* ap 26 */
 975                          <0x0006d000 0x0006d000 0x001000>,      /* ap 27 */
 976                          <0x0006e000 0x0006e000 0x001000>,      /* ap 28 */
 977                          <0x0006f000 0x0006f000 0x001000>,      /* ap 29 */
 978                          <0x00070000 0x00070000 0x001000>,      /* ap 30 */
 979                          <0x00071000 0x00071000 0x001000>,      /* ap 31 */
 980                          <0x00072000 0x00072000 0x001000>,      /* ap 32 */
 981                          <0x00073000 0x00073000 0x001000>,      /* ap 33 */
 982                          <0x00061000 0x00061000 0x001000>,      /* ap 34 */
 983                          <0x00053000 0x00053000 0x001000>,      /* ap 35 */
 984                          <0x00054000 0x00054000 0x001000>,      /* ap 36 */
 985                          <0x000b2000 0x000b2000 0x001000>,      /* ap 37 */
 986                          <0x000b3000 0x000b3000 0x001000>,      /* ap 38 */
 987                          <0x00078000 0x00078000 0x001000>,      /* ap 39 */
 988                          <0x00079000 0x00079000 0x001000>,      /* ap 40 */
 989                          <0x00086000 0x00086000 0x001000>,      /* ap 41 */
 990                          <0x00087000 0x00087000 0x001000>,      /* ap 42 */
 991                          <0x00088000 0x00088000 0x001000>,      /* ap 43 */
 992                          <0x00089000 0x00089000 0x001000>,      /* ap 44 */
 993                          <0x00051000 0x00051000 0x001000>,      /* ap 45 */
 994                          <0x00052000 0x00052000 0x001000>,      /* ap 46 */
 995                          <0x00098000 0x00098000 0x001000>,      /* ap 47 */
 996                          <0x00099000 0x00099000 0x001000>,      /* ap 48 */
 997                          <0x0009a000 0x0009a000 0x001000>,      /* ap 49 */
 998                          <0x0009b000 0x0009b000 0x001000>,      /* ap 50 */
 999                          <0x0009c000 0x0009c000 0x001000>,      /* ap 51 */
1000                          <0x0009d000 0x0009d000 0x001000>,      /* ap 52 */
1001                          <0x00068000 0x00068000 0x001000>,      /* ap 53 */
1002                          <0x00069000 0x00069000 0x001000>,      /* ap 54 */
1003                          <0x00090000 0x00090000 0x002000>,      /* ap 55 */
1004                          <0x00092000 0x00092000 0x001000>,      /* ap 56 */
1005                          <0x000a4000 0x000a4000 0x001000>,      /* ap 57 */
1006                          <0x000a6000 0x000a6000 0x001000>,      /* ap 58 */
1007                          <0x000a8000 0x000a8000 0x004000>,      /* ap 59 */
1008                          <0x000ac000 0x000ac000 0x001000>,      /* ap 60 */
1009                          <0x000ad000 0x000ad000 0x001000>,      /* ap 61 */
1010                          <0x000ae000 0x000ae000 0x001000>,      /* ap 62 */
1011                          <0x00066000 0x00066000 0x001000>,      /* ap 63 */
1012                          <0x00067000 0x00067000 0x001000>,      /* ap 64 */
1013                          <0x000b4000 0x000b4000 0x001000>,      /* ap 65 */
1014                          <0x000b5000 0x000b5000 0x001000>,      /* ap 66 */
1015                          <0x000b8000 0x000b8000 0x001000>,      /* ap 67 */
1016                          <0x000b9000 0x000b9000 0x001000>,      /* ap 68 */
1017                          <0x000ba000 0x000ba000 0x001000>,      /* ap 69 */
1018                          <0x000bb000 0x000bb000 0x001000>,      /* ap 70 */
1019                          <0x000d1000 0x000d1000 0x001000>,      /* ap 71 */
1020                          <0x000d2000 0x000d2000 0x001000>,      /* ap 72 */
1021                          <0x000d5000 0x000d5000 0x001000>,      /* ap 73 */
1022                          <0x000d6000 0x000d6000 0x001000>,      /* ap 74 */
1023                          <0x000a2000 0x000a2000 0x001000>,      /* ap 75 */
1024                          <0x000a3000 0x000a3000 0x001000>,      /* ap 76 */
1025                          <0x00001400 0x00001400 0x000400>,      /* ap 77 */
1026                          <0x00001800 0x00001800 0x000400>,      /* ap 78 */
1027                          <0x00001c00 0x00001c00 0x000400>,      /* ap 79 */
1028                          <0x000a5000 0x000a5000 0x001000>,      /* ap 80 */
1029                          <0x0007a000 0x0007a000 0x001000>,      /* ap 81 */
1030                          <0x0007b000 0x0007b000 0x001000>,      /* ap 82 */
1031                          <0x0007c000 0x0007c000 0x001000>,      /* ap 83 */
1032                          <0x0007d000 0x0007d000 0x001000>;      /* ap 84 */
1033
1034                 target-module@20000 {                   /* 0x48020000, ap 3 04.0 */
1035                         compatible = "ti,sysc-omap2", "ti,sysc";
1036                         ti,hwmods = "uart3";
1037                         reg = <0x20050 0x4>,
1038                               <0x20054 0x4>,
1039                               <0x20058 0x4>;
1040                         reg-names = "rev", "sysc", "syss";
1041                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1042                                          SYSC_OMAP2_SOFTRESET |
1043                                          SYSC_OMAP2_AUTOIDLE)>;
1044                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1045                                         <SYSC_IDLE_NO>,
1046                                         <SYSC_IDLE_SMART>,
1047                                         <SYSC_IDLE_SMART_WKUP>;
1048                         ti,syss-mask = <1>;
1049                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1050                         clocks = <&l4per_clkctrl OMAP5_UART3_CLKCTRL 0>;
1051                         clock-names = "fck";
1052                         #address-cells = <1>;
1053                         #size-cells = <1>;
1054                         ranges = <0x0 0x20000 0x1000>;
1055
1056                         uart3: serial@0 {
1057                                 compatible = "ti,omap4-uart";
1058                                 reg = <0x0 0x100>;
1059                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1060                                 clock-frequency = <48000000>;
1061                         };
1062                 };
1063
1064                 target-module@32000 {                   /* 0x48032000, ap 5 3e.0 */
1065                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1066                         ti,hwmods = "timer2";
1067                         reg = <0x32000 0x4>,
1068                               <0x32010 0x4>;
1069                         reg-names = "rev", "sysc";
1070                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1071                                          SYSC_OMAP4_SOFTRESET)>;
1072                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1073                                         <SYSC_IDLE_NO>,
1074                                         <SYSC_IDLE_SMART>,
1075                                         <SYSC_IDLE_SMART_WKUP>;
1076                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1077                         clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 0>;
1078                         clock-names = "fck";
1079                         #address-cells = <1>;
1080                         #size-cells = <1>;
1081                         ranges = <0x0 0x32000 0x1000>;
1082
1083                         timer2: timer@0 {
1084                                 compatible = "ti,omap5430-timer";
1085                                 reg = <0x0 0x80>;
1086                                 clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 24>;
1087                                 clock-names = "fck";
1088                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1089                         };
1090                 };
1091
1092                 target-module@34000 {                   /* 0x48034000, ap 7 46.0 */
1093                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1094                         ti,hwmods = "timer3";
1095                         reg = <0x34000 0x4>,
1096                               <0x34010 0x4>;
1097                         reg-names = "rev", "sysc";
1098                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1099                                          SYSC_OMAP4_SOFTRESET)>;
1100                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1101                                         <SYSC_IDLE_NO>,
1102                                         <SYSC_IDLE_SMART>,
1103                                         <SYSC_IDLE_SMART_WKUP>;
1104                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1105                         clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 0>;
1106                         clock-names = "fck";
1107                         #address-cells = <1>;
1108                         #size-cells = <1>;
1109                         ranges = <0x0 0x34000 0x1000>;
1110
1111                         timer3: timer@0 {
1112                                 compatible = "ti,omap5430-timer";
1113                                 reg = <0x0 0x80>;
1114                                 clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 24>;
1115                                 clock-names = "fck";
1116                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1117                         };
1118                 };
1119
1120                 target-module@36000 {                   /* 0x48036000, ap 9 4e.0 */
1121                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1122                         ti,hwmods = "timer4";
1123                         reg = <0x36000 0x4>,
1124                               <0x36010 0x4>;
1125                         reg-names = "rev", "sysc";
1126                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1127                                          SYSC_OMAP4_SOFTRESET)>;
1128                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1129                                         <SYSC_IDLE_NO>,
1130                                         <SYSC_IDLE_SMART>,
1131                                         <SYSC_IDLE_SMART_WKUP>;
1132                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1133                         clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 0>;
1134                         clock-names = "fck";
1135                         #address-cells = <1>;
1136                         #size-cells = <1>;
1137                         ranges = <0x0 0x36000 0x1000>;
1138
1139                         timer4: timer@0 {
1140                                 compatible = "ti,omap5430-timer";
1141                                 reg = <0x0 0x80>;
1142                                 clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 24>;
1143                                 clock-names = "fck";
1144                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1145                         };
1146                 };
1147
1148                 target-module@3e000 {                   /* 0x4803e000, ap 11 56.0 */
1149                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1150                         ti,hwmods = "timer9";
1151                         reg = <0x3e000 0x4>,
1152                               <0x3e010 0x4>;
1153                         reg-names = "rev", "sysc";
1154                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1155                                          SYSC_OMAP4_SOFTRESET)>;
1156                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1157                                         <SYSC_IDLE_NO>,
1158                                         <SYSC_IDLE_SMART>,
1159                                         <SYSC_IDLE_SMART_WKUP>;
1160                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1161                         clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 0>;
1162                         clock-names = "fck";
1163                         #address-cells = <1>;
1164                         #size-cells = <1>;
1165                         ranges = <0x0 0x3e000 0x1000>;
1166
1167                         timer9: timer@0 {
1168                                 compatible = "ti,omap5430-timer";
1169                                 reg = <0x0 0x80>;
1170                                 clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 24>;
1171                                 clock-names = "fck";
1172                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1173                                 ti,timer-pwm;
1174                         };
1175                 };
1176
1177                 target-module@51000 {                   /* 0x48051000, ap 45 2e.0 */
1178                         compatible = "ti,sysc-omap2", "ti,sysc";
1179                         ti,hwmods = "gpio7";
1180                         reg = <0x51000 0x4>,
1181                               <0x51010 0x4>,
1182                               <0x51114 0x4>;
1183                         reg-names = "rev", "sysc", "syss";
1184                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1185                                          SYSC_OMAP2_SOFTRESET |
1186                                          SYSC_OMAP2_AUTOIDLE)>;
1187                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1188                                         <SYSC_IDLE_NO>,
1189                                         <SYSC_IDLE_SMART>,
1190                                         <SYSC_IDLE_SMART_WKUP>;
1191                         ti,syss-mask = <1>;
1192                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1193                         clocks = <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 0>,
1194                                  <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 8>;
1195                         clock-names = "fck", "dbclk";
1196                         #address-cells = <1>;
1197                         #size-cells = <1>;
1198                         ranges = <0x0 0x51000 0x1000>;
1199
1200                         gpio7: gpio@0 {
1201                                 compatible = "ti,omap4-gpio";
1202                                 reg = <0x0 0x200>;
1203                                 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1204                                 gpio-controller;
1205                                 #gpio-cells = <2>;
1206                                 interrupt-controller;
1207                                 #interrupt-cells = <2>;
1208                         };
1209                 };
1210
1211                 target-module@53000 {                   /* 0x48053000, ap 35 36.0 */
1212                         compatible = "ti,sysc-omap2", "ti,sysc";
1213                         ti,hwmods = "gpio8";
1214                         reg = <0x53000 0x4>,
1215                               <0x53010 0x4>,
1216                               <0x53114 0x4>;
1217                         reg-names = "rev", "sysc", "syss";
1218                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1219                                          SYSC_OMAP2_SOFTRESET |
1220                                          SYSC_OMAP2_AUTOIDLE)>;
1221                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1222                                         <SYSC_IDLE_NO>,
1223                                         <SYSC_IDLE_SMART>,
1224                                         <SYSC_IDLE_SMART_WKUP>;
1225                         ti,syss-mask = <1>;
1226                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1227                         clocks = <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 0>,
1228                                  <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 8>;
1229                         clock-names = "fck", "dbclk";
1230                         #address-cells = <1>;
1231                         #size-cells = <1>;
1232                         ranges = <0x0 0x53000 0x1000>;
1233
1234                         gpio8: gpio@0 {
1235                                 compatible = "ti,omap4-gpio";
1236                                 reg = <0x0 0x200>;
1237                                 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1238                                 gpio-controller;
1239                                 #gpio-cells = <2>;
1240                                 interrupt-controller;
1241                                 #interrupt-cells = <2>;
1242                         };
1243                 };
1244
1245                 target-module@55000 {                   /* 0x48055000, ap 13 0e.0 */
1246                         compatible = "ti,sysc-omap2", "ti,sysc";
1247                         ti,hwmods = "gpio2";
1248                         reg = <0x55000 0x4>,
1249                               <0x55010 0x4>,
1250                               <0x55114 0x4>;
1251                         reg-names = "rev", "sysc", "syss";
1252                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1253                                          SYSC_OMAP2_SOFTRESET |
1254                                          SYSC_OMAP2_AUTOIDLE)>;
1255                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1256                                         <SYSC_IDLE_NO>,
1257                                         <SYSC_IDLE_SMART>,
1258                                         <SYSC_IDLE_SMART_WKUP>;
1259                         ti,syss-mask = <1>;
1260                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1261                         clocks = <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 0>,
1262                                  <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 8>;
1263                         clock-names = "fck", "dbclk";
1264                         #address-cells = <1>;
1265                         #size-cells = <1>;
1266                         ranges = <0x0 0x55000 0x1000>;
1267
1268                         gpio2: gpio@0 {
1269                                 compatible = "ti,omap4-gpio";
1270                                 reg = <0x0 0x200>;
1271                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1272                                 gpio-controller;
1273                                 #gpio-cells = <2>;
1274                                 interrupt-controller;
1275                                 #interrupt-cells = <2>;
1276                         };
1277                 };
1278
1279                 target-module@57000 {                   /* 0x48057000, ap 15 06.0 */
1280                         compatible = "ti,sysc-omap2", "ti,sysc";
1281                         ti,hwmods = "gpio3";
1282                         reg = <0x57000 0x4>,
1283                               <0x57010 0x4>,
1284                               <0x57114 0x4>;
1285                         reg-names = "rev", "sysc", "syss";
1286                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1287                                          SYSC_OMAP2_SOFTRESET |
1288                                          SYSC_OMAP2_AUTOIDLE)>;
1289                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1290                                         <SYSC_IDLE_NO>,
1291                                         <SYSC_IDLE_SMART>,
1292                                         <SYSC_IDLE_SMART_WKUP>;
1293                         ti,syss-mask = <1>;
1294                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1295                         clocks = <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 0>,
1296                                  <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 8>;
1297                         clock-names = "fck", "dbclk";
1298                         #address-cells = <1>;
1299                         #size-cells = <1>;
1300                         ranges = <0x0 0x57000 0x1000>;
1301
1302                         gpio3: gpio@0 {
1303                                 compatible = "ti,omap4-gpio";
1304                                 reg = <0x0 0x200>;
1305                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1306                                 gpio-controller;
1307                                 #gpio-cells = <2>;
1308                                 interrupt-controller;
1309                                 #interrupt-cells = <2>;
1310                         };
1311                 };
1312
1313                 target-module@59000 {                   /* 0x48059000, ap 17 16.0 */
1314                         compatible = "ti,sysc-omap2", "ti,sysc";
1315                         ti,hwmods = "gpio4";
1316                         reg = <0x59000 0x4>,
1317                               <0x59010 0x4>,
1318                               <0x59114 0x4>;
1319                         reg-names = "rev", "sysc", "syss";
1320                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1321                                          SYSC_OMAP2_SOFTRESET |
1322                                          SYSC_OMAP2_AUTOIDLE)>;
1323                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1324                                         <SYSC_IDLE_NO>,
1325                                         <SYSC_IDLE_SMART>,
1326                                         <SYSC_IDLE_SMART_WKUP>;
1327                         ti,syss-mask = <1>;
1328                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1329                         clocks = <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 0>,
1330                                  <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 8>;
1331                         clock-names = "fck", "dbclk";
1332                         #address-cells = <1>;
1333                         #size-cells = <1>;
1334                         ranges = <0x0 0x59000 0x1000>;
1335
1336                         gpio4: gpio@0 {
1337                                 compatible = "ti,omap4-gpio";
1338                                 reg = <0x0 0x200>;
1339                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1340                                 gpio-controller;
1341                                 #gpio-cells = <2>;
1342                                 interrupt-controller;
1343                                 #interrupt-cells = <2>;
1344                         };
1345                 };
1346
1347                 target-module@5b000 {                   /* 0x4805b000, ap 19 1e.0 */
1348                         compatible = "ti,sysc-omap2", "ti,sysc";
1349                         ti,hwmods = "gpio5";
1350                         reg = <0x5b000 0x4>,
1351                               <0x5b010 0x4>,
1352                               <0x5b114 0x4>;
1353                         reg-names = "rev", "sysc", "syss";
1354                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1355                                          SYSC_OMAP2_SOFTRESET |
1356                                          SYSC_OMAP2_AUTOIDLE)>;
1357                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1358                                         <SYSC_IDLE_NO>,
1359                                         <SYSC_IDLE_SMART>,
1360                                         <SYSC_IDLE_SMART_WKUP>;
1361                         ti,syss-mask = <1>;
1362                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1363                         clocks = <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 0>,
1364                                  <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 8>;
1365                         clock-names = "fck", "dbclk";
1366                         #address-cells = <1>;
1367                         #size-cells = <1>;
1368                         ranges = <0x0 0x5b000 0x1000>;
1369
1370                         gpio5: gpio@0 {
1371                                 compatible = "ti,omap4-gpio";
1372                                 reg = <0x0 0x200>;
1373                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1374                                 gpio-controller;
1375                                 #gpio-cells = <2>;
1376                                 interrupt-controller;
1377                                 #interrupt-cells = <2>;
1378                         };
1379                 };
1380
1381                 target-module@5d000 {                   /* 0x4805d000, ap 21 26.0 */
1382                         compatible = "ti,sysc-omap2", "ti,sysc";
1383                         ti,hwmods = "gpio6";
1384                         reg = <0x5d000 0x4>,
1385                               <0x5d010 0x4>,
1386                               <0x5d114 0x4>;
1387                         reg-names = "rev", "sysc", "syss";
1388                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1389                                          SYSC_OMAP2_SOFTRESET |
1390                                          SYSC_OMAP2_AUTOIDLE)>;
1391                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1392                                         <SYSC_IDLE_NO>,
1393                                         <SYSC_IDLE_SMART>,
1394                                         <SYSC_IDLE_SMART_WKUP>;
1395                         ti,syss-mask = <1>;
1396                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1397                         clocks = <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 0>,
1398                                  <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 8>;
1399                         clock-names = "fck", "dbclk";
1400                         #address-cells = <1>;
1401                         #size-cells = <1>;
1402                         ranges = <0x0 0x5d000 0x1000>;
1403
1404                         gpio6: gpio@0 {
1405                                 compatible = "ti,omap4-gpio";
1406                                 reg = <0x0 0x200>;
1407                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1408                                 gpio-controller;
1409                                 #gpio-cells = <2>;
1410                                 interrupt-controller;
1411                                 #interrupt-cells = <2>;
1412                         };
1413                 };
1414
1415                 target-module@60000 {                   /* 0x48060000, ap 23 24.0 */
1416                         compatible = "ti,sysc-omap2", "ti,sysc";
1417                         ti,hwmods = "i2c3";
1418                         reg = <0x60000 0x8>,
1419                               <0x60010 0x8>,
1420                               <0x60090 0x8>;
1421                         reg-names = "rev", "sysc", "syss";
1422                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1423                                          SYSC_OMAP2_ENAWAKEUP |
1424                                          SYSC_OMAP2_SOFTRESET |
1425                                          SYSC_OMAP2_AUTOIDLE)>;
1426                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1427                                         <SYSC_IDLE_NO>,
1428                                         <SYSC_IDLE_SMART>,
1429                                         <SYSC_IDLE_SMART_WKUP>;
1430                         ti,syss-mask = <1>;
1431                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1432                         clocks = <&l4per_clkctrl OMAP5_I2C3_CLKCTRL 0>;
1433                         clock-names = "fck";
1434                         #address-cells = <1>;
1435                         #size-cells = <1>;
1436                         ranges = <0x0 0x60000 0x1000>;
1437
1438                         i2c3: i2c@0 {
1439                                 compatible = "ti,omap4-i2c";
1440                                 reg = <0x0 0x100>;
1441                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1442                                 #address-cells = <1>;
1443                                 #size-cells = <0>;
1444                         };
1445                 };
1446
1447                 target-module@66000 {                   /* 0x48066000, ap 63 4c.0 */
1448                         compatible = "ti,sysc-omap2", "ti,sysc";
1449                         ti,hwmods = "uart5";
1450                         reg = <0x66050 0x4>,
1451                               <0x66054 0x4>,
1452                               <0x66058 0x4>;
1453                         reg-names = "rev", "sysc", "syss";
1454                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1455                                          SYSC_OMAP2_SOFTRESET |
1456                                          SYSC_OMAP2_AUTOIDLE)>;
1457                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1458                                         <SYSC_IDLE_NO>,
1459                                         <SYSC_IDLE_SMART>,
1460                                         <SYSC_IDLE_SMART_WKUP>;
1461                         ti,syss-mask = <1>;
1462                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1463                         clocks = <&l4per_clkctrl OMAP5_UART5_CLKCTRL 0>;
1464                         clock-names = "fck";
1465                         #address-cells = <1>;
1466                         #size-cells = <1>;
1467                         ranges = <0x0 0x66000 0x1000>;
1468
1469                         uart5: serial@0 {
1470                                 compatible = "ti,omap4-uart";
1471                                 reg = <0x0 0x100>;
1472                                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1473                                 clock-frequency = <48000000>;
1474                         };
1475                 };
1476
1477                 target-module@68000 {                   /* 0x48068000, ap 53 54.0 */
1478                         compatible = "ti,sysc-omap2", "ti,sysc";
1479                         ti,hwmods = "uart6";
1480                         reg = <0x68050 0x4>,
1481                               <0x68054 0x4>,
1482                               <0x68058 0x4>;
1483                         reg-names = "rev", "sysc", "syss";
1484                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1485                                          SYSC_OMAP2_SOFTRESET |
1486                                          SYSC_OMAP2_AUTOIDLE)>;
1487                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1488                                         <SYSC_IDLE_NO>,
1489                                         <SYSC_IDLE_SMART>,
1490                                         <SYSC_IDLE_SMART_WKUP>;
1491                         ti,syss-mask = <1>;
1492                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1493                         clocks = <&l4per_clkctrl OMAP5_UART6_CLKCTRL 0>;
1494                         clock-names = "fck";
1495                         #address-cells = <1>;
1496                         #size-cells = <1>;
1497                         ranges = <0x0 0x68000 0x1000>;
1498
1499                         uart6: serial@0 {
1500                                 compatible = "ti,omap4-uart";
1501                                 reg = <0x0 0x100>;
1502                                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1503                                 clock-frequency = <48000000>;
1504                         };
1505                 };
1506
1507                 target-module@6a000 {                   /* 0x4806a000, ap 24 0a.0 */
1508                         compatible = "ti,sysc-omap2", "ti,sysc";
1509                         ti,hwmods = "uart1";
1510                         reg = <0x6a050 0x4>,
1511                               <0x6a054 0x4>,
1512                               <0x6a058 0x4>;
1513                         reg-names = "rev", "sysc", "syss";
1514                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1515                                          SYSC_OMAP2_SOFTRESET |
1516                                          SYSC_OMAP2_AUTOIDLE)>;
1517                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1518                                         <SYSC_IDLE_NO>,
1519                                         <SYSC_IDLE_SMART>,
1520                                         <SYSC_IDLE_SMART_WKUP>;
1521                         ti,syss-mask = <1>;
1522                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1523                         clocks = <&l4per_clkctrl OMAP5_UART1_CLKCTRL 0>;
1524                         clock-names = "fck";
1525                         #address-cells = <1>;
1526                         #size-cells = <1>;
1527                         ranges = <0x0 0x6a000 0x1000>;
1528
1529                         uart1: serial@0 {
1530                                 compatible = "ti,omap4-uart";
1531                                 reg = <0x0 0x100>;
1532                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1533                                 clock-frequency = <48000000>;
1534                         };
1535                 };
1536
1537                 target-module@6c000 {                   /* 0x4806c000, ap 26 22.0 */
1538                         compatible = "ti,sysc-omap2", "ti,sysc";
1539                         ti,hwmods = "uart2";
1540                         reg = <0x6c050 0x4>,
1541                               <0x6c054 0x4>,
1542                               <0x6c058 0x4>;
1543                         reg-names = "rev", "sysc", "syss";
1544                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1545                                          SYSC_OMAP2_SOFTRESET |
1546                                          SYSC_OMAP2_AUTOIDLE)>;
1547                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1548                                         <SYSC_IDLE_NO>,
1549                                         <SYSC_IDLE_SMART>,
1550                                         <SYSC_IDLE_SMART_WKUP>;
1551                         ti,syss-mask = <1>;
1552                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1553                         clocks = <&l4per_clkctrl OMAP5_UART2_CLKCTRL 0>;
1554                         clock-names = "fck";
1555                         #address-cells = <1>;
1556                         #size-cells = <1>;
1557                         ranges = <0x0 0x6c000 0x1000>;
1558
1559                         uart2: serial@0 {
1560                                 compatible = "ti,omap4-uart";
1561                                 reg = <0x0 0x100>;
1562                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1563                                 clock-frequency = <48000000>;
1564                         };
1565                 };
1566
1567                 target-module@6e000 {                   /* 0x4806e000, ap 28 44.1 */
1568                         compatible = "ti,sysc-omap2", "ti,sysc";
1569                         ti,hwmods = "uart4";
1570                         reg = <0x6e050 0x4>,
1571                               <0x6e054 0x4>,
1572                               <0x6e058 0x4>;
1573                         reg-names = "rev", "sysc", "syss";
1574                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1575                                          SYSC_OMAP2_SOFTRESET |
1576                                          SYSC_OMAP2_AUTOIDLE)>;
1577                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1578                                         <SYSC_IDLE_NO>,
1579                                         <SYSC_IDLE_SMART>,
1580                                         <SYSC_IDLE_SMART_WKUP>;
1581                         ti,syss-mask = <1>;
1582                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1583                         clocks = <&l4per_clkctrl OMAP5_UART4_CLKCTRL 0>;
1584                         clock-names = "fck";
1585                         #address-cells = <1>;
1586                         #size-cells = <1>;
1587                         ranges = <0x0 0x6e000 0x1000>;
1588
1589                         uart4: serial@0 {
1590                                 compatible = "ti,omap4-uart";
1591                                 reg = <0x0 0x100>;
1592                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1593                                 clock-frequency = <48000000>;
1594                         };
1595                 };
1596
1597                 target-module@70000 {                   /* 0x48070000, ap 30 14.0 */
1598                         compatible = "ti,sysc-omap2", "ti,sysc";
1599                         ti,hwmods = "i2c1";
1600                         reg = <0x70000 0x8>,
1601                               <0x70010 0x8>,
1602                               <0x70090 0x8>;
1603                         reg-names = "rev", "sysc", "syss";
1604                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1605                                          SYSC_OMAP2_ENAWAKEUP |
1606                                          SYSC_OMAP2_SOFTRESET |
1607                                          SYSC_OMAP2_AUTOIDLE)>;
1608                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1609                                         <SYSC_IDLE_NO>,
1610                                         <SYSC_IDLE_SMART>,
1611                                         <SYSC_IDLE_SMART_WKUP>;
1612                         ti,syss-mask = <1>;
1613                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1614                         clocks = <&l4per_clkctrl OMAP5_I2C1_CLKCTRL 0>;
1615                         clock-names = "fck";
1616                         #address-cells = <1>;
1617                         #size-cells = <1>;
1618                         ranges = <0x0 0x70000 0x1000>;
1619
1620                         i2c1: i2c@0 {
1621                                 compatible = "ti,omap4-i2c";
1622                                 reg = <0x0 0x100>;
1623                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1624                                 #address-cells = <1>;
1625                                 #size-cells = <0>;
1626                         };
1627                 };
1628
1629                 target-module@72000 {                   /* 0x48072000, ap 32 1c.0 */
1630                         compatible = "ti,sysc-omap2", "ti,sysc";
1631                         ti,hwmods = "i2c2";
1632                         reg = <0x72000 0x8>,
1633                               <0x72010 0x8>,
1634                               <0x72090 0x8>;
1635                         reg-names = "rev", "sysc", "syss";
1636                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1637                                          SYSC_OMAP2_ENAWAKEUP |
1638                                          SYSC_OMAP2_SOFTRESET |
1639                                          SYSC_OMAP2_AUTOIDLE)>;
1640                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1641                                         <SYSC_IDLE_NO>,
1642                                         <SYSC_IDLE_SMART>,
1643                                         <SYSC_IDLE_SMART_WKUP>;
1644                         ti,syss-mask = <1>;
1645                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1646                         clocks = <&l4per_clkctrl OMAP5_I2C2_CLKCTRL 0>;
1647                         clock-names = "fck";
1648                         #address-cells = <1>;
1649                         #size-cells = <1>;
1650                         ranges = <0x0 0x72000 0x1000>;
1651
1652                         i2c2: i2c@0 {
1653                                 compatible = "ti,omap4-i2c";
1654                                 reg = <0x0 0x100>;
1655                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1656                                 #address-cells = <1>;
1657                                 #size-cells = <0>;
1658                         };
1659                 };
1660
1661                 target-module@78000 {                   /* 0x48078000, ap 39 12.0 */
1662                         compatible = "ti,sysc";
1663                         status = "disabled";
1664                         #address-cells = <1>;
1665                         #size-cells = <1>;
1666                         ranges = <0x0 0x78000 0x1000>;
1667                 };
1668
1669                 target-module@7a000 {                   /* 0x4807a000, ap 81 2c.0 */
1670                         compatible = "ti,sysc-omap2", "ti,sysc";
1671                         ti,hwmods = "i2c4";
1672                         reg = <0x7a000 0x8>,
1673                               <0x7a010 0x8>,
1674                               <0x7a090 0x8>;
1675                         reg-names = "rev", "sysc", "syss";
1676                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1677                                          SYSC_OMAP2_ENAWAKEUP |
1678                                          SYSC_OMAP2_SOFTRESET |
1679                                          SYSC_OMAP2_AUTOIDLE)>;
1680                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1681                                         <SYSC_IDLE_NO>,
1682                                         <SYSC_IDLE_SMART>,
1683                                         <SYSC_IDLE_SMART_WKUP>;
1684                         ti,syss-mask = <1>;
1685                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1686                         clocks = <&l4per_clkctrl OMAP5_I2C4_CLKCTRL 0>;
1687                         clock-names = "fck";
1688                         #address-cells = <1>;
1689                         #size-cells = <1>;
1690                         ranges = <0x0 0x7a000 0x1000>;
1691
1692                         i2c4: i2c@0 {
1693                                 compatible = "ti,omap4-i2c";
1694                                 reg = <0x0 0x100>;
1695                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1696                                 #address-cells = <1>;
1697                                 #size-cells = <0>;
1698                         };
1699                 };
1700
1701                 target-module@7c000 {                   /* 0x4807c000, ap 83 34.0 */
1702                         compatible = "ti,sysc-omap2", "ti,sysc";
1703                         ti,hwmods = "i2c5";
1704                         reg = <0x7c000 0x8>,
1705                               <0x7c010 0x8>,
1706                               <0x7c090 0x8>;
1707                         reg-names = "rev", "sysc", "syss";
1708                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1709                                          SYSC_OMAP2_ENAWAKEUP |
1710                                          SYSC_OMAP2_SOFTRESET |
1711                                          SYSC_OMAP2_AUTOIDLE)>;
1712                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1713                                         <SYSC_IDLE_NO>,
1714                                         <SYSC_IDLE_SMART>,
1715                                         <SYSC_IDLE_SMART_WKUP>;
1716                         ti,syss-mask = <1>;
1717                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1718                         clocks = <&l4per_clkctrl OMAP5_I2C5_CLKCTRL 0>;
1719                         clock-names = "fck";
1720                         #address-cells = <1>;
1721                         #size-cells = <1>;
1722                         ranges = <0x0 0x7c000 0x1000>;
1723
1724                         i2c5: i2c@0 {
1725                                 compatible = "ti,omap4-i2c";
1726                                 reg = <0x0 0x100>;
1727                                 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
1728                                 #address-cells = <1>;
1729                                 #size-cells = <0>;
1730                         };
1731                 };
1732
1733                 target-module@86000 {                   /* 0x48086000, ap 41 5e.0 */
1734                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1735                         ti,hwmods = "timer10";
1736                         reg = <0x86000 0x4>,
1737                               <0x86010 0x4>;
1738                         reg-names = "rev", "sysc";
1739                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1740                                          SYSC_OMAP4_SOFTRESET)>;
1741                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1742                                         <SYSC_IDLE_NO>,
1743                                         <SYSC_IDLE_SMART>,
1744                                         <SYSC_IDLE_SMART_WKUP>;
1745                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1746                         clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 0>;
1747                         clock-names = "fck";
1748                         #address-cells = <1>;
1749                         #size-cells = <1>;
1750                         ranges = <0x0 0x86000 0x1000>;
1751
1752                         timer10: timer@0 {
1753                                 compatible = "ti,omap5430-timer";
1754                                 reg = <0x0 0x80>;
1755                                 clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 24>;
1756                                 clock-names = "fck";
1757                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1758                                 ti,timer-pwm;
1759                         };
1760                 };
1761
1762                 target-module@88000 {                   /* 0x48088000, ap 43 66.0 */
1763                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1764                         ti,hwmods = "timer11";
1765                         reg = <0x88000 0x4>,
1766                               <0x88010 0x4>;
1767                         reg-names = "rev", "sysc";
1768                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1769                                          SYSC_OMAP4_SOFTRESET)>;
1770                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1771                                         <SYSC_IDLE_NO>,
1772                                         <SYSC_IDLE_SMART>,
1773                                         <SYSC_IDLE_SMART_WKUP>;
1774                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1775                         clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 0>;
1776                         clock-names = "fck";
1777                         #address-cells = <1>;
1778                         #size-cells = <1>;
1779                         ranges = <0x0 0x88000 0x1000>;
1780
1781                         timer11: timer@0 {
1782                                 compatible = "ti,omap5430-timer";
1783                                 reg = <0x0 0x80>;
1784                                 clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 24>;
1785                                 clock-names = "fck";
1786                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1787                                 ti,timer-pwm;
1788                         };
1789                 };
1790
1791                 target-module@90000 {                   /* 0x48090000, ap 55 1a.0 */
1792                         compatible = "ti,sysc";
1793                         status = "disabled";
1794                         #address-cells = <1>;
1795                         #size-cells = <1>;
1796                         ranges = <0x0 0x90000 0x2000>;
1797                 };
1798
1799                 target-module@98000 {                   /* 0x48098000, ap 47 08.0 */
1800                         compatible = "ti,sysc-omap4", "ti,sysc";
1801                         ti,hwmods = "mcspi1";
1802                         reg = <0x98000 0x4>,
1803                               <0x98010 0x4>;
1804                         reg-names = "rev", "sysc";
1805                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1806                                          SYSC_OMAP4_SOFTRESET)>;
1807                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1808                                         <SYSC_IDLE_NO>,
1809                                         <SYSC_IDLE_SMART>,
1810                                         <SYSC_IDLE_SMART_WKUP>;
1811                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1812                         clocks = <&l4per_clkctrl OMAP5_MCSPI1_CLKCTRL 0>;
1813                         clock-names = "fck";
1814                         #address-cells = <1>;
1815                         #size-cells = <1>;
1816                         ranges = <0x0 0x98000 0x1000>;
1817
1818                         mcspi1: spi@0 {
1819                                 compatible = "ti,omap4-mcspi";
1820                                 reg = <0x0 0x200>;
1821                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
1822                                 #address-cells = <1>;
1823                                 #size-cells = <0>;
1824                                 ti,spi-num-cs = <4>;
1825                                 dmas = <&sdma 35>,
1826                                        <&sdma 36>,
1827                                        <&sdma 37>,
1828                                        <&sdma 38>,
1829                                        <&sdma 39>,
1830                                        <&sdma 40>,
1831                                        <&sdma 41>,
1832                                        <&sdma 42>;
1833                                 dma-names = "tx0", "rx0", "tx1", "rx1",
1834                                             "tx2", "rx2", "tx3", "rx3";
1835                         };
1836                 };
1837
1838                 target-module@9a000 {                   /* 0x4809a000, ap 49 10.0 */
1839                         compatible = "ti,sysc-omap4", "ti,sysc";
1840                         ti,hwmods = "mcspi2";
1841                         reg = <0x9a000 0x4>,
1842                               <0x9a010 0x4>;
1843                         reg-names = "rev", "sysc";
1844                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1845                                          SYSC_OMAP4_SOFTRESET)>;
1846                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1847                                         <SYSC_IDLE_NO>,
1848                                         <SYSC_IDLE_SMART>,
1849                                         <SYSC_IDLE_SMART_WKUP>;
1850                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1851                         clocks = <&l4per_clkctrl OMAP5_MCSPI2_CLKCTRL 0>;
1852                         clock-names = "fck";
1853                         #address-cells = <1>;
1854                         #size-cells = <1>;
1855                         ranges = <0x0 0x9a000 0x1000>;
1856
1857                         mcspi2: spi@0 {
1858                                 compatible = "ti,omap4-mcspi";
1859                                 reg = <0x0 0x200>;
1860                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
1861                                 #address-cells = <1>;
1862                                 #size-cells = <0>;
1863                                 ti,spi-num-cs = <2>;
1864                                 dmas = <&sdma 43>,
1865                                        <&sdma 44>,
1866                                        <&sdma 45>,
1867                                        <&sdma 46>;
1868                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1869                         };
1870                 };
1871
1872                 target-module@9c000 {                   /* 0x4809c000, ap 51 3a.0 */
1873                         compatible = "ti,sysc-omap4", "ti,sysc";
1874                         ti,hwmods = "mmc1";
1875                         reg = <0x9c000 0x4>,
1876                               <0x9c010 0x4>;
1877                         reg-names = "rev", "sysc";
1878                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1879                                          SYSC_OMAP4_SOFTRESET)>;
1880                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1881                                         <SYSC_IDLE_NO>,
1882                                         <SYSC_IDLE_SMART>,
1883                                         <SYSC_IDLE_SMART_WKUP>;
1884                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1885                                         <SYSC_IDLE_NO>,
1886                                         <SYSC_IDLE_SMART>,
1887                                         <SYSC_IDLE_SMART_WKUP>;
1888                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
1889                         clocks = <&l3init_clkctrl OMAP5_MMC1_CLKCTRL 0>;
1890                         clock-names = "fck";
1891                         #address-cells = <1>;
1892                         #size-cells = <1>;
1893                         ranges = <0x0 0x9c000 0x1000>;
1894
1895                         mmc1: mmc@0 {
1896                                 compatible = "ti,omap4-hsmmc";
1897                                 reg = <0x0 0x400>;
1898                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
1899                                 ti,dual-volt;
1900                                 ti,needs-special-reset;
1901                                 dmas = <&sdma 61>, <&sdma 62>;
1902                                 dma-names = "tx", "rx";
1903                                 pbias-supply = <&pbias_mmc_reg>;
1904                         };
1905                 };
1906
1907                 target-module@a2000 {                   /* 0x480a2000, ap 75 02.0 */
1908                         compatible = "ti,sysc";
1909                         status = "disabled";
1910                         #address-cells = <1>;
1911                         #size-cells = <1>;
1912                         ranges = <0x0 0xa2000 0x1000>;
1913                 };
1914
1915                 target-module@a4000 {                   /* 0x480a4000, ap 57 3c.0 */
1916                         compatible = "ti,sysc";
1917                         status = "disabled";
1918                         #address-cells = <1>;
1919                         #size-cells = <1>;
1920                         ranges = <0x00000000 0x000a4000 0x00001000>,
1921                                  <0x00001000 0x000a5000 0x00001000>;
1922                 };
1923
1924                 target-module@a8000 {                   /* 0x480a8000, ap 59 2a.0 */
1925                         compatible = "ti,sysc";
1926                         status = "disabled";
1927                         #address-cells = <1>;
1928                         #size-cells = <1>;
1929                         ranges = <0x0 0xa8000 0x4000>;
1930                 };
1931
1932                 target-module@ad000 {                   /* 0x480ad000, ap 61 20.0 */
1933                         compatible = "ti,sysc-omap4", "ti,sysc";
1934                         ti,hwmods = "mmc3";
1935                         reg = <0xad000 0x4>,
1936                               <0xad010 0x4>;
1937                         reg-names = "rev", "sysc";
1938                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1939                                          SYSC_OMAP4_SOFTRESET)>;
1940                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1941                                         <SYSC_IDLE_NO>,
1942                                         <SYSC_IDLE_SMART>,
1943                                         <SYSC_IDLE_SMART_WKUP>;
1944                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1945                                         <SYSC_IDLE_NO>,
1946                                         <SYSC_IDLE_SMART>,
1947                                         <SYSC_IDLE_SMART_WKUP>;
1948                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1949                         clocks = <&l4per_clkctrl OMAP5_MMC3_CLKCTRL 0>;
1950                         clock-names = "fck";
1951                         #address-cells = <1>;
1952                         #size-cells = <1>;
1953                         ranges = <0x0 0xad000 0x1000>;
1954
1955                         mmc3: mmc@0 {
1956                                 compatible = "ti,omap4-hsmmc";
1957                                 reg = <0x0 0x400>;
1958                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1959                                 ti,needs-special-reset;
1960                                 dmas = <&sdma 77>, <&sdma 78>;
1961                                 dma-names = "tx", "rx";
1962                         };
1963                 };
1964
1965                 target-module@b2000 {                   /* 0x480b2000, ap 37 0c.0 */
1966                         compatible = "ti,sysc";
1967                         status = "disabled";
1968                         #address-cells = <1>;
1969                         #size-cells = <1>;
1970                         ranges = <0x0 0xb2000 0x1000>;
1971                 };
1972
1973                 target-module@b4000 {                   /* 0x480b4000, ap 65 42.0 */
1974                         compatible = "ti,sysc-omap4", "ti,sysc";
1975                         ti,hwmods = "mmc2";
1976                         reg = <0xb4000 0x4>,
1977                               <0xb4010 0x4>;
1978                         reg-names = "rev", "sysc";
1979                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1980                                          SYSC_OMAP4_SOFTRESET)>;
1981                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1982                                         <SYSC_IDLE_NO>,
1983                                         <SYSC_IDLE_SMART>,
1984                                         <SYSC_IDLE_SMART_WKUP>;
1985                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1986                                         <SYSC_IDLE_NO>,
1987                                         <SYSC_IDLE_SMART>,
1988                                         <SYSC_IDLE_SMART_WKUP>;
1989                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
1990                         clocks = <&l3init_clkctrl OMAP5_MMC2_CLKCTRL 0>;
1991                         clock-names = "fck";
1992                         #address-cells = <1>;
1993                         #size-cells = <1>;
1994                         ranges = <0x0 0xb4000 0x1000>;
1995
1996                         mmc2: mmc@0 {
1997                                 compatible = "ti,omap4-hsmmc";
1998                                 reg = <0x0 0x400>;
1999                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2000                                 ti,needs-special-reset;
2001                                 dmas = <&sdma 47>, <&sdma 48>;
2002                                 dma-names = "tx", "rx";
2003                         };
2004                 };
2005
2006                 target-module@b8000 {                   /* 0x480b8000, ap 67 32.0 */
2007                         compatible = "ti,sysc-omap4", "ti,sysc";
2008                         ti,hwmods = "mcspi3";
2009                         reg = <0xb8000 0x4>,
2010                               <0xb8010 0x4>;
2011                         reg-names = "rev", "sysc";
2012                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2013                                          SYSC_OMAP4_SOFTRESET)>;
2014                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2015                                         <SYSC_IDLE_NO>,
2016                                         <SYSC_IDLE_SMART>,
2017                                         <SYSC_IDLE_SMART_WKUP>;
2018                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2019                         clocks = <&l4per_clkctrl OMAP5_MCSPI3_CLKCTRL 0>;
2020                         clock-names = "fck";
2021                         #address-cells = <1>;
2022                         #size-cells = <1>;
2023                         ranges = <0x0 0xb8000 0x1000>;
2024
2025                         mcspi3: spi@0 {
2026                                 compatible = "ti,omap4-mcspi";
2027                                 reg = <0x0 0x200>;
2028                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2029                                 #address-cells = <1>;
2030                                 #size-cells = <0>;
2031                                 ti,spi-num-cs = <2>;
2032                                 dmas = <&sdma 15>, <&sdma 16>;
2033                                 dma-names = "tx0", "rx0";
2034                         };
2035                 };
2036
2037                 target-module@ba000 {                   /* 0x480ba000, ap 69 18.0 */
2038                         compatible = "ti,sysc-omap4", "ti,sysc";
2039                         ti,hwmods = "mcspi4";
2040                         reg = <0xba000 0x4>,
2041                               <0xba010 0x4>;
2042                         reg-names = "rev", "sysc";
2043                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2044                                          SYSC_OMAP4_SOFTRESET)>;
2045                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2046                                         <SYSC_IDLE_NO>,
2047                                         <SYSC_IDLE_SMART>,
2048                                         <SYSC_IDLE_SMART_WKUP>;
2049                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2050                         clocks = <&l4per_clkctrl OMAP5_MCSPI4_CLKCTRL 0>;
2051                         clock-names = "fck";
2052                         #address-cells = <1>;
2053                         #size-cells = <1>;
2054                         ranges = <0x0 0xba000 0x1000>;
2055
2056                         mcspi4: spi@0 {
2057                                 compatible = "ti,omap4-mcspi";
2058                                 reg = <0x0 0x200>;
2059                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2060                                 #address-cells = <1>;
2061                                 #size-cells = <0>;
2062                                 ti,spi-num-cs = <1>;
2063                                 dmas = <&sdma 70>, <&sdma 71>;
2064                                 dma-names = "tx0", "rx0";
2065                         };
2066                 };
2067
2068                 target-module@d1000 {                   /* 0x480d1000, ap 71 28.0 */
2069                         compatible = "ti,sysc-omap4", "ti,sysc";
2070                         ti,hwmods = "mmc4";
2071                         reg = <0xd1000 0x4>,
2072                               <0xd1010 0x4>;
2073                         reg-names = "rev", "sysc";
2074                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2075                                          SYSC_OMAP4_SOFTRESET)>;
2076                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2077                                         <SYSC_IDLE_NO>,
2078                                         <SYSC_IDLE_SMART>,
2079                                         <SYSC_IDLE_SMART_WKUP>;
2080                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2081                                         <SYSC_IDLE_NO>,
2082                                         <SYSC_IDLE_SMART>,
2083                                         <SYSC_IDLE_SMART_WKUP>;
2084                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2085                         clocks = <&l4per_clkctrl OMAP5_MMC4_CLKCTRL 0>;
2086                         clock-names = "fck";
2087                         #address-cells = <1>;
2088                         #size-cells = <1>;
2089                         ranges = <0x0 0xd1000 0x1000>;
2090
2091                         mmc4: mmc@0 {
2092                                 compatible = "ti,omap4-hsmmc";
2093                                 reg = <0x0 0x400>;
2094                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2095                                 ti,needs-special-reset;
2096                                 dmas = <&sdma 57>, <&sdma 58>;
2097                                 dma-names = "tx", "rx";
2098                         };
2099                 };
2100
2101                 target-module@d5000 {                   /* 0x480d5000, ap 73 30.0 */
2102                         compatible = "ti,sysc-omap4", "ti,sysc";
2103                         ti,hwmods = "mmc5";
2104                         reg = <0xd5000 0x4>,
2105                               <0xd5010 0x4>;
2106                         reg-names = "rev", "sysc";
2107                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2108                                          SYSC_OMAP4_SOFTRESET)>;
2109                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2110                                         <SYSC_IDLE_NO>,
2111                                         <SYSC_IDLE_SMART>,
2112                                         <SYSC_IDLE_SMART_WKUP>;
2113                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2114                                         <SYSC_IDLE_NO>,
2115                                         <SYSC_IDLE_SMART>,
2116                                         <SYSC_IDLE_SMART_WKUP>;
2117                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2118                         clocks = <&l4per_clkctrl OMAP5_MMC5_CLKCTRL 0>;
2119                         clock-names = "fck";
2120                         #address-cells = <1>;
2121                         #size-cells = <1>;
2122                         ranges = <0x0 0xd5000 0x1000>;
2123
2124                         mmc5: mmc@0 {
2125                                 compatible = "ti,omap4-hsmmc";
2126                                 reg = <0x0 0x400>;
2127                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2128                                 ti,needs-special-reset;
2129                                 dmas = <&sdma 59>, <&sdma 60>;
2130                                 dma-names = "tx", "rx";
2131                         };
2132                 };
2133         };
2134
2135         segment@200000 {                                        /* 0x48200000 */
2136                 compatible = "simple-bus";
2137                 #address-cells = <1>;
2138                 #size-cells = <1>;
2139         };
2140 };
2141
2142 &l4_wkup {                                              /* 0x4ae00000 */
2143         compatible = "ti,omap5-l4-wkup", "simple-bus";
2144         reg = <0x4ae00000 0x800>,
2145               <0x4ae00800 0x800>,
2146               <0x4ae01000 0x1000>;
2147         reg-names = "ap", "la", "ia0";
2148         #address-cells = <1>;
2149         #size-cells = <1>;
2150         ranges = <0x00000000 0x4ae00000 0x010000>,      /* segment 0 */
2151                  <0x00010000 0x4ae10000 0x010000>,      /* segment 1 */
2152                  <0x00020000 0x4ae20000 0x010000>;      /* segment 2 */
2153
2154         segment@0 {                                     /* 0x4ae00000 */
2155                 compatible = "simple-bus";
2156                 #address-cells = <1>;
2157                 #size-cells = <1>;
2158                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
2159                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
2160                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
2161                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
2162                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
2163                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
2164                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
2165                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
2166                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
2167                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
2168                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
2169
2170                 target-module@4000 {                    /* 0x4ae04000, ap 17 20.0 */
2171                         compatible = "ti,sysc-omap2", "ti,sysc";
2172                         ti,hwmods = "counter_32k";
2173                         reg = <0x4000 0x4>,
2174                               <0x4010 0x4>;
2175                         reg-names = "rev", "sysc";
2176                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2177                                         <SYSC_IDLE_NO>;
2178                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2179                         clocks = <&wkupaon_clkctrl OMAP5_COUNTER_32K_CLKCTRL 0>;
2180                         clock-names = "fck";
2181                         #address-cells = <1>;
2182                         #size-cells = <1>;
2183                         ranges = <0x0 0x4000 0x1000>;
2184
2185                         counter32k: counter@0 {
2186                                 compatible = "ti,omap-counter32k";
2187                                 reg = <0x0 0x40>;
2188                         };
2189                 };
2190
2191                 target-module@6000 {                    /* 0x4ae06000, ap 3 08.0 */
2192                         compatible = "ti,sysc-omap4", "ti,sysc";
2193                         reg = <0x6000 0x4>;
2194                         reg-names = "rev";
2195                         #address-cells = <1>;
2196                         #size-cells = <1>;
2197                         ranges = <0x0 0x6000 0x2000>;
2198
2199                         prm: prm@0 {
2200                                 compatible = "ti,omap5-prm", "simple-bus";
2201                                 reg = <0x0 0x2000>;
2202                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
2203                                 #address-cells = <1>;
2204                                 #size-cells = <1>;
2205                                 ranges = <0 0 0x2000>;
2206
2207                                 prm_clocks: clocks {
2208                                         #address-cells = <1>;
2209                                         #size-cells = <0>;
2210                                 };
2211
2212                                 prm_clockdomains: clockdomains {
2213                                 };
2214                         };
2215                 };
2216
2217                 target-module@a000 {                    /* 0x4ae0a000, ap 15 2c.0 */
2218                         compatible = "ti,sysc-omap4", "ti,sysc";
2219                         reg = <0xa000 0x4>;
2220                         reg-names = "rev";
2221                         #address-cells = <1>;
2222                         #size-cells = <1>;
2223                         ranges = <0x0 0xa000 0x1000>;
2224
2225                         scrm: scrm@0 {
2226                                 compatible = "ti,omap5-scrm";
2227                                 reg = <0x0 0x1000>;
2228
2229                                 scrm_clocks: clocks {
2230                                         #address-cells = <1>;
2231                                         #size-cells = <0>;
2232                                 };
2233
2234                                 scrm_clockdomains: clockdomains {
2235                                 };
2236                         };
2237                 };
2238
2239                 target-module@c000 {                    /* 0x4ae0c000, ap 19 28.0 */
2240                         compatible = "ti,sysc-omap4", "ti,sysc";
2241                         reg = <0xc000 0x4>;
2242                         reg-names = "rev";
2243                         #address-cells = <1>;
2244                         #size-cells = <1>;
2245                         ranges = <0x0 0xc000 0x1000>;
2246
2247                         omap5_pmx_wkup: pinmux@840 {
2248                                 compatible = "ti,omap5-padconf",
2249                                              "pinctrl-single";
2250                                 reg = <0x840 0x003c>;
2251                                 #address-cells = <1>;
2252                                 #size-cells = <0>;
2253                                 #pinctrl-cells = <1>;
2254                                 #interrupt-cells = <1>;
2255                                 interrupt-controller;
2256                                 pinctrl-single,register-width = <16>;
2257                                 pinctrl-single,function-mask = <0x7fff>;
2258                         };
2259
2260                         omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@da0 {
2261                                 compatible = "ti,omap5-scm-wkup-pad-conf",
2262                                              "simple-bus";
2263                                 reg = <0xda0 0x60>;
2264                                 #address-cells = <1>;
2265                                 #size-cells = <1>;
2266                                 ranges = <0 0 0x60>;
2267
2268                                 scm_wkup_pad_conf: scm_conf@0 {
2269                                         compatible = "syscon", "simple-bus";
2270                                         reg = <0x0 0x60>;
2271                                         #address-cells = <1>;
2272                                         #size-cells = <1>;
2273                                         ranges = <0 0x0 0x60>;
2274
2275                                         scm_wkup_pad_conf_clocks: clocks@0 {
2276                                                 #address-cells = <1>;
2277                                                 #size-cells = <0>;
2278                                         };
2279                                 };
2280                         };
2281                 };
2282         };
2283
2284         segment@10000 {                                 /* 0x4ae10000 */
2285                 compatible = "simple-bus";
2286                 #address-cells = <1>;
2287                 #size-cells = <1>;
2288                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
2289                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
2290                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
2291                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
2292                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
2293                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
2294                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
2295                          <0x0000d000 0x0001d000 0x001000>;      /* ap 12 */
2296
2297                 target-module@0 {                       /* 0x4ae10000, ap 5 10.0 */
2298                         compatible = "ti,sysc-omap2", "ti,sysc";
2299                         ti,hwmods = "gpio1";
2300                         reg = <0x0 0x4>,
2301                               <0x10 0x4>,
2302                               <0x114 0x4>;
2303                         reg-names = "rev", "sysc", "syss";
2304                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2305                                          SYSC_OMAP2_SOFTRESET |
2306                                          SYSC_OMAP2_AUTOIDLE)>;
2307                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2308                                         <SYSC_IDLE_NO>,
2309                                         <SYSC_IDLE_SMART>,
2310                                         <SYSC_IDLE_SMART_WKUP>;
2311                         ti,syss-mask = <1>;
2312                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2313                         clocks = <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 0>,
2314                                  <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 8>;
2315                         clock-names = "fck", "dbclk";
2316                         #address-cells = <1>;
2317                         #size-cells = <1>;
2318                         ranges = <0x0 0x0 0x1000>;
2319
2320                         gpio1: gpio@0 {
2321                                 compatible = "ti,omap4-gpio";
2322                                 reg = <0x0 0x200>;
2323                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
2324                                 ti,gpio-always-on;
2325                                 gpio-controller;
2326                                 #gpio-cells = <2>;
2327                                 interrupt-controller;
2328                                 #interrupt-cells = <2>;
2329                         };
2330                 };
2331
2332                 target-module@4000 {                    /* 0x4ae14000, ap 7 14.0 */
2333                         compatible = "ti,sysc-omap2", "ti,sysc";
2334                         ti,hwmods = "wd_timer2";
2335                         reg = <0x4000 0x4>,
2336                               <0x4010 0x4>,
2337                               <0x4014 0x4>;
2338                         reg-names = "rev", "sysc", "syss";
2339                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2340                                          SYSC_OMAP2_SOFTRESET)>;
2341                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2342                                         <SYSC_IDLE_NO>,
2343                                         <SYSC_IDLE_SMART>,
2344                                         <SYSC_IDLE_SMART_WKUP>;
2345                         ti,syss-mask = <1>;
2346                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2347                         clocks = <&wkupaon_clkctrl OMAP5_WD_TIMER2_CLKCTRL 0>;
2348                         clock-names = "fck";
2349                         #address-cells = <1>;
2350                         #size-cells = <1>;
2351                         ranges = <0x0 0x4000 0x1000>;
2352
2353                         wdt2: wdt@0 {
2354                                 compatible = "ti,omap5-wdt", "ti,omap3-wdt";
2355                                 reg = <0x0 0x80>;
2356                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
2357                         };
2358                 };
2359
2360                 target-module@8000 {                    /* 0x4ae18000, ap 9 18.0 */
2361                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
2362                         ti,hwmods = "timer1";
2363                         reg = <0x8000 0x4>,
2364                               <0x8010 0x4>;
2365                         reg-names = "rev", "sysc";
2366                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2367                                          SYSC_OMAP4_SOFTRESET)>;
2368                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2369                                         <SYSC_IDLE_NO>,
2370                                         <SYSC_IDLE_SMART>,
2371                                         <SYSC_IDLE_SMART_WKUP>;
2372                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2373                         clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 0>;
2374                         clock-names = "fck";
2375                         #address-cells = <1>;
2376                         #size-cells = <1>;
2377                         ranges = <0x0 0x8000 0x1000>;
2378
2379                         timer1: timer@0 {
2380                                 compatible = "ti,omap5430-timer";
2381                                 reg = <0x0 0x80>;
2382                                 clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>;
2383                                 clock-names = "fck";
2384                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
2385                                 ti,timer-alwon;
2386                         };
2387                 };
2388
2389                 target-module@c000 {                    /* 0x4ae1c000, ap 11 1c.0 */
2390                         compatible = "ti,sysc-omap2", "ti,sysc";
2391                         ti,hwmods = "kbd";
2392                         reg = <0xc000 0x4>,
2393                               <0xc010 0x4>;
2394                         reg-names = "rev", "sysc";
2395                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2396                                          SYSC_OMAP2_SOFTRESET)>;
2397                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2398                                         <SYSC_IDLE_NO>,
2399                                         <SYSC_IDLE_SMART>;
2400                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2401                         clocks = <&wkupaon_clkctrl OMAP5_KBD_CLKCTRL 0>;
2402                         clock-names = "fck";
2403                         #address-cells = <1>;
2404                         #size-cells = <1>;
2405                         ranges = <0x0 0xc000 0x1000>;
2406
2407                         keypad: keypad@0 {
2408                                 compatible = "ti,omap4-keypad";
2409                                 reg = <0x0 0x400>;
2410                         };
2411                 };
2412         };
2413
2414         segment@20000 {                                 /* 0x4ae20000 */
2415                 compatible = "simple-bus";
2416                 #address-cells = <1>;
2417                 #size-cells = <1>;
2418                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
2419                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
2420                          <0x00000000 0x00020000 0x001000>,      /* ap 21 */
2421                          <0x00001000 0x00021000 0x001000>,      /* ap 22 */
2422                          <0x00002000 0x00022000 0x001000>,      /* ap 23 */
2423                          <0x00003000 0x00023000 0x001000>,      /* ap 24 */
2424                          <0x00007000 0x00027000 0x000400>,      /* ap 25 */
2425                          <0x00008000 0x00028000 0x000800>,      /* ap 26 */
2426                          <0x00009000 0x00029000 0x000100>,      /* ap 27 */
2427                          <0x00008800 0x00028800 0x000200>,      /* ap 28 */
2428                          <0x00008a00 0x00028a00 0x000100>;      /* ap 29 */
2429
2430                 target-module@0 {                       /* 0x4ae20000, ap 21 04.0 */
2431                         compatible = "ti,sysc";
2432                         status = "disabled";
2433                         #address-cells = <1>;
2434                         #size-cells = <1>;
2435                         ranges = <0x0 0x0 0x1000>;
2436                 };
2437
2438                 target-module@2000 {                    /* 0x4ae22000, ap 23 0c.0 */
2439                         compatible = "ti,sysc";
2440                         status = "disabled";
2441                         #address-cells = <1>;
2442                         #size-cells = <1>;
2443                         ranges = <0x0 0x2000 0x1000>;
2444                 };
2445
2446                 target-module@6000 {                    /* 0x4ae26000, ap 13 24.0 */
2447                         compatible = "ti,sysc";
2448                         status = "disabled";
2449                         #address-cells = <1>;
2450                         #size-cells = <1>;
2451                         ranges = <0x00000000 0x00006000 0x00001000>,
2452                                  <0x00001000 0x00007000 0x00000400>,
2453                                  <0x00002000 0x00008000 0x00000800>,
2454                                  <0x00002800 0x00008800 0x00000200>,
2455                                  <0x00002a00 0x00008a00 0x00000100>,
2456                                  <0x00003000 0x00009000 0x00000100>;
2457                 };
2458         };
2459 };
2460