arch/arm/boot/dts/omap4.dtsi

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include <dt-bindings/pinctrl/omap.h>
  12
  13 / {
  14         compatible = "ti,omap4430", "ti,omap4";
  15         interrupt-parent = <&wakeupgen>;
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18
  19         aliases {
  20                 i2c0 = &i2c1;
  21                 i2c1 = &i2c2;
  22                 i2c2 = &i2c3;
  23                 i2c3 = &i2c4;
  24                 serial0 = &uart1;
  25                 serial1 = &uart2;
  26                 serial2 = &uart3;
  27                 serial3 = &uart4;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         compatible = "arm,cortex-a9";
  36                         device_type = "cpu";
  37                         next-level-cache = <&L2>;
  38                         reg = <0x0>;
  39
  40                         clocks = <&dpll_mpu_ck>;
  41                         clock-names = "cpu";
  42
  43                         clock-latency = <300000>; /* From omap-cpufreq driver */
  44                 };
  45                 cpu@1 {
  46                         compatible = "arm,cortex-a9";
  47                         device_type = "cpu";
  48                         next-level-cache = <&L2>;
  49                         reg = <0x1>;
  50                 };
  51         };
  52
  53         gic: interrupt-controller@48241000 {
  54                 compatible = "arm,cortex-a9-gic";
  55                 interrupt-controller;
  56                 #interrupt-cells = <3>;
  57                 reg = <0x48241000 0x1000>,
  58                       <0x48240100 0x0100>;
  59                 interrupt-parent = <&gic>;
  60         };
  61
  62         L2: l2-cache-controller@48242000 {
  63                 compatible = "arm,pl310-cache";
  64                 reg = <0x48242000 0x1000>;
  65                 cache-unified;
  66                 cache-level = <2>;
  67         };
  68
  69         local-timer@48240600 {
  70                 compatible = "arm,cortex-a9-twd-timer";
  71                 clocks = <&mpu_periphclk>;
  72                 reg = <0x48240600 0x20>;
  73                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_EDGE_RISING)>;
  74                 interrupt-parent = <&gic>;
  75         };
  76
  77         wakeupgen: interrupt-controller@48281000 {
  78                 compatible = "ti,omap4-wugen-mpu";
  79                 interrupt-controller;
  80                 #interrupt-cells = <3>;
  81                 reg = <0x48281000 0x1000>;
  82                 interrupt-parent = <&gic>;
  83         };
  84
  85         /*
  86          * The soc node represents the soc top level view. It is used for IPs
  87          * that are not memory mapped in the MPU view or for the MPU itself.
  88          */
  89         soc {
  90                 compatible = "ti,omap-infra";
  91                 mpu {
  92                         compatible = "ti,omap4-mpu";
  93                         ti,hwmods = "mpu";
  94                         sram = <&ocmcram>;
  95                 };
  96
  97                 dsp {
  98                         compatible = "ti,omap3-c64";
  99                         ti,hwmods = "dsp";
 100                 };
 101
 102                 iva {
 103                         compatible = "ti,ivahd";
 104                         ti,hwmods = "iva";
 105                 };
 106         };
 107
 108         /*
 109          * XXX: Use a flat representation of the OMAP4 interconnect.
 110          * The real OMAP interconnect network is quite complex.
 111          * Since it will not bring real advantage to represent that in DT for
 112          * the moment, just use a fake OCP bus entry to represent the whole bus
 113          * hierarchy.
 114          */
 115         ocp {
 116                 compatible = "ti,omap4-l3-noc", "simple-bus";
 117                 #address-cells = <1>;
 118                 #size-cells = <1>;
 119                 ranges;
 120                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 121                 reg = <0x44000000 0x1000>,
 122                       <0x44800000 0x2000>,
 123                       <0x45000000 0x1000>;
 124                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
 125                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 126
 127                 l4_cfg: l4@4a000000 {
 128                         compatible = "ti,omap4-l4-cfg", "simple-bus";
 129                         #address-cells = <1>;
 130                         #size-cells = <1>;
 131                         ranges = <0 0x4a000000 0x1000000>;
 132
 133                         cm1: cm1@4000 {
 134                                 compatible = "ti,omap4-cm1";
 135                                 reg = <0x4000 0x2000>;
 136
 137                                 cm1_clocks: clocks {
 138                                         #address-cells = <1>;
 139                                         #size-cells = <0>;
 140                                 };
 141
 142                                 cm1_clockdomains: clockdomains {
 143                                 };
 144                         };
 145
 146                         cm2: cm2@8000 {
 147                                 compatible = "ti,omap4-cm2";
 148                                 reg = <0x8000 0x3000>;
 149
 150                                 cm2_clocks: clocks {
 151                                         #address-cells = <1>;
 152                                         #size-cells = <0>;
 153                                 };
 154
 155                                 cm2_clockdomains: clockdomains {
 156                                 };
 157                         };
 158
 159                         omap4_scm_core: scm@2000 {
 160                                 compatible = "ti,omap4-scm-core", "simple-bus";
 161                                 reg = <0x2000 0x1000>;
 162                                 #address-cells = <1>;
 163                                 #size-cells = <1>;
 164                                 ranges = <0 0x2000 0x1000>;
 165
 166                                 scm_conf: scm_conf@0 {
 167                                         compatible = "syscon";
 168                                         reg = <0x0 0x800>;
 169                                         #address-cells = <1>;
 170                                         #size-cells = <1>;
 171                                 };
 172                         };
 173
 174                         omap4_padconf_core: scm@100000 {
 175                                 compatible = "ti,omap4-scm-padconf-core",
 176                                              "simple-bus";
 177                                 #address-cells = <1>;
 178                                 #size-cells = <1>;
 179                                 ranges = <0 0x100000 0x1000>;
 180
 181                                 omap4_pmx_core: pinmux@40 {
 182                                         compatible = "ti,omap4-padconf",
 183                                                      "pinctrl-single";
 184                                         reg = <0x40 0x0196>;
 185                                         #address-cells = <1>;
 186                                         #size-cells = <0>;
 187                                         #pinctrl-cells = <1>;
 188                                         #interrupt-cells = <1>;
 189                                         interrupt-controller;
 190                                         pinctrl-single,register-width = <16>;
 191                                         pinctrl-single,function-mask = <0x7fff>;
 192                                 };
 193
 194                                 omap4_padconf_global: omap4_padconf_global@5a0 {
 195                                         compatible = "syscon",
 196                                                      "simple-bus";
 197                                         reg = <0x5a0 0x170>;
 198                                         #address-cells = <1>;
 199                                         #size-cells = <1>;
 200                                         ranges = <0 0x5a0 0x170>;
 201
 202                                         pbias_regulator: pbias_regulator@60 {
 203                                                 compatible = "ti,pbias-omap4", "ti,pbias-omap";
 204                                                 reg = <0x60 0x4>;
 205                                                 syscon = <&omap4_padconf_global>;
 206                                                 pbias_mmc_reg: pbias_mmc_omap4 {
 207                                                         regulator-name = "pbias_mmc_omap4";
 208                                                         regulator-min-microvolt = <1800000>;
 209                                                         regulator-max-microvolt = <3000000>;
 210                                                 };
 211                                         };
 212                                 };
 213                         };
 214
 215                         l4_wkup: l4@300000 {
 216                                 compatible = "ti,omap4-l4-wkup", "simple-bus";
 217                                 #address-cells = <1>;
 218                                 #size-cells = <1>;
 219                                 ranges = <0 0x300000 0x40000>;
 220
 221                                 counter32k: counter@4000 {
 222                                         compatible = "ti,omap-counter32k";
 223                                         reg = <0x4000 0x20>;
 224                                         ti,hwmods = "counter_32k";
 225                                 };
 226
 227                                 prm: prm@6000 {
 228                                         compatible = "ti,omap4-prm";
 229                                         reg = <0x6000 0x3000>;
 230                                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 231
 232                                         prm_clocks: clocks {
 233                                                 #address-cells = <1>;
 234                                                 #size-cells = <0>;
 235                                         };
 236
 237                                         prm_clockdomains: clockdomains {
 238                                         };
 239                                 };
 240
 241                                 scrm: scrm@a000 {
 242                                         compatible = "ti,omap4-scrm";
 243                                         reg = <0xa000 0x2000>;
 244
 245                                         scrm_clocks: clocks {
 246                                                 #address-cells = <1>;
 247                                                 #size-cells = <0>;
 248                                         };
 249
 250                                         scrm_clockdomains: clockdomains {
 251                                         };
 252                                 };
 253
 254                                 omap4_pmx_wkup: pinmux@1e040 {
 255                                         compatible = "ti,omap4-padconf",
 256                                                      "pinctrl-single";
 257                                         reg = <0x1e040 0x0038>;
 258                                         #address-cells = <1>;
 259                                         #size-cells = <0>;
 260                                         #pinctrl-cells = <1>;
 261                                         #interrupt-cells = <1>;
 262                                         interrupt-controller;
 263                                         pinctrl-single,register-width = <16>;
 264                                         pinctrl-single,function-mask = <0x7fff>;
 265                                 };
 266                         };
 267                 };
 268
 269                 ocmcram: ocmcram@40304000 {
 270                         compatible = "mmio-sram";
 271                         reg = <0x40304000 0xa000>; /* 40k */
 272                 };
 273
 274                 sdma: dma-controller@4a056000 {
 275                         compatible = "ti,omap4430-sdma";
 276                         reg = <0x4a056000 0x1000>;
 277                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 278                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 279                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 280                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 281                         #dma-cells = <1>;
 282                         dma-channels = <32>;
 283                         dma-requests = <127>;
 284                 };
 285
 286                 gpio1: gpio@4a310000 {
 287                         compatible = "ti,omap4-gpio";
 288                         reg = <0x4a310000 0x200>;
 289                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 290                         ti,hwmods = "gpio1";
 291                         ti,gpio-always-on;
 292                         gpio-controller;
 293                         #gpio-cells = <2>;
 294                         interrupt-controller;
 295                         #interrupt-cells = <2>;
 296                 };
 297
 298                 gpio2: gpio@48055000 {
 299                         compatible = "ti,omap4-gpio";
 300                         reg = <0x48055000 0x200>;
 301                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 302                         ti,hwmods = "gpio2";
 303                         gpio-controller;
 304                         #gpio-cells = <2>;
 305                         interrupt-controller;
 306                         #interrupt-cells = <2>;
 307                 };
 308
 309                 gpio3: gpio@48057000 {
 310                         compatible = "ti,omap4-gpio";
 311                         reg = <0x48057000 0x200>;
 312                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 313                         ti,hwmods = "gpio3";
 314                         gpio-controller;
 315                         #gpio-cells = <2>;
 316                         interrupt-controller;
 317                         #interrupt-cells = <2>;
 318                 };
 319
 320                 gpio4: gpio@48059000 {
 321                         compatible = "ti,omap4-gpio";
 322                         reg = <0x48059000 0x200>;
 323                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 324                         ti,hwmods = "gpio4";
 325                         gpio-controller;
 326                         #gpio-cells = <2>;
 327                         interrupt-controller;
 328                         #interrupt-cells = <2>;
 329                 };
 330
 331                 gpio5: gpio@4805b000 {
 332                         compatible = "ti,omap4-gpio";
 333                         reg = <0x4805b000 0x200>;
 334                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 335                         ti,hwmods = "gpio5";
 336                         gpio-controller;
 337                         #gpio-cells = <2>;
 338                         interrupt-controller;
 339                         #interrupt-cells = <2>;
 340                 };
 341
 342                 gpio6: gpio@4805d000 {
 343                         compatible = "ti,omap4-gpio";
 344                         reg = <0x4805d000 0x200>;
 345                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 346                         ti,hwmods = "gpio6";
 347                         gpio-controller;
 348                         #gpio-cells = <2>;
 349                         interrupt-controller;
 350                         #interrupt-cells = <2>;
 351                 };
 352
 353                 elm: elm@48078000 {
 354                         compatible = "ti,am3352-elm";
 355                         reg = <0x48078000 0x2000>;
 356                         interrupts = <4>;
 357                         ti,hwmods = "elm";
 358                         status = "disabled";
 359                 };
 360
 361                 gpmc: gpmc@50000000 {
 362                         compatible = "ti,omap4430-gpmc";
 363                         reg = <0x50000000 0x1000>;
 364                         #address-cells = <2>;
 365                         #size-cells = <1>;
 366                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 367                         dmas = <&sdma 4>;
 368                         dma-names = "rxtx";
 369                         gpmc,num-cs = <8>;
 370                         gpmc,num-waitpins = <4>;
 371                         ti,hwmods = "gpmc";
 372                         ti,no-idle-on-init;
 373                         clocks = <&l3_div_ck>;
 374                         clock-names = "fck";
 375                         interrupt-controller;
 376                         #interrupt-cells = <2>;
 377                         gpio-controller;
 378                         #gpio-cells = <2>;
 379                 };
 380
 381                 uart1: serial@4806a000 {
 382                         compatible = "ti,omap4-uart";
 383                         reg = <0x4806a000 0x100>;
 384                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 385                         ti,hwmods = "uart1";
 386                         clock-frequency = <48000000>;
 387                 };
 388
 389                 uart2: serial@4806c000 {
 390                         compatible = "ti,omap4-uart";
 391                         reg = <0x4806c000 0x100>;
 392                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 393                         ti,hwmods = "uart2";
 394                         clock-frequency = <48000000>;
 395                 };
 396
 397                 uart3: serial@48020000 {
 398                         compatible = "ti,omap4-uart";
 399                         reg = <0x48020000 0x100>;
 400                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 401                         ti,hwmods = "uart3";
 402                         clock-frequency = <48000000>;
 403                 };
 404
 405                 uart4: serial@4806e000 {
 406                         compatible = "ti,omap4-uart";
 407                         reg = <0x4806e000 0x100>;
 408                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 409                         ti,hwmods = "uart4";
 410                         clock-frequency = <48000000>;
 411                 };
 412
 413                 hwspinlock: spinlock@4a0f6000 {
 414                         compatible = "ti,omap4-hwspinlock";
 415                         reg = <0x4a0f6000 0x1000>;
 416                         ti,hwmods = "spinlock";
 417                         #hwlock-cells = <1>;
 418                 };
 419
 420                 i2c1: i2c@48070000 {
 421                         compatible = "ti,omap4-i2c";
 422                         reg = <0x48070000 0x100>;
 423                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 424                         #address-cells = <1>;
 425                         #size-cells = <0>;
 426                         ti,hwmods = "i2c1";
 427                 };
 428
 429                 i2c2: i2c@48072000 {
 430                         compatible = "ti,omap4-i2c";
 431                         reg = <0x48072000 0x100>;
 432                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 433                         #address-cells = <1>;
 434                         #size-cells = <0>;
 435                         ti,hwmods = "i2c2";
 436                 };
 437
 438                 i2c3: i2c@48060000 {
 439                         compatible = "ti,omap4-i2c";
 440                         reg = <0x48060000 0x100>;
 441                         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 442                         #address-cells = <1>;
 443                         #size-cells = <0>;
 444                         ti,hwmods = "i2c3";
 445                 };
 446
 447                 i2c4: i2c@48350000 {
 448                         compatible = "ti,omap4-i2c";
 449                         reg = <0x48350000 0x100>;
 450                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 451                         #address-cells = <1>;
 452                         #size-cells = <0>;
 453                         ti,hwmods = "i2c4";
 454                 };
 455
 456                 mcspi1: spi@48098000 {
 457                         compatible = "ti,omap4-mcspi";
 458                         reg = <0x48098000 0x200>;
 459                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 460                         #address-cells = <1>;
 461                         #size-cells = <0>;
 462                         ti,hwmods = "mcspi1";
 463                         ti,spi-num-cs = <4>;
 464                         dmas = <&sdma 35>,
 465                                <&sdma 36>,
 466                                <&sdma 37>,
 467                                <&sdma 38>,
 468                                <&sdma 39>,
 469                                <&sdma 40>,
 470                                <&sdma 41>,
 471                                <&sdma 42>;
 472                         dma-names = "tx0", "rx0", "tx1", "rx1",
 473                                     "tx2", "rx2", "tx3", "rx3";
 474                 };
 475
 476                 mcspi2: spi@4809a000 {
 477                         compatible = "ti,omap4-mcspi";
 478                         reg = <0x4809a000 0x200>;
 479                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 480                         #address-cells = <1>;
 481                         #size-cells = <0>;
 482                         ti,hwmods = "mcspi2";
 483                         ti,spi-num-cs = <2>;
 484                         dmas = <&sdma 43>,
 485                                <&sdma 44>,
 486                                <&sdma 45>,
 487                                <&sdma 46>;
 488                         dma-names = "tx0", "rx0", "tx1", "rx1";
 489                 };
 490
 491                 mcspi3: spi@480b8000 {
 492                         compatible = "ti,omap4-mcspi";
 493                         reg = <0x480b8000 0x200>;
 494                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 495                         #address-cells = <1>;
 496                         #size-cells = <0>;
 497                         ti,hwmods = "mcspi3";
 498                         ti,spi-num-cs = <2>;
 499                         dmas = <&sdma 15>, <&sdma 16>;
 500                         dma-names = "tx0", "rx0";
 501                 };
 502
 503                 mcspi4: spi@480ba000 {
 504                         compatible = "ti,omap4-mcspi";
 505                         reg = <0x480ba000 0x200>;
 506                         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 507                         #address-cells = <1>;
 508                         #size-cells = <0>;
 509                         ti,hwmods = "mcspi4";
 510                         ti,spi-num-cs = <1>;
 511                         dmas = <&sdma 70>, <&sdma 71>;
 512                         dma-names = "tx0", "rx0";
 513                 };
 514
 515                 mmc1: mmc@4809c000 {
 516                         compatible = "ti,omap4-hsmmc";
 517                         reg = <0x4809c000 0x400>;
 518                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 519                         ti,hwmods = "mmc1";
 520                         ti,dual-volt;
 521                         ti,needs-special-reset;
 522                         dmas = <&sdma 61>, <&sdma 62>;
 523                         dma-names = "tx", "rx";
 524                         pbias-supply = <&pbias_mmc_reg>;
 525                 };
 526
 527                 mmc2: mmc@480b4000 {
 528                         compatible = "ti,omap4-hsmmc";
 529                         reg = <0x480b4000 0x400>;
 530                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 531                         ti,hwmods = "mmc2";
 532                         ti,needs-special-reset;
 533                         dmas = <&sdma 47>, <&sdma 48>;
 534                         dma-names = "tx", "rx";
 535                 };
 536
 537                 mmc3: mmc@480ad000 {
 538                         compatible = "ti,omap4-hsmmc";
 539                         reg = <0x480ad000 0x400>;
 540                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 541                         ti,hwmods = "mmc3";
 542                         ti,needs-special-reset;
 543                         dmas = <&sdma 77>, <&sdma 78>;
 544                         dma-names = "tx", "rx";
 545                 };
 546
 547                 mmc4: mmc@480d1000 {
 548                         compatible = "ti,omap4-hsmmc";
 549                         reg = <0x480d1000 0x400>;
 550                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 551                         ti,hwmods = "mmc4";
 552                         ti,needs-special-reset;
 553                         dmas = <&sdma 57>, <&sdma 58>;
 554                         dma-names = "tx", "rx";
 555                 };
 556
 557                 mmc5: mmc@480d5000 {
 558                         compatible = "ti,omap4-hsmmc";
 559                         reg = <0x480d5000 0x400>;
 560                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 561                         ti,hwmods = "mmc5";
 562                         ti,needs-special-reset;
 563                         dmas = <&sdma 59>, <&sdma 60>;
 564                         dma-names = "tx", "rx";
 565                 };
 566
 567                 mmu_dsp: mmu@4a066000 {
 568                         compatible = "ti,omap4-iommu";
 569                         reg = <0x4a066000 0x100>;
 570                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 571                         ti,hwmods = "mmu_dsp";
 572                         #iommu-cells = <0>;
 573                 };
 574
 575                 mmu_ipu: mmu@55082000 {
 576                         compatible = "ti,omap4-iommu";
 577                         reg = <0x55082000 0x100>;
 578                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 579                         ti,hwmods = "mmu_ipu";
 580                         #iommu-cells = <0>;
 581                         ti,iommu-bus-err-back;
 582                 };
 583
 584                 wdt2: wdt@4a314000 {
 585                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 586                         reg = <0x4a314000 0x80>;
 587                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 588                         ti,hwmods = "wd_timer2";
 589                 };
 590
 591                 mcpdm: mcpdm@40132000 {
 592                         compatible = "ti,omap4-mcpdm";
 593                         reg = <0x40132000 0x7f>, /* MPU private access */
 594                               <0x49032000 0x7f>; /* L3 Interconnect */
 595                         reg-names = "mpu", "dma";
 596                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 597                         ti,hwmods = "mcpdm";
 598                         dmas = <&sdma 65>,
 599                                <&sdma 66>;
 600                         dma-names = "up_link", "dn_link";
 601                         status = "disabled";
 602                 };
 603
 604                 dmic: dmic@4012e000 {
 605                         compatible = "ti,omap4-dmic";
 606                         reg = <0x4012e000 0x7f>, /* MPU private access */
 607                               <0x4902e000 0x7f>; /* L3 Interconnect */
 608                         reg-names = "mpu", "dma";
 609                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 610                         ti,hwmods = "dmic";
 611                         dmas = <&sdma 67>;
 612                         dma-names = "up_link";
 613                         status = "disabled";
 614                 };
 615
 616                 mcbsp1: mcbsp@40122000 {
 617                         compatible = "ti,omap4-mcbsp";
 618                         reg = <0x40122000 0xff>, /* MPU private access */
 619                               <0x49022000 0xff>; /* L3 Interconnect */
 620                         reg-names = "mpu", "dma";
 621                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 622                         interrupt-names = "common";
 623                         ti,buffer-size = <128>;
 624                         ti,hwmods = "mcbsp1";
 625                         dmas = <&sdma 33>,
 626                                <&sdma 34>;
 627                         dma-names = "tx", "rx";
 628                         status = "disabled";
 629                 };
 630
 631                 mcbsp2: mcbsp@40124000 {
 632                         compatible = "ti,omap4-mcbsp";
 633                         reg = <0x40124000 0xff>, /* MPU private access */
 634                               <0x49024000 0xff>; /* L3 Interconnect */
 635                         reg-names = "mpu", "dma";
 636                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 637                         interrupt-names = "common";
 638                         ti,buffer-size = <128>;
 639                         ti,hwmods = "mcbsp2";
 640                         dmas = <&sdma 17>,
 641                                <&sdma 18>;
 642                         dma-names = "tx", "rx";
 643                         status = "disabled";
 644                 };
 645
 646                 mcbsp3: mcbsp@40126000 {
 647                         compatible = "ti,omap4-mcbsp";
 648                         reg = <0x40126000 0xff>, /* MPU private access */
 649                               <0x49026000 0xff>; /* L3 Interconnect */
 650                         reg-names = "mpu", "dma";
 651                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 652                         interrupt-names = "common";
 653                         ti,buffer-size = <128>;
 654                         ti,hwmods = "mcbsp3";
 655                         dmas = <&sdma 19>,
 656                                <&sdma 20>;
 657                         dma-names = "tx", "rx";
 658                         status = "disabled";
 659                 };
 660
 661                 mcbsp4: mcbsp@48096000 {
 662                         compatible = "ti,omap4-mcbsp";
 663                         reg = <0x48096000 0xff>; /* L4 Interconnect */
 664                         reg-names = "mpu";
 665                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 666                         interrupt-names = "common";
 667                         ti,buffer-size = <128>;
 668                         ti,hwmods = "mcbsp4";
 669                         dmas = <&sdma 31>,
 670                                <&sdma 32>;
 671                         dma-names = "tx", "rx";
 672                         status = "disabled";
 673                 };
 674
 675                 keypad: keypad@4a31c000 {
 676                         compatible = "ti,omap4-keypad";
 677                         reg = <0x4a31c000 0x80>;
 678                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 679                         reg-names = "mpu";
 680                         ti,hwmods = "kbd";
 681                 };
 682
 683                 dmm@4e000000 {
 684                         compatible = "ti,omap4-dmm";
 685                         reg = <0x4e000000 0x800>;
 686                         interrupts = <0 113 0x4>;
 687                         ti,hwmods = "dmm";
 688                 };
 689
 690                 emif1: emif@4c000000 {
 691                         compatible = "ti,emif-4d";
 692                         reg = <0x4c000000 0x100>;
 693                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 694                         ti,hwmods = "emif1";
 695                         ti,no-idle-on-init;
 696                         phy-type = <1>;
 697                         hw-caps-read-idle-ctrl;
 698                         hw-caps-ll-interface;
 699                         hw-caps-temp-alert;
 700                 };
 701
 702                 emif2: emif@4d000000 {
 703                         compatible = "ti,emif-4d";
 704                         reg = <0x4d000000 0x100>;
 705                         interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 706                         ti,hwmods = "emif2";
 707                         ti,no-idle-on-init;
 708                         phy-type = <1>;
 709                         hw-caps-read-idle-ctrl;
 710                         hw-caps-ll-interface;
 711                         hw-caps-temp-alert;
 712                 };
 713
 714                 ocp2scp@4a0ad000 {
 715                         compatible = "ti,omap-ocp2scp";
 716                         reg = <0x4a0ad000 0x1f>;
 717                         #address-cells = <1>;
 718                         #size-cells = <1>;
 719                         ranges;
 720                         ti,hwmods = "ocp2scp_usb_phy";
 721                         usb2_phy: usb2phy@4a0ad080 {
 722                                 compatible = "ti,omap-usb2";
 723                                 reg = <0x4a0ad080 0x58>;
 724                                 ctrl-module = <&omap_control_usb2phy>;
 725                                 clocks = <&usb_phy_cm_clk32k>;
 726                                 clock-names = "wkupclk";
 727                                 #phy-cells = <0>;
 728                         };
 729                 };
 730
 731                 mailbox: mailbox@4a0f4000 {
 732                         compatible = "ti,omap4-mailbox";
 733                         reg = <0x4a0f4000 0x200>;
 734                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 735                         ti,hwmods = "mailbox";
 736                         #mbox-cells = <1>;
 737                         ti,mbox-num-users = <3>;
 738                         ti,mbox-num-fifos = <8>;
 739                         mbox_ipu: mbox_ipu {
 740                                 ti,mbox-tx = <0 0 0>;
 741                                 ti,mbox-rx = <1 0 0>;
 742                         };
 743                         mbox_dsp: mbox_dsp {
 744                                 ti,mbox-tx = <3 0 0>;
 745                                 ti,mbox-rx = <2 0 0>;
 746                         };
 747                 };
 748
 749                 timer1: timer@4a318000 {
 750                         compatible = "ti,omap3430-timer";
 751                         reg = <0x4a318000 0x80>;
 752                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 753                         ti,hwmods = "timer1";
 754                         ti,timer-alwon;
 755                 };
 756
 757                 timer2: timer@48032000 {
 758                         compatible = "ti,omap3430-timer";
 759                         reg = <0x48032000 0x80>;
 760                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 761                         ti,hwmods = "timer2";
 762                 };
 763
 764                 timer3: timer@48034000 {
 765                         compatible = "ti,omap4430-timer";
 766                         reg = <0x48034000 0x80>;
 767                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 768                         ti,hwmods = "timer3";
 769                 };
 770
 771                 timer4: timer@48036000 {
 772                         compatible = "ti,omap4430-timer";
 773                         reg = <0x48036000 0x80>;
 774                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 775                         ti,hwmods = "timer4";
 776                 };
 777
 778                 timer5: timer@40138000 {
 779                         compatible = "ti,omap4430-timer";
 780                         reg = <0x40138000 0x80>,
 781                               <0x49038000 0x80>;
 782                         interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 783                         ti,hwmods = "timer5";
 784                         ti,timer-dsp;
 785                 };
 786
 787                 timer6: timer@4013a000 {
 788                         compatible = "ti,omap4430-timer";
 789                         reg = <0x4013a000 0x80>,
 790                               <0x4903a000 0x80>;
 791                         interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 792                         ti,hwmods = "timer6";
 793                         ti,timer-dsp;
 794                 };
 795
 796                 timer7: timer@4013c000 {
 797                         compatible = "ti,omap4430-timer";
 798                         reg = <0x4013c000 0x80>,
 799                               <0x4903c000 0x80>;
 800                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 801                         ti,hwmods = "timer7";
 802                         ti,timer-dsp;
 803                 };
 804
 805                 timer8: timer@4013e000 {
 806                         compatible = "ti,omap4430-timer";
 807                         reg = <0x4013e000 0x80>,
 808                               <0x4903e000 0x80>;
 809                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 810                         ti,hwmods = "timer8";
 811                         ti,timer-pwm;
 812                         ti,timer-dsp;
 813                 };
 814
 815                 timer9: timer@4803e000 {
 816                         compatible = "ti,omap4430-timer";
 817                         reg = <0x4803e000 0x80>;
 818                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 819                         ti,hwmods = "timer9";
 820                         ti,timer-pwm;
 821                 };
 822
 823                 timer10: timer@48086000 {
 824                         compatible = "ti,omap3430-timer";
 825                         reg = <0x48086000 0x80>;
 826                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 827                         ti,hwmods = "timer10";
 828                         ti,timer-pwm;
 829                 };
 830
 831                 timer11: timer@48088000 {
 832                         compatible = "ti,omap4430-timer";
 833                         reg = <0x48088000 0x80>;
 834                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 835                         ti,hwmods = "timer11";
 836                         ti,timer-pwm;
 837                 };
 838
 839                 usbhstll: usbhstll@4a062000 {
 840                         compatible = "ti,usbhs-tll";
 841                         reg = <0x4a062000 0x1000>;
 842                         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 843                         ti,hwmods = "usb_tll_hs";
 844                 };
 845
 846                 usbhshost: usbhshost@4a064000 {
 847                         compatible = "ti,usbhs-host";
 848                         reg = <0x4a064000 0x800>;
 849                         ti,hwmods = "usb_host_hs";
 850                         #address-cells = <1>;
 851                         #size-cells = <1>;
 852                         ranges;
 853                         clocks = <&init_60m_fclk>,
 854                                  <&xclk60mhsp1_ck>,
 855                                  <&xclk60mhsp2_ck>;
 856                         clock-names = "refclk_60m_int",
 857                                       "refclk_60m_ext_p1",
 858                                       "refclk_60m_ext_p2";
 859
 860                         usbhsohci: ohci@4a064800 {
 861                                 compatible = "ti,ohci-omap3";
 862                                 reg = <0x4a064800 0x400>;
 863                                 interrupt-parent = <&gic>;
 864                                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 865                         };
 866
 867                         usbhsehci: ehci@4a064c00 {
 868                                 compatible = "ti,ehci-omap";
 869                                 reg = <0x4a064c00 0x400>;
 870                                 interrupt-parent = <&gic>;
 871                                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 872                         };
 873                 };
 874
 875                 omap_control_usb2phy: control-phy@4a002300 {
 876                         compatible = "ti,control-phy-usb2";
 877                         reg = <0x4a002300 0x4>;
 878                         reg-names = "power";
 879                 };
 880
 881                 omap_control_usbotg: control-phy@4a00233c {
 882                         compatible = "ti,control-phy-otghs";
 883                         reg = <0x4a00233c 0x4>;
 884                         reg-names = "otghs_control";
 885                 };
 886
 887                 usb_otg_hs: usb_otg_hs@4a0ab000 {
 888                         compatible = "ti,omap4-musb";
 889                         reg = <0x4a0ab000 0x7ff>;
 890                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 891                         interrupt-names = "mc", "dma";
 892                         ti,hwmods = "usb_otg_hs";
 893                         usb-phy = <&usb2_phy>;
 894                         phys = <&usb2_phy>;
 895                         phy-names = "usb2-phy";
 896                         multipoint = <1>;
 897                         num-eps = <16>;
 898                         ram-bits = <12>;
 899                         ctrl-module = <&omap_control_usbotg>;
 900                 };
 901
 902                 aes: aes@4b501000 {
 903                         compatible = "ti,omap4-aes";
 904                         ti,hwmods = "aes";
 905                         reg = <0x4b501000 0xa0>;
 906                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 907                         dmas = <&sdma 111>, <&sdma 110>;
 908                         dma-names = "tx", "rx";
 909                 };
 910
 911                 des: des@480a5000 {
 912                         compatible = "ti,omap4-des";
 913                         ti,hwmods = "des";
 914                         reg = <0x480a5000 0xa0>;
 915                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 916                         dmas = <&sdma 117>, <&sdma 116>;
 917                         dma-names = "tx", "rx";
 918                 };
 919
 920                 abb_mpu: regulator-abb-mpu {
 921                         compatible = "ti,abb-v2";
 922                         regulator-name = "abb_mpu";
 923                         #address-cells = <0>;
 924                         #size-cells = <0>;
 925                         ti,tranxdone-status-mask = <0x80>;
 926                         clocks = <&sys_clkin_ck>;
 927                         ti,settling-time = <50>;
 928                         ti,clock-cycles = <16>;
 929
 930                         status = "disabled";
 931                 };
 932
 933                 abb_iva: regulator-abb-iva {
 934                         compatible = "ti,abb-v2";
 935                         regulator-name = "abb_iva";
 936                         #address-cells = <0>;
 937                         #size-cells = <0>;
 938                         ti,tranxdone-status-mask = <0x80000000>;
 939                         clocks = <&sys_clkin_ck>;
 940                         ti,settling-time = <50>;
 941                         ti,clock-cycles = <16>;
 942
 943                         status = "disabled";
 944                 };
 945
 946                 dss: dss@58000000 {
 947                         compatible = "ti,omap4-dss";
 948                         reg = <0x58000000 0x80>;
 949                         status = "disabled";
 950                         ti,hwmods = "dss_core";
 951                         clocks = <&dss_dss_clk>;
 952                         clock-names = "fck";
 953                         #address-cells = <1>;
 954                         #size-cells = <1>;
 955                         ranges;
 956
 957                         dispc@58001000 {
 958                                 compatible = "ti,omap4-dispc";
 959                                 reg = <0x58001000 0x1000>;
 960                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 961                                 ti,hwmods = "dss_dispc";
 962                                 clocks = <&dss_dss_clk>;
 963                                 clock-names = "fck";
 964                         };
 965
 966                         rfbi: encoder@58002000  {
 967                                 compatible = "ti,omap4-rfbi";
 968                                 reg = <0x58002000 0x1000>;
 969                                 status = "disabled";
 970                                 ti,hwmods = "dss_rfbi";
 971                                 clocks = <&dss_dss_clk>, <&l3_div_ck>;
 972                                 clock-names = "fck", "ick";
 973                         };
 974
 975                         venc: encoder@58003000 {
 976                                 compatible = "ti,omap4-venc";
 977                                 reg = <0x58003000 0x1000>;
 978                                 status = "disabled";
 979                                 ti,hwmods = "dss_venc";
 980                                 clocks = <&dss_tv_clk>;
 981                                 clock-names = "fck";
 982                         };
 983
 984                         dsi1: encoder@58004000 {
 985                                 compatible = "ti,omap4-dsi";
 986                                 reg = <0x58004000 0x200>,
 987                                       <0x58004200 0x40>,
 988                                       <0x58004300 0x20>;
 989                                 reg-names = "proto", "phy", "pll";
 990                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 991                                 status = "disabled";
 992                                 ti,hwmods = "dss_dsi1";
 993                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
 994                                 clock-names = "fck", "sys_clk";
 995                         };
 996
 997                         dsi2: encoder@58005000 {
 998                                 compatible = "ti,omap4-dsi";
 999                                 reg = <0x58005000 0x200>,
1000                                       <0x58005200 0x40>,
1001                                       <0x58005300 0x20>;
1002                                 reg-names = "proto", "phy", "pll";
1003                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
1004                                 status = "disabled";
1005                                 ti,hwmods = "dss_dsi2";
1006                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
1007                                 clock-names = "fck", "sys_clk";
1008                         };
1009
1010                         hdmi: encoder@58006000 {
1011                                 compatible = "ti,omap4-hdmi";
1012                                 reg = <0x58006000 0x200>,
1013                                       <0x58006200 0x100>,
1014                                       <0x58006300 0x100>,
1015                                       <0x58006400 0x1000>;
1016                                 reg-names = "wp", "pll", "phy", "core";
1017                                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1018                                 status = "disabled";
1019                                 ti,hwmods = "dss_hdmi";
1020                                 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
1021                                 clock-names = "fck", "sys_clk";
1022                                 dmas = <&sdma 76>;
1023                                 dma-names = "audio_tx";
1024                         };
1025                 };
1026         };
1027 };
1028
1029 /include/ "omap44xx-clocks.dtsi"