60244b7a993e50ad6db92923f2da9d764c56f02c
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / omap4.dtsi
1 /*
2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
12
13 / {
14         compatible = "ti,omap4430", "ti,omap4";
15         interrupt-parent = <&wakeupgen>;
16         #address-cells = <1>;
17         #size-cells = <1>;
18         chosen { };
19
20         aliases {
21                 i2c0 = &i2c1;
22                 i2c1 = &i2c2;
23                 i2c2 = &i2c3;
24                 i2c3 = &i2c4;
25                 serial0 = &uart1;
26                 serial1 = &uart2;
27                 serial2 = &uart3;
28                 serial3 = &uart4;
29         };
30
31         cpus {
32                 #address-cells = <1>;
33                 #size-cells = <0>;
34
35                 cpu@0 {
36                         compatible = "arm,cortex-a9";
37                         device_type = "cpu";
38                         next-level-cache = <&L2>;
39                         reg = <0x0>;
40
41                         clocks = <&dpll_mpu_ck>;
42                         clock-names = "cpu";
43
44                         clock-latency = <300000>; /* From omap-cpufreq driver */
45                 };
46                 cpu@1 {
47                         compatible = "arm,cortex-a9";
48                         device_type = "cpu";
49                         next-level-cache = <&L2>;
50                         reg = <0x1>;
51                 };
52         };
53
54         /*
55          * Note that 4430 needs cross trigger interface (CTI) supported
56          * before we can configure the interrupts. This means sampling
57          * events are not supported for pmu. Note that 4460 does not use
58          * CTI, see also 4460.dtsi.
59          */
60         pmu {
61                 compatible = "arm,cortex-a9-pmu";
62                 ti,hwmods = "debugss";
63         };
64
65         gic: interrupt-controller@48241000 {
66                 compatible = "arm,cortex-a9-gic";
67                 interrupt-controller;
68                 #interrupt-cells = <3>;
69                 reg = <0x48241000 0x1000>,
70                       <0x48240100 0x0100>;
71                 interrupt-parent = <&gic>;
72         };
73
74         L2: l2-cache-controller@48242000 {
75                 compatible = "arm,pl310-cache";
76                 reg = <0x48242000 0x1000>;
77                 cache-unified;
78                 cache-level = <2>;
79         };
80
81         local-timer@48240600 {
82                 compatible = "arm,cortex-a9-twd-timer";
83                 clocks = <&mpu_periphclk>;
84                 reg = <0x48240600 0x20>;
85                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_EDGE_RISING)>;
86                 interrupt-parent = <&gic>;
87         };
88
89         wakeupgen: interrupt-controller@48281000 {
90                 compatible = "ti,omap4-wugen-mpu";
91                 interrupt-controller;
92                 #interrupt-cells = <3>;
93                 reg = <0x48281000 0x1000>;
94                 interrupt-parent = <&gic>;
95         };
96
97         /*
98          * The soc node represents the soc top level view. It is used for IPs
99          * that are not memory mapped in the MPU view or for the MPU itself.
100          */
101         soc {
102                 compatible = "ti,omap-infra";
103                 mpu {
104                         compatible = "ti,omap4-mpu";
105                         ti,hwmods = "mpu";
106                         sram = <&ocmcram>;
107                 };
108
109                 dsp {
110                         compatible = "ti,omap3-c64";
111                         ti,hwmods = "dsp";
112                 };
113
114                 iva {
115                         compatible = "ti,ivahd";
116                         ti,hwmods = "iva";
117                 };
118         };
119
120         /*
121          * XXX: Use a flat representation of the OMAP4 interconnect.
122          * The real OMAP interconnect network is quite complex.
123          * Since it will not bring real advantage to represent that in DT for
124          * the moment, just use a fake OCP bus entry to represent the whole bus
125          * hierarchy.
126          */
127         ocp {
128                 compatible = "ti,omap4-l3-noc", "simple-bus";
129                 #address-cells = <1>;
130                 #size-cells = <1>;
131                 ranges;
132                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
133                 reg = <0x44000000 0x1000>,
134                       <0x44800000 0x2000>,
135                       <0x45000000 0x1000>;
136                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
137                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
138
139                 l4_cfg: l4@4a000000 {
140                         compatible = "ti,omap4-l4-cfg", "simple-bus";
141                         #address-cells = <1>;
142                         #size-cells = <1>;
143                         ranges = <0 0x4a000000 0x1000000>;
144
145                         cm1: cm1@4000 {
146                                 compatible = "ti,omap4-cm1";
147                                 reg = <0x4000 0x2000>;
148
149                                 cm1_clocks: clocks {
150                                         #address-cells = <1>;
151                                         #size-cells = <0>;
152                                 };
153
154                                 cm1_clockdomains: clockdomains {
155                                 };
156                         };
157
158                         cm2: cm2@8000 {
159                                 compatible = "ti,omap4-cm2";
160                                 reg = <0x8000 0x3000>;
161
162                                 cm2_clocks: clocks {
163                                         #address-cells = <1>;
164                                         #size-cells = <0>;
165                                 };
166
167                                 cm2_clockdomains: clockdomains {
168                                 };
169                         };
170
171                         omap4_scm_core: scm@2000 {
172                                 compatible = "ti,omap4-scm-core", "simple-bus";
173                                 reg = <0x2000 0x1000>;
174                                 #address-cells = <1>;
175                                 #size-cells = <1>;
176                                 ranges = <0 0x2000 0x1000>;
177                                 ti,hwmods = "ctrl_module_core";
178
179                                 scm_conf: scm_conf@0 {
180                                         compatible = "syscon";
181                                         reg = <0x0 0x800>;
182                                         #address-cells = <1>;
183                                         #size-cells = <1>;
184                                 };
185                         };
186
187                         omap4_padconf_core: scm@100000 {
188                                 compatible = "ti,omap4-scm-padconf-core",
189                                              "simple-bus";
190                                 reg = <0x100000 0x1000>;
191                                 #address-cells = <1>;
192                                 #size-cells = <1>;
193                                 ranges = <0 0x100000 0x1000>;
194                                 ti,hwmods = "ctrl_module_pad_core";
195
196                                 omap4_pmx_core: pinmux@40 {
197                                         compatible = "ti,omap4-padconf",
198                                                      "pinctrl-single";
199                                         reg = <0x40 0x0196>;
200                                         #address-cells = <1>;
201                                         #size-cells = <0>;
202                                         #pinctrl-cells = <1>;
203                                         #interrupt-cells = <1>;
204                                         interrupt-controller;
205                                         pinctrl-single,register-width = <16>;
206                                         pinctrl-single,function-mask = <0x7fff>;
207                                 };
208
209                                 omap4_padconf_global: omap4_padconf_global@5a0 {
210                                         compatible = "syscon",
211                                                      "simple-bus";
212                                         reg = <0x5a0 0x170>;
213                                         #address-cells = <1>;
214                                         #size-cells = <1>;
215                                         ranges = <0 0x5a0 0x170>;
216
217                                         pbias_regulator: pbias_regulator@60 {
218                                                 compatible = "ti,pbias-omap4", "ti,pbias-omap";
219                                                 reg = <0x60 0x4>;
220                                                 syscon = <&omap4_padconf_global>;
221                                                 pbias_mmc_reg: pbias_mmc_omap4 {
222                                                         regulator-name = "pbias_mmc_omap4";
223                                                         regulator-min-microvolt = <1800000>;
224                                                         regulator-max-microvolt = <3000000>;
225                                                 };
226                                         };
227                                 };
228                         };
229
230                         l4_wkup: l4@300000 {
231                                 compatible = "ti,omap4-l4-wkup", "simple-bus";
232                                 #address-cells = <1>;
233                                 #size-cells = <1>;
234                                 ranges = <0 0x300000 0x40000>;
235
236                                 counter32k: counter@4000 {
237                                         compatible = "ti,omap-counter32k";
238                                         reg = <0x4000 0x20>;
239                                         ti,hwmods = "counter_32k";
240                                 };
241
242                                 prm: prm@6000 {
243                                         compatible = "ti,omap4-prm";
244                                         reg = <0x6000 0x3000>;
245                                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
246
247                                         prm_clocks: clocks {
248                                                 #address-cells = <1>;
249                                                 #size-cells = <0>;
250                                         };
251
252                                         prm_clockdomains: clockdomains {
253                                         };
254                                 };
255
256                                 scrm: scrm@a000 {
257                                         compatible = "ti,omap4-scrm";
258                                         reg = <0xa000 0x2000>;
259
260                                         scrm_clocks: clocks {
261                                                 #address-cells = <1>;
262                                                 #size-cells = <0>;
263                                         };
264
265                                         scrm_clockdomains: clockdomains {
266                                         };
267                                 };
268
269                                 omap4_scm_wkup: scm@c000 {
270                                         compatible = "ti,omap4-scm-wkup";
271                                         reg = <0xc000 0x1000>;
272                                         ti,hwmods = "ctrl_module_wkup";
273                                 };
274
275                                 omap4_padconf_wkup: padconf@1e000 {
276                                         compatible = "ti,omap4-scm-padconf-wkup",
277                                                      "simple-bus";
278                                         reg = <0x1e000 0x1000>;
279                                         #address-cells = <1>;
280                                         #size-cells = <1>;
281                                         ranges = <0 0x1e000 0x1000>;
282                                         ti,hwmods = "ctrl_module_pad_wkup";
283
284                                         omap4_pmx_wkup: pinmux@40 {
285                                                 compatible = "ti,omap4-padconf",
286                                                              "pinctrl-single";
287                                                 reg = <0x40 0x0038>;
288                                                 #address-cells = <1>;
289                                                 #size-cells = <0>;
290                                                 #pinctrl-cells = <1>;
291                                                 #interrupt-cells = <1>;
292                                                 interrupt-controller;
293                                                 pinctrl-single,register-width = <16>;
294                                                 pinctrl-single,function-mask = <0x7fff>;
295                                         };
296                                 };
297                         };
298                 };
299
300                 ocmcram: ocmcram@40304000 {
301                         compatible = "mmio-sram";
302                         reg = <0x40304000 0xa000>; /* 40k */
303                 };
304
305                 sdma: dma-controller@4a056000 {
306                         compatible = "ti,omap4430-sdma";
307                         reg = <0x4a056000 0x1000>;
308                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
309                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
310                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
311                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
312                         #dma-cells = <1>;
313                         dma-channels = <32>;
314                         dma-requests = <127>;
315                         ti,hwmods = "dma_system";
316                 };
317
318                 gpio1: gpio@4a310000 {
319                         compatible = "ti,omap4-gpio";
320                         reg = <0x4a310000 0x200>;
321                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
322                         ti,hwmods = "gpio1";
323                         ti,gpio-always-on;
324                         gpio-controller;
325                         #gpio-cells = <2>;
326                         interrupt-controller;
327                         #interrupt-cells = <2>;
328                 };
329
330                 gpio2: gpio@48055000 {
331                         compatible = "ti,omap4-gpio";
332                         reg = <0x48055000 0x200>;
333                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
334                         ti,hwmods = "gpio2";
335                         gpio-controller;
336                         #gpio-cells = <2>;
337                         interrupt-controller;
338                         #interrupt-cells = <2>;
339                 };
340
341                 gpio3: gpio@48057000 {
342                         compatible = "ti,omap4-gpio";
343                         reg = <0x48057000 0x200>;
344                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
345                         ti,hwmods = "gpio3";
346                         gpio-controller;
347                         #gpio-cells = <2>;
348                         interrupt-controller;
349                         #interrupt-cells = <2>;
350                 };
351
352                 gpio4: gpio@48059000 {
353                         compatible = "ti,omap4-gpio";
354                         reg = <0x48059000 0x200>;
355                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
356                         ti,hwmods = "gpio4";
357                         gpio-controller;
358                         #gpio-cells = <2>;
359                         interrupt-controller;
360                         #interrupt-cells = <2>;
361                 };
362
363                 gpio5: gpio@4805b000 {
364                         compatible = "ti,omap4-gpio";
365                         reg = <0x4805b000 0x200>;
366                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
367                         ti,hwmods = "gpio5";
368                         gpio-controller;
369                         #gpio-cells = <2>;
370                         interrupt-controller;
371                         #interrupt-cells = <2>;
372                 };
373
374                 gpio6: gpio@4805d000 {
375                         compatible = "ti,omap4-gpio";
376                         reg = <0x4805d000 0x200>;
377                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
378                         ti,hwmods = "gpio6";
379                         gpio-controller;
380                         #gpio-cells = <2>;
381                         interrupt-controller;
382                         #interrupt-cells = <2>;
383                 };
384
385                 target-module@48076000 {
386                         compatible = "ti,sysc-omap4", "ti,sysc";
387                         ti,hwmods = "slimbus2";
388                         reg = <0x48076000 0x4>,
389                               <0x48076010 0x4>;
390                         reg-names = "rev", "sysc";
391                         #address-cells = <1>;
392                         #size-cells = <1>;
393                         ranges = <0 0x48076000 0x001000>;
394
395                         /* No child device binding or driver in mainline */
396                 };
397
398                 elm: elm@48078000 {
399                         compatible = "ti,am3352-elm";
400                         reg = <0x48078000 0x2000>;
401                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
402                         ti,hwmods = "elm";
403                         status = "disabled";
404                 };
405
406                 gpmc: gpmc@50000000 {
407                         compatible = "ti,omap4430-gpmc";
408                         reg = <0x50000000 0x1000>;
409                         #address-cells = <2>;
410                         #size-cells = <1>;
411                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
412                         dmas = <&sdma 4>;
413                         dma-names = "rxtx";
414                         gpmc,num-cs = <8>;
415                         gpmc,num-waitpins = <4>;
416                         ti,hwmods = "gpmc";
417                         ti,no-idle-on-init;
418                         clocks = <&l3_div_ck>;
419                         clock-names = "fck";
420                         interrupt-controller;
421                         #interrupt-cells = <2>;
422                         gpio-controller;
423                         #gpio-cells = <2>;
424                 };
425
426                 uart1: serial@4806a000 {
427                         compatible = "ti,omap4-uart";
428                         reg = <0x4806a000 0x100>;
429                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
430                         ti,hwmods = "uart1";
431                         clock-frequency = <48000000>;
432                 };
433
434                 uart2: serial@4806c000 {
435                         compatible = "ti,omap4-uart";
436                         reg = <0x4806c000 0x100>;
437                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
438                         ti,hwmods = "uart2";
439                         clock-frequency = <48000000>;
440                 };
441
442                 uart3: serial@48020000 {
443                         compatible = "ti,omap4-uart";
444                         reg = <0x48020000 0x100>;
445                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
446                         ti,hwmods = "uart3";
447                         clock-frequency = <48000000>;
448                 };
449
450                 uart4: serial@4806e000 {
451                         compatible = "ti,omap4-uart";
452                         reg = <0x4806e000 0x100>;
453                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
454                         ti,hwmods = "uart4";
455                         clock-frequency = <48000000>;
456                 };
457
458                 target-module@4a0db000 {
459                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
460                         ti,hwmods = "smartreflex_iva";
461                         reg = <0x4a0db000 0x4>,
462                               <0x4a0db008 0x4>;
463                         reg-names = "rev", "sysc";
464                         #address-cells = <1>;
465                         #size-cells = <1>;
466                         ranges = <0 0x4a0db000 0x001000>;
467
468                         smartreflex_iva: smartreflex@0 {
469                                 compatible = "ti,omap4-smartreflex-iva";
470                                 reg = <0 0x80>;
471                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
472                         };
473                 };
474
475                 target-module@4a0dd000 {
476                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
477                         ti,hwmods = "smartreflex_core";
478                         reg = <0x4a0dd000 0x4>,
479                               <0x4a0dd008 0x4>;
480                         reg-names = "rev", "sysc";
481                         #address-cells = <1>;
482                         #size-cells = <1>;
483                         ranges = <0 0x4a0dd000 0x001000>;
484
485                         smartreflex_core: smartreflex@0 {
486                                 compatible = "ti,omap4-smartreflex-core";
487                                 reg = <0 0x80>;
488                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
489                         };
490                 };
491
492                 target-module@4a0d9000 {
493                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
494                         ti,hwmods = "smartreflex_mpu";
495                         reg = <0x4a0d9000 0x4>,
496                               <0x4a0d9008 0x4>;
497                         reg-names = "rev", "sysc";
498                         #address-cells = <1>;
499                         #size-cells = <1>;
500                         ranges = <0 0x4a0d9000 0x001000>;
501
502                         smartreflex_mpu: smartreflex@0 {
503                                 compatible = "ti,omap4-smartreflex-mpu";
504                                 reg = <0 0x80>;
505                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
506                         };
507                 };
508
509                 hwspinlock: spinlock@4a0f6000 {
510                         compatible = "ti,omap4-hwspinlock";
511                         reg = <0x4a0f6000 0x1000>;
512                         ti,hwmods = "spinlock";
513                         #hwlock-cells = <1>;
514                 };
515
516                 i2c1: i2c@48070000 {
517                         compatible = "ti,omap4-i2c";
518                         reg = <0x48070000 0x100>;
519                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
520                         #address-cells = <1>;
521                         #size-cells = <0>;
522                         ti,hwmods = "i2c1";
523                 };
524
525                 i2c2: i2c@48072000 {
526                         compatible = "ti,omap4-i2c";
527                         reg = <0x48072000 0x100>;
528                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
529                         #address-cells = <1>;
530                         #size-cells = <0>;
531                         ti,hwmods = "i2c2";
532                 };
533
534                 i2c3: i2c@48060000 {
535                         compatible = "ti,omap4-i2c";
536                         reg = <0x48060000 0x100>;
537                         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
538                         #address-cells = <1>;
539                         #size-cells = <0>;
540                         ti,hwmods = "i2c3";
541                 };
542
543                 i2c4: i2c@48350000 {
544                         compatible = "ti,omap4-i2c";
545                         reg = <0x48350000 0x100>;
546                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
547                         #address-cells = <1>;
548                         #size-cells = <0>;
549                         ti,hwmods = "i2c4";
550                 };
551
552                 mcspi1: spi@48098000 {
553                         compatible = "ti,omap4-mcspi";
554                         reg = <0x48098000 0x200>;
555                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
556                         #address-cells = <1>;
557                         #size-cells = <0>;
558                         ti,hwmods = "mcspi1";
559                         ti,spi-num-cs = <4>;
560                         dmas = <&sdma 35>,
561                                <&sdma 36>,
562                                <&sdma 37>,
563                                <&sdma 38>,
564                                <&sdma 39>,
565                                <&sdma 40>,
566                                <&sdma 41>,
567                                <&sdma 42>;
568                         dma-names = "tx0", "rx0", "tx1", "rx1",
569                                     "tx2", "rx2", "tx3", "rx3";
570                 };
571
572                 mcspi2: spi@4809a000 {
573                         compatible = "ti,omap4-mcspi";
574                         reg = <0x4809a000 0x200>;
575                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
576                         #address-cells = <1>;
577                         #size-cells = <0>;
578                         ti,hwmods = "mcspi2";
579                         ti,spi-num-cs = <2>;
580                         dmas = <&sdma 43>,
581                                <&sdma 44>,
582                                <&sdma 45>,
583                                <&sdma 46>;
584                         dma-names = "tx0", "rx0", "tx1", "rx1";
585                 };
586
587                 hdqw1w: 1w@480b2000 {
588                         compatible = "ti,omap3-1w";
589                         reg = <0x480b2000 0x1000>;
590                         interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
591                         ti,hwmods = "hdq1w";
592                 };
593
594                 mcspi3: spi@480b8000 {
595                         compatible = "ti,omap4-mcspi";
596                         reg = <0x480b8000 0x200>;
597                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
598                         #address-cells = <1>;
599                         #size-cells = <0>;
600                         ti,hwmods = "mcspi3";
601                         ti,spi-num-cs = <2>;
602                         dmas = <&sdma 15>, <&sdma 16>;
603                         dma-names = "tx0", "rx0";
604                 };
605
606                 mcspi4: spi@480ba000 {
607                         compatible = "ti,omap4-mcspi";
608                         reg = <0x480ba000 0x200>;
609                         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
610                         #address-cells = <1>;
611                         #size-cells = <0>;
612                         ti,hwmods = "mcspi4";
613                         ti,spi-num-cs = <1>;
614                         dmas = <&sdma 70>, <&sdma 71>;
615                         dma-names = "tx0", "rx0";
616                 };
617
618                 mmc1: mmc@4809c000 {
619                         compatible = "ti,omap4-hsmmc";
620                         reg = <0x4809c000 0x400>;
621                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
622                         ti,hwmods = "mmc1";
623                         ti,dual-volt;
624                         ti,needs-special-reset;
625                         dmas = <&sdma 61>, <&sdma 62>;
626                         dma-names = "tx", "rx";
627                         pbias-supply = <&pbias_mmc_reg>;
628                 };
629
630                 mmc2: mmc@480b4000 {
631                         compatible = "ti,omap4-hsmmc";
632                         reg = <0x480b4000 0x400>;
633                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
634                         ti,hwmods = "mmc2";
635                         ti,needs-special-reset;
636                         dmas = <&sdma 47>, <&sdma 48>;
637                         dma-names = "tx", "rx";
638                 };
639
640                 mmc3: mmc@480ad000 {
641                         compatible = "ti,omap4-hsmmc";
642                         reg = <0x480ad000 0x400>;
643                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
644                         ti,hwmods = "mmc3";
645                         ti,needs-special-reset;
646                         dmas = <&sdma 77>, <&sdma 78>;
647                         dma-names = "tx", "rx";
648                 };
649
650                 mmc4: mmc@480d1000 {
651                         compatible = "ti,omap4-hsmmc";
652                         reg = <0x480d1000 0x400>;
653                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
654                         ti,hwmods = "mmc4";
655                         ti,needs-special-reset;
656                         dmas = <&sdma 57>, <&sdma 58>;
657                         dma-names = "tx", "rx";
658                 };
659
660                 mmc5: mmc@480d5000 {
661                         compatible = "ti,omap4-hsmmc";
662                         reg = <0x480d5000 0x400>;
663                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
664                         ti,hwmods = "mmc5";
665                         ti,needs-special-reset;
666                         dmas = <&sdma 59>, <&sdma 60>;
667                         dma-names = "tx", "rx";
668                 };
669
670                 hsi: hsi@4a058000 {
671                         compatible = "ti,omap4-hsi";
672                         reg = <0x4a058000 0x4000>,
673                               <0x4a05c000 0x1000>;
674                         reg-names = "sys", "gdd";
675                         ti,hwmods = "hsi";
676
677                         clocks = <&hsi_fck>;
678                         clock-names = "hsi_fck";
679
680                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
681                         interrupt-names = "gdd_mpu";
682
683                         #address-cells = <1>;
684                         #size-cells = <1>;
685                         ranges = <0 0x4a058000 0x4000>;
686
687                         hsi_port1: hsi-port@2000 {
688                                 compatible = "ti,omap4-hsi-port";
689                                 reg = <0x2000 0x800>,
690                                       <0x2800 0x800>;
691                                 reg-names = "tx", "rx";
692                                 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
693                         };
694
695                         hsi_port2: hsi-port@3000 {
696                                 compatible = "ti,omap4-hsi-port";
697                                 reg = <0x3000 0x800>,
698                                       <0x3800 0x800>;
699                                 reg-names = "tx", "rx";
700                                 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
701                         };
702                 };
703
704                 mmu_dsp: mmu@4a066000 {
705                         compatible = "ti,omap4-iommu";
706                         reg = <0x4a066000 0x100>;
707                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
708                         ti,hwmods = "mmu_dsp";
709                         #iommu-cells = <0>;
710                 };
711
712                 target-module@52000000 {
713                         compatible = "ti,sysc-omap4", "ti,sysc";
714                         ti,hwmods = "iss";
715                         reg = <0x52000000 0x4>,
716                               <0x52000010 0x4>;
717                         reg-names = "rev", "sysc";
718                         #address-cells = <1>;
719                         #size-cells = <1>;
720                         ranges = <0 0x52000000 0x1000000>;
721
722                         /* No child device binding, driver in staging */
723                 };
724
725                 mmu_ipu: mmu@55082000 {
726                         compatible = "ti,omap4-iommu";
727                         reg = <0x55082000 0x100>;
728                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
729                         ti,hwmods = "mmu_ipu";
730                         #iommu-cells = <0>;
731                         ti,iommu-bus-err-back;
732                 };
733
734                 wdt2: wdt@4a314000 {
735                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
736                         reg = <0x4a314000 0x80>;
737                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
738                         ti,hwmods = "wd_timer2";
739                 };
740
741                 wdt3: wdt@40130000 {
742                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
743                         reg = <0x40130000 0x80>, /* MPU private access */
744                               <0x49030000 0x80>; /* L3 Interconnect */
745                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
746                         ti,hwmods = "wd_timer3";
747                 };
748
749                 mcpdm: mcpdm@40132000 {
750                         compatible = "ti,omap4-mcpdm";
751                         reg = <0x40132000 0x7f>, /* MPU private access */
752                               <0x49032000 0x7f>; /* L3 Interconnect */
753                         reg-names = "mpu", "dma";
754                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
755                         ti,hwmods = "mcpdm";
756                         dmas = <&sdma 65>,
757                                <&sdma 66>;
758                         dma-names = "up_link", "dn_link";
759                         status = "disabled";
760                 };
761
762                 dmic: dmic@4012e000 {
763                         compatible = "ti,omap4-dmic";
764                         reg = <0x4012e000 0x7f>, /* MPU private access */
765                               <0x4902e000 0x7f>; /* L3 Interconnect */
766                         reg-names = "mpu", "dma";
767                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
768                         ti,hwmods = "dmic";
769                         dmas = <&sdma 67>;
770                         dma-names = "up_link";
771                         status = "disabled";
772                 };
773
774                 mcbsp1: mcbsp@40122000 {
775                         compatible = "ti,omap4-mcbsp";
776                         reg = <0x40122000 0xff>, /* MPU private access */
777                               <0x49022000 0xff>; /* L3 Interconnect */
778                         reg-names = "mpu", "dma";
779                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
780                         interrupt-names = "common";
781                         ti,buffer-size = <128>;
782                         ti,hwmods = "mcbsp1";
783                         dmas = <&sdma 33>,
784                                <&sdma 34>;
785                         dma-names = "tx", "rx";
786                         status = "disabled";
787                 };
788
789                 mcbsp2: mcbsp@40124000 {
790                         compatible = "ti,omap4-mcbsp";
791                         reg = <0x40124000 0xff>, /* MPU private access */
792                               <0x49024000 0xff>; /* L3 Interconnect */
793                         reg-names = "mpu", "dma";
794                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
795                         interrupt-names = "common";
796                         ti,buffer-size = <128>;
797                         ti,hwmods = "mcbsp2";
798                         dmas = <&sdma 17>,
799                                <&sdma 18>;
800                         dma-names = "tx", "rx";
801                         status = "disabled";
802                 };
803
804                 mcbsp3: mcbsp@40126000 {
805                         compatible = "ti,omap4-mcbsp";
806                         reg = <0x40126000 0xff>, /* MPU private access */
807                               <0x49026000 0xff>; /* L3 Interconnect */
808                         reg-names = "mpu", "dma";
809                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
810                         interrupt-names = "common";
811                         ti,buffer-size = <128>;
812                         ti,hwmods = "mcbsp3";
813                         dmas = <&sdma 19>,
814                                <&sdma 20>;
815                         dma-names = "tx", "rx";
816                         status = "disabled";
817                 };
818
819                 target-module@40128000 {
820                         compatible = "ti,sysc-mcasp", "ti,sysc";
821                         ti,hwmods = "mcasp";
822                         reg = <0x40128004 0x4>;
823                         reg-names = "sysc";
824                         #address-cells = <1>;
825                         #size-cells = <1>;
826                         ranges = <0x00000000 0x40128000 0x1000>, /* MPU */
827                                  <0x49028000 0x49028000 0x1000>; /* L3 */
828
829                         /*
830                          * Child device unsupported by davinci-mcasp. At least
831                          * RX path is disabled for omap4, and only DIT mode
832                          * works with no I2S. See also old Android kernel
833                          * omap-mcasp driver for more information.
834                          */
835                 };
836
837                 target-module@4012c000 {
838                         compatible = "ti,sysc-omap4", "ti,sysc";
839                         ti,hwmods = "slimbus1";
840                         reg = <0x4012c000 0x4>,
841                               <0x4012c010 0x4>;
842                         reg-names = "rev", "sysc";
843                         #address-cells = <1>;
844                         #size-cells = <1>;
845                         ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
846                                  <0x4902c000 0x4902c000 0x1000>; /* L3 */
847
848                         /* No child device binding or driver in mainline */
849                 };
850
851                 target-module@401f1000 {
852                         compatible = "ti,sysc-omap4", "ti,sysc";
853                         ti,hwmods = "aess";
854                         reg = <0x401f1000 0x4>,
855                               <0x401f1010 0x4>;
856                         reg-names = "rev", "sysc";
857                         #address-cells = <1>;
858                         #size-cells = <1>;
859                         ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */
860                                  <0x490f1000 0x490f1000 0x1000>; /* L3 */
861
862                         /*
863                          * No child device binding or driver in mainline.
864                          * See Android tree and related upstreaming efforts
865                          * for the old driver.
866                          */
867                 };
868
869                 mcbsp4: mcbsp@48096000 {
870                         compatible = "ti,omap4-mcbsp";
871                         reg = <0x48096000 0xff>; /* L4 Interconnect */
872                         reg-names = "mpu";
873                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
874                         interrupt-names = "common";
875                         ti,buffer-size = <128>;
876                         ti,hwmods = "mcbsp4";
877                         dmas = <&sdma 31>,
878                                <&sdma 32>;
879                         dma-names = "tx", "rx";
880                         status = "disabled";
881                 };
882
883                 keypad: keypad@4a31c000 {
884                         compatible = "ti,omap4-keypad";
885                         reg = <0x4a31c000 0x80>;
886                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
887                         reg-names = "mpu";
888                         ti,hwmods = "kbd";
889                 };
890
891                 dmm@4e000000 {
892                         compatible = "ti,omap4-dmm";
893                         reg = <0x4e000000 0x800>;
894                         interrupts = <0 113 0x4>;
895                         ti,hwmods = "dmm";
896                 };
897
898                 emif1: emif@4c000000 {
899                         compatible = "ti,emif-4d";
900                         reg = <0x4c000000 0x100>;
901                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
902                         ti,hwmods = "emif1";
903                         ti,no-idle-on-init;
904                         phy-type = <1>;
905                         hw-caps-read-idle-ctrl;
906                         hw-caps-ll-interface;
907                         hw-caps-temp-alert;
908                 };
909
910                 emif2: emif@4d000000 {
911                         compatible = "ti,emif-4d";
912                         reg = <0x4d000000 0x100>;
913                         interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
914                         ti,hwmods = "emif2";
915                         ti,no-idle-on-init;
916                         phy-type = <1>;
917                         hw-caps-read-idle-ctrl;
918                         hw-caps-ll-interface;
919                         hw-caps-temp-alert;
920                 };
921
922                 ocp2scp@4a0ad000 {
923                         compatible = "ti,omap-ocp2scp";
924                         reg = <0x4a0ad000 0x1f>;
925                         #address-cells = <1>;
926                         #size-cells = <1>;
927                         ranges;
928                         ti,hwmods = "ocp2scp_usb_phy";
929                         usb2_phy: usb2phy@4a0ad080 {
930                                 compatible = "ti,omap-usb2";
931                                 reg = <0x4a0ad080 0x58>;
932                                 ctrl-module = <&omap_control_usb2phy>;
933                                 clocks = <&usb_phy_cm_clk32k>;
934                                 clock-names = "wkupclk";
935                                 #phy-cells = <0>;
936                         };
937                 };
938
939                 mailbox: mailbox@4a0f4000 {
940                         compatible = "ti,omap4-mailbox";
941                         reg = <0x4a0f4000 0x200>;
942                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
943                         ti,hwmods = "mailbox";
944                         #mbox-cells = <1>;
945                         ti,mbox-num-users = <3>;
946                         ti,mbox-num-fifos = <8>;
947                         mbox_ipu: mbox_ipu {
948                                 ti,mbox-tx = <0 0 0>;
949                                 ti,mbox-rx = <1 0 0>;
950                         };
951                         mbox_dsp: mbox_dsp {
952                                 ti,mbox-tx = <3 0 0>;
953                                 ti,mbox-rx = <2 0 0>;
954                         };
955                 };
956
957                 target-module@4a10a000 {
958                         compatible = "ti,sysc-omap4", "ti,sysc";
959                         ti,hwmods = "fdif";
960                         reg = <0x4a10a000 0x4>,
961                               <0x4a10a010 0x4>;
962                         reg-names = "rev", "sysc";
963                         #address-cells = <1>;
964                         #size-cells = <1>;
965                         ranges = <0 0x4a10a000 0x1000>;
966
967                         /* No child device binding or driver in mainline */
968                 };
969
970                 timer1: timer@4a318000 {
971                         compatible = "ti,omap3430-timer";
972                         reg = <0x4a318000 0x80>;
973                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
974                         ti,hwmods = "timer1";
975                         ti,timer-alwon;
976                 };
977
978                 timer2: timer@48032000 {
979                         compatible = "ti,omap3430-timer";
980                         reg = <0x48032000 0x80>;
981                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
982                         ti,hwmods = "timer2";
983                 };
984
985                 timer3: timer@48034000 {
986                         compatible = "ti,omap4430-timer";
987                         reg = <0x48034000 0x80>;
988                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
989                         ti,hwmods = "timer3";
990                 };
991
992                 timer4: timer@48036000 {
993                         compatible = "ti,omap4430-timer";
994                         reg = <0x48036000 0x80>;
995                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
996                         ti,hwmods = "timer4";
997                 };
998
999                 timer5: timer@40138000 {
1000                         compatible = "ti,omap4430-timer";
1001                         reg = <0x40138000 0x80>,
1002                               <0x49038000 0x80>;
1003                         interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
1004                         ti,hwmods = "timer5";
1005                         ti,timer-dsp;
1006                 };
1007
1008                 timer6: timer@4013a000 {
1009                         compatible = "ti,omap4430-timer";
1010                         reg = <0x4013a000 0x80>,
1011                               <0x4903a000 0x80>;
1012                         interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
1013                         ti,hwmods = "timer6";
1014                         ti,timer-dsp;
1015                 };
1016
1017                 timer7: timer@4013c000 {
1018                         compatible = "ti,omap4430-timer";
1019                         reg = <0x4013c000 0x80>,
1020                               <0x4903c000 0x80>;
1021                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
1022                         ti,hwmods = "timer7";
1023                         ti,timer-dsp;
1024                 };
1025
1026                 timer8: timer@4013e000 {
1027                         compatible = "ti,omap4430-timer";
1028                         reg = <0x4013e000 0x80>,
1029                               <0x4903e000 0x80>;
1030                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
1031                         ti,hwmods = "timer8";
1032                         ti,timer-pwm;
1033                         ti,timer-dsp;
1034                 };
1035
1036                 timer9: timer@4803e000 {
1037                         compatible = "ti,omap4430-timer";
1038                         reg = <0x4803e000 0x80>;
1039                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1040                         ti,hwmods = "timer9";
1041                         ti,timer-pwm;
1042                 };
1043
1044                 timer10: timer@48086000 {
1045                         compatible = "ti,omap3430-timer";
1046                         reg = <0x48086000 0x80>;
1047                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1048                         ti,hwmods = "timer10";
1049                         ti,timer-pwm;
1050                 };
1051
1052                 timer11: timer@48088000 {
1053                         compatible = "ti,omap4430-timer";
1054                         reg = <0x48088000 0x80>;
1055                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1056                         ti,hwmods = "timer11";
1057                         ti,timer-pwm;
1058                 };
1059
1060                 usbhstll: usbhstll@4a062000 {
1061                         compatible = "ti,usbhs-tll";
1062                         reg = <0x4a062000 0x1000>;
1063                         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
1064                         ti,hwmods = "usb_tll_hs";
1065                 };
1066
1067                 usbhshost: usbhshost@4a064000 {
1068                         compatible = "ti,usbhs-host";
1069                         reg = <0x4a064000 0x800>;
1070                         ti,hwmods = "usb_host_hs";
1071                         #address-cells = <1>;
1072                         #size-cells = <1>;
1073                         ranges;
1074                         clocks = <&init_60m_fclk>,
1075                                  <&xclk60mhsp1_ck>,
1076                                  <&xclk60mhsp2_ck>;
1077                         clock-names = "refclk_60m_int",
1078                                       "refclk_60m_ext_p1",
1079                                       "refclk_60m_ext_p2";
1080
1081                         usbhsohci: ohci@4a064800 {
1082                                 compatible = "ti,ohci-omap3";
1083                                 reg = <0x4a064800 0x400>;
1084                                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
1085                                 remote-wakeup-connected;
1086                         };
1087
1088                         usbhsehci: ehci@4a064c00 {
1089                                 compatible = "ti,ehci-omap";
1090                                 reg = <0x4a064c00 0x400>;
1091                                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1092                         };
1093                 };
1094
1095                 omap_control_usb2phy: control-phy@4a002300 {
1096                         compatible = "ti,control-phy-usb2";
1097                         reg = <0x4a002300 0x4>;
1098                         reg-names = "power";
1099                 };
1100
1101                 omap_control_usbotg: control-phy@4a00233c {
1102                         compatible = "ti,control-phy-otghs";
1103                         reg = <0x4a00233c 0x4>;
1104                         reg-names = "otghs_control";
1105                 };
1106
1107                 usb_otg_hs: usb_otg_hs@4a0ab000 {
1108                         compatible = "ti,omap4-musb";
1109                         reg = <0x4a0ab000 0x7ff>;
1110                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
1111                         interrupt-names = "mc", "dma";
1112                         ti,hwmods = "usb_otg_hs";
1113                         usb-phy = <&usb2_phy>;
1114                         phys = <&usb2_phy>;
1115                         phy-names = "usb2-phy";
1116                         multipoint = <1>;
1117                         num-eps = <16>;
1118                         ram-bits = <12>;
1119                         ctrl-module = <&omap_control_usbotg>;
1120                 };
1121
1122                 aes1: aes@4b501000 {
1123                         compatible = "ti,omap4-aes";
1124                         ti,hwmods = "aes1";
1125                         reg = <0x4b501000 0xa0>;
1126                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
1127                         dmas = <&sdma 111>, <&sdma 110>;
1128                         dma-names = "tx", "rx";
1129                 };
1130
1131                 aes2: aes@4b701000 {
1132                         compatible = "ti,omap4-aes";
1133                         ti,hwmods = "aes2";
1134                         reg = <0x4b701000 0xa0>;
1135                         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
1136                         dmas = <&sdma 114>, <&sdma 113>;
1137                         dma-names = "tx", "rx";
1138                 };
1139
1140                 des: des@480a5000 {
1141                         compatible = "ti,omap4-des";
1142                         ti,hwmods = "des";
1143                         reg = <0x480a5000 0xa0>;
1144                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
1145                         dmas = <&sdma 117>, <&sdma 116>;
1146                         dma-names = "tx", "rx";
1147                 };
1148
1149                 sham: sham@4b100000 {
1150                         compatible = "ti,omap4-sham";
1151                         ti,hwmods = "sham";
1152                         reg = <0x4b100000 0x300>;
1153                         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
1154                         dmas = <&sdma 119>;
1155                         dma-names = "rx";
1156                 };
1157
1158                 abb_mpu: regulator-abb-mpu {
1159                         compatible = "ti,abb-v2";
1160                         regulator-name = "abb_mpu";
1161                         #address-cells = <0>;
1162                         #size-cells = <0>;
1163                         ti,tranxdone-status-mask = <0x80>;
1164                         clocks = <&sys_clkin_ck>;
1165                         ti,settling-time = <50>;
1166                         ti,clock-cycles = <16>;
1167
1168                         status = "disabled";
1169                 };
1170
1171                 abb_iva: regulator-abb-iva {
1172                         compatible = "ti,abb-v2";
1173                         regulator-name = "abb_iva";
1174                         #address-cells = <0>;
1175                         #size-cells = <0>;
1176                         ti,tranxdone-status-mask = <0x80000000>;
1177                         clocks = <&sys_clkin_ck>;
1178                         ti,settling-time = <50>;
1179                         ti,clock-cycles = <16>;
1180
1181                         status = "disabled";
1182                 };
1183
1184                 target-module@56000000 {
1185                         compatible = "ti,sysc-omap4", "ti,sysc";
1186                         ti,hwmods = "gpu";
1187                         reg = <0x5601fc00 0x4>,
1188                               <0x5601fc10 0x4>;
1189                         reg-names = "rev", "sysc";
1190                         #address-cells = <1>;
1191                         #size-cells = <1>;
1192                         ranges = <0 0x56000000 0x2000000>;
1193
1194                         /*
1195                          * Closed source PowerVR driver, no child device
1196                          * binding or driver in mainline
1197                          */
1198                 };
1199
1200                 dss: dss@58000000 {
1201                         compatible = "ti,omap4-dss";
1202                         reg = <0x58000000 0x80>;
1203                         status = "disabled";
1204                         ti,hwmods = "dss_core";
1205                         clocks = <&dss_dss_clk>;
1206                         clock-names = "fck";
1207                         #address-cells = <1>;
1208                         #size-cells = <1>;
1209                         ranges;
1210
1211                         dispc@58001000 {
1212                                 compatible = "ti,omap4-dispc";
1213                                 reg = <0x58001000 0x1000>;
1214                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1215                                 ti,hwmods = "dss_dispc";
1216                                 clocks = <&dss_dss_clk>;
1217                                 clock-names = "fck";
1218                         };
1219
1220                         rfbi: encoder@58002000  {
1221                                 compatible = "ti,omap4-rfbi";
1222                                 reg = <0x58002000 0x1000>;
1223                                 status = "disabled";
1224                                 ti,hwmods = "dss_rfbi";
1225                                 clocks = <&dss_dss_clk>, <&l3_div_ck>;
1226                                 clock-names = "fck", "ick";
1227                         };
1228
1229                         venc: encoder@58003000 {
1230                                 compatible = "ti,omap4-venc";
1231                                 reg = <0x58003000 0x1000>;
1232                                 status = "disabled";
1233                                 ti,hwmods = "dss_venc";
1234                                 clocks = <&dss_tv_clk>;
1235                                 clock-names = "fck";
1236                         };
1237
1238                         dsi1: encoder@58004000 {
1239                                 compatible = "ti,omap4-dsi";
1240                                 reg = <0x58004000 0x200>,
1241                                       <0x58004200 0x40>,
1242                                       <0x58004300 0x20>;
1243                                 reg-names = "proto", "phy", "pll";
1244                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
1245                                 status = "disabled";
1246                                 ti,hwmods = "dss_dsi1";
1247                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
1248                                 clock-names = "fck", "sys_clk";
1249                         };
1250
1251                         dsi2: encoder@58005000 {
1252                                 compatible = "ti,omap4-dsi";
1253                                 reg = <0x58005000 0x200>,
1254                                       <0x58005200 0x40>,
1255                                       <0x58005300 0x20>;
1256                                 reg-names = "proto", "phy", "pll";
1257                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
1258                                 status = "disabled";
1259                                 ti,hwmods = "dss_dsi2";
1260                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
1261                                 clock-names = "fck", "sys_clk";
1262                         };
1263
1264                         hdmi: encoder@58006000 {
1265                                 compatible = "ti,omap4-hdmi";
1266                                 reg = <0x58006000 0x200>,
1267                                       <0x58006200 0x100>,
1268                                       <0x58006300 0x100>,
1269                                       <0x58006400 0x1000>;
1270                                 reg-names = "wp", "pll", "phy", "core";
1271                                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1272                                 status = "disabled";
1273                                 ti,hwmods = "dss_hdmi";
1274                                 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
1275                                 clock-names = "fck", "sys_clk";
1276                                 dmas = <&sdma 76>;
1277                                 dma-names = "audio_tx";
1278                         };
1279                 };
1280         };
1281 };
1282
1283 /include/ "omap44xx-clocks.dtsi"