arch/arm/boot/dts/omap4.dtsi

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <dt-bindings/bus/ti-sysc.h>
  10 #include <dt-bindings/clock/omap4.h>
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/pinctrl/omap.h>
  14 #include <dt-bindings/clock/omap4.h>
  15
  16 / {
  17         compatible = "ti,omap4430", "ti,omap4";
  18         interrupt-parent = <&wakeupgen>;
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         chosen { };
  22
  23         aliases {
  24                 i2c0 = &i2c1;
  25                 i2c1 = &i2c2;
  26                 i2c2 = &i2c3;
  27                 i2c3 = &i2c4;
  28                 serial0 = &uart1;
  29                 serial1 = &uart2;
  30                 serial2 = &uart3;
  31                 serial3 = &uart4;
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 cpu@0 {
  39                         compatible = "arm,cortex-a9";
  40                         device_type = "cpu";
  41                         next-level-cache = <&L2>;
  42                         reg = <0x0>;
  43
  44                         clocks = <&dpll_mpu_ck>;
  45                         clock-names = "cpu";
  46
  47                         clock-latency = <300000>; /* From omap-cpufreq driver */
  48                 };
  49                 cpu@1 {
  50                         compatible = "arm,cortex-a9";
  51                         device_type = "cpu";
  52                         next-level-cache = <&L2>;
  53                         reg = <0x1>;
  54                 };
  55         };
  56
  57         /*
  58          * Note that 4430 needs cross trigger interface (CTI) supported
  59          * before we can configure the interrupts. This means sampling
  60          * events are not supported for pmu. Note that 4460 does not use
  61          * CTI, see also 4460.dtsi.
  62          */
  63         pmu {
  64                 compatible = "arm,cortex-a9-pmu";
  65                 ti,hwmods = "debugss";
  66         };
  67
  68         gic: interrupt-controller@48241000 {
  69                 compatible = "arm,cortex-a9-gic";
  70                 interrupt-controller;
  71                 #interrupt-cells = <3>;
  72                 reg = <0x48241000 0x1000>,
  73                       <0x48240100 0x0100>;
  74                 interrupt-parent = <&gic>;
  75         };
  76
  77         L2: l2-cache-controller@48242000 {
  78                 compatible = "arm,pl310-cache";
  79                 reg = <0x48242000 0x1000>;
  80                 cache-unified;
  81                 cache-level = <2>;
  82         };
  83
  84         local-timer@48240600 {
  85                 compatible = "arm,cortex-a9-twd-timer";
  86                 clocks = <&mpu_periphclk>;
  87                 reg = <0x48240600 0x20>;
  88                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_EDGE_RISING)>;
  89                 interrupt-parent = <&gic>;
  90         };
  91
  92         wakeupgen: interrupt-controller@48281000 {
  93                 compatible = "ti,omap4-wugen-mpu";
  94                 interrupt-controller;
  95                 #interrupt-cells = <3>;
  96                 reg = <0x48281000 0x1000>;
  97                 interrupt-parent = <&gic>;
  98         };
  99
 100         /*
 101          * The soc node represents the soc top level view. It is used for IPs
 102          * that are not memory mapped in the MPU view or for the MPU itself.
 103          */
 104         soc {
 105                 compatible = "ti,omap-infra";
 106                 mpu {
 107                         compatible = "ti,omap4-mpu";
 108                         ti,hwmods = "mpu";
 109                         sram = <&ocmcram>;
 110                 };
 111
 112                 dsp {
 113                         compatible = "ti,omap3-c64";
 114                         ti,hwmods = "dsp";
 115                 };
 116
 117                 iva {
 118                         compatible = "ti,ivahd";
 119                         ti,hwmods = "iva";
 120                 };
 121         };
 122
 123         /*
 124          * XXX: Use a flat representation of the OMAP4 interconnect.
 125          * The real OMAP interconnect network is quite complex.
 126          * Since it will not bring real advantage to represent that in DT for
 127          * the moment, just use a fake OCP bus entry to represent the whole bus
 128          * hierarchy.
 129          */
 130         ocp {
 131                 compatible = "ti,omap4-l3-noc", "simple-bus";
 132                 #address-cells = <1>;
 133                 #size-cells = <1>;
 134                 ranges;
 135                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 136                 reg = <0x44000000 0x1000>,
 137                       <0x44800000 0x2000>,
 138                       <0x45000000 0x1000>;
 139                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
 140                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 141
 142                 l4_cfg: l4@4a000000 {
 143                         compatible = "ti,omap4-l4-cfg", "simple-bus";
 144                         #address-cells = <1>;
 145                         #size-cells = <1>;
 146                         ranges = <0 0x4a000000 0x1000000>;
 147
 148                         cm1: cm1@4000 {
 149                                 compatible = "ti,omap4-cm1", "simple-bus";
 150                                 reg = <0x4000 0x2000>;
 151                                 #address-cells = <1>;
 152                                 #size-cells = <1>;
 153                                 ranges = <0 0x4000 0x2000>;
 154
 155                                 cm1_clocks: clocks {
 156                                         #address-cells = <1>;
 157                                         #size-cells = <0>;
 158                                 };
 159
 160                                 cm1_clockdomains: clockdomains {
 161                                 };
 162                         };
 163
 164                         cm2: cm2@8000 {
 165                                 compatible = "ti,omap4-cm2", "simple-bus";
 166                                 reg = <0x8000 0x3000>;
 167                                 #address-cells = <1>;
 168                                 #size-cells = <1>;
 169                                 ranges = <0 0x8000 0x3000>;
 170
 171                                 cm2_clocks: clocks {
 172                                         #address-cells = <1>;
 173                                         #size-cells = <0>;
 174                                 };
 175
 176                                 cm2_clockdomains: clockdomains {
 177                                 };
 178                         };
 179
 180                         omap4_scm_core: scm@2000 {
 181                                 compatible = "ti,omap4-scm-core", "simple-bus";
 182                                 reg = <0x2000 0x1000>;
 183                                 #address-cells = <1>;
 184                                 #size-cells = <1>;
 185                                 ranges = <0 0x2000 0x1000>;
 186                                 ti,hwmods = "ctrl_module_core";
 187
 188                                 scm_conf: scm_conf@0 {
 189                                         compatible = "syscon";
 190                                         reg = <0x0 0x800>;
 191                                         #address-cells = <1>;
 192                                         #size-cells = <1>;
 193                                 };
 194                         };
 195
 196                         omap4_padconf_core: scm@100000 {
 197                                 compatible = "ti,omap4-scm-padconf-core",
 198                                              "simple-bus";
 199                                 reg = <0x100000 0x1000>;
 200                                 #address-cells = <1>;
 201                                 #size-cells = <1>;
 202                                 ranges = <0 0x100000 0x1000>;
 203                                 ti,hwmods = "ctrl_module_pad_core";
 204
 205                                 omap4_pmx_core: pinmux@40 {
 206                                         compatible = "ti,omap4-padconf",
 207                                                      "pinctrl-single";
 208                                         reg = <0x40 0x0196>;
 209                                         #address-cells = <1>;
 210                                         #size-cells = <0>;
 211                                         #pinctrl-cells = <1>;
 212                                         #interrupt-cells = <1>;
 213                                         interrupt-controller;
 214                                         pinctrl-single,register-width = <16>;
 215                                         pinctrl-single,function-mask = <0x7fff>;
 216                                 };
 217
 218                                 omap4_padconf_global: omap4_padconf_global@5a0 {
 219                                         compatible = "syscon",
 220                                                      "simple-bus";
 221                                         reg = <0x5a0 0x170>;
 222                                         #address-cells = <1>;
 223                                         #size-cells = <1>;
 224                                         ranges = <0 0x5a0 0x170>;
 225
 226                                         pbias_regulator: pbias_regulator@60 {
 227                                                 compatible = "ti,pbias-omap4", "ti,pbias-omap";
 228                                                 reg = <0x60 0x4>;
 229                                                 syscon = <&omap4_padconf_global>;
 230                                                 pbias_mmc_reg: pbias_mmc_omap4 {
 231                                                         regulator-name = "pbias_mmc_omap4";
 232                                                         regulator-min-microvolt = <1800000>;
 233                                                         regulator-max-microvolt = <3000000>;
 234                                                 };
 235                                         };
 236                                 };
 237                         };
 238
 239                         l4_wkup: l4@300000 {
 240                                 compatible = "ti,omap4-l4-wkup", "simple-bus";
 241                                 #address-cells = <1>;
 242                                 #size-cells = <1>;
 243                                 ranges = <0 0x300000 0x40000>;
 244
 245                                 counter32k: counter@4000 {
 246                                         compatible = "ti,omap-counter32k";
 247                                         reg = <0x4000 0x20>;
 248                                         ti,hwmods = "counter_32k";
 249                                 };
 250
 251                                 prm: prm@6000 {
 252                                         compatible = "ti,omap4-prm";
 253                                         reg = <0x6000 0x3000>;
 254                                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 255                                         #address-cells = <1>;
 256                                         #size-cells = <1>;
 257                                         ranges = <0 0x6000 0x3000>;
 258
 259                                         prm_clocks: clocks {
 260                                                 #address-cells = <1>;
 261                                                 #size-cells = <0>;
 262                                         };
 263
 264                                         prm_clockdomains: clockdomains {
 265                                         };
 266                                 };
 267
 268                                 scrm: scrm@a000 {
 269                                         compatible = "ti,omap4-scrm";
 270                                         reg = <0xa000 0x2000>;
 271
 272                                         scrm_clocks: clocks {
 273                                                 #address-cells = <1>;
 274                                                 #size-cells = <0>;
 275                                         };
 276
 277                                         scrm_clockdomains: clockdomains {
 278                                         };
 279                                 };
 280
 281                                 omap4_scm_wkup: scm@c000 {
 282                                         compatible = "ti,omap4-scm-wkup";
 283                                         reg = <0xc000 0x1000>;
 284                                         ti,hwmods = "ctrl_module_wkup";
 285                                 };
 286
 287                                 omap4_padconf_wkup: padconf@1e000 {
 288                                         compatible = "ti,omap4-scm-padconf-wkup",
 289                                                      "simple-bus";
 290                                         reg = <0x1e000 0x1000>;
 291                                         #address-cells = <1>;
 292                                         #size-cells = <1>;
 293                                         ranges = <0 0x1e000 0x1000>;
 294                                         ti,hwmods = "ctrl_module_pad_wkup";
 295
 296                                         omap4_pmx_wkup: pinmux@40 {
 297                                                 compatible = "ti,omap4-padconf",
 298                                                              "pinctrl-single";
 299                                                 reg = <0x40 0x0038>;
 300                                                 #address-cells = <1>;
 301                                                 #size-cells = <0>;
 302                                                 #pinctrl-cells = <1>;
 303                                                 #interrupt-cells = <1>;
 304                                                 interrupt-controller;
 305                                                 pinctrl-single,register-width = <16>;
 306                                                 pinctrl-single,function-mask = <0x7fff>;
 307                                         };
 308                                 };
 309                         };
 310                 };
 311
 312                 ocmcram: ocmcram@40304000 {
 313                         compatible = "mmio-sram";
 314                         reg = <0x40304000 0xa000>; /* 40k */
 315                 };
 316
 317                 sdma: dma-controller@4a056000 {
 318                         compatible = "ti,omap4430-sdma";
 319                         reg = <0x4a056000 0x1000>;
 320                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 321                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 322                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 323                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 324                         #dma-cells = <1>;
 325                         dma-channels = <32>;
 326                         dma-requests = <127>;
 327                         ti,hwmods = "dma_system";
 328                 };
 329
 330                 gpio1: gpio@4a310000 {
 331                         compatible = "ti,omap4-gpio";
 332                         reg = <0x4a310000 0x200>;
 333                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 334                         ti,hwmods = "gpio1";
 335                         ti,gpio-always-on;
 336                         gpio-controller;
 337                         #gpio-cells = <2>;
 338                         interrupt-controller;
 339                         #interrupt-cells = <2>;
 340                 };
 341
 342                 gpio2: gpio@48055000 {
 343                         compatible = "ti,omap4-gpio";
 344                         reg = <0x48055000 0x200>;
 345                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 346                         ti,hwmods = "gpio2";
 347                         gpio-controller;
 348                         #gpio-cells = <2>;
 349                         interrupt-controller;
 350                         #interrupt-cells = <2>;
 351                 };
 352
 353                 gpio3: gpio@48057000 {
 354                         compatible = "ti,omap4-gpio";
 355                         reg = <0x48057000 0x200>;
 356                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 357                         ti,hwmods = "gpio3";
 358                         gpio-controller;
 359                         #gpio-cells = <2>;
 360                         interrupt-controller;
 361                         #interrupt-cells = <2>;
 362                 };
 363
 364                 gpio4: gpio@48059000 {
 365                         compatible = "ti,omap4-gpio";
 366                         reg = <0x48059000 0x200>;
 367                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 368                         ti,hwmods = "gpio4";
 369                         gpio-controller;
 370                         #gpio-cells = <2>;
 371                         interrupt-controller;
 372                         #interrupt-cells = <2>;
 373                 };
 374
 375                 gpio5: gpio@4805b000 {
 376                         compatible = "ti,omap4-gpio";
 377                         reg = <0x4805b000 0x200>;
 378                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 379                         ti,hwmods = "gpio5";
 380                         gpio-controller;
 381                         #gpio-cells = <2>;
 382                         interrupt-controller;
 383                         #interrupt-cells = <2>;
 384                 };
 385
 386                 gpio6: gpio@4805d000 {
 387                         compatible = "ti,omap4-gpio";
 388                         reg = <0x4805d000 0x200>;
 389                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 390                         ti,hwmods = "gpio6";
 391                         gpio-controller;
 392                         #gpio-cells = <2>;
 393                         interrupt-controller;
 394                         #interrupt-cells = <2>;
 395                 };
 396
 397                 target-module@48076000 {
 398                         compatible = "ti,sysc-omap4", "ti,sysc";
 399                         ti,hwmods = "slimbus2";
 400                         reg = <0x48076000 0x4>,
 401                               <0x48076010 0x4>;
 402                         reg-names = "rev", "sysc";
 403                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 404                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 405                                         <SYSC_IDLE_NO>,
 406                                         <SYSC_IDLE_SMART>,
 407                                         <SYSC_IDLE_SMART_WKUP>;
 408                         clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
 409                         clock-names = "fck";
 410                         #address-cells = <1>;
 411                         #size-cells = <1>;
 412                         ranges = <0 0x48076000 0x001000>;
 413
 414                         /* No child device binding or driver in mainline */
 415                 };
 416
 417                 elm: elm@48078000 {
 418                         compatible = "ti,am3352-elm";
 419                         reg = <0x48078000 0x2000>;
 420                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 421                         ti,hwmods = "elm";
 422                         status = "disabled";
 423                 };
 424
 425                 gpmc: gpmc@50000000 {
 426                         compatible = "ti,omap4430-gpmc";
 427                         reg = <0x50000000 0x1000>;
 428                         #address-cells = <2>;
 429                         #size-cells = <1>;
 430                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 431                         dmas = <&sdma 4>;
 432                         dma-names = "rxtx";
 433                         gpmc,num-cs = <8>;
 434                         gpmc,num-waitpins = <4>;
 435                         ti,hwmods = "gpmc";
 436                         ti,no-idle-on-init;
 437                         clocks = <&l3_div_ck>;
 438                         clock-names = "fck";
 439                         interrupt-controller;
 440                         #interrupt-cells = <2>;
 441                         gpio-controller;
 442                         #gpio-cells = <2>;
 443                 };
 444
 445                 uart1: serial@4806a000 {
 446                         compatible = "ti,omap4-uart";
 447                         reg = <0x4806a000 0x100>;
 448                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 449                         ti,hwmods = "uart1";
 450                         clock-frequency = <48000000>;
 451                 };
 452
 453                 uart2: serial@4806c000 {
 454                         compatible = "ti,omap4-uart";
 455                         reg = <0x4806c000 0x100>;
 456                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 457                         ti,hwmods = "uart2";
 458                         clock-frequency = <48000000>;
 459                 };
 460
 461                 uart3: serial@48020000 {
 462                         compatible = "ti,omap4-uart";
 463                         reg = <0x48020000 0x100>;
 464                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 465                         ti,hwmods = "uart3";
 466                         clock-frequency = <48000000>;
 467                 };
 468
 469                 uart4: serial@4806e000 {
 470                         compatible = "ti,omap4-uart";
 471                         reg = <0x4806e000 0x100>;
 472                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 473                         ti,hwmods = "uart4";
 474                         clock-frequency = <48000000>;
 475                 };
 476
 477                 target-module@4a0db000 {
 478                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 479                         ti,hwmods = "smartreflex_iva";
 480                         reg = <0x4a0db038 0x4>;
 481                         reg-names = "sysc";
 482                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 483                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 484                                         <SYSC_IDLE_NO>,
 485                                         <SYSC_IDLE_SMART>,
 486                                         <SYSC_IDLE_SMART_WKUP>;
 487                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
 488                         clock-names = "fck";
 489                         #address-cells = <1>;
 490                         #size-cells = <1>;
 491                         ranges = <0 0x4a0db000 0x001000>;
 492
 493                         smartreflex_iva: smartreflex@0 {
 494                                 compatible = "ti,omap4-smartreflex-iva";
 495                                 reg = <0 0x80>;
 496                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 497                         };
 498                 };
 499
 500                 target-module@4a0dd000 {
 501                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 502                         ti,hwmods = "smartreflex_core";
 503                         reg = <0x4a0dd038 0x4>;
 504                         reg-names = "sysc";
 505                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 506                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 507                                         <SYSC_IDLE_NO>,
 508                                         <SYSC_IDLE_SMART>,
 509                                         <SYSC_IDLE_SMART_WKUP>;
 510                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
 511                         clock-names = "fck";
 512                         #address-cells = <1>;
 513                         #size-cells = <1>;
 514                         ranges = <0 0x4a0dd000 0x001000>;
 515
 516                         smartreflex_core: smartreflex@0 {
 517                                 compatible = "ti,omap4-smartreflex-core";
 518                                 reg = <0 0x80>;
 519                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 520                         };
 521                 };
 522
 523                 target-module@4a0d9000 {
 524                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 525                         ti,hwmods = "smartreflex_mpu";
 526                         reg = <0x4a0d9038 0x4>;
 527                         reg-names = "sysc";
 528                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 529                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 530                                         <SYSC_IDLE_NO>,
 531                                         <SYSC_IDLE_SMART>,
 532                                         <SYSC_IDLE_SMART_WKUP>;
 533                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
 534                         clock-names = "fck";
 535                         #address-cells = <1>;
 536                         #size-cells = <1>;
 537                         ranges = <0 0x4a0d9000 0x001000>;
 538
 539                         smartreflex_mpu: smartreflex@0 {
 540                                 compatible = "ti,omap4-smartreflex-mpu";
 541                                 reg = <0 0x80>;
 542                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 543                         };
 544                 };
 545
 546                 hwspinlock: spinlock@4a0f6000 {
 547                         compatible = "ti,omap4-hwspinlock";
 548                         reg = <0x4a0f6000 0x1000>;
 549                         ti,hwmods = "spinlock";
 550                         #hwlock-cells = <1>;
 551                 };
 552
 553                 i2c1: i2c@48070000 {
 554                         compatible = "ti,omap4-i2c";
 555                         reg = <0x48070000 0x100>;
 556                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 557                         #address-cells = <1>;
 558                         #size-cells = <0>;
 559                         ti,hwmods = "i2c1";
 560                 };
 561
 562                 i2c2: i2c@48072000 {
 563                         compatible = "ti,omap4-i2c";
 564                         reg = <0x48072000 0x100>;
 565                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 566                         #address-cells = <1>;
 567                         #size-cells = <0>;
 568                         ti,hwmods = "i2c2";
 569                 };
 570
 571                 i2c3: i2c@48060000 {
 572                         compatible = "ti,omap4-i2c";
 573                         reg = <0x48060000 0x100>;
 574                         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 575                         #address-cells = <1>;
 576                         #size-cells = <0>;
 577                         ti,hwmods = "i2c3";
 578                 };
 579
 580                 i2c4: i2c@48350000 {
 581                         compatible = "ti,omap4-i2c";
 582                         reg = <0x48350000 0x100>;
 583                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 584                         #address-cells = <1>;
 585                         #size-cells = <0>;
 586                         ti,hwmods = "i2c4";
 587                 };
 588
 589                 mcspi1: spi@48098000 {
 590                         compatible = "ti,omap4-mcspi";
 591                         reg = <0x48098000 0x200>;
 592                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 593                         #address-cells = <1>;
 594                         #size-cells = <0>;
 595                         ti,hwmods = "mcspi1";
 596                         ti,spi-num-cs = <4>;
 597                         dmas = <&sdma 35>,
 598                                <&sdma 36>,
 599                                <&sdma 37>,
 600                                <&sdma 38>,
 601                                <&sdma 39>,
 602                                <&sdma 40>,
 603                                <&sdma 41>,
 604                                <&sdma 42>;
 605                         dma-names = "tx0", "rx0", "tx1", "rx1",
 606                                     "tx2", "rx2", "tx3", "rx3";
 607                 };
 608
 609                 mcspi2: spi@4809a000 {
 610                         compatible = "ti,omap4-mcspi";
 611                         reg = <0x4809a000 0x200>;
 612                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 613                         #address-cells = <1>;
 614                         #size-cells = <0>;
 615                         ti,hwmods = "mcspi2";
 616                         ti,spi-num-cs = <2>;
 617                         dmas = <&sdma 43>,
 618                                <&sdma 44>,
 619                                <&sdma 45>,
 620                                <&sdma 46>;
 621                         dma-names = "tx0", "rx0", "tx1", "rx1";
 622                 };
 623
 624                 hdqw1w: 1w@480b2000 {
 625                         compatible = "ti,omap3-1w";
 626                         reg = <0x480b2000 0x1000>;
 627                         interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 628                         ti,hwmods = "hdq1w";
 629                 };
 630
 631                 mcspi3: spi@480b8000 {
 632                         compatible = "ti,omap4-mcspi";
 633                         reg = <0x480b8000 0x200>;
 634                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 635                         #address-cells = <1>;
 636                         #size-cells = <0>;
 637                         ti,hwmods = "mcspi3";
 638                         ti,spi-num-cs = <2>;
 639                         dmas = <&sdma 15>, <&sdma 16>;
 640                         dma-names = "tx0", "rx0";
 641                 };
 642
 643                 mcspi4: spi@480ba000 {
 644                         compatible = "ti,omap4-mcspi";
 645                         reg = <0x480ba000 0x200>;
 646                         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 647                         #address-cells = <1>;
 648                         #size-cells = <0>;
 649                         ti,hwmods = "mcspi4";
 650                         ti,spi-num-cs = <1>;
 651                         dmas = <&sdma 70>, <&sdma 71>;
 652                         dma-names = "tx0", "rx0";
 653                 };
 654
 655                 mmc1: mmc@4809c000 {
 656                         compatible = "ti,omap4-hsmmc";
 657                         reg = <0x4809c000 0x400>;
 658                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 659                         ti,hwmods = "mmc1";
 660                         ti,dual-volt;
 661                         ti,needs-special-reset;
 662                         dmas = <&sdma 61>, <&sdma 62>;
 663                         dma-names = "tx", "rx";
 664                         pbias-supply = <&pbias_mmc_reg>;
 665                 };
 666
 667                 mmc2: mmc@480b4000 {
 668                         compatible = "ti,omap4-hsmmc";
 669                         reg = <0x480b4000 0x400>;
 670                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 671                         ti,hwmods = "mmc2";
 672                         ti,needs-special-reset;
 673                         dmas = <&sdma 47>, <&sdma 48>;
 674                         dma-names = "tx", "rx";
 675                 };
 676
 677                 mmc3: mmc@480ad000 {
 678                         compatible = "ti,omap4-hsmmc";
 679                         reg = <0x480ad000 0x400>;
 680                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 681                         ti,hwmods = "mmc3";
 682                         ti,needs-special-reset;
 683                         dmas = <&sdma 77>, <&sdma 78>;
 684                         dma-names = "tx", "rx";
 685                 };
 686
 687                 mmc4: mmc@480d1000 {
 688                         compatible = "ti,omap4-hsmmc";
 689                         reg = <0x480d1000 0x400>;
 690                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 691                         ti,hwmods = "mmc4";
 692                         ti,needs-special-reset;
 693                         dmas = <&sdma 57>, <&sdma 58>;
 694                         dma-names = "tx", "rx";
 695                 };
 696
 697                 mmc5: mmc@480d5000 {
 698                         compatible = "ti,omap4-hsmmc";
 699                         reg = <0x480d5000 0x400>;
 700                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 701                         ti,hwmods = "mmc5";
 702                         ti,needs-special-reset;
 703                         dmas = <&sdma 59>, <&sdma 60>;
 704                         dma-names = "tx", "rx";
 705                 };
 706
 707                 hsi: hsi@4a058000 {
 708                         compatible = "ti,omap4-hsi";
 709                         reg = <0x4a058000 0x4000>,
 710                               <0x4a05c000 0x1000>;
 711                         reg-names = "sys", "gdd";
 712                         ti,hwmods = "hsi";
 713
 714                         clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 715                         clock-names = "hsi_fck";
 716
 717                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 718                         interrupt-names = "gdd_mpu";
 719
 720                         #address-cells = <1>;
 721                         #size-cells = <1>;
 722                         ranges = <0 0x4a058000 0x4000>;
 723
 724                         hsi_port1: hsi-port@2000 {
 725                                 compatible = "ti,omap4-hsi-port";
 726                                 reg = <0x2000 0x800>,
 727                                       <0x2800 0x800>;
 728                                 reg-names = "tx", "rx";
 729                                 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 730                         };
 731
 732                         hsi_port2: hsi-port@3000 {
 733                                 compatible = "ti,omap4-hsi-port";
 734                                 reg = <0x3000 0x800>,
 735                                       <0x3800 0x800>;
 736                                 reg-names = "tx", "rx";
 737                                 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 738                         };
 739                 };
 740
 741                 mmu_dsp: mmu@4a066000 {
 742                         compatible = "ti,omap4-iommu";
 743                         reg = <0x4a066000 0x100>;
 744                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 745                         ti,hwmods = "mmu_dsp";
 746                         #iommu-cells = <0>;
 747                 };
 748
 749                 target-module@52000000 {
 750                         compatible = "ti,sysc-omap4", "ti,sysc";
 751                         ti,hwmods = "iss";
 752                         reg = <0x52000000 0x4>,
 753                               <0x52000010 0x4>;
 754                         reg-names = "rev", "sysc";
 755                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 756                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 757                                         <SYSC_IDLE_NO>,
 758                                         <SYSC_IDLE_SMART>,
 759                                         <SYSC_IDLE_SMART_WKUP>;
 760                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 761                                         <SYSC_IDLE_NO>,
 762                                         <SYSC_IDLE_SMART>,
 763                                         <SYSC_IDLE_SMART_WKUP>;
 764                         ti,sysc-delay-us = <2>;
 765                         clocks = <&iss_clkctrl OMAP4_ISS_CLKCTRL 0>;
 766                         clock-names = "fck";
 767                         #address-cells = <1>;
 768                         #size-cells = <1>;
 769                         ranges = <0 0x52000000 0x1000000>;
 770
 771                         /* No child device binding, driver in staging */
 772                 };
 773
 774                 mmu_ipu: mmu@55082000 {
 775                         compatible = "ti,omap4-iommu";
 776                         reg = <0x55082000 0x100>;
 777                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 778                         ti,hwmods = "mmu_ipu";
 779                         #iommu-cells = <0>;
 780                         ti,iommu-bus-err-back;
 781                 };
 782
 783                 wdt2: wdt@4a314000 {
 784                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 785                         reg = <0x4a314000 0x80>;
 786                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 787                         ti,hwmods = "wd_timer2";
 788                 };
 789
 790                 wdt3: wdt@40130000 {
 791                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 792                         reg = <0x40130000 0x80>, /* MPU private access */
 793                               <0x49030000 0x80>; /* L3 Interconnect */
 794                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 795                         ti,hwmods = "wd_timer3";
 796                 };
 797
 798                 mcpdm: mcpdm@40132000 {
 799                         compatible = "ti,omap4-mcpdm";
 800                         reg = <0x40132000 0x7f>, /* MPU private access */
 801                               <0x49032000 0x7f>; /* L3 Interconnect */
 802                         reg-names = "mpu", "dma";
 803                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 804                         ti,hwmods = "mcpdm";
 805                         dmas = <&sdma 65>,
 806                                <&sdma 66>;
 807                         dma-names = "up_link", "dn_link";
 808                         status = "disabled";
 809                 };
 810
 811                 dmic: dmic@4012e000 {
 812                         compatible = "ti,omap4-dmic";
 813                         reg = <0x4012e000 0x7f>, /* MPU private access */
 814                               <0x4902e000 0x7f>; /* L3 Interconnect */
 815                         reg-names = "mpu", "dma";
 816                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 817                         ti,hwmods = "dmic";
 818                         dmas = <&sdma 67>;
 819                         dma-names = "up_link";
 820                         status = "disabled";
 821                 };
 822
 823                 mcbsp1: mcbsp@40122000 {
 824                         compatible = "ti,omap4-mcbsp";
 825                         reg = <0x40122000 0xff>, /* MPU private access */
 826                               <0x49022000 0xff>; /* L3 Interconnect */
 827                         reg-names = "mpu", "dma";
 828                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 829                         interrupt-names = "common";
 830                         ti,buffer-size = <128>;
 831                         ti,hwmods = "mcbsp1";
 832                         dmas = <&sdma 33>,
 833                                <&sdma 34>;
 834                         dma-names = "tx", "rx";
 835                         status = "disabled";
 836                 };
 837
 838                 mcbsp2: mcbsp@40124000 {
 839                         compatible = "ti,omap4-mcbsp";
 840                         reg = <0x40124000 0xff>, /* MPU private access */
 841                               <0x49024000 0xff>; /* L3 Interconnect */
 842                         reg-names = "mpu", "dma";
 843                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 844                         interrupt-names = "common";
 845                         ti,buffer-size = <128>;
 846                         ti,hwmods = "mcbsp2";
 847                         dmas = <&sdma 17>,
 848                                <&sdma 18>;
 849                         dma-names = "tx", "rx";
 850                         status = "disabled";
 851                 };
 852
 853                 mcbsp3: mcbsp@40126000 {
 854                         compatible = "ti,omap4-mcbsp";
 855                         reg = <0x40126000 0xff>, /* MPU private access */
 856                               <0x49026000 0xff>; /* L3 Interconnect */
 857                         reg-names = "mpu", "dma";
 858                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 859                         interrupt-names = "common";
 860                         ti,buffer-size = <128>;
 861                         ti,hwmods = "mcbsp3";
 862                         dmas = <&sdma 19>,
 863                                <&sdma 20>;
 864                         dma-names = "tx", "rx";
 865                         status = "disabled";
 866                 };
 867
 868                 target-module@40128000 {
 869                         compatible = "ti,sysc-mcasp", "ti,sysc";
 870                         ti,hwmods = "mcasp";
 871                         reg = <0x40128000 0x4>,
 872                               <0x40128004 0x4>;
 873                         reg-names = "rev", "sysc";
 874                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 875                                         <SYSC_IDLE_NO>,
 876                                         <SYSC_IDLE_SMART>,
 877                                         <SYSC_IDLE_SMART_WKUP>;
 878                         clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>;
 879                         clock-names = "fck";
 880                         #address-cells = <1>;
 881                         #size-cells = <1>;
 882                         ranges = <0x00000000 0x40128000 0x1000>, /* MPU */
 883                                  <0x49028000 0x49028000 0x1000>; /* L3 */
 884
 885                         /*
 886                          * Child device unsupported by davinci-mcasp. At least
 887                          * RX path is disabled for omap4, and only DIT mode
 888                          * works with no I2S. See also old Android kernel
 889                          * omap-mcasp driver for more information.
 890                          */
 891                 };
 892
 893                 target-module@4012c000 {
 894                         compatible = "ti,sysc-omap4", "ti,sysc";
 895                         ti,hwmods = "slimbus1";
 896                         reg = <0x4012c000 0x4>,
 897                               <0x4012c010 0x4>;
 898                         reg-names = "rev", "sysc";
 899                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 900                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 901                                         <SYSC_IDLE_NO>,
 902                                         <SYSC_IDLE_SMART>,
 903                                         <SYSC_IDLE_SMART_WKUP>;
 904                         clocks = <&abe_clkctrl OMAP4_SLIMBUS1_CLKCTRL 0>;
 905                         clock-names = "fck";
 906                         #address-cells = <1>;
 907                         #size-cells = <1>;
 908                         ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
 909                                  <0x4902c000 0x4902c000 0x1000>; /* L3 */
 910
 911                         /* No child device binding or driver in mainline */
 912                 };
 913
 914                 target-module@401f1000 {
 915                         compatible = "ti,sysc-omap4", "ti,sysc";
 916                         ti,hwmods = "aess";
 917                         reg = <0x401f1000 0x4>,
 918                               <0x401f1010 0x4>;
 919                         reg-names = "rev", "sysc";
 920                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 921                                         <SYSC_IDLE_NO>,
 922                                         <SYSC_IDLE_SMART>,
 923                                         <SYSC_IDLE_SMART_WKUP>;
 924                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 925                                         <SYSC_IDLE_NO>,
 926                                         <SYSC_IDLE_SMART>;
 927                         clocks = <&abe_clkctrl OMAP4_AESS_CLKCTRL 0>;
 928                         clock-names = "fck";
 929                         #address-cells = <1>;
 930                         #size-cells = <1>;
 931                         ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */
 932                                  <0x490f1000 0x490f1000 0x1000>; /* L3 */
 933
 934                         /*
 935                          * No child device binding or driver in mainline.
 936                          * See Android tree and related upstreaming efforts
 937                          * for the old driver.
 938                          */
 939                 };
 940
 941                 mcbsp4: mcbsp@48096000 {
 942                         compatible = "ti,omap4-mcbsp";
 943                         reg = <0x48096000 0xff>; /* L4 Interconnect */
 944                         reg-names = "mpu";
 945                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 946                         interrupt-names = "common";
 947                         ti,buffer-size = <128>;
 948                         ti,hwmods = "mcbsp4";
 949                         dmas = <&sdma 31>,
 950                                <&sdma 32>;
 951                         dma-names = "tx", "rx";
 952                         status = "disabled";
 953                 };
 954
 955                 keypad: keypad@4a31c000 {
 956                         compatible = "ti,omap4-keypad";
 957                         reg = <0x4a31c000 0x80>;
 958                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 959                         reg-names = "mpu";
 960                         ti,hwmods = "kbd";
 961                 };
 962
 963                 dmm@4e000000 {
 964                         compatible = "ti,omap4-dmm";
 965                         reg = <0x4e000000 0x800>;
 966                         interrupts = <0 113 0x4>;
 967                         ti,hwmods = "dmm";
 968                 };
 969
 970                 emif1: emif@4c000000 {
 971                         compatible = "ti,emif-4d";
 972                         reg = <0x4c000000 0x100>;
 973                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 974                         ti,hwmods = "emif1";
 975                         ti,no-idle-on-init;
 976                         phy-type = <1>;
 977                         hw-caps-read-idle-ctrl;
 978                         hw-caps-ll-interface;
 979                         hw-caps-temp-alert;
 980                 };
 981
 982                 emif2: emif@4d000000 {
 983                         compatible = "ti,emif-4d";
 984                         reg = <0x4d000000 0x100>;
 985                         interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 986                         ti,hwmods = "emif2";
 987                         ti,no-idle-on-init;
 988                         phy-type = <1>;
 989                         hw-caps-read-idle-ctrl;
 990                         hw-caps-ll-interface;
 991                         hw-caps-temp-alert;
 992                 };
 993
 994                 ocp2scp@4a0ad000 {
 995                         compatible = "ti,omap-ocp2scp";
 996                         reg = <0x4a0ad000 0x1f>;
 997                         #address-cells = <1>;
 998                         #size-cells = <1>;
 999                         ranges;
1000                         ti,hwmods = "ocp2scp_usb_phy";
1001                         usb2_phy: usb2phy@4a0ad080 {
1002                                 compatible = "ti,omap-usb2";
1003                                 reg = <0x4a0ad080 0x58>;
1004                                 ctrl-module = <&omap_control_usb2phy>;
1005                                 clocks = <&usb_phy_cm_clk32k>;
1006                                 clock-names = "wkupclk";
1007                                 #phy-cells = <0>;
1008                         };
1009                 };
1010
1011                 mailbox: mailbox@4a0f4000 {
1012                         compatible = "ti,omap4-mailbox";
1013                         reg = <0x4a0f4000 0x200>;
1014                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1015                         ti,hwmods = "mailbox";
1016                         #mbox-cells = <1>;
1017                         ti,mbox-num-users = <3>;
1018                         ti,mbox-num-fifos = <8>;
1019                         mbox_ipu: mbox_ipu {
1020                                 ti,mbox-tx = <0 0 0>;
1021                                 ti,mbox-rx = <1 0 0>;
1022                         };
1023                         mbox_dsp: mbox_dsp {
1024                                 ti,mbox-tx = <3 0 0>;
1025                                 ti,mbox-rx = <2 0 0>;
1026                         };
1027                 };
1028
1029                 target-module@4a10a000 {
1030                         compatible = "ti,sysc-omap4", "ti,sysc";
1031                         ti,hwmods = "fdif";
1032                         reg = <0x4a10a000 0x4>,
1033                               <0x4a10a010 0x4>;
1034                         reg-names = "rev", "sysc";
1035                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1036                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1037                                         <SYSC_IDLE_NO>,
1038                                         <SYSC_IDLE_SMART>;
1039                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1040                                         <SYSC_IDLE_NO>,
1041                                         <SYSC_IDLE_SMART>;
1042                         ti,sysc-delay-us = <2>;
1043                         clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
1044                         clock-names = "fck";
1045                         #address-cells = <1>;
1046                         #size-cells = <1>;
1047                         ranges = <0 0x4a10a000 0x1000>;
1048
1049                         /* No child device binding or driver in mainline */
1050                 };
1051
1052                 timer1: timer@4a318000 {
1053                         compatible = "ti,omap3430-timer";
1054                         reg = <0x4a318000 0x80>;
1055                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1056                         ti,hwmods = "timer1";
1057                         ti,timer-alwon;
1058                         clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
1059                         clock-names = "fck";
1060                 };
1061
1062                 timer2: timer@48032000 {
1063                         compatible = "ti,omap3430-timer";
1064                         reg = <0x48032000 0x80>;
1065                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1066                         ti,hwmods = "timer2";
1067                 };
1068
1069                 timer3: timer@48034000 {
1070                         compatible = "ti,omap4430-timer";
1071                         reg = <0x48034000 0x80>;
1072                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1073                         ti,hwmods = "timer3";
1074                 };
1075
1076                 timer4: timer@48036000 {
1077                         compatible = "ti,omap4430-timer";
1078                         reg = <0x48036000 0x80>;
1079                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1080                         ti,hwmods = "timer4";
1081                 };
1082
1083                 timer5: timer@40138000 {
1084                         compatible = "ti,omap4430-timer";
1085                         reg = <0x40138000 0x80>,
1086                               <0x49038000 0x80>;
1087                         interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
1088                         ti,hwmods = "timer5";
1089                         ti,timer-dsp;
1090                 };
1091
1092                 timer6: timer@4013a000 {
1093                         compatible = "ti,omap4430-timer";
1094                         reg = <0x4013a000 0x80>,
1095                               <0x4903a000 0x80>;
1096                         interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
1097                         ti,hwmods = "timer6";
1098                         ti,timer-dsp;
1099                 };
1100
1101                 timer7: timer@4013c000 {
1102                         compatible = "ti,omap4430-timer";
1103                         reg = <0x4013c000 0x80>,
1104                               <0x4903c000 0x80>;
1105                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
1106                         ti,hwmods = "timer7";
1107                         ti,timer-dsp;
1108                 };
1109
1110                 timer8: timer@4013e000 {
1111                         compatible = "ti,omap4430-timer";
1112                         reg = <0x4013e000 0x80>,
1113                               <0x4903e000 0x80>;
1114                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
1115                         ti,hwmods = "timer8";
1116                         ti,timer-pwm;
1117                         ti,timer-dsp;
1118                 };
1119
1120                 timer9: timer@4803e000 {
1121                         compatible = "ti,omap4430-timer";
1122                         reg = <0x4803e000 0x80>;
1123                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1124                         ti,hwmods = "timer9";
1125                         ti,timer-pwm;
1126                 };
1127
1128                 timer10: timer@48086000 {
1129                         compatible = "ti,omap3430-timer";
1130                         reg = <0x48086000 0x80>;
1131                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1132                         ti,hwmods = "timer10";
1133                         ti,timer-pwm;
1134                 };
1135
1136                 timer11: timer@48088000 {
1137                         compatible = "ti,omap4430-timer";
1138                         reg = <0x48088000 0x80>;
1139                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1140                         ti,hwmods = "timer11";
1141                         ti,timer-pwm;
1142                 };
1143
1144                 usbhstll: usbhstll@4a062000 {
1145                         compatible = "ti,usbhs-tll";
1146                         reg = <0x4a062000 0x1000>;
1147                         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
1148                         ti,hwmods = "usb_tll_hs";
1149                 };
1150
1151                 usbhshost: usbhshost@4a064000 {
1152                         compatible = "ti,usbhs-host";
1153                         reg = <0x4a064000 0x800>;
1154                         ti,hwmods = "usb_host_hs";
1155                         #address-cells = <1>;
1156                         #size-cells = <1>;
1157                         ranges;
1158                         clocks = <&init_60m_fclk>,
1159                                  <&xclk60mhsp1_ck>,
1160                                  <&xclk60mhsp2_ck>;
1161                         clock-names = "refclk_60m_int",
1162                                       "refclk_60m_ext_p1",
1163                                       "refclk_60m_ext_p2";
1164
1165                         usbhsohci: ohci@4a064800 {
1166                                 compatible = "ti,ohci-omap3";
1167                                 reg = <0x4a064800 0x400>;
1168                                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
1169                                 remote-wakeup-connected;
1170                         };
1171
1172                         usbhsehci: ehci@4a064c00 {
1173                                 compatible = "ti,ehci-omap";
1174                                 reg = <0x4a064c00 0x400>;
1175                                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1176                         };
1177                 };
1178
1179                 omap_control_usb2phy: control-phy@4a002300 {
1180                         compatible = "ti,control-phy-usb2";
1181                         reg = <0x4a002300 0x4>;
1182                         reg-names = "power";
1183                 };
1184
1185                 omap_control_usbotg: control-phy@4a00233c {
1186                         compatible = "ti,control-phy-otghs";
1187                         reg = <0x4a00233c 0x4>;
1188                         reg-names = "otghs_control";
1189                 };
1190
1191                 usb_otg_hs: usb_otg_hs@4a0ab000 {
1192                         compatible = "ti,omap4-musb";
1193                         reg = <0x4a0ab000 0x7ff>;
1194                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
1195                         interrupt-names = "mc", "dma";
1196                         ti,hwmods = "usb_otg_hs";
1197                         usb-phy = <&usb2_phy>;
1198                         phys = <&usb2_phy>;
1199                         phy-names = "usb2-phy";
1200                         multipoint = <1>;
1201                         num-eps = <16>;
1202                         ram-bits = <12>;
1203                         ctrl-module = <&omap_control_usbotg>;
1204                 };
1205
1206                 aes1: aes@4b501000 {
1207                         compatible = "ti,omap4-aes";
1208                         ti,hwmods = "aes1";
1209                         reg = <0x4b501000 0xa0>;
1210                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
1211                         dmas = <&sdma 111>, <&sdma 110>;
1212                         dma-names = "tx", "rx";
1213                 };
1214
1215                 aes2: aes@4b701000 {
1216                         compatible = "ti,omap4-aes";
1217                         ti,hwmods = "aes2";
1218                         reg = <0x4b701000 0xa0>;
1219                         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
1220                         dmas = <&sdma 114>, <&sdma 113>;
1221                         dma-names = "tx", "rx";
1222                 };
1223
1224                 des: des@480a5000 {
1225                         compatible = "ti,omap4-des";
1226                         ti,hwmods = "des";
1227                         reg = <0x480a5000 0xa0>;
1228                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
1229                         dmas = <&sdma 117>, <&sdma 116>;
1230                         dma-names = "tx", "rx";
1231                 };
1232
1233                 sham: sham@4b100000 {
1234                         compatible = "ti,omap4-sham";
1235                         ti,hwmods = "sham";
1236                         reg = <0x4b100000 0x300>;
1237                         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
1238                         dmas = <&sdma 119>;
1239                         dma-names = "rx";
1240                 };
1241
1242                 abb_mpu: regulator-abb-mpu {
1243                         compatible = "ti,abb-v2";
1244                         regulator-name = "abb_mpu";
1245                         #address-cells = <0>;
1246                         #size-cells = <0>;
1247                         ti,tranxdone-status-mask = <0x80>;
1248                         clocks = <&sys_clkin_ck>;
1249                         ti,settling-time = <50>;
1250                         ti,clock-cycles = <16>;
1251
1252                         status = "disabled";
1253                 };
1254
1255                 abb_iva: regulator-abb-iva {
1256                         compatible = "ti,abb-v2";
1257                         regulator-name = "abb_iva";
1258                         #address-cells = <0>;
1259                         #size-cells = <0>;
1260                         ti,tranxdone-status-mask = <0x80000000>;
1261                         clocks = <&sys_clkin_ck>;
1262                         ti,settling-time = <50>;
1263                         ti,clock-cycles = <16>;
1264
1265                         status = "disabled";
1266                 };
1267
1268                 target-module@56000000 {
1269                         compatible = "ti,sysc-omap4", "ti,sysc";
1270                         ti,hwmods = "gpu";
1271                         reg = <0x5601fc00 0x4>,
1272                               <0x5601fc10 0x4>;
1273                         reg-names = "rev", "sysc";
1274                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1275                                         <SYSC_IDLE_NO>,
1276                                         <SYSC_IDLE_SMART>,
1277                                         <SYSC_IDLE_SMART_WKUP>;
1278                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1279                                         <SYSC_IDLE_NO>,
1280                                         <SYSC_IDLE_SMART>,
1281                                         <SYSC_IDLE_SMART_WKUP>;
1282                         clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 0>;
1283                         clock-names = "fck";
1284                         #address-cells = <1>;
1285                         #size-cells = <1>;
1286                         ranges = <0 0x56000000 0x2000000>;
1287
1288                         /*
1289                          * Closed source PowerVR driver, no child device
1290                          * binding or driver in mainline
1291                          */
1292                 };
1293
1294                 dss: dss@58000000 {
1295                         compatible = "ti,omap4-dss";
1296                         reg = <0x58000000 0x80>;
1297                         status = "disabled";
1298                         ti,hwmods = "dss_core";
1299                         clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
1300                         clock-names = "fck";
1301                         #address-cells = <1>;
1302                         #size-cells = <1>;
1303                         ranges;
1304
1305                         dispc@58001000 {
1306                                 compatible = "ti,omap4-dispc";
1307                                 reg = <0x58001000 0x1000>;
1308                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1309                                 ti,hwmods = "dss_dispc";
1310                                 clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
1311                                 clock-names = "fck";
1312                         };
1313
1314                         rfbi: encoder@58002000  {
1315                                 compatible = "ti,omap4-rfbi";
1316                                 reg = <0x58002000 0x1000>;
1317                                 status = "disabled";
1318                                 ti,hwmods = "dss_rfbi";
1319                                 clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>, <&l3_div_ck>;
1320                                 clock-names = "fck", "ick";
1321                         };
1322
1323                         venc: encoder@58003000 {
1324                                 compatible = "ti,omap4-venc";
1325                                 reg = <0x58003000 0x1000>;
1326                                 status = "disabled";
1327                                 ti,hwmods = "dss_venc";
1328                                 clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 11>;
1329                                 clock-names = "fck";
1330                         };
1331
1332                         dsi1: encoder@58004000 {
1333                                 compatible = "ti,omap4-dsi";
1334                                 reg = <0x58004000 0x200>,
1335                                       <0x58004200 0x40>,
1336                                       <0x58004300 0x20>;
1337                                 reg-names = "proto", "phy", "pll";
1338                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
1339                                 status = "disabled";
1340                                 ti,hwmods = "dss_dsi1";
1341                                 clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
1342                                          <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
1343                                 clock-names = "fck", "sys_clk";
1344                         };
1345
1346                         dsi2: encoder@58005000 {
1347                                 compatible = "ti,omap4-dsi";
1348                                 reg = <0x58005000 0x200>,
1349                                       <0x58005200 0x40>,
1350                                       <0x58005300 0x20>;
1351                                 reg-names = "proto", "phy", "pll";
1352                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
1353                                 status = "disabled";
1354                                 ti,hwmods = "dss_dsi2";
1355                                 clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
1356                                          <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
1357                                 clock-names = "fck", "sys_clk";
1358                         };
1359
1360                         hdmi: encoder@58006000 {
1361                                 compatible = "ti,omap4-hdmi";
1362                                 reg = <0x58006000 0x200>,
1363                                       <0x58006200 0x100>,
1364                                       <0x58006300 0x100>,
1365                                       <0x58006400 0x1000>;
1366                                 reg-names = "wp", "pll", "phy", "core";
1367                                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1368                                 status = "disabled";
1369                                 ti,hwmods = "dss_hdmi";
1370                                 clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
1371                                          <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
1372                                 clock-names = "fck", "sys_clk";
1373                                 dmas = <&sdma 76>;
1374                                 dma-names = "audio_tx";
1375                         };
1376                 };
1377         };
1378 };
1379
1380 #include "omap44xx-clocks.dtsi"