arch/arm/boot/dts/omap4-l4.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 &l4_cfg {                                               /* 0x4a000000 */
   3         compatible = "ti,omap4-l4-cfg", "simple-bus";
   4         reg = <0x4a000000 0x800>,
   5               <0x4a000800 0x800>,
   6               <0x4a001000 0x1000>;
   7         reg-names = "ap", "la", "ia0";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  11                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  12                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  13                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  14                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  15                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  16                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  17
  18         segment@0 {                                     /* 0x4a000000 */
  19                 compatible = "simple-bus";
  20                 #address-cells = <1>;
  21                 #size-cells = <1>;
  22                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  23                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  24                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  25                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  26                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  27                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  28                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  29                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  30                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  31                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  32                          <0x00058000 0x00058000 0x004000>,      /* ap 10 */
  33                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  34                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  35                          <0x00008000 0x00008000 0x002000>,      /* ap 23 */
  36                          <0x0000a000 0x0000a000 0x001000>,      /* ap 24 */
  37                          <0x00066000 0x00066000 0x001000>,      /* ap 25 */
  38                          <0x00067000 0x00067000 0x001000>,      /* ap 26 */
  39                          <0x0005e000 0x0005e000 0x002000>,      /* ap 80 */
  40                          <0x00060000 0x00060000 0x001000>,      /* ap 81 */
  41                          <0x00064000 0x00064000 0x001000>,      /* ap 86 */
  42                          <0x00065000 0x00065000 0x001000>;      /* ap 87 */
  43
  44                 target-module@2000 {                    /* 0x4a002000, ap 3 06.0 */
  45                         compatible = "ti,sysc-omap4", "ti,sysc";
  46                         ti,hwmods = "ctrl_module_core";
  47                         reg = <0x2000 0x4>,
  48                               <0x2010 0x4>;
  49                         reg-names = "rev", "sysc";
  50                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
  51                                         <SYSC_IDLE_NO>,
  52                                         <SYSC_IDLE_SMART>,
  53                                         <SYSC_IDLE_SMART_WKUP>;
  54                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         ranges = <0x0 0x2000 0x1000>;
  58
  59                         omap4_scm_core: scm@0 {
  60                                 compatible = "ti,omap4-scm-core", "simple-bus";
  61                                 reg = <0x0 0x1000>;
  62                                 #address-cells = <1>;
  63                                 #size-cells = <1>;
  64                                 ranges = <0 0 0x1000>;
  65
  66                                 scm_conf: scm_conf@0 {
  67                                         compatible = "syscon";
  68                                         reg = <0x0 0x800>;
  69                                         #address-cells = <1>;
  70                                         #size-cells = <1>;
  71                                 };
  72
  73                                 omap_control_usb2phy: control-phy@300 {
  74                                         compatible = "ti,control-phy-usb2";
  75                                         reg = <0x300 0x4>;
  76                                         reg-names = "power";
  77                                 };
  78
  79                                 omap_control_usbotg: control-phy@33c {
  80                                         compatible = "ti,control-phy-otghs";
  81                                         reg = <0x33c 0x4>;
  82                                         reg-names = "otghs_control";
  83                                 };
  84                         };
  85                 };
  86
  87                 target-module@4000 {                    /* 0x4a004000, ap 5 02.0 */
  88                         compatible = "ti,sysc-omap4", "ti,sysc";
  89                         reg = <0x4000 0x4>;
  90                         reg-names = "rev";
  91                         #address-cells = <1>;
  92                         #size-cells = <1>;
  93                         ranges = <0x0 0x4000 0x1000>;
  94
  95                         cm1: cm1@0 {
  96                                 compatible = "ti,omap4-cm1", "simple-bus";
  97                                 reg = <0x0 0x2000>;
  98                                 #address-cells = <1>;
  99                                 #size-cells = <1>;
 100                                 ranges = <0 0 0x2000>;
 101
 102                                 cm1_clocks: clocks {
 103                                         #address-cells = <1>;
 104                                         #size-cells = <0>;
 105                                 };
 106
 107                                 cm1_clockdomains: clockdomains {
 108                                 };
 109                         };
 110                 };
 111
 112                 target-module@8000 {                    /* 0x4a008000, ap 23 32.0 */
 113                         compatible = "ti,sysc-omap4", "ti,sysc";
 114                         reg = <0x8000 0x4>;
 115                         reg-names = "rev";
 116                         #address-cells = <1>;
 117                         #size-cells = <1>;
 118                         ranges = <0x0 0x8000 0x2000>;
 119
 120                         cm2: cm2@0 {
 121                                 compatible = "ti,omap4-cm2", "simple-bus";
 122                                 reg = <0x0 0x2000>;
 123                                 #address-cells = <1>;
 124                                 #size-cells = <1>;
 125                                 ranges = <0 0 0x2000>;
 126
 127                                 cm2_clocks: clocks {
 128                                         #address-cells = <1>;
 129                                         #size-cells = <0>;
 130                                 };
 131
 132                                 cm2_clockdomains: clockdomains {
 133                                 };
 134                         };
 135                 };
 136
 137                 target-module@56000 {                   /* 0x4a056000, ap 7 0a.0 */
 138                         compatible = "ti,sysc-omap2", "ti,sysc";
 139                         ti,hwmods = "dma_system";
 140                         reg = <0x56000 0x4>,
 141                               <0x5602c 0x4>,
 142                               <0x56028 0x4>;
 143                         reg-names = "rev", "sysc", "syss";
 144                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 145                                          SYSC_OMAP2_EMUFREE |
 146                                          SYSC_OMAP2_SOFTRESET |
 147                                          SYSC_OMAP2_AUTOIDLE)>;
 148                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 149                                         <SYSC_IDLE_NO>,
 150                                         <SYSC_IDLE_SMART>;
 151                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 152                                         <SYSC_IDLE_NO>,
 153                                         <SYSC_IDLE_SMART>;
 154                         ti,syss-mask = <1>;
 155                         /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */
 156                         clocks = <&l3_dma_clkctrl OMAP4_DMA_SYSTEM_CLKCTRL 0>;
 157                         clock-names = "fck";
 158                         #address-cells = <1>;
 159                         #size-cells = <1>;
 160                         ranges = <0x0 0x56000 0x1000>;
 161
 162                         sdma: dma-controller@0 {
 163                                 compatible = "ti,omap4430-sdma";
 164                                 reg = <0x0 0x1000>;
 165                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 166                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 167                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 168                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 169                                 #dma-cells = <1>;
 170                                 dma-channels = <32>;
 171                                 dma-requests = <127>;
 172                         };
 173                 };
 174
 175                 target-module@58000 {                   /* 0x4a058000, ap 10 0e.0 */
 176                         compatible = "ti,sysc-omap2", "ti,sysc";
 177                         ti,hwmods = "hsi";
 178                         reg = <0x58000 0x4>,
 179                               <0x58010 0x4>,
 180                               <0x58014 0x4>;
 181                         reg-names = "rev", "sysc", "syss";
 182                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 183                                          SYSC_OMAP2_SOFTRESET |
 184                                          SYSC_OMAP2_AUTOIDLE)>;
 185                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 186                                         <SYSC_IDLE_NO>,
 187                                         <SYSC_IDLE_SMART>,
 188                                         <SYSC_IDLE_SMART_WKUP>;
 189                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 190                                         <SYSC_IDLE_NO>,
 191                                         <SYSC_IDLE_SMART>,
 192                                         <SYSC_IDLE_SMART_WKUP>;
 193                         ti,syss-mask = <1>;
 194                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 195                         clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 196                         clock-names = "fck";
 197                         #address-cells = <1>;
 198                         #size-cells = <1>;
 199                         ranges = <0x0 0x58000 0x5000>;
 200
 201                         hsi: hsi@0 {
 202                                 compatible = "ti,omap4-hsi";
 203                                 reg = <0x0 0x4000>,
 204                                       <0x5000 0x1000>;
 205                                 reg-names = "sys", "gdd";
 206
 207                                 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 208                                 clock-names = "hsi_fck";
 209
 210                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 211                                 interrupt-names = "gdd_mpu";
 212
 213                                 #address-cells = <1>;
 214                                 #size-cells = <1>;
 215                                 ranges = <0 0 0x4000>;
 216
 217                                 hsi_port1: hsi-port@2000 {
 218                                         compatible = "ti,omap4-hsi-port";
 219                                         reg = <0x2000 0x800>,
 220                                               <0x2800 0x800>;
 221                                         reg-names = "tx", "rx";
 222                                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 223                                 };
 224
 225                                 hsi_port2: hsi-port@3000 {
 226                                         compatible = "ti,omap4-hsi-port";
 227                                         reg = <0x3000 0x800>,
 228                                               <0x3800 0x800>;
 229                                         reg-names = "tx", "rx";
 230                                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 231                                 };
 232                         };
 233                 };
 234
 235                 target-module@5e000 {                   /* 0x4a05e000, ap 80 68.0 */
 236                         compatible = "ti,sysc";
 237                         status = "disabled";
 238                         #address-cells = <1>;
 239                         #size-cells = <1>;
 240                         ranges = <0x0 0x5e000 0x2000>;
 241                 };
 242
 243                 target-module@62000 {                   /* 0x4a062000, ap 11 16.0 */
 244                         compatible = "ti,sysc-omap2", "ti,sysc";
 245                         ti,hwmods = "usb_tll_hs";
 246                         reg = <0x62000 0x4>,
 247                               <0x62010 0x4>,
 248                               <0x62014 0x4>;
 249                         reg-names = "rev", "sysc", "syss";
 250                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 251                                          SYSC_OMAP2_ENAWAKEUP |
 252                                          SYSC_OMAP2_SOFTRESET |
 253                                          SYSC_OMAP2_AUTOIDLE)>;
 254                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 255                                         <SYSC_IDLE_NO>,
 256                                         <SYSC_IDLE_SMART>;
 257                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 258                         clocks = <&l3_init_clkctrl OMAP4_USB_TLL_HS_CLKCTRL 0>;
 259                         clock-names = "fck";
 260                         #address-cells = <1>;
 261                         #size-cells = <1>;
 262                         ranges = <0x0 0x62000 0x1000>;
 263
 264                         usbhstll: usbhstll@0 {
 265                                 compatible = "ti,usbhs-tll";
 266                                 reg = <0x0 0x1000>;
 267                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 268                         };
 269                 };
 270
 271                 target-module@64000 {                   /* 0x4a064000, ap 86 1e.0 */
 272                         compatible = "ti,sysc-omap4", "ti,sysc";
 273                         ti,hwmods = "usb_host_hs";
 274                         reg = <0x64000 0x4>,
 275                               <0x64010 0x4>,
 276                               <0x64014 0x4>;
 277                         reg-names = "rev", "sysc", "syss";
 278                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 279                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 280                                         <SYSC_IDLE_NO>,
 281                                         <SYSC_IDLE_SMART>,
 282                                         <SYSC_IDLE_SMART_WKUP>;
 283                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 284                                         <SYSC_IDLE_NO>,
 285                                         <SYSC_IDLE_SMART>,
 286                                         <SYSC_IDLE_SMART_WKUP>;
 287                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 288                         clocks = <&l3_init_clkctrl OMAP4_USB_HOST_HS_CLKCTRL 0>;
 289                         clock-names = "fck";
 290                         #address-cells = <1>;
 291                         #size-cells = <1>;
 292                         ranges = <0x0 0x64000 0x1000>;
 293
 294                         usbhshost: usbhshost@0 {
 295                                 compatible = "ti,usbhs-host";
 296                                 reg = <0x0 0x800>;
 297                                 #address-cells = <1>;
 298                                 #size-cells = <1>;
 299                                 ranges = <0 0 0x1000>;
 300                                 clocks = <&init_60m_fclk>,
 301                                          <&xclk60mhsp1_ck>,
 302                                          <&xclk60mhsp2_ck>;
 303                                 clock-names = "refclk_60m_int",
 304                                               "refclk_60m_ext_p1",
 305                                               "refclk_60m_ext_p2";
 306
 307                                 usbhsohci: ohci@800 {
 308                                         compatible = "ti,ohci-omap3";
 309                                         reg = <0x800 0x400>;
 310                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 311                                         remote-wakeup-connected;
 312                                 };
 313
 314                                 usbhsehci: ehci@c00 {
 315                                         compatible = "ti,ehci-omap";
 316                                         reg = <0xc00 0x400>;
 317                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 318                                 };
 319                         };
 320                 };
 321
 322                 target-module@66000 {                   /* 0x4a066000, ap 25 26.0 */
 323                         compatible = "ti,sysc-omap2", "ti,sysc";
 324                         ti,hwmods = "mmu_dsp";
 325                         reg = <0x66000 0x4>,
 326                               <0x66010 0x4>,
 327                               <0x66014 0x4>;
 328                         reg-names = "rev", "sysc", "syss";
 329                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 330                                          SYSC_OMAP2_SOFTRESET |
 331                                          SYSC_OMAP2_AUTOIDLE)>;
 332                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 333                                         <SYSC_IDLE_NO>,
 334                                         <SYSC_IDLE_SMART>;
 335                         /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */
 336                         clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
 337                         clock-names = "fck";
 338                         #address-cells = <1>;
 339                         #size-cells = <1>;
 340                         ranges = <0x0 0x66000 0x1000>;
 341
 342                         /* mmu_dsp cannot be moved before reset driver */
 343                         status = "disabled";
 344                 };
 345         };
 346
 347         segment@80000 {                                 /* 0x4a080000 */
 348                 compatible = "simple-bus";
 349                 #address-cells = <1>;
 350                 #size-cells = <1>;
 351                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 352                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 353                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 354                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 355                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 356                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 357                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 358                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 359                          <0x00074000 0x000f4000 0x001000>,      /* ap 27 */
 360                          <0x00075000 0x000f5000 0x001000>,      /* ap 28 */
 361                          <0x00076000 0x000f6000 0x001000>,      /* ap 29 */
 362                          <0x00077000 0x000f7000 0x001000>,      /* ap 30 */
 363                          <0x00036000 0x000b6000 0x001000>,      /* ap 69 */
 364                          <0x00037000 0x000b7000 0x001000>,      /* ap 70 */
 365                          <0x0004d000 0x000cd000 0x001000>,      /* ap 78 */
 366                          <0x0004e000 0x000ce000 0x001000>,      /* ap 79 */
 367                          <0x00029000 0x000a9000 0x001000>,      /* ap 82 */
 368                          <0x0002a000 0x000aa000 0x001000>,      /* ap 83 */
 369                          <0x0002b000 0x000ab000 0x001000>,      /* ap 84 */
 370                          <0x0002c000 0x000ac000 0x001000>,      /* ap 85 */
 371                          <0x0002d000 0x000ad000 0x001000>,      /* ap 88 */
 372                          <0x0002e000 0x000ae000 0x001000>;      /* ap 89 */
 373
 374                 target-module@29000 {                   /* 0x4a0a9000, ap 82 04.0 */
 375                         compatible = "ti,sysc";
 376                         status = "disabled";
 377                         #address-cells = <1>;
 378                         #size-cells = <1>;
 379                         ranges = <0x0 0x29000 0x1000>;
 380                 };
 381
 382                 target-module@2b000 {                   /* 0x4a0ab000, ap 84 12.0 */
 383                         compatible = "ti,sysc-omap2", "ti,sysc";
 384                         ti,hwmods = "usb_otg_hs";
 385                         reg = <0x2b400 0x4>,
 386                               <0x2b404 0x4>,
 387                               <0x2b408 0x4>;
 388                         reg-names = "rev", "sysc", "syss";
 389                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 390                                          SYSC_OMAP2_SOFTRESET |
 391                                          SYSC_OMAP2_AUTOIDLE)>;
 392                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 393                                         <SYSC_IDLE_NO>,
 394                                         <SYSC_IDLE_SMART>;
 395                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 396                                         <SYSC_IDLE_NO>,
 397                                         <SYSC_IDLE_SMART>,
 398                                         <SYSC_IDLE_SMART_WKUP>;
 399                         ti,syss-mask = <1>;
 400                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 401                         clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
 402                         clock-names = "fck";
 403                         #address-cells = <1>;
 404                         #size-cells = <1>;
 405                         ranges = <0x0 0x2b000 0x1000>;
 406
 407                         usb_otg_hs: usb_otg_hs@0 {
 408                                 compatible = "ti,omap4-musb";
 409                                 reg = <0x0 0x7ff>;
 410                                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 411                                 interrupt-names = "mc", "dma";
 412                                 usb-phy = <&usb2_phy>;
 413                                 phys = <&usb2_phy>;
 414                                 phy-names = "usb2-phy";
 415                                 multipoint = <1>;
 416                                 num-eps = <16>;
 417                                 ram-bits = <12>;
 418                                 ctrl-module = <&omap_control_usbotg>;
 419                         };
 420                 };
 421
 422                 target-module@2d000 {                   /* 0x4a0ad000, ap 88 0c.0 */
 423                         compatible = "ti,sysc-omap2", "ti,sysc";
 424                         ti,hwmods = "ocp2scp_usb_phy";
 425                         reg = <0x2d000 0x4>,
 426                               <0x2d010 0x4>,
 427                               <0x2d014 0x4>;
 428                         reg-names = "rev", "sysc", "syss";
 429                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 430                                          SYSC_OMAP2_AUTOIDLE)>;
 431                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 432                                         <SYSC_IDLE_NO>,
 433                                         <SYSC_IDLE_SMART>;
 434                         ti,syss-mask = <1>;
 435                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 436                         clocks = <&l3_init_clkctrl OMAP4_OCP2SCP_USB_PHY_CLKCTRL 0>;
 437                         clock-names = "fck";
 438                         #address-cells = <1>;
 439                         #size-cells = <1>;
 440                         ranges = <0x0 0x2d000 0x1000>;
 441
 442                         ocp2scp@0 {
 443                                 compatible = "ti,omap-ocp2scp";
 444                                 reg = <0x0 0x1f>;
 445                                 #address-cells = <1>;
 446                                 #size-cells = <1>;
 447                                 ranges = <0 0 0x1000>;
 448                                 usb2_phy: usb2phy@80 {
 449                                         compatible = "ti,omap-usb2";
 450                                         reg = <0x80 0x58>;
 451                                         ctrl-module = <&omap_control_usb2phy>;
 452                                         clocks = <&usb_phy_cm_clk32k>;
 453                                         clock-names = "wkupclk";
 454                                         #phy-cells = <0>;
 455                                 };
 456                         };
 457                 };
 458
 459                 /* d2d mdm */
 460                 target-module@36000 {                   /* 0x4a0b6000, ap 69 60.0 */
 461                         compatible = "ti,sysc-omap2", "ti,sysc";
 462                         reg = <0x36000 0x4>,
 463                               <0x36010 0x4>,
 464                               <0x36014 0x4>;
 465                         reg-names = "rev", "sysc", "syss";
 466                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 467                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 468                                         <SYSC_IDLE_NO>,
 469                                         <SYSC_IDLE_SMART>,
 470                                         <SYSC_IDLE_SMART_WKUP>;
 471                         ti,syss-mask = <1>;
 472                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 473                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 474                         clock-names = "fck";
 475                         #address-cells = <1>;
 476                         #size-cells = <1>;
 477                         ranges = <0x0 0x36000 0x1000>;
 478                 };
 479
 480                 /* d2d mpu */
 481                 target-module@4d000 {                   /* 0x4a0cd000, ap 78 58.0 */
 482                         compatible = "ti,sysc-omap2", "ti,sysc";
 483                         reg = <0x4d000 0x4>,
 484                               <0x4d010 0x4>,
 485                               <0x4d014 0x4>;
 486                         reg-names = "rev", "sysc", "syss";
 487                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 488                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 489                                         <SYSC_IDLE_NO>,
 490                                         <SYSC_IDLE_SMART>,
 491                                         <SYSC_IDLE_SMART_WKUP>;
 492                         ti,syss-mask = <1>;
 493                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 494                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 495                         clock-names = "fck";
 496                         #address-cells = <1>;
 497                         #size-cells = <1>;
 498                         ranges = <0x0 0x4d000 0x1000>;
 499                 };
 500
 501                 target-module@59000 {                   /* 0x4a0d9000, ap 13 1a.0 */
 502                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 503                         ti,hwmods = "smartreflex_mpu";
 504                         reg = <0x59038 0x4>;
 505                         reg-names = "sysc";
 506                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 507                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 508                                         <SYSC_IDLE_NO>,
 509                                         <SYSC_IDLE_SMART>,
 510                                         <SYSC_IDLE_SMART_WKUP>;
 511                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 512                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
 513                         clock-names = "fck";
 514                         #address-cells = <1>;
 515                         #size-cells = <1>;
 516                         ranges = <0x0 0x59000 0x1000>;
 517
 518                         smartreflex_mpu: smartreflex@0 {
 519                                 compatible = "ti,omap4-smartreflex-mpu";
 520                                 reg = <0x0 0x80>;
 521                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 522                         };
 523                 };
 524
 525                 target-module@5b000 {                   /* 0x4a0db000, ap 15 08.0 */
 526                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 527                         ti,hwmods = "smartreflex_iva";
 528                         reg = <0x5b038 0x4>;
 529                         reg-names = "sysc";
 530                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 531                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 532                                         <SYSC_IDLE_NO>,
 533                                         <SYSC_IDLE_SMART>,
 534                                         <SYSC_IDLE_SMART_WKUP>;
 535                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 536                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
 537                         clock-names = "fck";
 538                         #address-cells = <1>;
 539                         #size-cells = <1>;
 540                         ranges = <0x0 0x5b000 0x1000>;
 541
 542                         smartreflex_iva: smartreflex@0 {
 543                                 compatible = "ti,omap4-smartreflex-iva";
 544                                 reg = <0x0 0x80>;
 545                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 546                         };
 547                 };
 548
 549                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 22.0 */
 550                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 551                         ti,hwmods = "smartreflex_core";
 552                         reg = <0x5d038 0x4>;
 553                         reg-names = "sysc";
 554                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 555                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 556                                         <SYSC_IDLE_NO>,
 557                                         <SYSC_IDLE_SMART>,
 558                                         <SYSC_IDLE_SMART_WKUP>;
 559                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 560                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
 561                         clock-names = "fck";
 562                         #address-cells = <1>;
 563                         #size-cells = <1>;
 564                         ranges = <0x0 0x5d000 0x1000>;
 565
 566                         smartreflex_core: smartreflex@0 {
 567                                 compatible = "ti,omap4-smartreflex-core";
 568                                 reg = <0x0 0x80>;
 569                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 570                         };
 571                 };
 572
 573                 target-module@60000 {                   /* 0x4a0e0000, ap 19 1c.0 */
 574                         compatible = "ti,sysc";
 575                         status = "disabled";
 576                         #address-cells = <1>;
 577                         #size-cells = <1>;
 578                         ranges = <0x0 0x60000 0x1000>;
 579                 };
 580
 581                 target-module@74000 {                   /* 0x4a0f4000, ap 27 24.0 */
 582                         compatible = "ti,sysc-omap4", "ti,sysc";
 583                         ti,hwmods = "mailbox";
 584                         reg = <0x74000 0x4>,
 585                               <0x74010 0x4>;
 586                         reg-names = "rev", "sysc";
 587                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 588                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 589                                         <SYSC_IDLE_NO>,
 590                                         <SYSC_IDLE_SMART>;
 591                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 592                         clocks = <&l4_cfg_clkctrl OMAP4_MAILBOX_CLKCTRL 0>;
 593                         clock-names = "fck";
 594                         #address-cells = <1>;
 595                         #size-cells = <1>;
 596                         ranges = <0x0 0x74000 0x1000>;
 597
 598                         mailbox: mailbox@0 {
 599                                 compatible = "ti,omap4-mailbox";
 600                                 reg = <0x0 0x200>;
 601                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 602                                 #mbox-cells = <1>;
 603                                 ti,mbox-num-users = <3>;
 604                                 ti,mbox-num-fifos = <8>;
 605                                 mbox_ipu: mbox_ipu {
 606                                         ti,mbox-tx = <0 0 0>;
 607                                         ti,mbox-rx = <1 0 0>;
 608                                 };
 609                                 mbox_dsp: mbox_dsp {
 610                                         ti,mbox-tx = <3 0 0>;
 611                                         ti,mbox-rx = <2 0 0>;
 612                                 };
 613                         };
 614                 };
 615
 616                 target-module@76000 {                   /* 0x4a0f6000, ap 29 3a.0 */
 617                         compatible = "ti,sysc-omap2", "ti,sysc";
 618                         ti,hwmods = "spinlock";
 619                         reg = <0x76000 0x4>,
 620                               <0x76010 0x4>,
 621                               <0x76014 0x4>;
 622                         reg-names = "rev", "sysc", "syss";
 623                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 624                                          SYSC_OMAP2_ENAWAKEUP |
 625                                          SYSC_OMAP2_SOFTRESET |
 626                                          SYSC_OMAP2_AUTOIDLE)>;
 627                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 628                                         <SYSC_IDLE_NO>,
 629                                         <SYSC_IDLE_SMART>;
 630                         ti,syss-mask = <1>;
 631                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 632                         clocks = <&l4_cfg_clkctrl OMAP4_SPINLOCK_CLKCTRL 0>;
 633                         clock-names = "fck";
 634                         #address-cells = <1>;
 635                         #size-cells = <1>;
 636                         ranges = <0x0 0x76000 0x1000>;
 637
 638                         hwspinlock: spinlock@0 {
 639                                 compatible = "ti,omap4-hwspinlock";
 640                                 reg = <0x0 0x1000>;
 641                                 #hwlock-cells = <1>;
 642                         };
 643                 };
 644         };
 645
 646         segment@100000 {                                        /* 0x4a100000 */
 647                 compatible = "simple-bus";
 648                 #address-cells = <1>;
 649                 #size-cells = <1>;
 650                 ranges = <0x00000000 0x00100000 0x001000>,      /* ap 21 */
 651                          <0x00001000 0x00101000 0x001000>,      /* ap 22 */
 652                          <0x00002000 0x00102000 0x001000>,      /* ap 61 */
 653                          <0x00003000 0x00103000 0x001000>,      /* ap 62 */
 654                          <0x00008000 0x00108000 0x001000>,      /* ap 63 */
 655                          <0x00009000 0x00109000 0x001000>,      /* ap 64 */
 656                          <0x0000a000 0x0010a000 0x001000>,      /* ap 65 */
 657                          <0x0000b000 0x0010b000 0x001000>;      /* ap 66 */
 658
 659                 target-module@0 {                       /* 0x4a100000, ap 21 2a.0 */
 660                         compatible = "ti,sysc-omap4", "ti,sysc";
 661                         ti,hwmods = "ctrl_module_pad_core";
 662                         reg = <0x0 0x4>,
 663                               <0x10 0x4>;
 664                         reg-names = "rev", "sysc";
 665                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 666                                         <SYSC_IDLE_NO>,
 667                                         <SYSC_IDLE_SMART>,
 668                                         <SYSC_IDLE_SMART_WKUP>;
 669                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 670                         #address-cells = <1>;
 671                         #size-cells = <1>;
 672                         ranges = <0x0 0x0 0x1000>;
 673
 674                         omap4_pmx_core: pinmux@40 {
 675                                 compatible = "ti,omap4-padconf",
 676                                              "pinctrl-single";
 677                                 reg = <0x40 0x0196>;
 678                                 #address-cells = <1>;
 679                                 #size-cells = <0>;
 680                                 #pinctrl-cells = <1>;
 681                                 #interrupt-cells = <1>;
 682                                 interrupt-controller;
 683                                 pinctrl-single,register-width = <16>;
 684                                 pinctrl-single,function-mask = <0x7fff>;
 685                         };
 686
 687                         omap4_padconf_global: omap4_padconf_global@5a0 {
 688                                 compatible = "syscon",
 689                                              "simple-bus";
 690                                 reg = <0x5a0 0x170>;
 691                                 #address-cells = <1>;
 692                                 #size-cells = <1>;
 693                                 ranges = <0 0x5a0 0x170>;
 694
 695                                 pbias_regulator: pbias_regulator@60 {
 696                                         compatible = "ti,pbias-omap4", "ti,pbias-omap";
 697                                         reg = <0x60 0x4>;
 698                                         syscon = <&omap4_padconf_global>;
 699                                         pbias_mmc_reg: pbias_mmc_omap4 {
 700                                                 regulator-name = "pbias_mmc_omap4";
 701                                                 regulator-min-microvolt = <1800000>;
 702                                                 regulator-max-microvolt = <3000000>;
 703                                         };
 704                                 };
 705                         };
 706                 };
 707
 708                 target-module@2000 {                    /* 0x4a102000, ap 61 3c.0 */
 709                         compatible = "ti,sysc";
 710                         status = "disabled";
 711                         #address-cells = <1>;
 712                         #size-cells = <1>;
 713                         ranges = <0x0 0x2000 0x1000>;
 714                 };
 715
 716                 target-module@8000 {                    /* 0x4a108000, ap 63 62.0 */
 717                         compatible = "ti,sysc";
 718                         status = "disabled";
 719                         #address-cells = <1>;
 720                         #size-cells = <1>;
 721                         ranges = <0x0 0x8000 0x1000>;
 722                 };
 723
 724                 target-module@a000 {                    /* 0x4a10a000, ap 65 50.0 */
 725                         compatible = "ti,sysc-omap4", "ti,sysc";
 726                         ti,hwmods = "fdif";
 727                         reg = <0xa000 0x4>,
 728                               <0xa010 0x4>;
 729                         reg-names = "rev", "sysc";
 730                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 731                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 732                                         <SYSC_IDLE_NO>,
 733                                         <SYSC_IDLE_SMART>;
 734                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 735                                         <SYSC_IDLE_NO>,
 736                                         <SYSC_IDLE_SMART>;
 737                         ti,sysc-delay-us = <2>;
 738                         /* Domains (V, P, C): core, cam_pwrdm, iss_clkdm */
 739                         clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
 740                         clock-names = "fck";
 741                         #address-cells = <1>;
 742                         #size-cells = <1>;
 743                         ranges = <0x0 0xa000 0x1000>;
 744
 745                         /* No child device binding or driver in mainline */
 746                 };
 747         };
 748
 749         segment@180000 {                                        /* 0x4a180000 */
 750                 compatible = "simple-bus";
 751                 #address-cells = <1>;
 752                 #size-cells = <1>;
 753         };
 754
 755         segment@200000 {                                        /* 0x4a200000 */
 756                 compatible = "simple-bus";
 757                 #address-cells = <1>;
 758                 #size-cells = <1>;
 759                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 31 */
 760                          <0x0001f000 0x0021f000 0x001000>,      /* ap 32 */
 761                          <0x0000a000 0x0020a000 0x001000>,      /* ap 33 */
 762                          <0x0000b000 0x0020b000 0x001000>,      /* ap 34 */
 763                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 764                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 765                          <0x00006000 0x00206000 0x001000>,      /* ap 37 */
 766                          <0x00007000 0x00207000 0x001000>,      /* ap 38 */
 767                          <0x00012000 0x00212000 0x001000>,      /* ap 39 */
 768                          <0x00013000 0x00213000 0x001000>,      /* ap 40 */
 769                          <0x0000c000 0x0020c000 0x001000>,      /* ap 41 */
 770                          <0x0000d000 0x0020d000 0x001000>,      /* ap 42 */
 771                          <0x00010000 0x00210000 0x001000>,      /* ap 43 */
 772                          <0x00011000 0x00211000 0x001000>,      /* ap 44 */
 773                          <0x00016000 0x00216000 0x001000>,      /* ap 45 */
 774                          <0x00017000 0x00217000 0x001000>,      /* ap 46 */
 775                          <0x00014000 0x00214000 0x001000>,      /* ap 47 */
 776                          <0x00015000 0x00215000 0x001000>,      /* ap 48 */
 777                          <0x00018000 0x00218000 0x001000>,      /* ap 49 */
 778                          <0x00019000 0x00219000 0x001000>,      /* ap 50 */
 779                          <0x00020000 0x00220000 0x001000>,      /* ap 51 */
 780                          <0x00021000 0x00221000 0x001000>,      /* ap 52 */
 781                          <0x00026000 0x00226000 0x001000>,      /* ap 53 */
 782                          <0x00027000 0x00227000 0x001000>,      /* ap 54 */
 783                          <0x00028000 0x00228000 0x001000>,      /* ap 55 */
 784                          <0x00029000 0x00229000 0x001000>,      /* ap 56 */
 785                          <0x0002a000 0x0022a000 0x001000>,      /* ap 57 */
 786                          <0x0002b000 0x0022b000 0x001000>,      /* ap 58 */
 787                          <0x0001c000 0x0021c000 0x001000>,      /* ap 59 */
 788                          <0x0001d000 0x0021d000 0x001000>;      /* ap 60 */
 789
 790                 target-module@4000 {                    /* 0x4a204000, ap 35 42.0 */
 791                         compatible = "ti,sysc";
 792                         status = "disabled";
 793                         #address-cells = <1>;
 794                         #size-cells = <1>;
 795                         ranges = <0x0 0x4000 0x1000>;
 796                 };
 797
 798                 target-module@6000 {                    /* 0x4a206000, ap 37 4a.0 */
 799                         compatible = "ti,sysc";
 800                         status = "disabled";
 801                         #address-cells = <1>;
 802                         #size-cells = <1>;
 803                         ranges = <0x0 0x6000 0x1000>;
 804                 };
 805
 806                 target-module@a000 {                    /* 0x4a20a000, ap 33 2c.0 */
 807                         compatible = "ti,sysc";
 808                         status = "disabled";
 809                         #address-cells = <1>;
 810                         #size-cells = <1>;
 811                         ranges = <0x0 0xa000 0x1000>;
 812                 };
 813
 814                 target-module@c000 {                    /* 0x4a20c000, ap 41 20.0 */
 815                         compatible = "ti,sysc";
 816                         status = "disabled";
 817                         #address-cells = <1>;
 818                         #size-cells = <1>;
 819                         ranges = <0x0 0xc000 0x1000>;
 820                 };
 821
 822                 target-module@10000 {                   /* 0x4a210000, ap 43 52.0 */
 823                         compatible = "ti,sysc";
 824                         status = "disabled";
 825                         #address-cells = <1>;
 826                         #size-cells = <1>;
 827                         ranges = <0x0 0x10000 0x1000>;
 828                 };
 829
 830                 target-module@12000 {                   /* 0x4a212000, ap 39 18.0 */
 831                         compatible = "ti,sysc";
 832                         status = "disabled";
 833                         #address-cells = <1>;
 834                         #size-cells = <1>;
 835                         ranges = <0x0 0x12000 0x1000>;
 836                 };
 837
 838                 target-module@14000 {                   /* 0x4a214000, ap 47 30.0 */
 839                         compatible = "ti,sysc";
 840                         status = "disabled";
 841                         #address-cells = <1>;
 842                         #size-cells = <1>;
 843                         ranges = <0x0 0x14000 0x1000>;
 844                 };
 845
 846                 target-module@16000 {                   /* 0x4a216000, ap 45 28.0 */
 847                         compatible = "ti,sysc";
 848                         status = "disabled";
 849                         #address-cells = <1>;
 850                         #size-cells = <1>;
 851                         ranges = <0x0 0x16000 0x1000>;
 852                 };
 853
 854                 target-module@18000 {                   /* 0x4a218000, ap 49 38.0 */
 855                         compatible = "ti,sysc";
 856                         status = "disabled";
 857                         #address-cells = <1>;
 858                         #size-cells = <1>;
 859                         ranges = <0x0 0x18000 0x1000>;
 860                 };
 861
 862                 target-module@1c000 {                   /* 0x4a21c000, ap 59 5a.0 */
 863                         compatible = "ti,sysc";
 864                         status = "disabled";
 865                         #address-cells = <1>;
 866                         #size-cells = <1>;
 867                         ranges = <0x0 0x1c000 0x1000>;
 868                 };
 869
 870                 target-module@1e000 {                   /* 0x4a21e000, ap 31 10.0 */
 871                         compatible = "ti,sysc";
 872                         status = "disabled";
 873                         #address-cells = <1>;
 874                         #size-cells = <1>;
 875                         ranges = <0x0 0x1e000 0x1000>;
 876                 };
 877
 878                 target-module@20000 {                   /* 0x4a220000, ap 51 40.0 */
 879                         compatible = "ti,sysc";
 880                         status = "disabled";
 881                         #address-cells = <1>;
 882                         #size-cells = <1>;
 883                         ranges = <0x0 0x20000 0x1000>;
 884                 };
 885
 886                 target-module@26000 {                   /* 0x4a226000, ap 53 34.0 */
 887                         compatible = "ti,sysc";
 888                         status = "disabled";
 889                         #address-cells = <1>;
 890                         #size-cells = <1>;
 891                         ranges = <0x0 0x26000 0x1000>;
 892                 };
 893
 894                 target-module@28000 {                   /* 0x4a228000, ap 55 2e.0 */
 895                         compatible = "ti,sysc";
 896                         status = "disabled";
 897                         #address-cells = <1>;
 898                         #size-cells = <1>;
 899                         ranges = <0x0 0x28000 0x1000>;
 900                 };
 901
 902                 target-module@2a000 {                   /* 0x4a22a000, ap 57 48.0 */
 903                         compatible = "ti,sysc";
 904                         status = "disabled";
 905                         #address-cells = <1>;
 906                         #size-cells = <1>;
 907                         ranges = <0x0 0x2a000 0x1000>;
 908                 };
 909         };
 910
 911         segment@280000 {                                        /* 0x4a280000 */
 912                 compatible = "simple-bus";
 913                 #address-cells = <1>;
 914                 #size-cells = <1>;
 915         };
 916
 917         l4_cfg_segment_300000: segment@300000 {                 /* 0x4a300000 */
 918                 compatible = "simple-bus";
 919                 #address-cells = <1>;
 920                 #size-cells = <1>;
 921                 ranges = <0x00000000 0x00300000 0x020000>,      /* ap 67 */
 922                          <0x00040000 0x00340000 0x001000>,      /* ap 68 */
 923                          <0x00020000 0x00320000 0x004000>,      /* ap 71 */
 924                          <0x00024000 0x00324000 0x002000>,      /* ap 72 */
 925                          <0x00026000 0x00326000 0x001000>,      /* ap 73 */
 926                          <0x00027000 0x00327000 0x001000>,      /* ap 74 */
 927                          <0x00028000 0x00328000 0x001000>,      /* ap 75 */
 928                          <0x00029000 0x00329000 0x001000>,      /* ap 76 */
 929                          <0x00030000 0x00330000 0x010000>,      /* ap 77 */
 930                          <0x0002a000 0x0032a000 0x002000>,      /* ap 90 */
 931                          <0x0002c000 0x0032c000 0x004000>;      /* ap 91 */
 932
 933                 l4_cfg_target_0: target-module@0 {      /* 0x4a300000, ap 67 14.0 */
 934                         compatible = "ti,sysc";
 935                         status = "disabled";
 936                         #address-cells = <1>;
 937                         #size-cells = <1>;
 938                         ranges = <0x00000000 0x00000000 0x00020000>,
 939                                  <0x00020000 0x00020000 0x00004000>,
 940                                  <0x00024000 0x00024000 0x00002000>,
 941                                  <0x00026000 0x00026000 0x00001000>,
 942                                  <0x00027000 0x00027000 0x00001000>,
 943                                  <0x00028000 0x00028000 0x00001000>,
 944                                  <0x00029000 0x00029000 0x00001000>,
 945                                  <0x0002a000 0x0002a000 0x00002000>,
 946                                  <0x0002c000 0x0002c000 0x00004000>,
 947                                  <0x00030000 0x00030000 0x00010000>;
 948                 };
 949         };
 950 };
 951
 952 &l4_wkup {                                              /* 0x4a300000 */
 953         compatible = "ti,omap4-l4-wkup", "simple-bus";
 954         reg = <0x4a300000 0x800>,
 955               <0x4a300800 0x800>,
 956               <0x4a301000 0x1000>;
 957         reg-names = "ap", "la", "ia0";
 958         #address-cells = <1>;
 959         #size-cells = <1>;
 960         ranges = <0x00000000 0x4a300000 0x010000>,      /* segment 0 */
 961                  <0x00010000 0x4a310000 0x010000>,      /* segment 1 */
 962                  <0x00020000 0x4a320000 0x010000>;      /* segment 2 */
 963
 964         segment@0 {                                     /* 0x4a300000 */
 965                 compatible = "simple-bus";
 966                 #address-cells = <1>;
 967                 #size-cells = <1>;
 968                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 969                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
 970                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 971                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
 972                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
 973                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
 974                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
 975                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
 976                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
 977                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
 978                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
 979
 980                 target-module@4000 {                    /* 0x4a304000, ap 17 24.0 */
 981                         compatible = "ti,sysc-omap2", "ti,sysc";
 982                         ti,hwmods = "counter_32k";
 983                         reg = <0x4000 0x4>,
 984                               <0x4004 0x4>;
 985                         reg-names = "rev", "sysc";
 986                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 987                                         <SYSC_IDLE_NO>;
 988                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
 989                         clocks = <&l4_wkup_clkctrl OMAP4_COUNTER_32K_CLKCTRL 0>;
 990                         clock-names = "fck";
 991                         #address-cells = <1>;
 992                         #size-cells = <1>;
 993                         ranges = <0x0 0x4000 0x1000>;
 994
 995                         counter32k: counter@0 {
 996                                 compatible = "ti,omap-counter32k";
 997                                 reg = <0x0 0x20>;
 998                         };
 999                 };
1000
1001                 target-module@6000 {                    /* 0x4a306000, ap 3 08.0 */
1002                         compatible = "ti,sysc-omap4", "ti,sysc";
1003                         reg = <0x6000 0x4>;
1004                         reg-names = "rev";
1005                         #address-cells = <1>;
1006                         #size-cells = <1>;
1007                         ranges = <0x0 0x6000 0x2000>;
1008
1009                         prm: prm@0 {
1010                                 compatible = "ti,omap4-prm";
1011                                 reg = <0x0 0x2000>;
1012                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1013                                 #address-cells = <1>;
1014                                 #size-cells = <1>;
1015                                 ranges = <0 0 0x2000>;
1016
1017                                 prm_clocks: clocks {
1018                                         #address-cells = <1>;
1019                                         #size-cells = <0>;
1020                                 };
1021
1022                                 prm_clockdomains: clockdomains {
1023                                 };
1024                         };
1025                 };
1026
1027                 target-module@a000 {                    /* 0x4a30a000, ap 15 34.0 */
1028                         compatible = "ti,sysc-omap4", "ti,sysc";
1029                         reg = <0xa000 0x4>;
1030                         reg-names = "rev";
1031                         #address-cells = <1>;
1032                         #size-cells = <1>;
1033                         ranges = <0x0 0xa000 0x1000>;
1034
1035                         scrm: scrm@0 {
1036                                 compatible = "ti,omap4-scrm";
1037                                 reg = <0x0 0x2000>;
1038
1039                                 scrm_clocks: clocks {
1040                                         #address-cells = <1>;
1041                                         #size-cells = <0>;
1042                                 };
1043
1044                                 scrm_clockdomains: clockdomains {
1045                                 };
1046                         };
1047                 };
1048
1049                 target-module@c000 {                    /* 0x4a30c000, ap 19 2c.0 */
1050                         compatible = "ti,sysc-omap4", "ti,sysc";
1051                         ti,hwmods = "ctrl_module_wkup";
1052                         reg = <0xc000 0x4>,
1053                               <0xc010 0x4>;
1054                         reg-names = "rev", "sysc";
1055                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1056                                         <SYSC_IDLE_NO>,
1057                                         <SYSC_IDLE_SMART>,
1058                                         <SYSC_IDLE_SMART_WKUP>;
1059                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1060                         #address-cells = <1>;
1061                         #size-cells = <1>;
1062                         ranges = <0x0 0xc000 0x1000>;
1063
1064                         omap4_scm_wkup: scm@c000 {
1065                                 compatible = "ti,omap4-scm-wkup";
1066                                 reg = <0xc000 0x1000>;
1067                         };
1068                 };
1069         };
1070
1071         segment@10000 {                                 /* 0x4a310000 */
1072                 compatible = "simple-bus";
1073                 #address-cells = <1>;
1074                 #size-cells = <1>;
1075                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
1076                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
1077                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
1078                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
1079                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
1080                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
1081                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
1082                          <0x0000d000 0x0001d000 0x001000>,      /* ap 12 */
1083                          <0x0000e000 0x0001e000 0x001000>,      /* ap 21 */
1084                          <0x0000f000 0x0001f000 0x001000>;      /* ap 22 */
1085
1086                 gpio1_target: target-module@0 {                 /* 0x4a310000, ap 5 14.0 */
1087                         compatible = "ti,sysc-omap2", "ti,sysc";
1088                         ti,hwmods = "gpio1";
1089                         reg = <0x0 0x4>,
1090                               <0x10 0x4>,
1091                               <0x114 0x4>;
1092                         reg-names = "rev", "sysc", "syss";
1093                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1094                                          SYSC_OMAP2_SOFTRESET |
1095                                          SYSC_OMAP2_AUTOIDLE)>;
1096                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1097                                         <SYSC_IDLE_NO>,
1098                                         <SYSC_IDLE_SMART>,
1099                                         <SYSC_IDLE_SMART_WKUP>;
1100                         ti,syss-mask = <1>;
1101                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1102                         clocks = <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 0>,
1103                                  <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 8>;
1104                         clock-names = "fck", "dbclk";
1105                         #address-cells = <1>;
1106                         #size-cells = <1>;
1107                         ranges = <0x0 0x0 0x1000>;
1108
1109                         gpio1: gpio@0 {
1110                                 compatible = "ti,omap4-gpio";
1111                                 reg = <0x0 0x200>;
1112                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1113                                 ti,gpio-always-on;
1114                                 gpio-controller;
1115                                 #gpio-cells = <2>;
1116                                 interrupt-controller;
1117                                 #interrupt-cells = <2>;
1118                         };
1119                 };
1120
1121                 target-module@4000 {                    /* 0x4a314000, ap 7 18.0 */
1122                         compatible = "ti,sysc-omap2", "ti,sysc";
1123                         reg = <0x4000 0x4>,
1124                               <0x4010 0x4>,
1125                               <0x4014 0x4>;
1126                         reg-names = "rev", "sysc", "syss";
1127                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
1128                                          SYSC_OMAP2_SOFTRESET)>;
1129                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1130                                         <SYSC_IDLE_NO>,
1131                                         <SYSC_IDLE_SMART>,
1132                                         <SYSC_IDLE_SMART_WKUP>;
1133                         ti,syss-mask = <1>;
1134                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1135                         clocks = <&l4_wkup_clkctrl OMAP4_WD_TIMER2_CLKCTRL 0>;
1136                         clock-names = "fck";
1137                         #address-cells = <1>;
1138                         #size-cells = <1>;
1139                         ranges = <0x0 0x4000 0x1000>;
1140
1141                         wdt2: wdt@0 {
1142                                 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
1143                                 reg = <0x0 0x80>;
1144                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
1145                         };
1146                 };
1147
1148                 target-module@8000 {                    /* 0x4a318000, ap 9 1c.0 */
1149                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1150                         ti,hwmods = "timer1";
1151                         reg = <0x8000 0x4>,
1152                               <0x8010 0x4>,
1153                               <0x8014 0x4>;
1154                         reg-names = "rev", "sysc", "syss";
1155                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1156                                          SYSC_OMAP2_EMUFREE |
1157                                          SYSC_OMAP2_ENAWAKEUP |
1158                                          SYSC_OMAP2_SOFTRESET |
1159                                          SYSC_OMAP2_AUTOIDLE)>;
1160                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1161                                         <SYSC_IDLE_NO>,
1162                                         <SYSC_IDLE_SMART>;
1163                         ti,syss-mask = <1>;
1164                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1165                         clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 0>;
1166                         clock-names = "fck";
1167                         #address-cells = <1>;
1168                         #size-cells = <1>;
1169                         ranges = <0x0 0x8000 0x1000>;
1170
1171                         timer1: timer@0 {
1172                                 compatible = "ti,omap3430-timer";
1173                                 reg = <0x0 0x80>;
1174                                 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
1175                                 clock-names = "fck";
1176                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1177                                 ti,timer-alwon;
1178                         };
1179                 };
1180
1181                 target-module@c000 {                    /* 0x4a31c000, ap 11 20.0 */
1182                         compatible = "ti,sysc-omap2", "ti,sysc";
1183                         ti,hwmods = "kbd";
1184                         reg = <0xc000 0x4>,
1185                               <0xc010 0x4>,
1186                               <0xc014 0x4>;
1187                         reg-names = "rev", "sysc", "syss";
1188                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1189                                          SYSC_OMAP2_EMUFREE |
1190                                          SYSC_OMAP2_ENAWAKEUP |
1191                                          SYSC_OMAP2_SOFTRESET |
1192                                          SYSC_OMAP2_AUTOIDLE)>;
1193                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1194                                         <SYSC_IDLE_NO>,
1195                                         <SYSC_IDLE_SMART>;
1196                         ti,syss-mask = <1>;
1197                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1198                         clocks = <&l4_wkup_clkctrl OMAP4_KBD_CLKCTRL 0>;
1199                         clock-names = "fck";
1200                         #address-cells = <1>;
1201                         #size-cells = <1>;
1202                         ranges = <0x0 0xc000 0x1000>;
1203
1204                         keypad: keypad@0 {
1205                                 compatible = "ti,omap4-keypad";
1206                                 reg = <0x0 0x80>;
1207                                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1208                                 reg-names = "mpu";
1209                         };
1210                 };
1211
1212                 target-module@e000 {                    /* 0x4a31e000, ap 21 30.0 */
1213                         compatible = "ti,sysc-omap4", "ti,sysc";
1214                         ti,hwmods = "ctrl_module_pad_wkup";
1215                         reg = <0xe000 0x4>,
1216                               <0xe010 0x4>;
1217                         reg-names = "rev", "sysc";
1218                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1219                                         <SYSC_IDLE_NO>,
1220                                         <SYSC_IDLE_SMART>,
1221                                         <SYSC_IDLE_SMART_WKUP>;
1222                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1223                         #address-cells = <1>;
1224                         #size-cells = <1>;
1225                         ranges = <0x0 0xe000 0x1000>;
1226
1227                         omap4_pmx_wkup: pinmux@40 {
1228                                 compatible = "ti,omap4-padconf",
1229                                              "pinctrl-single";
1230                                 reg = <0x40 0x0038>;
1231                                 #address-cells = <1>;
1232                                 #size-cells = <0>;
1233                                 #pinctrl-cells = <1>;
1234                                 #interrupt-cells = <1>;
1235                                 interrupt-controller;
1236                                 pinctrl-single,register-width = <16>;
1237                                 pinctrl-single,function-mask = <0x7fff>;
1238                         };
1239                 };
1240         };
1241
1242         segment@20000 {                                 /* 0x4a320000 */
1243                 compatible = "simple-bus";
1244                 #address-cells = <1>;
1245                 #size-cells = <1>;
1246                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
1247                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
1248                          <0x00000000 0x00020000 0x001000>,      /* ap 23 */
1249                          <0x00001000 0x00021000 0x001000>,      /* ap 24 */
1250                          <0x00002000 0x00022000 0x001000>,      /* ap 25 */
1251                          <0x00003000 0x00023000 0x001000>,      /* ap 26 */
1252                          <0x00004000 0x00024000 0x001000>,      /* ap 27 */
1253                          <0x00005000 0x00025000 0x001000>,      /* ap 28 */
1254                          <0x00007000 0x00027000 0x000400>,      /* ap 29 */
1255                          <0x00008000 0x00028000 0x000800>,      /* ap 30 */
1256                          <0x00009000 0x00029000 0x000400>;      /* ap 31 */
1257
1258                 target-module@0 {                       /* 0x4a320000, ap 23 04.0 */
1259                         compatible = "ti,sysc";
1260                         status = "disabled";
1261                         #address-cells = <1>;
1262                         #size-cells = <1>;
1263                         ranges = <0x0 0x0 0x1000>;
1264                 };
1265
1266                 target-module@2000 {                    /* 0x4a322000, ap 25 0c.0 */
1267                         compatible = "ti,sysc";
1268                         status = "disabled";
1269                         #address-cells = <1>;
1270                         #size-cells = <1>;
1271                         ranges = <0x0 0x2000 0x1000>;
1272                 };
1273
1274                 target-module@4000 {                    /* 0x4a324000, ap 27 10.0 */
1275                         compatible = "ti,sysc";
1276                         status = "disabled";
1277                         #address-cells = <1>;
1278                         #size-cells = <1>;
1279                         ranges = <0x0 0x4000 0x1000>;
1280                 };
1281
1282                 target-module@6000 {                    /* 0x4a326000, ap 13 28.0 */
1283                         compatible = "ti,sysc";
1284                         status = "disabled";
1285                         #address-cells = <1>;
1286                         #size-cells = <1>;
1287                         ranges = <0x00000000 0x00006000 0x00001000>,
1288                                  <0x00001000 0x00007000 0x00000400>,
1289                                  <0x00002000 0x00008000 0x00000800>,
1290                                  <0x00003000 0x00009000 0x00000400>;
1291                 };
1292         };
1293 };
1294
1295 &l4_per {                                               /* 0x48000000 */
1296         compatible = "ti,omap4-l4-per", "simple-bus";
1297         reg = <0x48000000 0x800>,
1298               <0x48000800 0x800>,
1299               <0x48001000 0x400>,
1300               <0x48001400 0x400>,
1301               <0x48001800 0x400>,
1302               <0x48001c00 0x400>;
1303         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
1304         #address-cells = <1>;
1305         #size-cells = <1>;
1306         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
1307                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
1308
1309         segment@0 {                                     /* 0x48000000 */
1310                 compatible = "simple-bus";
1311                 #address-cells = <1>;
1312                 #size-cells = <1>;
1313                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
1314                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
1315                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
1316                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
1317                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
1318                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
1319                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
1320                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
1321                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
1322                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
1323                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
1324                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
1325                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
1326                          <0x00040000 0x00040000 0x010000>,      /* ap 13 */
1327                          <0x00050000 0x00050000 0x001000>,      /* ap 14 */
1328                          <0x00055000 0x00055000 0x001000>,      /* ap 15 */
1329                          <0x00056000 0x00056000 0x001000>,      /* ap 16 */
1330                          <0x00057000 0x00057000 0x001000>,      /* ap 17 */
1331                          <0x00058000 0x00058000 0x001000>,      /* ap 18 */
1332                          <0x00059000 0x00059000 0x001000>,      /* ap 19 */
1333                          <0x0005a000 0x0005a000 0x001000>,      /* ap 20 */
1334                          <0x0005b000 0x0005b000 0x001000>,      /* ap 21 */
1335                          <0x0005c000 0x0005c000 0x001000>,      /* ap 22 */
1336                          <0x0005d000 0x0005d000 0x001000>,      /* ap 23 */
1337                          <0x0005e000 0x0005e000 0x001000>,      /* ap 24 */
1338                          <0x00060000 0x00060000 0x001000>,      /* ap 25 */
1339                          <0x0006a000 0x0006a000 0x001000>,      /* ap 26 */
1340                          <0x0006b000 0x0006b000 0x001000>,      /* ap 27 */
1341                          <0x0006c000 0x0006c000 0x001000>,      /* ap 28 */
1342                          <0x0006d000 0x0006d000 0x001000>,      /* ap 29 */
1343                          <0x0006e000 0x0006e000 0x001000>,      /* ap 30 */
1344                          <0x0006f000 0x0006f000 0x001000>,      /* ap 31 */
1345                          <0x00070000 0x00070000 0x001000>,      /* ap 32 */
1346                          <0x00071000 0x00071000 0x001000>,      /* ap 33 */
1347                          <0x00072000 0x00072000 0x001000>,      /* ap 34 */
1348                          <0x00073000 0x00073000 0x001000>,      /* ap 35 */
1349                          <0x00061000 0x00061000 0x001000>,      /* ap 36 */
1350                          <0x00096000 0x00096000 0x001000>,      /* ap 37 */
1351                          <0x00097000 0x00097000 0x001000>,      /* ap 38 */
1352                          <0x00076000 0x00076000 0x001000>,      /* ap 39 */
1353                          <0x00077000 0x00077000 0x001000>,      /* ap 40 */
1354                          <0x00078000 0x00078000 0x001000>,      /* ap 41 */
1355                          <0x00079000 0x00079000 0x001000>,      /* ap 42 */
1356                          <0x00086000 0x00086000 0x001000>,      /* ap 43 */
1357                          <0x00087000 0x00087000 0x001000>,      /* ap 44 */
1358                          <0x00088000 0x00088000 0x001000>,      /* ap 45 */
1359                          <0x00089000 0x00089000 0x001000>,      /* ap 46 */
1360                          <0x000b0000 0x000b0000 0x001000>,      /* ap 47 */
1361                          <0x000b1000 0x000b1000 0x001000>,      /* ap 48 */
1362                          <0x00098000 0x00098000 0x001000>,      /* ap 49 */
1363                          <0x00099000 0x00099000 0x001000>,      /* ap 50 */
1364                          <0x0009a000 0x0009a000 0x001000>,      /* ap 51 */
1365                          <0x0009b000 0x0009b000 0x001000>,      /* ap 52 */
1366                          <0x0009c000 0x0009c000 0x001000>,      /* ap 53 */
1367                          <0x0009d000 0x0009d000 0x001000>,      /* ap 54 */
1368                          <0x0009e000 0x0009e000 0x001000>,      /* ap 55 */
1369                          <0x0009f000 0x0009f000 0x001000>,      /* ap 56 */
1370                          <0x00090000 0x00090000 0x002000>,      /* ap 57 */
1371                          <0x00092000 0x00092000 0x001000>,      /* ap 58 */
1372                          <0x000a4000 0x000a4000 0x001000>,      /* ap 59 */
1373                          <0x000a6000 0x000a6000 0x001000>,      /* ap 60 */
1374                          <0x000a8000 0x000a8000 0x004000>,      /* ap 61 */
1375                          <0x000ac000 0x000ac000 0x001000>,      /* ap 62 */
1376                          <0x000ad000 0x000ad000 0x001000>,      /* ap 63 */
1377                          <0x000ae000 0x000ae000 0x001000>,      /* ap 64 */
1378                          <0x000b2000 0x000b2000 0x001000>,      /* ap 65 */
1379                          <0x000b3000 0x000b3000 0x001000>,      /* ap 66 */
1380                          <0x000b4000 0x000b4000 0x001000>,      /* ap 67 */
1381                          <0x000b5000 0x000b5000 0x001000>,      /* ap 68 */
1382                          <0x000b8000 0x000b8000 0x001000>,      /* ap 69 */
1383                          <0x000b9000 0x000b9000 0x001000>,      /* ap 70 */
1384                          <0x000ba000 0x000ba000 0x001000>,      /* ap 71 */
1385                          <0x000bb000 0x000bb000 0x001000>,      /* ap 72 */
1386                          <0x000d1000 0x000d1000 0x001000>,      /* ap 73 */
1387                          <0x000d2000 0x000d2000 0x001000>,      /* ap 74 */
1388                          <0x000d5000 0x000d5000 0x001000>,      /* ap 75 */
1389                          <0x000d6000 0x000d6000 0x001000>,      /* ap 76 */
1390                          <0x000a2000 0x000a2000 0x001000>,      /* ap 79 */
1391                          <0x000a3000 0x000a3000 0x001000>,      /* ap 80 */
1392                          <0x00001400 0x00001400 0x000400>,      /* ap 81 */
1393                          <0x00001800 0x00001800 0x000400>,      /* ap 82 */
1394                          <0x00001c00 0x00001c00 0x000400>,      /* ap 83 */
1395                          <0x000a5000 0x000a5000 0x001000>;      /* ap 84 */
1396
1397                 target-module@20000 {                   /* 0x48020000, ap 3 06.0 */
1398                         compatible = "ti,sysc-omap2", "ti,sysc";
1399                         reg = <0x20050 0x4>,
1400                               <0x20054 0x4>,
1401                               <0x20058 0x4>;
1402                         reg-names = "rev", "sysc", "syss";
1403                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1404                                          SYSC_OMAP2_SOFTRESET |
1405                                          SYSC_OMAP2_AUTOIDLE)>;
1406                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1407                                         <SYSC_IDLE_NO>,
1408                                         <SYSC_IDLE_SMART>,
1409                                         <SYSC_IDLE_SMART_WKUP>;
1410                         ti,syss-mask = <1>;
1411                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1412                         clocks = <&l4_per_clkctrl OMAP4_UART3_CLKCTRL 0>;
1413                         clock-names = "fck";
1414                         #address-cells = <1>;
1415                         #size-cells = <1>;
1416                         ranges = <0x0 0x20000 0x1000>;
1417
1418                         uart3: serial@0 {
1419                                 compatible = "ti,omap4-uart";
1420                                 reg = <0x0 0x100>;
1421                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1422                                 clock-frequency = <48000000>;
1423                         };
1424                 };
1425
1426                 target-module@32000 {                   /* 0x48032000, ap 5 02.0 */
1427                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1428                         ti,hwmods = "timer2";
1429                         reg = <0x32000 0x4>,
1430                               <0x32010 0x4>,
1431                               <0x32014 0x4>;
1432                         reg-names = "rev", "sysc", "syss";
1433                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1434                                          SYSC_OMAP2_EMUFREE |
1435                                          SYSC_OMAP2_ENAWAKEUP |
1436                                          SYSC_OMAP2_SOFTRESET |
1437                                          SYSC_OMAP2_AUTOIDLE)>;
1438                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1439                                         <SYSC_IDLE_NO>,
1440                                         <SYSC_IDLE_SMART>;
1441                         ti,syss-mask = <1>;
1442                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1443                         clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 0>;
1444                         clock-names = "fck";
1445                         #address-cells = <1>;
1446                         #size-cells = <1>;
1447                         ranges = <0x0 0x32000 0x1000>;
1448
1449                         timer2: timer@0 {
1450                                 compatible = "ti,omap3430-timer";
1451                                 reg = <0x0 0x80>;
1452                                 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>;
1453                                 clock-names = "fck";
1454                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1455                         };
1456                 };
1457
1458                 target-module@34000 {                   /* 0x48034000, ap 7 04.0 */
1459                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1460                         ti,hwmods = "timer3";
1461                         reg = <0x34000 0x4>,
1462                               <0x34010 0x4>;
1463                         reg-names = "rev", "sysc";
1464                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1465                                          SYSC_OMAP4_SOFTRESET)>;
1466                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1467                                         <SYSC_IDLE_NO>,
1468                                         <SYSC_IDLE_SMART>,
1469                                         <SYSC_IDLE_SMART_WKUP>;
1470                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1471                         clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 0>;
1472                         clock-names = "fck";
1473                         #address-cells = <1>;
1474                         #size-cells = <1>;
1475                         ranges = <0x0 0x34000 0x1000>;
1476
1477                         timer3: timer@0 {
1478                                 compatible = "ti,omap4430-timer";
1479                                 reg = <0x0 0x80>;
1480                                 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>;
1481                                 clock-names = "fck";
1482                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1483                         };
1484                 };
1485
1486                 target-module@36000 {                   /* 0x48036000, ap 9 0e.0 */
1487                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1488                         ti,hwmods = "timer4";
1489                         reg = <0x36000 0x4>,
1490                               <0x36010 0x4>;
1491                         reg-names = "rev", "sysc";
1492                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1493                                          SYSC_OMAP4_SOFTRESET)>;
1494                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1495                                         <SYSC_IDLE_NO>,
1496                                         <SYSC_IDLE_SMART>,
1497                                         <SYSC_IDLE_SMART_WKUP>;
1498                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1499                         clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 0>;
1500                         clock-names = "fck";
1501                         #address-cells = <1>;
1502                         #size-cells = <1>;
1503                         ranges = <0x0 0x36000 0x1000>;
1504
1505                         timer4: timer@0 {
1506                                 compatible = "ti,omap4430-timer";
1507                                 reg = <0x0 0x80>;
1508                                 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>;
1509                                 clock-names = "fck";
1510                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1511                         };
1512                 };
1513
1514                 target-module@3e000 {                   /* 0x4803e000, ap 11 08.0 */
1515                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1516                         ti,hwmods = "timer9";
1517                         reg = <0x3e000 0x4>,
1518                               <0x3e010 0x4>;
1519                         reg-names = "rev", "sysc";
1520                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1521                                          SYSC_OMAP4_SOFTRESET)>;
1522                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1523                                         <SYSC_IDLE_NO>,
1524                                         <SYSC_IDLE_SMART>,
1525                                         <SYSC_IDLE_SMART_WKUP>;
1526                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1527                         clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 0>;
1528                         clock-names = "fck";
1529                         #address-cells = <1>;
1530                         #size-cells = <1>;
1531                         ranges = <0x0 0x3e000 0x1000>;
1532
1533                         timer9: timer@0 {
1534                                 compatible = "ti,omap4430-timer";
1535                                 reg = <0x0 0x80>;
1536                                 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
1537                                 clock-names = "fck";
1538                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1539                                 ti,timer-pwm;
1540                         };
1541                 };
1542
1543                 target-module@40000 {                   /* 0x48040000, ap 13 0a.0 */
1544                         compatible = "ti,sysc";
1545                         status = "disabled";
1546                         #address-cells = <1>;
1547                         #size-cells = <1>;
1548                         ranges = <0x0 0x40000 0x10000>;
1549                 };
1550
1551                 target-module@55000 {                   /* 0x48055000, ap 15 0c.0 */
1552                         compatible = "ti,sysc-omap2", "ti,sysc";
1553                         ti,hwmods = "gpio2";
1554                         reg = <0x55000 0x4>,
1555                               <0x55010 0x4>,
1556                               <0x55114 0x4>;
1557                         reg-names = "rev", "sysc", "syss";
1558                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1559                                          SYSC_OMAP2_SOFTRESET |
1560                                          SYSC_OMAP2_AUTOIDLE)>;
1561                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1562                                         <SYSC_IDLE_NO>,
1563                                         <SYSC_IDLE_SMART>,
1564                                         <SYSC_IDLE_SMART_WKUP>;
1565                         ti,syss-mask = <1>;
1566                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1567                         clocks = <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 0>,
1568                                  <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 8>;
1569                         clock-names = "fck", "dbclk";
1570                         #address-cells = <1>;
1571                         #size-cells = <1>;
1572                         ranges = <0x0 0x55000 0x1000>;
1573
1574                         gpio2: gpio@0 {
1575                                 compatible = "ti,omap4-gpio";
1576                                 reg = <0x0 0x200>;
1577                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1578                                 gpio-controller;
1579                                 #gpio-cells = <2>;
1580                                 interrupt-controller;
1581                                 #interrupt-cells = <2>;
1582                         };
1583                 };
1584
1585                 target-module@57000 {                   /* 0x48057000, ap 17 16.0 */
1586                         compatible = "ti,sysc-omap2", "ti,sysc";
1587                         ti,hwmods = "gpio3";
1588                         reg = <0x57000 0x4>,
1589                               <0x57010 0x4>,
1590                               <0x57114 0x4>;
1591                         reg-names = "rev", "sysc", "syss";
1592                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1593                                          SYSC_OMAP2_SOFTRESET |
1594                                          SYSC_OMAP2_AUTOIDLE)>;
1595                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1596                                         <SYSC_IDLE_NO>,
1597                                         <SYSC_IDLE_SMART>,
1598                                         <SYSC_IDLE_SMART_WKUP>;
1599                         ti,syss-mask = <1>;
1600                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1601                         clocks = <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 0>,
1602                                  <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 8>;
1603                         clock-names = "fck", "dbclk";
1604                         #address-cells = <1>;
1605                         #size-cells = <1>;
1606                         ranges = <0x0 0x57000 0x1000>;
1607
1608                         gpio3: gpio@0 {
1609                                 compatible = "ti,omap4-gpio";
1610                                 reg = <0x0 0x200>;
1611                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1612                                 gpio-controller;
1613                                 #gpio-cells = <2>;
1614                                 interrupt-controller;
1615                                 #interrupt-cells = <2>;
1616                         };
1617                 };
1618
1619                 target-module@59000 {                   /* 0x48059000, ap 19 10.0 */
1620                         compatible = "ti,sysc-omap2", "ti,sysc";
1621                         ti,hwmods = "gpio4";
1622                         reg = <0x59000 0x4>,
1623                               <0x59010 0x4>,
1624                               <0x59114 0x4>;
1625                         reg-names = "rev", "sysc", "syss";
1626                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1627                                          SYSC_OMAP2_SOFTRESET |
1628                                          SYSC_OMAP2_AUTOIDLE)>;
1629                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1630                                         <SYSC_IDLE_NO>,
1631                                         <SYSC_IDLE_SMART>,
1632                                         <SYSC_IDLE_SMART_WKUP>;
1633                         ti,syss-mask = <1>;
1634                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1635                         clocks = <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 0>,
1636                                  <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 8>;
1637                         clock-names = "fck", "dbclk";
1638                         #address-cells = <1>;
1639                         #size-cells = <1>;
1640                         ranges = <0x0 0x59000 0x1000>;
1641
1642                         gpio4: gpio@0 {
1643                                 compatible = "ti,omap4-gpio";
1644                                 reg = <0x0 0x200>;
1645                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1646                                 gpio-controller;
1647                                 #gpio-cells = <2>;
1648                                 interrupt-controller;
1649                                 #interrupt-cells = <2>;
1650                         };
1651                 };
1652
1653                 target-module@5b000 {                   /* 0x4805b000, ap 21 12.0 */
1654                         compatible = "ti,sysc-omap2", "ti,sysc";
1655                         ti,hwmods = "gpio5";
1656                         reg = <0x5b000 0x4>,
1657                               <0x5b010 0x4>,
1658                               <0x5b114 0x4>;
1659                         reg-names = "rev", "sysc", "syss";
1660                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1661                                          SYSC_OMAP2_SOFTRESET |
1662                                          SYSC_OMAP2_AUTOIDLE)>;
1663                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1664                                         <SYSC_IDLE_NO>,
1665                                         <SYSC_IDLE_SMART>,
1666                                         <SYSC_IDLE_SMART_WKUP>;
1667                         ti,syss-mask = <1>;
1668                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1669                         clocks = <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 0>,
1670                                  <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 8>;
1671                         clock-names = "fck", "dbclk";
1672                         #address-cells = <1>;
1673                         #size-cells = <1>;
1674                         ranges = <0x0 0x5b000 0x1000>;
1675
1676                         gpio5: gpio@0 {
1677                                 compatible = "ti,omap4-gpio";
1678                                 reg = <0x0 0x200>;
1679                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1680                                 gpio-controller;
1681                                 #gpio-cells = <2>;
1682                                 interrupt-controller;
1683                                 #interrupt-cells = <2>;
1684                         };
1685                 };
1686
1687                 target-module@5d000 {                   /* 0x4805d000, ap 23 14.0 */
1688                         compatible = "ti,sysc-omap2", "ti,sysc";
1689                         ti,hwmods = "gpio6";
1690                         reg = <0x5d000 0x4>,
1691                               <0x5d010 0x4>,
1692                               <0x5d114 0x4>;
1693                         reg-names = "rev", "sysc", "syss";
1694                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1695                                          SYSC_OMAP2_SOFTRESET |
1696                                          SYSC_OMAP2_AUTOIDLE)>;
1697                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1698                                         <SYSC_IDLE_NO>,
1699                                         <SYSC_IDLE_SMART>,
1700                                         <SYSC_IDLE_SMART_WKUP>;
1701                         ti,syss-mask = <1>;
1702                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1703                         clocks = <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 0>,
1704                                  <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 8>;
1705                         clock-names = "fck", "dbclk";
1706                         #address-cells = <1>;
1707                         #size-cells = <1>;
1708                         ranges = <0x0 0x5d000 0x1000>;
1709
1710                         gpio6: gpio@0 {
1711                                 compatible = "ti,omap4-gpio";
1712                                 reg = <0x0 0x200>;
1713                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1714                                 gpio-controller;
1715                                 #gpio-cells = <2>;
1716                                 interrupt-controller;
1717                                 #interrupt-cells = <2>;
1718                         };
1719                 };
1720
1721                 target-module@60000 {                   /* 0x48060000, ap 25 1e.0 */
1722                         compatible = "ti,sysc-omap2", "ti,sysc";
1723                         reg = <0x60000 0x8>,
1724                               <0x60010 0x8>,
1725                               <0x60090 0x8>;
1726                         reg-names = "rev", "sysc", "syss";
1727                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1728                                          SYSC_OMAP2_ENAWAKEUP |
1729                                          SYSC_OMAP2_SOFTRESET |
1730                                          SYSC_OMAP2_AUTOIDLE)>;
1731                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1732                                         <SYSC_IDLE_NO>,
1733                                         <SYSC_IDLE_SMART>,
1734                                         <SYSC_IDLE_SMART_WKUP>;
1735                         ti,syss-mask = <1>;
1736                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1737                         clocks = <&l4_per_clkctrl OMAP4_I2C3_CLKCTRL 0>;
1738                         clock-names = "fck";
1739                         #address-cells = <1>;
1740                         #size-cells = <1>;
1741                         ranges = <0x0 0x60000 0x1000>;
1742
1743                         i2c3: i2c@0 {
1744                                 compatible = "ti,omap4-i2c";
1745                                 reg = <0x0 0x100>;
1746                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1747                                 #address-cells = <1>;
1748                                 #size-cells = <0>;
1749                         };
1750                 };
1751
1752                 target-module@6a000 {                   /* 0x4806a000, ap 26 18.0 */
1753                         compatible = "ti,sysc-omap2", "ti,sysc";
1754                         reg = <0x6a050 0x4>,
1755                               <0x6a054 0x4>,
1756                               <0x6a058 0x4>;
1757                         reg-names = "rev", "sysc", "syss";
1758                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1759                                          SYSC_OMAP2_SOFTRESET |
1760                                          SYSC_OMAP2_AUTOIDLE)>;
1761                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1762                                         <SYSC_IDLE_NO>,
1763                                         <SYSC_IDLE_SMART>,
1764                                         <SYSC_IDLE_SMART_WKUP>;
1765                         ti,syss-mask = <1>;
1766                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1767                         clocks = <&l4_per_clkctrl OMAP4_UART1_CLKCTRL 0>;
1768                         clock-names = "fck";
1769                         #address-cells = <1>;
1770                         #size-cells = <1>;
1771                         ranges = <0x0 0x6a000 0x1000>;
1772
1773                         uart1: serial@0 {
1774                                 compatible = "ti,omap4-uart";
1775                                 reg = <0x0 0x100>;
1776                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1777                                 clock-frequency = <48000000>;
1778                         };
1779                 };
1780
1781                 target-module@6c000 {                   /* 0x4806c000, ap 28 20.0 */
1782                         compatible = "ti,sysc-omap2", "ti,sysc";
1783                         reg = <0x6c050 0x4>,
1784                               <0x6c054 0x4>,
1785                               <0x6c058 0x4>;
1786                         reg-names = "rev", "sysc", "syss";
1787                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1788                                          SYSC_OMAP2_SOFTRESET |
1789                                          SYSC_OMAP2_AUTOIDLE)>;
1790                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1791                                         <SYSC_IDLE_NO>,
1792                                         <SYSC_IDLE_SMART>,
1793                                         <SYSC_IDLE_SMART_WKUP>;
1794                         ti,syss-mask = <1>;
1795                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1796                         clocks = <&l4_per_clkctrl OMAP4_UART2_CLKCTRL 0>;
1797                         clock-names = "fck";
1798                         #address-cells = <1>;
1799                         #size-cells = <1>;
1800                         ranges = <0x0 0x6c000 0x1000>;
1801
1802                         uart2: serial@0 {
1803                                 compatible = "ti,omap4-uart";
1804                                 reg = <0x0 0x100>;
1805                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1806                                 clock-frequency = <48000000>;
1807                         };
1808                 };
1809
1810                 target-module@6e000 {                   /* 0x4806e000, ap 30 1c.1 */
1811                         compatible = "ti,sysc-omap2", "ti,sysc";
1812                         reg = <0x6e050 0x4>,
1813                               <0x6e054 0x4>,
1814                               <0x6e058 0x4>;
1815                         reg-names = "rev", "sysc", "syss";
1816                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1817                                          SYSC_OMAP2_SOFTRESET |
1818                                          SYSC_OMAP2_AUTOIDLE)>;
1819                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1820                                         <SYSC_IDLE_NO>,
1821                                         <SYSC_IDLE_SMART>,
1822                                         <SYSC_IDLE_SMART_WKUP>;
1823                         ti,syss-mask = <1>;
1824                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1825                         clocks = <&l4_per_clkctrl OMAP4_UART4_CLKCTRL 0>;
1826                         clock-names = "fck";
1827                         #address-cells = <1>;
1828                         #size-cells = <1>;
1829                         ranges = <0x0 0x6e000 0x1000>;
1830
1831                         uart4: serial@0 {
1832                                 compatible = "ti,omap4-uart";
1833                                 reg = <0x0 0x100>;
1834                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1835                                 clock-frequency = <48000000>;
1836                         };
1837                 };
1838
1839                 target-module@70000 {                   /* 0x48070000, ap 32 28.0 */
1840                         compatible = "ti,sysc-omap2", "ti,sysc";
1841                         reg = <0x70000 0x8>,
1842                               <0x70010 0x8>,
1843                               <0x70090 0x8>;
1844                         reg-names = "rev", "sysc", "syss";
1845                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1846                                          SYSC_OMAP2_ENAWAKEUP |
1847                                          SYSC_OMAP2_SOFTRESET |
1848                                          SYSC_OMAP2_AUTOIDLE)>;
1849                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1850                                         <SYSC_IDLE_NO>,
1851                                         <SYSC_IDLE_SMART>,
1852                                         <SYSC_IDLE_SMART_WKUP>;
1853                         ti,syss-mask = <1>;
1854                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1855                         clocks = <&l4_per_clkctrl OMAP4_I2C1_CLKCTRL 0>;
1856                         clock-names = "fck";
1857                         #address-cells = <1>;
1858                         #size-cells = <1>;
1859                         ranges = <0x0 0x70000 0x1000>;
1860
1861                         i2c1: i2c@0 {
1862                                 compatible = "ti,omap4-i2c";
1863                                 reg = <0x0 0x100>;
1864                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1865                                 #address-cells = <1>;
1866                                 #size-cells = <0>;
1867                         };
1868                 };
1869
1870                 target-module@72000 {                   /* 0x48072000, ap 34 30.0 */
1871                         compatible = "ti,sysc-omap2", "ti,sysc";
1872                         reg = <0x72000 0x8>,
1873                               <0x72010 0x8>,
1874                               <0x72090 0x8>;
1875                         reg-names = "rev", "sysc", "syss";
1876                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1877                                          SYSC_OMAP2_ENAWAKEUP |
1878                                          SYSC_OMAP2_SOFTRESET |
1879                                          SYSC_OMAP2_AUTOIDLE)>;
1880                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1881                                         <SYSC_IDLE_NO>,
1882                                         <SYSC_IDLE_SMART>,
1883                                         <SYSC_IDLE_SMART_WKUP>;
1884                         ti,syss-mask = <1>;
1885                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1886                         clocks = <&l4_per_clkctrl OMAP4_I2C2_CLKCTRL 0>;
1887                         clock-names = "fck";
1888                         #address-cells = <1>;
1889                         #size-cells = <1>;
1890                         ranges = <0x0 0x72000 0x1000>;
1891
1892                         i2c2: i2c@0 {
1893                                 compatible = "ti,omap4-i2c";
1894                                 reg = <0x0 0x100>;
1895                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1896                                 #address-cells = <1>;
1897                                 #size-cells = <0>;
1898                         };
1899                 };
1900
1901                 target-module@76000 {                   /* 0x48076000, ap 39 38.0 */
1902                         compatible = "ti,sysc-omap4", "ti,sysc";
1903                         ti,hwmods = "slimbus2";
1904                         reg = <0x76000 0x4>,
1905                               <0x76010 0x4>;
1906                         reg-names = "rev", "sysc";
1907                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1908                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1909                                         <SYSC_IDLE_NO>,
1910                                         <SYSC_IDLE_SMART>,
1911                                         <SYSC_IDLE_SMART_WKUP>;
1912                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1913                         clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
1914                         clock-names = "fck";
1915                         #address-cells = <1>;
1916                         #size-cells = <1>;
1917                         ranges = <0x0 0x76000 0x1000>;
1918
1919                         /* No child device binding or driver in mainline */
1920                 };
1921
1922                 target-module@78000 {                   /* 0x48078000, ap 41 1a.0 */
1923                         compatible = "ti,sysc-omap2", "ti,sysc";
1924                         ti,hwmods = "elm";
1925                         reg = <0x78000 0x4>,
1926                               <0x78010 0x4>,
1927                               <0x78014 0x4>;
1928                         reg-names = "rev", "sysc", "syss";
1929                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1930                                          SYSC_OMAP2_SOFTRESET |
1931                                          SYSC_OMAP2_AUTOIDLE)>;
1932                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1933                                         <SYSC_IDLE_NO>,
1934                                         <SYSC_IDLE_SMART>;
1935                         ti,syss-mask = <1>;
1936                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1937                         clocks = <&l4_per_clkctrl OMAP4_ELM_CLKCTRL 0>;
1938                         clock-names = "fck";
1939                         #address-cells = <1>;
1940                         #size-cells = <1>;
1941                         ranges = <0x0 0x78000 0x1000>;
1942
1943                         elm: elm@0 {
1944                                 compatible = "ti,am3352-elm";
1945                                 reg = <0x0 0x2000>;
1946                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1947                                 status = "disabled";
1948                         };
1949                 };
1950
1951                 target-module@86000 {                   /* 0x48086000, ap 43 24.0 */
1952                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1953                         ti,hwmods = "timer10";
1954                         reg = <0x86000 0x4>,
1955                               <0x86010 0x4>,
1956                               <0x86014 0x4>;
1957                         reg-names = "rev", "sysc", "syss";
1958                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1959                                          SYSC_OMAP2_EMUFREE |
1960                                          SYSC_OMAP2_ENAWAKEUP |
1961                                          SYSC_OMAP2_SOFTRESET |
1962                                          SYSC_OMAP2_AUTOIDLE)>;
1963                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1964                                         <SYSC_IDLE_NO>,
1965                                         <SYSC_IDLE_SMART>;
1966                         ti,syss-mask = <1>;
1967                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1968                         clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 0>;
1969                         clock-names = "fck";
1970                         #address-cells = <1>;
1971                         #size-cells = <1>;
1972                         ranges = <0x0 0x86000 0x1000>;
1973
1974                         timer10: timer@0 {
1975                                 compatible = "ti,omap3430-timer";
1976                                 reg = <0x0 0x80>;
1977                                 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>;
1978                                 clock-names = "fck";
1979                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1980                                 ti,timer-pwm;
1981                         };
1982                 };
1983
1984                 target-module@88000 {                   /* 0x48088000, ap 45 2e.0 */
1985                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1986                         ti,hwmods = "timer11";
1987                         reg = <0x88000 0x4>,
1988                               <0x88010 0x4>;
1989                         reg-names = "rev", "sysc";
1990                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1991                                          SYSC_OMAP4_SOFTRESET)>;
1992                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1993                                         <SYSC_IDLE_NO>,
1994                                         <SYSC_IDLE_SMART>,
1995                                         <SYSC_IDLE_SMART_WKUP>;
1996                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1997                         clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 0>;
1998                         clock-names = "fck";
1999                         #address-cells = <1>;
2000                         #size-cells = <1>;
2001                         ranges = <0x0 0x88000 0x1000>;
2002
2003                         timer11: timer@0 {
2004                                 compatible = "ti,omap4430-timer";
2005                                 reg = <0x0 0x80>;
2006                                 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>;
2007                                 clock-names = "fck";
2008                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
2009                                 ti,timer-pwm;
2010                         };
2011                 };
2012
2013                 target-module@90000 {                   /* 0x48090000, ap 57 2a.0 */
2014                         compatible = "ti,sysc";
2015                         status = "disabled";
2016                         #address-cells = <1>;
2017                         #size-cells = <1>;
2018                         ranges = <0x0 0x90000 0x2000>;
2019                 };
2020
2021                 target-module@96000 {                   /* 0x48096000, ap 37 26.0 */
2022                         compatible = "ti,sysc-omap2", "ti,sysc";
2023                         ti,hwmods = "mcbsp4";
2024                         reg = <0x9608c 0x4>;
2025                         reg-names = "sysc";
2026                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2027                                          SYSC_OMAP2_ENAWAKEUP |
2028                                          SYSC_OMAP2_SOFTRESET)>;
2029                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2030                                         <SYSC_IDLE_NO>,
2031                                         <SYSC_IDLE_SMART>;
2032                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2033                         clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 0>;
2034                         clock-names = "fck";
2035                         #address-cells = <1>;
2036                         #size-cells = <1>;
2037                         ranges = <0x0 0x96000 0x1000>;
2038
2039                         mcbsp4: mcbsp@0 {
2040                                 compatible = "ti,omap4-mcbsp";
2041                                 reg = <0x0 0xff>; /* L4 Interconnect */
2042                                 reg-names = "mpu";
2043                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2044                                 interrupt-names = "common";
2045                                 ti,buffer-size = <128>;
2046                                 dmas = <&sdma 31>,
2047                                        <&sdma 32>;
2048                                 dma-names = "tx", "rx";
2049                                 status = "disabled";
2050                         };
2051                 };
2052
2053                 target-module@98000 {                   /* 0x48098000, ap 49 22.0 */
2054                         compatible = "ti,sysc-omap4", "ti,sysc";
2055                         ti,hwmods = "mcspi1";
2056                         reg = <0x98000 0x4>,
2057                               <0x98010 0x4>;
2058                         reg-names = "rev", "sysc";
2059                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2060                                          SYSC_OMAP4_SOFTRESET)>;
2061                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2062                                         <SYSC_IDLE_NO>,
2063                                         <SYSC_IDLE_SMART>,
2064                                         <SYSC_IDLE_SMART_WKUP>;
2065                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2066                         clocks = <&l4_per_clkctrl OMAP4_MCSPI1_CLKCTRL 0>;
2067                         clock-names = "fck";
2068                         #address-cells = <1>;
2069                         #size-cells = <1>;
2070                         ranges = <0x0 0x98000 0x1000>;
2071
2072                         mcspi1: spi@0 {
2073                                 compatible = "ti,omap4-mcspi";
2074                                 reg = <0x0 0x200>;
2075                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
2076                                 #address-cells = <1>;
2077                                 #size-cells = <0>;
2078                                 ti,spi-num-cs = <4>;
2079                                 dmas = <&sdma 35>,
2080                                        <&sdma 36>,
2081                                        <&sdma 37>,
2082                                        <&sdma 38>,
2083                                        <&sdma 39>,
2084                                        <&sdma 40>,
2085                                        <&sdma 41>,
2086                                        <&sdma 42>;
2087                                 dma-names = "tx0", "rx0", "tx1", "rx1",
2088                                             "tx2", "rx2", "tx3", "rx3";
2089                         };
2090                 };
2091
2092                 target-module@9a000 {                   /* 0x4809a000, ap 51 2c.0 */
2093                         compatible = "ti,sysc-omap4", "ti,sysc";
2094                         ti,hwmods = "mcspi2";
2095                         reg = <0x9a000 0x4>,
2096                               <0x9a010 0x4>;
2097                         reg-names = "rev", "sysc";
2098                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2099                                          SYSC_OMAP4_SOFTRESET)>;
2100                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2101                                         <SYSC_IDLE_NO>,
2102                                         <SYSC_IDLE_SMART>,
2103                                         <SYSC_IDLE_SMART_WKUP>;
2104                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2105                         clocks = <&l4_per_clkctrl OMAP4_MCSPI2_CLKCTRL 0>;
2106                         clock-names = "fck";
2107                         #address-cells = <1>;
2108                         #size-cells = <1>;
2109                         ranges = <0x0 0x9a000 0x1000>;
2110
2111                         mcspi2: spi@0 {
2112                                 compatible = "ti,omap4-mcspi";
2113                                 reg = <0x0 0x200>;
2114                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
2115                                 #address-cells = <1>;
2116                                 #size-cells = <0>;
2117                                 ti,spi-num-cs = <2>;
2118                                 dmas = <&sdma 43>,
2119                                        <&sdma 44>,
2120                                        <&sdma 45>,
2121                                        <&sdma 46>;
2122                                 dma-names = "tx0", "rx0", "tx1", "rx1";
2123                         };
2124                 };
2125
2126                 target-module@9c000 {                   /* 0x4809c000, ap 53 36.0 */
2127                         compatible = "ti,sysc-omap4", "ti,sysc";
2128                         reg = <0x9c000 0x4>,
2129                               <0x9c010 0x4>;
2130                         reg-names = "rev", "sysc";
2131                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2132                                          SYSC_OMAP4_SOFTRESET)>;
2133                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2134                                         <SYSC_IDLE_NO>,
2135                                         <SYSC_IDLE_SMART>,
2136                                         <SYSC_IDLE_SMART_WKUP>;
2137                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2138                                         <SYSC_IDLE_NO>,
2139                                         <SYSC_IDLE_SMART>,
2140                                         <SYSC_IDLE_SMART_WKUP>;
2141                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2142                         clocks = <&l3_init_clkctrl OMAP4_MMC1_CLKCTRL 0>;
2143                         clock-names = "fck";
2144                         #address-cells = <1>;
2145                         #size-cells = <1>;
2146                         ranges = <0x0 0x9c000 0x1000>;
2147
2148                         mmc1: mmc@0 {
2149                                 compatible = "ti,omap4-hsmmc";
2150                                 reg = <0x0 0x400>;
2151                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
2152                                 ti,dual-volt;
2153                                 ti,needs-special-reset;
2154                                 dmas = <&sdma 61>, <&sdma 62>;
2155                                 dma-names = "tx", "rx";
2156                                 pbias-supply = <&pbias_mmc_reg>;
2157                         };
2158                 };
2159
2160                 target-module@9e000 {                   /* 0x4809e000, ap 55 48.0 */
2161                         compatible = "ti,sysc";
2162                         status = "disabled";
2163                         #address-cells = <1>;
2164                         #size-cells = <1>;
2165                         ranges = <0x0 0x9e000 0x1000>;
2166                 };
2167
2168                 target-module@a2000 {                   /* 0x480a2000, ap 79 3a.0 */
2169                         compatible = "ti,sysc";
2170                         status = "disabled";
2171                         #address-cells = <1>;
2172                         #size-cells = <1>;
2173                         ranges = <0x0 0xa2000 0x1000>;
2174                 };
2175
2176                 target-module@a4000 {                   /* 0x480a4000, ap 59 34.0 */
2177                         compatible = "ti,sysc";
2178                         status = "disabled";
2179                         #address-cells = <1>;
2180                         #size-cells = <1>;
2181                         ranges = <0x00000000 0x000a4000 0x00001000>,
2182                                  <0x00001000 0x000a5000 0x00001000>;
2183                 };
2184
2185                 target-module@a8000 {                   /* 0x480a8000, ap 61 3e.0 */
2186                         compatible = "ti,sysc";
2187                         status = "disabled";
2188                         #address-cells = <1>;
2189                         #size-cells = <1>;
2190                         ranges = <0x0 0xa8000 0x4000>;
2191                 };
2192
2193                 target-module@ad000 {                   /* 0x480ad000, ap 63 50.0 */
2194                         compatible = "ti,sysc-omap4", "ti,sysc";
2195                         reg = <0xad000 0x4>,
2196                               <0xad010 0x4>;
2197                         reg-names = "rev", "sysc";
2198                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2199                                          SYSC_OMAP4_SOFTRESET)>;
2200                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2201                                         <SYSC_IDLE_NO>,
2202                                         <SYSC_IDLE_SMART>,
2203                                         <SYSC_IDLE_SMART_WKUP>;
2204                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2205                                         <SYSC_IDLE_NO>,
2206                                         <SYSC_IDLE_SMART>,
2207                                         <SYSC_IDLE_SMART_WKUP>;
2208                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2209                         clocks = <&l4_per_clkctrl OMAP4_MMC3_CLKCTRL 0>;
2210                         clock-names = "fck";
2211                         #address-cells = <1>;
2212                         #size-cells = <1>;
2213                         ranges = <0x0 0xad000 0x1000>;
2214
2215                         mmc3: mmc@0 {
2216                                 compatible = "ti,omap4-hsmmc";
2217                                 reg = <0x0 0x400>;
2218                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
2219                                 ti,needs-special-reset;
2220                                 dmas = <&sdma 77>, <&sdma 78>;
2221                                 dma-names = "tx", "rx";
2222                         };
2223                 };
2224
2225                 target-module@b0000 {                   /* 0x480b0000, ap 47 40.0 */
2226                         compatible = "ti,sysc";
2227                         status = "disabled";
2228                         #address-cells = <1>;
2229                         #size-cells = <1>;
2230                         ranges = <0x0 0xb0000 0x1000>;
2231                 };
2232
2233                 target-module@b2000 {                   /* 0x480b2000, ap 65 3c.0 */
2234                         compatible = "ti,sysc-omap2", "ti,sysc";
2235                         ti,hwmods = "hdq1w";
2236                         reg = <0xb2000 0x4>,
2237                               <0xb2014 0x4>,
2238                               <0xb2018 0x4>;
2239                         reg-names = "rev", "sysc", "syss";
2240                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2241                                          SYSC_OMAP2_AUTOIDLE)>;
2242                         ti,syss-mask = <1>;
2243                         ti,no-reset-on-init;
2244                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2245                         clocks = <&l4_per_clkctrl OMAP4_HDQ1W_CLKCTRL 0>;
2246                         clock-names = "fck";
2247                         #address-cells = <1>;
2248                         #size-cells = <1>;
2249                         ranges = <0x0 0xb2000 0x1000>;
2250
2251                         hdqw1w: 1w@0 {
2252                                 compatible = "ti,omap3-1w";
2253                                 reg = <0x0 0x1000>;
2254                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
2255                         };
2256                 };
2257
2258                 target-module@b4000 {                   /* 0x480b4000, ap 67 46.0 */
2259                         compatible = "ti,sysc-omap4", "ti,sysc";
2260                         reg = <0xb4000 0x4>,
2261                               <0xb4010 0x4>;
2262                         reg-names = "rev", "sysc";
2263                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2264                                          SYSC_OMAP4_SOFTRESET)>;
2265                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2266                                         <SYSC_IDLE_NO>,
2267                                         <SYSC_IDLE_SMART>,
2268                                         <SYSC_IDLE_SMART_WKUP>;
2269                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2270                                         <SYSC_IDLE_NO>,
2271                                         <SYSC_IDLE_SMART>,
2272                                         <SYSC_IDLE_SMART_WKUP>;
2273                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2274                         clocks = <&l3_init_clkctrl OMAP4_MMC2_CLKCTRL 0>;
2275                         clock-names = "fck";
2276                         #address-cells = <1>;
2277                         #size-cells = <1>;
2278                         ranges = <0x0 0xb4000 0x1000>;
2279
2280                         mmc2: mmc@0 {
2281                                 compatible = "ti,omap4-hsmmc";
2282                                 reg = <0x0 0x400>;
2283                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2284                                 ti,needs-special-reset;
2285                                 dmas = <&sdma 47>, <&sdma 48>;
2286                                 dma-names = "tx", "rx";
2287                         };
2288                 };
2289
2290                 target-module@b8000 {                   /* 0x480b8000, ap 69 58.0 */
2291                         compatible = "ti,sysc-omap4", "ti,sysc";
2292                         ti,hwmods = "mcspi3";
2293                         reg = <0xb8000 0x4>,
2294                               <0xb8010 0x4>;
2295                         reg-names = "rev", "sysc";
2296                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2297                                          SYSC_OMAP4_SOFTRESET)>;
2298                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2299                                         <SYSC_IDLE_NO>,
2300                                         <SYSC_IDLE_SMART>,
2301                                         <SYSC_IDLE_SMART_WKUP>;
2302                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2303                         clocks = <&l4_per_clkctrl OMAP4_MCSPI3_CLKCTRL 0>;
2304                         clock-names = "fck";
2305                         #address-cells = <1>;
2306                         #size-cells = <1>;
2307                         ranges = <0x0 0xb8000 0x1000>;
2308
2309                         mcspi3: spi@0 {
2310                                 compatible = "ti,omap4-mcspi";
2311                                 reg = <0x0 0x200>;
2312                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2313                                 #address-cells = <1>;
2314                                 #size-cells = <0>;
2315                                 ti,spi-num-cs = <2>;
2316                                 dmas = <&sdma 15>, <&sdma 16>;
2317                                 dma-names = "tx0", "rx0";
2318                         };
2319                 };
2320
2321                 target-module@ba000 {                   /* 0x480ba000, ap 71 32.0 */
2322                         compatible = "ti,sysc-omap4", "ti,sysc";
2323                         ti,hwmods = "mcspi4";
2324                         reg = <0xba000 0x4>,
2325                               <0xba010 0x4>;
2326                         reg-names = "rev", "sysc";
2327                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2328                                          SYSC_OMAP4_SOFTRESET)>;
2329                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2330                                         <SYSC_IDLE_NO>,
2331                                         <SYSC_IDLE_SMART>,
2332                                         <SYSC_IDLE_SMART_WKUP>;
2333                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2334                         clocks = <&l4_per_clkctrl OMAP4_MCSPI4_CLKCTRL 0>;
2335                         clock-names = "fck";
2336                         #address-cells = <1>;
2337                         #size-cells = <1>;
2338                         ranges = <0x0 0xba000 0x1000>;
2339
2340                         mcspi4: spi@0 {
2341                                 compatible = "ti,omap4-mcspi";
2342                                 reg = <0x0 0x200>;
2343                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2344                                 #address-cells = <1>;
2345                                 #size-cells = <0>;
2346                                 ti,spi-num-cs = <1>;
2347                                 dmas = <&sdma 70>, <&sdma 71>;
2348                                 dma-names = "tx0", "rx0";
2349                         };
2350                 };
2351
2352                 target-module@d1000 {                   /* 0x480d1000, ap 73 44.0 */
2353                         compatible = "ti,sysc-omap4", "ti,sysc";
2354                         reg = <0xd1000 0x4>,
2355                               <0xd1010 0x4>;
2356                         reg-names = "rev", "sysc";
2357                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2358                                          SYSC_OMAP4_SOFTRESET)>;
2359                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2360                                         <SYSC_IDLE_NO>,
2361                                         <SYSC_IDLE_SMART>,
2362                                         <SYSC_IDLE_SMART_WKUP>;
2363                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2364                                         <SYSC_IDLE_NO>,
2365                                         <SYSC_IDLE_SMART>,
2366                                         <SYSC_IDLE_SMART_WKUP>;
2367                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2368                         clocks = <&l4_per_clkctrl OMAP4_MMC4_CLKCTRL 0>;
2369                         clock-names = "fck";
2370                         #address-cells = <1>;
2371                         #size-cells = <1>;
2372                         ranges = <0x0 0xd1000 0x1000>;
2373
2374                         mmc4: mmc@0 {
2375                                 compatible = "ti,omap4-hsmmc";
2376                                 reg = <0x0 0x400>;
2377                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2378                                 ti,needs-special-reset;
2379                                 dmas = <&sdma 57>, <&sdma 58>;
2380                                 dma-names = "tx", "rx";
2381                         };
2382                 };
2383
2384                 target-module@d5000 {                   /* 0x480d5000, ap 75 4e.0 */
2385                         compatible = "ti,sysc-omap4", "ti,sysc";
2386                         reg = <0xd5000 0x4>,
2387                               <0xd5010 0x4>;
2388                         reg-names = "rev", "sysc";
2389                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2390                                          SYSC_OMAP4_SOFTRESET)>;
2391                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2392                                         <SYSC_IDLE_NO>,
2393                                         <SYSC_IDLE_SMART>,
2394                                         <SYSC_IDLE_SMART_WKUP>;
2395                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2396                                         <SYSC_IDLE_NO>,
2397                                         <SYSC_IDLE_SMART>,
2398                                         <SYSC_IDLE_SMART_WKUP>;
2399                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2400                         clocks = <&l4_per_clkctrl OMAP4_MMC5_CLKCTRL 0>;
2401                         clock-names = "fck";
2402                         #address-cells = <1>;
2403                         #size-cells = <1>;
2404                         ranges = <0x0 0xd5000 0x1000>;
2405
2406                         mmc5: mmc@0 {
2407                                 compatible = "ti,omap4-hsmmc";
2408                                 reg = <0x0 0x400>;
2409                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2410                                 ti,needs-special-reset;
2411                                 dmas = <&sdma 59>, <&sdma 60>;
2412                                 dma-names = "tx", "rx";
2413                         };
2414                 };
2415         };
2416
2417         segment@200000 {                                        /* 0x48200000 */
2418                 compatible = "simple-bus";
2419                 #address-cells = <1>;
2420                 #size-cells = <1>;
2421                 ranges = <0x00150000 0x00350000 0x001000>,      /* ap 77 */
2422                          <0x00151000 0x00351000 0x001000>;      /* ap 78 */
2423
2424                 target-module@150000 {                  /* 0x48350000, ap 77 4c.0 */
2425                         compatible = "ti,sysc-omap2", "ti,sysc";
2426                         reg = <0x150000 0x8>,
2427                               <0x150010 0x8>,
2428                               <0x150090 0x8>;
2429                         reg-names = "rev", "sysc", "syss";
2430                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2431                                          SYSC_OMAP2_ENAWAKEUP |
2432                                          SYSC_OMAP2_SOFTRESET |
2433                                          SYSC_OMAP2_AUTOIDLE)>;
2434                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2435                                         <SYSC_IDLE_NO>,
2436                                         <SYSC_IDLE_SMART>,
2437                                         <SYSC_IDLE_SMART_WKUP>;
2438                         ti,syss-mask = <1>;
2439                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2440                         clocks = <&l4_per_clkctrl OMAP4_I2C4_CLKCTRL 0>;
2441                         clock-names = "fck";
2442                         #address-cells = <1>;
2443                         #size-cells = <1>;
2444                         ranges = <0x0 0x150000 0x1000>;
2445
2446                         i2c4: i2c@0 {
2447                                 compatible = "ti,omap4-i2c";
2448                                 reg = <0x0 0x100>;
2449                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
2450                                 #address-cells = <1>;
2451                                 #size-cells = <0>;
2452                         };
2453                 };
2454         };
2455 };
2456