Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / omap4-l4.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 &l4_cfg {                                               /* 0x4a000000 */
3         compatible = "ti,omap4-l4-cfg", "simple-bus";
4         reg = <0x4a000000 0x800>,
5               <0x4a000800 0x800>,
6               <0x4a001000 0x1000>;
7         reg-names = "ap", "la", "ia0";
8         #address-cells = <1>;
9         #size-cells = <1>;
10         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
11                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
12                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
13                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
14                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
15                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
16                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
17
18         segment@0 {                                     /* 0x4a000000 */
19                 compatible = "simple-bus";
20                 #address-cells = <1>;
21                 #size-cells = <1>;
22                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
23                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
24                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
25                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
26                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
27                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
28                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
29                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
30                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
31                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
32                          <0x00058000 0x00058000 0x004000>,      /* ap 10 */
33                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
34                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
35                          <0x00008000 0x00008000 0x002000>,      /* ap 23 */
36                          <0x0000a000 0x0000a000 0x001000>,      /* ap 24 */
37                          <0x00066000 0x00066000 0x001000>,      /* ap 25 */
38                          <0x00067000 0x00067000 0x001000>,      /* ap 26 */
39                          <0x0005e000 0x0005e000 0x002000>,      /* ap 80 */
40                          <0x00060000 0x00060000 0x001000>,      /* ap 81 */
41                          <0x00064000 0x00064000 0x001000>,      /* ap 86 */
42                          <0x00065000 0x00065000 0x001000>;      /* ap 87 */
43
44                 target-module@2000 {                    /* 0x4a002000, ap 3 06.0 */
45                         compatible = "ti,sysc-omap4", "ti,sysc";
46                         ti,hwmods = "ctrl_module_core";
47                         reg = <0x2000 0x4>,
48                               <0x2010 0x4>;
49                         reg-names = "rev", "sysc";
50                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
51                                         <SYSC_IDLE_NO>,
52                                         <SYSC_IDLE_SMART>,
53                                         <SYSC_IDLE_SMART_WKUP>;
54                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
55                         #address-cells = <1>;
56                         #size-cells = <1>;
57                         ranges = <0x0 0x2000 0x1000>;
58
59                         omap4_scm_core: scm@0 {
60                                 compatible = "ti,omap4-scm-core", "simple-bus";
61                                 reg = <0x0 0x1000>;
62                                 #address-cells = <1>;
63                                 #size-cells = <1>;
64                                 ranges = <0 0 0x1000>;
65
66                                 scm_conf: scm_conf@0 {
67                                         compatible = "syscon";
68                                         reg = <0x0 0x800>;
69                                         #address-cells = <1>;
70                                         #size-cells = <1>;
71                                 };
72
73                                 omap_control_usb2phy: control-phy@300 {
74                                         compatible = "ti,control-phy-usb2";
75                                         reg = <0x300 0x4>;
76                                         reg-names = "power";
77                                 };
78
79                                 omap_control_usbotg: control-phy@33c {
80                                         compatible = "ti,control-phy-otghs";
81                                         reg = <0x33c 0x4>;
82                                         reg-names = "otghs_control";
83                                 };
84                         };
85                 };
86
87                 target-module@4000 {                    /* 0x4a004000, ap 5 02.0 */
88                         compatible = "ti,sysc-omap4", "ti,sysc";
89                         reg = <0x4000 0x4>;
90                         reg-names = "rev";
91                         #address-cells = <1>;
92                         #size-cells = <1>;
93                         ranges = <0x0 0x4000 0x1000>;
94
95                         cm1: cm1@0 {
96                                 compatible = "ti,omap4-cm1", "simple-bus";
97                                 reg = <0x0 0x2000>;
98                                 #address-cells = <1>;
99                                 #size-cells = <1>;
100                                 ranges = <0 0 0x2000>;
101
102                                 cm1_clocks: clocks {
103                                         #address-cells = <1>;
104                                         #size-cells = <0>;
105                                 };
106
107                                 cm1_clockdomains: clockdomains {
108                                 };
109                         };
110                 };
111
112                 target-module@8000 {                    /* 0x4a008000, ap 23 32.0 */
113                         compatible = "ti,sysc-omap4", "ti,sysc";
114                         reg = <0x8000 0x4>;
115                         reg-names = "rev";
116                         #address-cells = <1>;
117                         #size-cells = <1>;
118                         ranges = <0x0 0x8000 0x2000>;
119
120                         cm2: cm2@0 {
121                                 compatible = "ti,omap4-cm2", "simple-bus";
122                                 reg = <0x0 0x2000>;
123                                 #address-cells = <1>;
124                                 #size-cells = <1>;
125                                 ranges = <0 0 0x2000>;
126
127                                 cm2_clocks: clocks {
128                                         #address-cells = <1>;
129                                         #size-cells = <0>;
130                                 };
131
132                                 cm2_clockdomains: clockdomains {
133                                 };
134                         };
135                 };
136
137                 target-module@56000 {                   /* 0x4a056000, ap 7 0a.0 */
138                         compatible = "ti,sysc-omap2", "ti,sysc";
139                         ti,hwmods = "dma_system";
140                         reg = <0x56000 0x4>,
141                               <0x5602c 0x4>,
142                               <0x56028 0x4>;
143                         reg-names = "rev", "sysc", "syss";
144                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
145                                          SYSC_OMAP2_EMUFREE |
146                                          SYSC_OMAP2_SOFTRESET |
147                                          SYSC_OMAP2_AUTOIDLE)>;
148                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
149                                         <SYSC_IDLE_NO>,
150                                         <SYSC_IDLE_SMART>;
151                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
152                                         <SYSC_IDLE_NO>,
153                                         <SYSC_IDLE_SMART>;
154                         ti,syss-mask = <1>;
155                         /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */
156                         clocks = <&l3_dma_clkctrl OMAP4_DMA_SYSTEM_CLKCTRL 0>;
157                         clock-names = "fck";
158                         #address-cells = <1>;
159                         #size-cells = <1>;
160                         ranges = <0x0 0x56000 0x1000>;
161
162                         sdma: dma-controller@0 {
163                                 compatible = "ti,omap4430-sdma";
164                                 reg = <0x0 0x1000>;
165                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
166                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
167                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
168                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
169                                 #dma-cells = <1>;
170                                 dma-channels = <32>;
171                                 dma-requests = <127>;
172                         };
173                 };
174
175                 target-module@58000 {                   /* 0x4a058000, ap 10 0e.0 */
176                         compatible = "ti,sysc-omap2", "ti,sysc";
177                         ti,hwmods = "hsi";
178                         reg = <0x58000 0x4>,
179                               <0x58010 0x4>,
180                               <0x58014 0x4>;
181                         reg-names = "rev", "sysc", "syss";
182                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
183                                          SYSC_OMAP2_SOFTRESET |
184                                          SYSC_OMAP2_AUTOIDLE)>;
185                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
186                                         <SYSC_IDLE_NO>,
187                                         <SYSC_IDLE_SMART>,
188                                         <SYSC_IDLE_SMART_WKUP>;
189                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
190                                         <SYSC_IDLE_NO>,
191                                         <SYSC_IDLE_SMART>,
192                                         <SYSC_IDLE_SMART_WKUP>;
193                         ti,syss-mask = <1>;
194                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
195                         clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
196                         clock-names = "fck";
197                         #address-cells = <1>;
198                         #size-cells = <1>;
199                         ranges = <0x0 0x58000 0x5000>;
200
201                         hsi: hsi@0 {
202                                 compatible = "ti,omap4-hsi";
203                                 reg = <0x0 0x4000>,
204                                       <0x5000 0x1000>;
205                                 reg-names = "sys", "gdd";
206
207                                 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
208                                 clock-names = "hsi_fck";
209
210                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
211                                 interrupt-names = "gdd_mpu";
212
213                                 #address-cells = <1>;
214                                 #size-cells = <1>;
215                                 ranges = <0 0 0x4000>;
216
217                                 hsi_port1: hsi-port@2000 {
218                                         compatible = "ti,omap4-hsi-port";
219                                         reg = <0x2000 0x800>,
220                                               <0x2800 0x800>;
221                                         reg-names = "tx", "rx";
222                                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
223                                 };
224
225                                 hsi_port2: hsi-port@3000 {
226                                         compatible = "ti,omap4-hsi-port";
227                                         reg = <0x3000 0x800>,
228                                               <0x3800 0x800>;
229                                         reg-names = "tx", "rx";
230                                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
231                                 };
232                         };
233                 };
234
235                 target-module@5e000 {                   /* 0x4a05e000, ap 80 68.0 */
236                         compatible = "ti,sysc";
237                         status = "disabled";
238                         #address-cells = <1>;
239                         #size-cells = <1>;
240                         ranges = <0x0 0x5e000 0x2000>;
241                 };
242
243                 target-module@62000 {                   /* 0x4a062000, ap 11 16.0 */
244                         compatible = "ti,sysc-omap2", "ti,sysc";
245                         ti,hwmods = "usb_tll_hs";
246                         reg = <0x62000 0x4>,
247                               <0x62010 0x4>,
248                               <0x62014 0x4>;
249                         reg-names = "rev", "sysc", "syss";
250                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
251                                          SYSC_OMAP2_ENAWAKEUP |
252                                          SYSC_OMAP2_SOFTRESET |
253                                          SYSC_OMAP2_AUTOIDLE)>;
254                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
255                                         <SYSC_IDLE_NO>,
256                                         <SYSC_IDLE_SMART>;
257                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
258                         clocks = <&l3_init_clkctrl OMAP4_USB_TLL_HS_CLKCTRL 0>;
259                         clock-names = "fck";
260                         #address-cells = <1>;
261                         #size-cells = <1>;
262                         ranges = <0x0 0x62000 0x1000>;
263
264                         usbhstll: usbhstll@0 {
265                                 compatible = "ti,usbhs-tll";
266                                 reg = <0x0 0x1000>;
267                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
268                         };
269                 };
270
271                 target-module@64000 {                   /* 0x4a064000, ap 86 1e.0 */
272                         compatible = "ti,sysc-omap4", "ti,sysc";
273                         ti,hwmods = "usb_host_hs";
274                         reg = <0x64000 0x4>,
275                               <0x64010 0x4>,
276                               <0x64014 0x4>;
277                         reg-names = "rev", "sysc", "syss";
278                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
279                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
280                                         <SYSC_IDLE_NO>,
281                                         <SYSC_IDLE_SMART>,
282                                         <SYSC_IDLE_SMART_WKUP>;
283                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
284                                         <SYSC_IDLE_NO>,
285                                         <SYSC_IDLE_SMART>,
286                                         <SYSC_IDLE_SMART_WKUP>;
287                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
288                         clocks = <&l3_init_clkctrl OMAP4_USB_HOST_HS_CLKCTRL 0>;
289                         clock-names = "fck";
290                         #address-cells = <1>;
291                         #size-cells = <1>;
292                         ranges = <0x0 0x64000 0x1000>;
293
294                         usbhshost: usbhshost@0 {
295                                 compatible = "ti,usbhs-host";
296                                 reg = <0x0 0x800>;
297                                 #address-cells = <1>;
298                                 #size-cells = <1>;
299                                 ranges = <0 0 0x1000>;
300                                 clocks = <&init_60m_fclk>,
301                                          <&xclk60mhsp1_ck>,
302                                          <&xclk60mhsp2_ck>;
303                                 clock-names = "refclk_60m_int",
304                                               "refclk_60m_ext_p1",
305                                               "refclk_60m_ext_p2";
306
307                                 usbhsohci: ohci@800 {
308                                         compatible = "ti,ohci-omap3";
309                                         reg = <0x800 0x400>;
310                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
311                                         remote-wakeup-connected;
312                                 };
313
314                                 usbhsehci: ehci@c00 {
315                                         compatible = "ti,ehci-omap";
316                                         reg = <0xc00 0x400>;
317                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
318                                 };
319                         };
320                 };
321
322                 target-module@66000 {                   /* 0x4a066000, ap 25 26.0 */
323                         compatible = "ti,sysc-omap2", "ti,sysc";
324                         ti,hwmods = "mmu_dsp";
325                         reg = <0x66000 0x4>,
326                               <0x66010 0x4>,
327                               <0x66014 0x4>;
328                         reg-names = "rev", "sysc", "syss";
329                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
330                                          SYSC_OMAP2_SOFTRESET |
331                                          SYSC_OMAP2_AUTOIDLE)>;
332                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
333                                         <SYSC_IDLE_NO>,
334                                         <SYSC_IDLE_SMART>;
335                         /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */
336                         clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
337                         clock-names = "fck";
338                         #address-cells = <1>;
339                         #size-cells = <1>;
340                         ranges = <0x0 0x66000 0x1000>;
341
342                         /* mmu_dsp cannot be moved before reset driver */
343                         status = "disabled";
344                 };
345         };
346
347         segment@80000 {                                 /* 0x4a080000 */
348                 compatible = "simple-bus";
349                 #address-cells = <1>;
350                 #size-cells = <1>;
351                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
352                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
353                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
354                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
355                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
356                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
357                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
358                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
359                          <0x00074000 0x000f4000 0x001000>,      /* ap 27 */
360                          <0x00075000 0x000f5000 0x001000>,      /* ap 28 */
361                          <0x00076000 0x000f6000 0x001000>,      /* ap 29 */
362                          <0x00077000 0x000f7000 0x001000>,      /* ap 30 */
363                          <0x00036000 0x000b6000 0x001000>,      /* ap 69 */
364                          <0x00037000 0x000b7000 0x001000>,      /* ap 70 */
365                          <0x0004d000 0x000cd000 0x001000>,      /* ap 78 */
366                          <0x0004e000 0x000ce000 0x001000>,      /* ap 79 */
367                          <0x00029000 0x000a9000 0x001000>,      /* ap 82 */
368                          <0x0002a000 0x000aa000 0x001000>,      /* ap 83 */
369                          <0x0002b000 0x000ab000 0x001000>,      /* ap 84 */
370                          <0x0002c000 0x000ac000 0x001000>,      /* ap 85 */
371                          <0x0002d000 0x000ad000 0x001000>,      /* ap 88 */
372                          <0x0002e000 0x000ae000 0x001000>;      /* ap 89 */
373
374                 target-module@29000 {                   /* 0x4a0a9000, ap 82 04.0 */
375                         compatible = "ti,sysc";
376                         status = "disabled";
377                         #address-cells = <1>;
378                         #size-cells = <1>;
379                         ranges = <0x0 0x29000 0x1000>;
380                 };
381
382                 target-module@2b000 {                   /* 0x4a0ab000, ap 84 12.0 */
383                         compatible = "ti,sysc-omap2", "ti,sysc";
384                         ti,hwmods = "usb_otg_hs";
385                         reg = <0x2b400 0x4>,
386                               <0x2b404 0x4>,
387                               <0x2b408 0x4>;
388                         reg-names = "rev", "sysc", "syss";
389                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
390                                          SYSC_OMAP2_SOFTRESET |
391                                          SYSC_OMAP2_AUTOIDLE)>;
392                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
393                                         <SYSC_IDLE_NO>,
394                                         <SYSC_IDLE_SMART>;
395                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
396                                         <SYSC_IDLE_NO>,
397                                         <SYSC_IDLE_SMART>,
398                                         <SYSC_IDLE_SMART_WKUP>;
399                         ti,syss-mask = <1>;
400                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
401                         clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
402                         clock-names = "fck";
403                         #address-cells = <1>;
404                         #size-cells = <1>;
405                         ranges = <0x0 0x2b000 0x1000>;
406
407                         usb_otg_hs: usb_otg_hs@0 {
408                                 compatible = "ti,omap4-musb";
409                                 reg = <0x0 0x7ff>;
410                                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
411                                 interrupt-names = "mc", "dma";
412                                 usb-phy = <&usb2_phy>;
413                                 phys = <&usb2_phy>;
414                                 phy-names = "usb2-phy";
415                                 multipoint = <1>;
416                                 num-eps = <16>;
417                                 ram-bits = <12>;
418                                 ctrl-module = <&omap_control_usbotg>;
419                         };
420                 };
421
422                 target-module@2d000 {                   /* 0x4a0ad000, ap 88 0c.0 */
423                         compatible = "ti,sysc-omap2", "ti,sysc";
424                         ti,hwmods = "ocp2scp_usb_phy";
425                         reg = <0x2d000 0x4>,
426                               <0x2d010 0x4>,
427                               <0x2d014 0x4>;
428                         reg-names = "rev", "sysc", "syss";
429                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
430                                          SYSC_OMAP2_AUTOIDLE)>;
431                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
432                                         <SYSC_IDLE_NO>,
433                                         <SYSC_IDLE_SMART>;
434                         ti,syss-mask = <1>;
435                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
436                         clocks = <&l3_init_clkctrl OMAP4_OCP2SCP_USB_PHY_CLKCTRL 0>;
437                         clock-names = "fck";
438                         #address-cells = <1>;
439                         #size-cells = <1>;
440                         ranges = <0x0 0x2d000 0x1000>;
441
442                         ocp2scp@0 {
443                                 compatible = "ti,omap-ocp2scp";
444                                 reg = <0x0 0x1f>;
445                                 #address-cells = <1>;
446                                 #size-cells = <1>;
447                                 ranges = <0 0 0x1000>;
448                                 usb2_phy: usb2phy@80 {
449                                         compatible = "ti,omap-usb2";
450                                         reg = <0x80 0x58>;
451                                         ctrl-module = <&omap_control_usb2phy>;
452                                         clocks = <&usb_phy_cm_clk32k>;
453                                         clock-names = "wkupclk";
454                                         #phy-cells = <0>;
455                                 };
456                         };
457                 };
458
459                 target-module@36000 {                   /* 0x4a0b6000, ap 69 60.0 */
460                         compatible = "ti,sysc";
461                         status = "disabled";
462                         #address-cells = <1>;
463                         #size-cells = <1>;
464                         ranges = <0x0 0x36000 0x1000>;
465                 };
466
467                 target-module@4d000 {                   /* 0x4a0cd000, ap 78 58.0 */
468                         compatible = "ti,sysc";
469                         status = "disabled";
470                         #address-cells = <1>;
471                         #size-cells = <1>;
472                         ranges = <0x0 0x4d000 0x1000>;
473                 };
474
475                 target-module@59000 {                   /* 0x4a0d9000, ap 13 1a.0 */
476                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
477                         ti,hwmods = "smartreflex_mpu";
478                         reg = <0x59038 0x4>;
479                         reg-names = "sysc";
480                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
481                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
482                                         <SYSC_IDLE_NO>,
483                                         <SYSC_IDLE_SMART>,
484                                         <SYSC_IDLE_SMART_WKUP>;
485                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
486                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
487                         clock-names = "fck";
488                         #address-cells = <1>;
489                         #size-cells = <1>;
490                         ranges = <0x0 0x59000 0x1000>;
491
492                         smartreflex_mpu: smartreflex@0 {
493                                 compatible = "ti,omap4-smartreflex-mpu";
494                                 reg = <0x0 0x80>;
495                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
496                         };
497                 };
498
499                 target-module@5b000 {                   /* 0x4a0db000, ap 15 08.0 */
500                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
501                         ti,hwmods = "smartreflex_iva";
502                         reg = <0x5b038 0x4>;
503                         reg-names = "sysc";
504                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
505                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
506                                         <SYSC_IDLE_NO>,
507                                         <SYSC_IDLE_SMART>,
508                                         <SYSC_IDLE_SMART_WKUP>;
509                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
510                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
511                         clock-names = "fck";
512                         #address-cells = <1>;
513                         #size-cells = <1>;
514                         ranges = <0x0 0x5b000 0x1000>;
515
516                         smartreflex_iva: smartreflex@0 {
517                                 compatible = "ti,omap4-smartreflex-iva";
518                                 reg = <0x0 0x80>;
519                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
520                         };
521                 };
522
523                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 22.0 */
524                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
525                         ti,hwmods = "smartreflex_core";
526                         reg = <0x5d038 0x4>;
527                         reg-names = "sysc";
528                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
529                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
530                                         <SYSC_IDLE_NO>,
531                                         <SYSC_IDLE_SMART>,
532                                         <SYSC_IDLE_SMART_WKUP>;
533                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
534                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
535                         clock-names = "fck";
536                         #address-cells = <1>;
537                         #size-cells = <1>;
538                         ranges = <0x0 0x5d000 0x1000>;
539
540                         smartreflex_core: smartreflex@0 {
541                                 compatible = "ti,omap4-smartreflex-core";
542                                 reg = <0x0 0x80>;
543                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
544                         };
545                 };
546
547                 target-module@60000 {                   /* 0x4a0e0000, ap 19 1c.0 */
548                         compatible = "ti,sysc";
549                         status = "disabled";
550                         #address-cells = <1>;
551                         #size-cells = <1>;
552                         ranges = <0x0 0x60000 0x1000>;
553                 };
554
555                 target-module@74000 {                   /* 0x4a0f4000, ap 27 24.0 */
556                         compatible = "ti,sysc-omap4", "ti,sysc";
557                         ti,hwmods = "mailbox";
558                         reg = <0x74000 0x4>,
559                               <0x74010 0x4>;
560                         reg-names = "rev", "sysc";
561                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
562                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
563                                         <SYSC_IDLE_NO>,
564                                         <SYSC_IDLE_SMART>;
565                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
566                         clocks = <&l4_cfg_clkctrl OMAP4_MAILBOX_CLKCTRL 0>;
567                         clock-names = "fck";
568                         #address-cells = <1>;
569                         #size-cells = <1>;
570                         ranges = <0x0 0x74000 0x1000>;
571
572                         mailbox: mailbox@0 {
573                                 compatible = "ti,omap4-mailbox";
574                                 reg = <0x0 0x200>;
575                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
576                                 #mbox-cells = <1>;
577                                 ti,mbox-num-users = <3>;
578                                 ti,mbox-num-fifos = <8>;
579                                 mbox_ipu: mbox_ipu {
580                                         ti,mbox-tx = <0 0 0>;
581                                         ti,mbox-rx = <1 0 0>;
582                                 };
583                                 mbox_dsp: mbox_dsp {
584                                         ti,mbox-tx = <3 0 0>;
585                                         ti,mbox-rx = <2 0 0>;
586                                 };
587                         };
588                 };
589
590                 target-module@76000 {                   /* 0x4a0f6000, ap 29 3a.0 */
591                         compatible = "ti,sysc-omap2", "ti,sysc";
592                         ti,hwmods = "spinlock";
593                         reg = <0x76000 0x4>,
594                               <0x76010 0x4>,
595                               <0x76014 0x4>;
596                         reg-names = "rev", "sysc", "syss";
597                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
598                                          SYSC_OMAP2_ENAWAKEUP |
599                                          SYSC_OMAP2_SOFTRESET |
600                                          SYSC_OMAP2_AUTOIDLE)>;
601                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
602                                         <SYSC_IDLE_NO>,
603                                         <SYSC_IDLE_SMART>;
604                         ti,syss-mask = <1>;
605                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
606                         clocks = <&l4_cfg_clkctrl OMAP4_SPINLOCK_CLKCTRL 0>;
607                         clock-names = "fck";
608                         #address-cells = <1>;
609                         #size-cells = <1>;
610                         ranges = <0x0 0x76000 0x1000>;
611
612                         hwspinlock: spinlock@0 {
613                                 compatible = "ti,omap4-hwspinlock";
614                                 reg = <0x0 0x1000>;
615                                 #hwlock-cells = <1>;
616                         };
617                 };
618         };
619
620         segment@100000 {                                        /* 0x4a100000 */
621                 compatible = "simple-bus";
622                 #address-cells = <1>;
623                 #size-cells = <1>;
624                 ranges = <0x00000000 0x00100000 0x001000>,      /* ap 21 */
625                          <0x00001000 0x00101000 0x001000>,      /* ap 22 */
626                          <0x00002000 0x00102000 0x001000>,      /* ap 61 */
627                          <0x00003000 0x00103000 0x001000>,      /* ap 62 */
628                          <0x00008000 0x00108000 0x001000>,      /* ap 63 */
629                          <0x00009000 0x00109000 0x001000>,      /* ap 64 */
630                          <0x0000a000 0x0010a000 0x001000>,      /* ap 65 */
631                          <0x0000b000 0x0010b000 0x001000>;      /* ap 66 */
632
633                 target-module@0 {                       /* 0x4a100000, ap 21 2a.0 */
634                         compatible = "ti,sysc-omap4", "ti,sysc";
635                         ti,hwmods = "ctrl_module_pad_core";
636                         reg = <0x0 0x4>,
637                               <0x10 0x4>;
638                         reg-names = "rev", "sysc";
639                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
640                                         <SYSC_IDLE_NO>,
641                                         <SYSC_IDLE_SMART>,
642                                         <SYSC_IDLE_SMART_WKUP>;
643                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
644                         #address-cells = <1>;
645                         #size-cells = <1>;
646                         ranges = <0x0 0x0 0x1000>;
647
648                         omap4_pmx_core: pinmux@40 {
649                                 compatible = "ti,omap4-padconf",
650                                              "pinctrl-single";
651                                 reg = <0x40 0x0196>;
652                                 #address-cells = <1>;
653                                 #size-cells = <0>;
654                                 #pinctrl-cells = <1>;
655                                 #interrupt-cells = <1>;
656                                 interrupt-controller;
657                                 pinctrl-single,register-width = <16>;
658                                 pinctrl-single,function-mask = <0x7fff>;
659                         };
660
661                         omap4_padconf_global: omap4_padconf_global@5a0 {
662                                 compatible = "syscon",
663                                              "simple-bus";
664                                 reg = <0x5a0 0x170>;
665                                 #address-cells = <1>;
666                                 #size-cells = <1>;
667                                 ranges = <0 0x5a0 0x170>;
668
669                                 pbias_regulator: pbias_regulator@60 {
670                                         compatible = "ti,pbias-omap4", "ti,pbias-omap";
671                                         reg = <0x60 0x4>;
672                                         syscon = <&omap4_padconf_global>;
673                                         pbias_mmc_reg: pbias_mmc_omap4 {
674                                                 regulator-name = "pbias_mmc_omap4";
675                                                 regulator-min-microvolt = <1800000>;
676                                                 regulator-max-microvolt = <3000000>;
677                                         };
678                                 };
679                         };
680                 };
681
682                 target-module@2000 {                    /* 0x4a102000, ap 61 3c.0 */
683                         compatible = "ti,sysc";
684                         status = "disabled";
685                         #address-cells = <1>;
686                         #size-cells = <1>;
687                         ranges = <0x0 0x2000 0x1000>;
688                 };
689
690                 target-module@8000 {                    /* 0x4a108000, ap 63 62.0 */
691                         compatible = "ti,sysc";
692                         status = "disabled";
693                         #address-cells = <1>;
694                         #size-cells = <1>;
695                         ranges = <0x0 0x8000 0x1000>;
696                 };
697
698                 target-module@a000 {                    /* 0x4a10a000, ap 65 50.0 */
699                         compatible = "ti,sysc-omap4", "ti,sysc";
700                         ti,hwmods = "fdif";
701                         reg = <0xa000 0x4>,
702                               <0xa010 0x4>;
703                         reg-names = "rev", "sysc";
704                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
705                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
706                                         <SYSC_IDLE_NO>,
707                                         <SYSC_IDLE_SMART>;
708                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
709                                         <SYSC_IDLE_NO>,
710                                         <SYSC_IDLE_SMART>;
711                         ti,sysc-delay-us = <2>;
712                         /* Domains (V, P, C): core, cam_pwrdm, iss_clkdm */
713                         clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
714                         clock-names = "fck";
715                         #address-cells = <1>;
716                         #size-cells = <1>;
717                         ranges = <0x0 0xa000 0x1000>;
718
719                         /* No child device binding or driver in mainline */
720                 };
721         };
722
723         segment@180000 {                                        /* 0x4a180000 */
724                 compatible = "simple-bus";
725                 #address-cells = <1>;
726                 #size-cells = <1>;
727         };
728
729         segment@200000 {                                        /* 0x4a200000 */
730                 compatible = "simple-bus";
731                 #address-cells = <1>;
732                 #size-cells = <1>;
733                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 31 */
734                          <0x0001f000 0x0021f000 0x001000>,      /* ap 32 */
735                          <0x0000a000 0x0020a000 0x001000>,      /* ap 33 */
736                          <0x0000b000 0x0020b000 0x001000>,      /* ap 34 */
737                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
738                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
739                          <0x00006000 0x00206000 0x001000>,      /* ap 37 */
740                          <0x00007000 0x00207000 0x001000>,      /* ap 38 */
741                          <0x00012000 0x00212000 0x001000>,      /* ap 39 */
742                          <0x00013000 0x00213000 0x001000>,      /* ap 40 */
743                          <0x0000c000 0x0020c000 0x001000>,      /* ap 41 */
744                          <0x0000d000 0x0020d000 0x001000>,      /* ap 42 */
745                          <0x00010000 0x00210000 0x001000>,      /* ap 43 */
746                          <0x00011000 0x00211000 0x001000>,      /* ap 44 */
747                          <0x00016000 0x00216000 0x001000>,      /* ap 45 */
748                          <0x00017000 0x00217000 0x001000>,      /* ap 46 */
749                          <0x00014000 0x00214000 0x001000>,      /* ap 47 */
750                          <0x00015000 0x00215000 0x001000>,      /* ap 48 */
751                          <0x00018000 0x00218000 0x001000>,      /* ap 49 */
752                          <0x00019000 0x00219000 0x001000>,      /* ap 50 */
753                          <0x00020000 0x00220000 0x001000>,      /* ap 51 */
754                          <0x00021000 0x00221000 0x001000>,      /* ap 52 */
755                          <0x00026000 0x00226000 0x001000>,      /* ap 53 */
756                          <0x00027000 0x00227000 0x001000>,      /* ap 54 */
757                          <0x00028000 0x00228000 0x001000>,      /* ap 55 */
758                          <0x00029000 0x00229000 0x001000>,      /* ap 56 */
759                          <0x0002a000 0x0022a000 0x001000>,      /* ap 57 */
760                          <0x0002b000 0x0022b000 0x001000>,      /* ap 58 */
761                          <0x0001c000 0x0021c000 0x001000>,      /* ap 59 */
762                          <0x0001d000 0x0021d000 0x001000>;      /* ap 60 */
763
764                 target-module@4000 {                    /* 0x4a204000, ap 35 42.0 */
765                         compatible = "ti,sysc";
766                         status = "disabled";
767                         #address-cells = <1>;
768                         #size-cells = <1>;
769                         ranges = <0x0 0x4000 0x1000>;
770                 };
771
772                 target-module@6000 {                    /* 0x4a206000, ap 37 4a.0 */
773                         compatible = "ti,sysc";
774                         status = "disabled";
775                         #address-cells = <1>;
776                         #size-cells = <1>;
777                         ranges = <0x0 0x6000 0x1000>;
778                 };
779
780                 target-module@a000 {                    /* 0x4a20a000, ap 33 2c.0 */
781                         compatible = "ti,sysc";
782                         status = "disabled";
783                         #address-cells = <1>;
784                         #size-cells = <1>;
785                         ranges = <0x0 0xa000 0x1000>;
786                 };
787
788                 target-module@c000 {                    /* 0x4a20c000, ap 41 20.0 */
789                         compatible = "ti,sysc";
790                         status = "disabled";
791                         #address-cells = <1>;
792                         #size-cells = <1>;
793                         ranges = <0x0 0xc000 0x1000>;
794                 };
795
796                 target-module@10000 {                   /* 0x4a210000, ap 43 52.0 */
797                         compatible = "ti,sysc";
798                         status = "disabled";
799                         #address-cells = <1>;
800                         #size-cells = <1>;
801                         ranges = <0x0 0x10000 0x1000>;
802                 };
803
804                 target-module@12000 {                   /* 0x4a212000, ap 39 18.0 */
805                         compatible = "ti,sysc";
806                         status = "disabled";
807                         #address-cells = <1>;
808                         #size-cells = <1>;
809                         ranges = <0x0 0x12000 0x1000>;
810                 };
811
812                 target-module@14000 {                   /* 0x4a214000, ap 47 30.0 */
813                         compatible = "ti,sysc";
814                         status = "disabled";
815                         #address-cells = <1>;
816                         #size-cells = <1>;
817                         ranges = <0x0 0x14000 0x1000>;
818                 };
819
820                 target-module@16000 {                   /* 0x4a216000, ap 45 28.0 */
821                         compatible = "ti,sysc";
822                         status = "disabled";
823                         #address-cells = <1>;
824                         #size-cells = <1>;
825                         ranges = <0x0 0x16000 0x1000>;
826                 };
827
828                 target-module@18000 {                   /* 0x4a218000, ap 49 38.0 */
829                         compatible = "ti,sysc";
830                         status = "disabled";
831                         #address-cells = <1>;
832                         #size-cells = <1>;
833                         ranges = <0x0 0x18000 0x1000>;
834                 };
835
836                 target-module@1c000 {                   /* 0x4a21c000, ap 59 5a.0 */
837                         compatible = "ti,sysc";
838                         status = "disabled";
839                         #address-cells = <1>;
840                         #size-cells = <1>;
841                         ranges = <0x0 0x1c000 0x1000>;
842                 };
843
844                 target-module@1e000 {                   /* 0x4a21e000, ap 31 10.0 */
845                         compatible = "ti,sysc";
846                         status = "disabled";
847                         #address-cells = <1>;
848                         #size-cells = <1>;
849                         ranges = <0x0 0x1e000 0x1000>;
850                 };
851
852                 target-module@20000 {                   /* 0x4a220000, ap 51 40.0 */
853                         compatible = "ti,sysc";
854                         status = "disabled";
855                         #address-cells = <1>;
856                         #size-cells = <1>;
857                         ranges = <0x0 0x20000 0x1000>;
858                 };
859
860                 target-module@26000 {                   /* 0x4a226000, ap 53 34.0 */
861                         compatible = "ti,sysc";
862                         status = "disabled";
863                         #address-cells = <1>;
864                         #size-cells = <1>;
865                         ranges = <0x0 0x26000 0x1000>;
866                 };
867
868                 target-module@28000 {                   /* 0x4a228000, ap 55 2e.0 */
869                         compatible = "ti,sysc";
870                         status = "disabled";
871                         #address-cells = <1>;
872                         #size-cells = <1>;
873                         ranges = <0x0 0x28000 0x1000>;
874                 };
875
876                 target-module@2a000 {                   /* 0x4a22a000, ap 57 48.0 */
877                         compatible = "ti,sysc";
878                         status = "disabled";
879                         #address-cells = <1>;
880                         #size-cells = <1>;
881                         ranges = <0x0 0x2a000 0x1000>;
882                 };
883         };
884
885         segment@280000 {                                        /* 0x4a280000 */
886                 compatible = "simple-bus";
887                 #address-cells = <1>;
888                 #size-cells = <1>;
889         };
890
891         l4_cfg_segment_300000: segment@300000 {                 /* 0x4a300000 */
892                 compatible = "simple-bus";
893                 #address-cells = <1>;
894                 #size-cells = <1>;
895                 ranges = <0x00000000 0x00300000 0x020000>,      /* ap 67 */
896                          <0x00040000 0x00340000 0x001000>,      /* ap 68 */
897                          <0x00020000 0x00320000 0x004000>,      /* ap 71 */
898                          <0x00024000 0x00324000 0x002000>,      /* ap 72 */
899                          <0x00026000 0x00326000 0x001000>,      /* ap 73 */
900                          <0x00027000 0x00327000 0x001000>,      /* ap 74 */
901                          <0x00028000 0x00328000 0x001000>,      /* ap 75 */
902                          <0x00029000 0x00329000 0x001000>,      /* ap 76 */
903                          <0x00030000 0x00330000 0x010000>,      /* ap 77 */
904                          <0x0002a000 0x0032a000 0x002000>,      /* ap 90 */
905                          <0x0002c000 0x0032c000 0x004000>;      /* ap 91 */
906
907                 l4_cfg_target_0: target-module@0 {      /* 0x4a300000, ap 67 14.0 */
908                         compatible = "ti,sysc";
909                         status = "disabled";
910                         #address-cells = <1>;
911                         #size-cells = <1>;
912                         ranges = <0x00000000 0x00000000 0x00020000>,
913                                  <0x00020000 0x00020000 0x00004000>,
914                                  <0x00024000 0x00024000 0x00002000>,
915                                  <0x00026000 0x00026000 0x00001000>,
916                                  <0x00027000 0x00027000 0x00001000>,
917                                  <0x00028000 0x00028000 0x00001000>,
918                                  <0x00029000 0x00029000 0x00001000>,
919                                  <0x0002a000 0x0002a000 0x00002000>,
920                                  <0x0002c000 0x0002c000 0x00004000>,
921                                  <0x00030000 0x00030000 0x00010000>;
922                 };
923         };
924 };
925
926 &l4_wkup {                                              /* 0x4a300000 */
927         compatible = "ti,omap4-l4-wkup", "simple-bus";
928         reg = <0x4a300000 0x800>,
929               <0x4a300800 0x800>,
930               <0x4a301000 0x1000>;
931         reg-names = "ap", "la", "ia0";
932         #address-cells = <1>;
933         #size-cells = <1>;
934         ranges = <0x00000000 0x4a300000 0x010000>,      /* segment 0 */
935                  <0x00010000 0x4a310000 0x010000>,      /* segment 1 */
936                  <0x00020000 0x4a320000 0x010000>;      /* segment 2 */
937
938         segment@0 {                                     /* 0x4a300000 */
939                 compatible = "simple-bus";
940                 #address-cells = <1>;
941                 #size-cells = <1>;
942                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
943                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
944                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
945                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
946                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
947                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
948                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
949                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
950                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
951                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
952                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
953
954                 target-module@4000 {                    /* 0x4a304000, ap 17 24.0 */
955                         compatible = "ti,sysc-omap2", "ti,sysc";
956                         ti,hwmods = "counter_32k";
957                         reg = <0x4000 0x4>,
958                               <0x4004 0x4>;
959                         reg-names = "rev", "sysc";
960                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
961                                         <SYSC_IDLE_NO>;
962                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
963                         clocks = <&l4_wkup_clkctrl OMAP4_COUNTER_32K_CLKCTRL 0>;
964                         clock-names = "fck";
965                         #address-cells = <1>;
966                         #size-cells = <1>;
967                         ranges = <0x0 0x4000 0x1000>;
968
969                         counter32k: counter@0 {
970                                 compatible = "ti,omap-counter32k";
971                                 reg = <0x0 0x20>;
972                         };
973                 };
974
975                 target-module@6000 {                    /* 0x4a306000, ap 3 08.0 */
976                         compatible = "ti,sysc-omap4", "ti,sysc";
977                         reg = <0x6000 0x4>;
978                         reg-names = "rev";
979                         #address-cells = <1>;
980                         #size-cells = <1>;
981                         ranges = <0x0 0x6000 0x2000>;
982
983                         prm: prm@0 {
984                                 compatible = "ti,omap4-prm";
985                                 reg = <0x0 0x2000>;
986                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
987                                 #address-cells = <1>;
988                                 #size-cells = <1>;
989                                 ranges = <0 0 0x2000>;
990
991                                 prm_clocks: clocks {
992                                         #address-cells = <1>;
993                                         #size-cells = <0>;
994                                 };
995
996                                 prm_clockdomains: clockdomains {
997                                 };
998                         };
999                 };
1000
1001                 target-module@a000 {                    /* 0x4a30a000, ap 15 34.0 */
1002                         compatible = "ti,sysc-omap4", "ti,sysc";
1003                         reg = <0xa000 0x4>;
1004                         reg-names = "rev";
1005                         #address-cells = <1>;
1006                         #size-cells = <1>;
1007                         ranges = <0x0 0xa000 0x1000>;
1008
1009                         scrm: scrm@0 {
1010                                 compatible = "ti,omap4-scrm";
1011                                 reg = <0x0 0x2000>;
1012
1013                                 scrm_clocks: clocks {
1014                                         #address-cells = <1>;
1015                                         #size-cells = <0>;
1016                                 };
1017
1018                                 scrm_clockdomains: clockdomains {
1019                                 };
1020                         };
1021                 };
1022
1023                 target-module@c000 {                    /* 0x4a30c000, ap 19 2c.0 */
1024                         compatible = "ti,sysc-omap4", "ti,sysc";
1025                         ti,hwmods = "ctrl_module_wkup";
1026                         reg = <0xc000 0x4>,
1027                               <0xc010 0x4>;
1028                         reg-names = "rev", "sysc";
1029                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1030                                         <SYSC_IDLE_NO>,
1031                                         <SYSC_IDLE_SMART>,
1032                                         <SYSC_IDLE_SMART_WKUP>;
1033                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1034                         #address-cells = <1>;
1035                         #size-cells = <1>;
1036                         ranges = <0x0 0xc000 0x1000>;
1037
1038                         omap4_scm_wkup: scm@c000 {
1039                                 compatible = "ti,omap4-scm-wkup";
1040                                 reg = <0xc000 0x1000>;
1041                         };
1042                 };
1043         };
1044
1045         segment@10000 {                                 /* 0x4a310000 */
1046                 compatible = "simple-bus";
1047                 #address-cells = <1>;
1048                 #size-cells = <1>;
1049                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
1050                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
1051                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
1052                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
1053                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
1054                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
1055                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
1056                          <0x0000d000 0x0001d000 0x001000>,      /* ap 12 */
1057                          <0x0000e000 0x0001e000 0x001000>,      /* ap 21 */
1058                          <0x0000f000 0x0001f000 0x001000>;      /* ap 22 */
1059
1060                 gpio1_target: target-module@0 {                 /* 0x4a310000, ap 5 14.0 */
1061                         compatible = "ti,sysc-omap2", "ti,sysc";
1062                         ti,hwmods = "gpio1";
1063                         reg = <0x0 0x4>,
1064                               <0x10 0x4>,
1065                               <0x114 0x4>;
1066                         reg-names = "rev", "sysc", "syss";
1067                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1068                                          SYSC_OMAP2_SOFTRESET |
1069                                          SYSC_OMAP2_AUTOIDLE)>;
1070                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1071                                         <SYSC_IDLE_NO>,
1072                                         <SYSC_IDLE_SMART>,
1073                                         <SYSC_IDLE_SMART_WKUP>;
1074                         ti,syss-mask = <1>;
1075                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1076                         clocks = <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 0>,
1077                                  <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 8>;
1078                         clock-names = "fck", "dbclk";
1079                         #address-cells = <1>;
1080                         #size-cells = <1>;
1081                         ranges = <0x0 0x0 0x1000>;
1082
1083                         gpio1: gpio@0 {
1084                                 compatible = "ti,omap4-gpio";
1085                                 reg = <0x0 0x200>;
1086                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1087                                 ti,gpio-always-on;
1088                                 gpio-controller;
1089                                 #gpio-cells = <2>;
1090                                 interrupt-controller;
1091                                 #interrupt-cells = <2>;
1092                         };
1093                 };
1094
1095                 target-module@4000 {                    /* 0x4a314000, ap 7 18.0 */
1096                         compatible = "ti,sysc-omap2", "ti,sysc";
1097                         ti,hwmods = "wd_timer2";
1098                         reg = <0x4000 0x4>,
1099                               <0x4010 0x4>,
1100                               <0x4014 0x4>;
1101                         reg-names = "rev", "sysc", "syss";
1102                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
1103                                          SYSC_OMAP2_SOFTRESET)>;
1104                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1105                                         <SYSC_IDLE_NO>,
1106                                         <SYSC_IDLE_SMART>,
1107                                         <SYSC_IDLE_SMART_WKUP>;
1108                         ti,syss-mask = <1>;
1109                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1110                         clocks = <&l4_wkup_clkctrl OMAP4_WD_TIMER2_CLKCTRL 0>;
1111                         clock-names = "fck";
1112                         #address-cells = <1>;
1113                         #size-cells = <1>;
1114                         ranges = <0x0 0x4000 0x1000>;
1115
1116                         wdt2: wdt@0 {
1117                                 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
1118                                 reg = <0x0 0x80>;
1119                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
1120                         };
1121                 };
1122
1123                 target-module@8000 {                    /* 0x4a318000, ap 9 1c.0 */
1124                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1125                         ti,hwmods = "timer1";
1126                         reg = <0x8000 0x4>,
1127                               <0x8010 0x4>,
1128                               <0x8014 0x4>;
1129                         reg-names = "rev", "sysc", "syss";
1130                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1131                                          SYSC_OMAP2_EMUFREE |
1132                                          SYSC_OMAP2_ENAWAKEUP |
1133                                          SYSC_OMAP2_SOFTRESET |
1134                                          SYSC_OMAP2_AUTOIDLE)>;
1135                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1136                                         <SYSC_IDLE_NO>,
1137                                         <SYSC_IDLE_SMART>;
1138                         ti,syss-mask = <1>;
1139                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1140                         clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 0>;
1141                         clock-names = "fck";
1142                         #address-cells = <1>;
1143                         #size-cells = <1>;
1144                         ranges = <0x0 0x8000 0x1000>;
1145
1146                         timer1: timer@0 {
1147                                 compatible = "ti,omap3430-timer";
1148                                 reg = <0x0 0x80>;
1149                                 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
1150                                 clock-names = "fck";
1151                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1152                                 ti,timer-alwon;
1153                         };
1154                 };
1155
1156                 target-module@c000 {                    /* 0x4a31c000, ap 11 20.0 */
1157                         compatible = "ti,sysc-omap2", "ti,sysc";
1158                         ti,hwmods = "kbd";
1159                         reg = <0xc000 0x4>,
1160                               <0xc010 0x4>,
1161                               <0xc014 0x4>;
1162                         reg-names = "rev", "sysc", "syss";
1163                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1164                                          SYSC_OMAP2_EMUFREE |
1165                                          SYSC_OMAP2_ENAWAKEUP |
1166                                          SYSC_OMAP2_SOFTRESET |
1167                                          SYSC_OMAP2_AUTOIDLE)>;
1168                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1169                                         <SYSC_IDLE_NO>,
1170                                         <SYSC_IDLE_SMART>;
1171                         ti,syss-mask = <1>;
1172                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1173                         clocks = <&l4_wkup_clkctrl OMAP4_KBD_CLKCTRL 0>;
1174                         clock-names = "fck";
1175                         #address-cells = <1>;
1176                         #size-cells = <1>;
1177                         ranges = <0x0 0xc000 0x1000>;
1178
1179                         keypad: keypad@0 {
1180                                 compatible = "ti,omap4-keypad";
1181                                 reg = <0x0 0x80>;
1182                                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1183                                 reg-names = "mpu";
1184                         };
1185                 };
1186
1187                 target-module@e000 {                    /* 0x4a31e000, ap 21 30.0 */
1188                         compatible = "ti,sysc-omap4", "ti,sysc";
1189                         ti,hwmods = "ctrl_module_pad_wkup";
1190                         reg = <0xe000 0x4>,
1191                               <0xe010 0x4>;
1192                         reg-names = "rev", "sysc";
1193                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1194                                         <SYSC_IDLE_NO>,
1195                                         <SYSC_IDLE_SMART>,
1196                                         <SYSC_IDLE_SMART_WKUP>;
1197                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1198                         #address-cells = <1>;
1199                         #size-cells = <1>;
1200                         ranges = <0x0 0xe000 0x1000>;
1201
1202                         omap4_pmx_wkup: pinmux@40 {
1203                                 compatible = "ti,omap4-padconf",
1204                                              "pinctrl-single";
1205                                 reg = <0x40 0x0038>;
1206                                 #address-cells = <1>;
1207                                 #size-cells = <0>;
1208                                 #pinctrl-cells = <1>;
1209                                 #interrupt-cells = <1>;
1210                                 interrupt-controller;
1211                                 pinctrl-single,register-width = <16>;
1212                                 pinctrl-single,function-mask = <0x7fff>;
1213                         };
1214                 };
1215         };
1216
1217         segment@20000 {                                 /* 0x4a320000 */
1218                 compatible = "simple-bus";
1219                 #address-cells = <1>;
1220                 #size-cells = <1>;
1221                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
1222                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
1223                          <0x00000000 0x00020000 0x001000>,      /* ap 23 */
1224                          <0x00001000 0x00021000 0x001000>,      /* ap 24 */
1225                          <0x00002000 0x00022000 0x001000>,      /* ap 25 */
1226                          <0x00003000 0x00023000 0x001000>,      /* ap 26 */
1227                          <0x00004000 0x00024000 0x001000>,      /* ap 27 */
1228                          <0x00005000 0x00025000 0x001000>,      /* ap 28 */
1229                          <0x00007000 0x00027000 0x000400>,      /* ap 29 */
1230                          <0x00008000 0x00028000 0x000800>,      /* ap 30 */
1231                          <0x00009000 0x00029000 0x000400>;      /* ap 31 */
1232
1233                 target-module@0 {                       /* 0x4a320000, ap 23 04.0 */
1234                         compatible = "ti,sysc";
1235                         status = "disabled";
1236                         #address-cells = <1>;
1237                         #size-cells = <1>;
1238                         ranges = <0x0 0x0 0x1000>;
1239                 };
1240
1241                 target-module@2000 {                    /* 0x4a322000, ap 25 0c.0 */
1242                         compatible = "ti,sysc";
1243                         status = "disabled";
1244                         #address-cells = <1>;
1245                         #size-cells = <1>;
1246                         ranges = <0x0 0x2000 0x1000>;
1247                 };
1248
1249                 target-module@4000 {                    /* 0x4a324000, ap 27 10.0 */
1250                         compatible = "ti,sysc";
1251                         status = "disabled";
1252                         #address-cells = <1>;
1253                         #size-cells = <1>;
1254                         ranges = <0x0 0x4000 0x1000>;
1255                 };
1256
1257                 target-module@6000 {                    /* 0x4a326000, ap 13 28.0 */
1258                         compatible = "ti,sysc";
1259                         status = "disabled";
1260                         #address-cells = <1>;
1261                         #size-cells = <1>;
1262                         ranges = <0x00000000 0x00006000 0x00001000>,
1263                                  <0x00001000 0x00007000 0x00000400>,
1264                                  <0x00002000 0x00008000 0x00000800>,
1265                                  <0x00003000 0x00009000 0x00000400>;
1266                 };
1267         };
1268 };
1269
1270 &l4_per {                                               /* 0x48000000 */
1271         compatible = "ti,omap4-l4-per", "simple-bus";
1272         reg = <0x48000000 0x800>,
1273               <0x48000800 0x800>,
1274               <0x48001000 0x400>,
1275               <0x48001400 0x400>,
1276               <0x48001800 0x400>,
1277               <0x48001c00 0x400>;
1278         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
1279         #address-cells = <1>;
1280         #size-cells = <1>;
1281         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
1282                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
1283
1284         segment@0 {                                     /* 0x48000000 */
1285                 compatible = "simple-bus";
1286                 #address-cells = <1>;
1287                 #size-cells = <1>;
1288                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
1289                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
1290                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
1291                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
1292                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
1293                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
1294                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
1295                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
1296                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
1297                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
1298                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
1299                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
1300                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
1301                          <0x00040000 0x00040000 0x010000>,      /* ap 13 */
1302                          <0x00050000 0x00050000 0x001000>,      /* ap 14 */
1303                          <0x00055000 0x00055000 0x001000>,      /* ap 15 */
1304                          <0x00056000 0x00056000 0x001000>,      /* ap 16 */
1305                          <0x00057000 0x00057000 0x001000>,      /* ap 17 */
1306                          <0x00058000 0x00058000 0x001000>,      /* ap 18 */
1307                          <0x00059000 0x00059000 0x001000>,      /* ap 19 */
1308                          <0x0005a000 0x0005a000 0x001000>,      /* ap 20 */
1309                          <0x0005b000 0x0005b000 0x001000>,      /* ap 21 */
1310                          <0x0005c000 0x0005c000 0x001000>,      /* ap 22 */
1311                          <0x0005d000 0x0005d000 0x001000>,      /* ap 23 */
1312                          <0x0005e000 0x0005e000 0x001000>,      /* ap 24 */
1313                          <0x00060000 0x00060000 0x001000>,      /* ap 25 */
1314                          <0x0006a000 0x0006a000 0x001000>,      /* ap 26 */
1315                          <0x0006b000 0x0006b000 0x001000>,      /* ap 27 */
1316                          <0x0006c000 0x0006c000 0x001000>,      /* ap 28 */
1317                          <0x0006d000 0x0006d000 0x001000>,      /* ap 29 */
1318                          <0x0006e000 0x0006e000 0x001000>,      /* ap 30 */
1319                          <0x0006f000 0x0006f000 0x001000>,      /* ap 31 */
1320                          <0x00070000 0x00070000 0x001000>,      /* ap 32 */
1321                          <0x00071000 0x00071000 0x001000>,      /* ap 33 */
1322                          <0x00072000 0x00072000 0x001000>,      /* ap 34 */
1323                          <0x00073000 0x00073000 0x001000>,      /* ap 35 */
1324                          <0x00061000 0x00061000 0x001000>,      /* ap 36 */
1325                          <0x00096000 0x00096000 0x001000>,      /* ap 37 */
1326                          <0x00097000 0x00097000 0x001000>,      /* ap 38 */
1327                          <0x00076000 0x00076000 0x001000>,      /* ap 39 */
1328                          <0x00077000 0x00077000 0x001000>,      /* ap 40 */
1329                          <0x00078000 0x00078000 0x001000>,      /* ap 41 */
1330                          <0x00079000 0x00079000 0x001000>,      /* ap 42 */
1331                          <0x00086000 0x00086000 0x001000>,      /* ap 43 */
1332                          <0x00087000 0x00087000 0x001000>,      /* ap 44 */
1333                          <0x00088000 0x00088000 0x001000>,      /* ap 45 */
1334                          <0x00089000 0x00089000 0x001000>,      /* ap 46 */
1335                          <0x000b0000 0x000b0000 0x001000>,      /* ap 47 */
1336                          <0x000b1000 0x000b1000 0x001000>,      /* ap 48 */
1337                          <0x00098000 0x00098000 0x001000>,      /* ap 49 */
1338                          <0x00099000 0x00099000 0x001000>,      /* ap 50 */
1339                          <0x0009a000 0x0009a000 0x001000>,      /* ap 51 */
1340                          <0x0009b000 0x0009b000 0x001000>,      /* ap 52 */
1341                          <0x0009c000 0x0009c000 0x001000>,      /* ap 53 */
1342                          <0x0009d000 0x0009d000 0x001000>,      /* ap 54 */
1343                          <0x0009e000 0x0009e000 0x001000>,      /* ap 55 */
1344                          <0x0009f000 0x0009f000 0x001000>,      /* ap 56 */
1345                          <0x00090000 0x00090000 0x002000>,      /* ap 57 */
1346                          <0x00092000 0x00092000 0x001000>,      /* ap 58 */
1347                          <0x000a4000 0x000a4000 0x001000>,      /* ap 59 */
1348                          <0x000a6000 0x000a6000 0x001000>,      /* ap 60 */
1349                          <0x000a8000 0x000a8000 0x004000>,      /* ap 61 */
1350                          <0x000ac000 0x000ac000 0x001000>,      /* ap 62 */
1351                          <0x000ad000 0x000ad000 0x001000>,      /* ap 63 */
1352                          <0x000ae000 0x000ae000 0x001000>,      /* ap 64 */
1353                          <0x000b2000 0x000b2000 0x001000>,      /* ap 65 */
1354                          <0x000b3000 0x000b3000 0x001000>,      /* ap 66 */
1355                          <0x000b4000 0x000b4000 0x001000>,      /* ap 67 */
1356                          <0x000b5000 0x000b5000 0x001000>,      /* ap 68 */
1357                          <0x000b8000 0x000b8000 0x001000>,      /* ap 69 */
1358                          <0x000b9000 0x000b9000 0x001000>,      /* ap 70 */
1359                          <0x000ba000 0x000ba000 0x001000>,      /* ap 71 */
1360                          <0x000bb000 0x000bb000 0x001000>,      /* ap 72 */
1361                          <0x000d1000 0x000d1000 0x001000>,      /* ap 73 */
1362                          <0x000d2000 0x000d2000 0x001000>,      /* ap 74 */
1363                          <0x000d5000 0x000d5000 0x001000>,      /* ap 75 */
1364                          <0x000d6000 0x000d6000 0x001000>,      /* ap 76 */
1365                          <0x000a2000 0x000a2000 0x001000>,      /* ap 79 */
1366                          <0x000a3000 0x000a3000 0x001000>,      /* ap 80 */
1367                          <0x00001400 0x00001400 0x000400>,      /* ap 81 */
1368                          <0x00001800 0x00001800 0x000400>,      /* ap 82 */
1369                          <0x00001c00 0x00001c00 0x000400>,      /* ap 83 */
1370                          <0x000a5000 0x000a5000 0x001000>;      /* ap 84 */
1371
1372                 target-module@20000 {                   /* 0x48020000, ap 3 06.0 */
1373                         compatible = "ti,sysc-omap2", "ti,sysc";
1374                         reg = <0x20050 0x4>,
1375                               <0x20054 0x4>,
1376                               <0x20058 0x4>;
1377                         reg-names = "rev", "sysc", "syss";
1378                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1379                                          SYSC_OMAP2_SOFTRESET |
1380                                          SYSC_OMAP2_AUTOIDLE)>;
1381                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1382                                         <SYSC_IDLE_NO>,
1383                                         <SYSC_IDLE_SMART>,
1384                                         <SYSC_IDLE_SMART_WKUP>;
1385                         ti,syss-mask = <1>;
1386                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1387                         clocks = <&l4_per_clkctrl OMAP4_UART3_CLKCTRL 0>;
1388                         clock-names = "fck";
1389                         #address-cells = <1>;
1390                         #size-cells = <1>;
1391                         ranges = <0x0 0x20000 0x1000>;
1392
1393                         uart3: serial@0 {
1394                                 compatible = "ti,omap4-uart";
1395                                 reg = <0x0 0x100>;
1396                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1397                                 clock-frequency = <48000000>;
1398                         };
1399                 };
1400
1401                 target-module@32000 {                   /* 0x48032000, ap 5 02.0 */
1402                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1403                         ti,hwmods = "timer2";
1404                         reg = <0x32000 0x4>,
1405                               <0x32010 0x4>,
1406                               <0x32014 0x4>;
1407                         reg-names = "rev", "sysc", "syss";
1408                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1409                                          SYSC_OMAP2_EMUFREE |
1410                                          SYSC_OMAP2_ENAWAKEUP |
1411                                          SYSC_OMAP2_SOFTRESET |
1412                                          SYSC_OMAP2_AUTOIDLE)>;
1413                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1414                                         <SYSC_IDLE_NO>,
1415                                         <SYSC_IDLE_SMART>;
1416                         ti,syss-mask = <1>;
1417                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1418                         clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 0>;
1419                         clock-names = "fck";
1420                         #address-cells = <1>;
1421                         #size-cells = <1>;
1422                         ranges = <0x0 0x32000 0x1000>;
1423
1424                         timer2: timer@0 {
1425                                 compatible = "ti,omap3430-timer";
1426                                 reg = <0x0 0x80>;
1427                                 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>;
1428                                 clock-names = "fck";
1429                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1430                         };
1431                 };
1432
1433                 target-module@34000 {                   /* 0x48034000, ap 7 04.0 */
1434                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1435                         ti,hwmods = "timer3";
1436                         reg = <0x34000 0x4>,
1437                               <0x34010 0x4>;
1438                         reg-names = "rev", "sysc";
1439                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1440                                          SYSC_OMAP4_SOFTRESET)>;
1441                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1442                                         <SYSC_IDLE_NO>,
1443                                         <SYSC_IDLE_SMART>,
1444                                         <SYSC_IDLE_SMART_WKUP>;
1445                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1446                         clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 0>;
1447                         clock-names = "fck";
1448                         #address-cells = <1>;
1449                         #size-cells = <1>;
1450                         ranges = <0x0 0x34000 0x1000>;
1451
1452                         timer3: timer@0 {
1453                                 compatible = "ti,omap4430-timer";
1454                                 reg = <0x0 0x80>;
1455                                 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>;
1456                                 clock-names = "fck";
1457                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1458                         };
1459                 };
1460
1461                 target-module@36000 {                   /* 0x48036000, ap 9 0e.0 */
1462                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1463                         ti,hwmods = "timer4";
1464                         reg = <0x36000 0x4>,
1465                               <0x36010 0x4>;
1466                         reg-names = "rev", "sysc";
1467                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1468                                          SYSC_OMAP4_SOFTRESET)>;
1469                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1470                                         <SYSC_IDLE_NO>,
1471                                         <SYSC_IDLE_SMART>,
1472                                         <SYSC_IDLE_SMART_WKUP>;
1473                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1474                         clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 0>;
1475                         clock-names = "fck";
1476                         #address-cells = <1>;
1477                         #size-cells = <1>;
1478                         ranges = <0x0 0x36000 0x1000>;
1479
1480                         timer4: timer@0 {
1481                                 compatible = "ti,omap4430-timer";
1482                                 reg = <0x0 0x80>;
1483                                 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>;
1484                                 clock-names = "fck";
1485                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1486                         };
1487                 };
1488
1489                 target-module@3e000 {                   /* 0x4803e000, ap 11 08.0 */
1490                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1491                         ti,hwmods = "timer9";
1492                         reg = <0x3e000 0x4>,
1493                               <0x3e010 0x4>;
1494                         reg-names = "rev", "sysc";
1495                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1496                                          SYSC_OMAP4_SOFTRESET)>;
1497                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1498                                         <SYSC_IDLE_NO>,
1499                                         <SYSC_IDLE_SMART>,
1500                                         <SYSC_IDLE_SMART_WKUP>;
1501                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1502                         clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 0>;
1503                         clock-names = "fck";
1504                         #address-cells = <1>;
1505                         #size-cells = <1>;
1506                         ranges = <0x0 0x3e000 0x1000>;
1507
1508                         timer9: timer@0 {
1509                                 compatible = "ti,omap4430-timer";
1510                                 reg = <0x0 0x80>;
1511                                 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
1512                                 clock-names = "fck";
1513                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1514                                 ti,timer-pwm;
1515                         };
1516                 };
1517
1518                 target-module@40000 {                   /* 0x48040000, ap 13 0a.0 */
1519                         compatible = "ti,sysc";
1520                         status = "disabled";
1521                         #address-cells = <1>;
1522                         #size-cells = <1>;
1523                         ranges = <0x0 0x40000 0x10000>;
1524                 };
1525
1526                 target-module@55000 {                   /* 0x48055000, ap 15 0c.0 */
1527                         compatible = "ti,sysc-omap2", "ti,sysc";
1528                         ti,hwmods = "gpio2";
1529                         reg = <0x55000 0x4>,
1530                               <0x55010 0x4>,
1531                               <0x55114 0x4>;
1532                         reg-names = "rev", "sysc", "syss";
1533                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1534                                          SYSC_OMAP2_SOFTRESET |
1535                                          SYSC_OMAP2_AUTOIDLE)>;
1536                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1537                                         <SYSC_IDLE_NO>,
1538                                         <SYSC_IDLE_SMART>,
1539                                         <SYSC_IDLE_SMART_WKUP>;
1540                         ti,syss-mask = <1>;
1541                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1542                         clocks = <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 0>,
1543                                  <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 8>;
1544                         clock-names = "fck", "dbclk";
1545                         #address-cells = <1>;
1546                         #size-cells = <1>;
1547                         ranges = <0x0 0x55000 0x1000>;
1548
1549                         gpio2: gpio@0 {
1550                                 compatible = "ti,omap4-gpio";
1551                                 reg = <0x0 0x200>;
1552                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1553                                 gpio-controller;
1554                                 #gpio-cells = <2>;
1555                                 interrupt-controller;
1556                                 #interrupt-cells = <2>;
1557                         };
1558                 };
1559
1560                 target-module@57000 {                   /* 0x48057000, ap 17 16.0 */
1561                         compatible = "ti,sysc-omap2", "ti,sysc";
1562                         ti,hwmods = "gpio3";
1563                         reg = <0x57000 0x4>,
1564                               <0x57010 0x4>,
1565                               <0x57114 0x4>;
1566                         reg-names = "rev", "sysc", "syss";
1567                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1568                                          SYSC_OMAP2_SOFTRESET |
1569                                          SYSC_OMAP2_AUTOIDLE)>;
1570                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1571                                         <SYSC_IDLE_NO>,
1572                                         <SYSC_IDLE_SMART>,
1573                                         <SYSC_IDLE_SMART_WKUP>;
1574                         ti,syss-mask = <1>;
1575                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1576                         clocks = <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 0>,
1577                                  <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 8>;
1578                         clock-names = "fck", "dbclk";
1579                         #address-cells = <1>;
1580                         #size-cells = <1>;
1581                         ranges = <0x0 0x57000 0x1000>;
1582
1583                         gpio3: gpio@0 {
1584                                 compatible = "ti,omap4-gpio";
1585                                 reg = <0x0 0x200>;
1586                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1587                                 gpio-controller;
1588                                 #gpio-cells = <2>;
1589                                 interrupt-controller;
1590                                 #interrupt-cells = <2>;
1591                         };
1592                 };
1593
1594                 target-module@59000 {                   /* 0x48059000, ap 19 10.0 */
1595                         compatible = "ti,sysc-omap2", "ti,sysc";
1596                         ti,hwmods = "gpio4";
1597                         reg = <0x59000 0x4>,
1598                               <0x59010 0x4>,
1599                               <0x59114 0x4>;
1600                         reg-names = "rev", "sysc", "syss";
1601                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1602                                          SYSC_OMAP2_SOFTRESET |
1603                                          SYSC_OMAP2_AUTOIDLE)>;
1604                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1605                                         <SYSC_IDLE_NO>,
1606                                         <SYSC_IDLE_SMART>,
1607                                         <SYSC_IDLE_SMART_WKUP>;
1608                         ti,syss-mask = <1>;
1609                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1610                         clocks = <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 0>,
1611                                  <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 8>;
1612                         clock-names = "fck", "dbclk";
1613                         #address-cells = <1>;
1614                         #size-cells = <1>;
1615                         ranges = <0x0 0x59000 0x1000>;
1616
1617                         gpio4: gpio@0 {
1618                                 compatible = "ti,omap4-gpio";
1619                                 reg = <0x0 0x200>;
1620                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1621                                 gpio-controller;
1622                                 #gpio-cells = <2>;
1623                                 interrupt-controller;
1624                                 #interrupt-cells = <2>;
1625                         };
1626                 };
1627
1628                 target-module@5b000 {                   /* 0x4805b000, ap 21 12.0 */
1629                         compatible = "ti,sysc-omap2", "ti,sysc";
1630                         ti,hwmods = "gpio5";
1631                         reg = <0x5b000 0x4>,
1632                               <0x5b010 0x4>,
1633                               <0x5b114 0x4>;
1634                         reg-names = "rev", "sysc", "syss";
1635                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1636                                          SYSC_OMAP2_SOFTRESET |
1637                                          SYSC_OMAP2_AUTOIDLE)>;
1638                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1639                                         <SYSC_IDLE_NO>,
1640                                         <SYSC_IDLE_SMART>,
1641                                         <SYSC_IDLE_SMART_WKUP>;
1642                         ti,syss-mask = <1>;
1643                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1644                         clocks = <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 0>,
1645                                  <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 8>;
1646                         clock-names = "fck", "dbclk";
1647                         #address-cells = <1>;
1648                         #size-cells = <1>;
1649                         ranges = <0x0 0x5b000 0x1000>;
1650
1651                         gpio5: gpio@0 {
1652                                 compatible = "ti,omap4-gpio";
1653                                 reg = <0x0 0x200>;
1654                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1655                                 gpio-controller;
1656                                 #gpio-cells = <2>;
1657                                 interrupt-controller;
1658                                 #interrupt-cells = <2>;
1659                         };
1660                 };
1661
1662                 target-module@5d000 {                   /* 0x4805d000, ap 23 14.0 */
1663                         compatible = "ti,sysc-omap2", "ti,sysc";
1664                         ti,hwmods = "gpio6";
1665                         reg = <0x5d000 0x4>,
1666                               <0x5d010 0x4>,
1667                               <0x5d114 0x4>;
1668                         reg-names = "rev", "sysc", "syss";
1669                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1670                                          SYSC_OMAP2_SOFTRESET |
1671                                          SYSC_OMAP2_AUTOIDLE)>;
1672                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1673                                         <SYSC_IDLE_NO>,
1674                                         <SYSC_IDLE_SMART>,
1675                                         <SYSC_IDLE_SMART_WKUP>;
1676                         ti,syss-mask = <1>;
1677                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1678                         clocks = <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 0>,
1679                                  <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 8>;
1680                         clock-names = "fck", "dbclk";
1681                         #address-cells = <1>;
1682                         #size-cells = <1>;
1683                         ranges = <0x0 0x5d000 0x1000>;
1684
1685                         gpio6: gpio@0 {
1686                                 compatible = "ti,omap4-gpio";
1687                                 reg = <0x0 0x200>;
1688                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1689                                 gpio-controller;
1690                                 #gpio-cells = <2>;
1691                                 interrupt-controller;
1692                                 #interrupt-cells = <2>;
1693                         };
1694                 };
1695
1696                 target-module@60000 {                   /* 0x48060000, ap 25 1e.0 */
1697                         compatible = "ti,sysc-omap2", "ti,sysc";
1698                         ti,hwmods = "i2c3";
1699                         reg = <0x60000 0x8>,
1700                               <0x60010 0x8>,
1701                               <0x60090 0x8>;
1702                         reg-names = "rev", "sysc", "syss";
1703                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1704                                          SYSC_OMAP2_ENAWAKEUP |
1705                                          SYSC_OMAP2_SOFTRESET |
1706                                          SYSC_OMAP2_AUTOIDLE)>;
1707                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1708                                         <SYSC_IDLE_NO>,
1709                                         <SYSC_IDLE_SMART>,
1710                                         <SYSC_IDLE_SMART_WKUP>;
1711                         ti,syss-mask = <1>;
1712                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1713                         clocks = <&l4_per_clkctrl OMAP4_I2C3_CLKCTRL 0>;
1714                         clock-names = "fck";
1715                         #address-cells = <1>;
1716                         #size-cells = <1>;
1717                         ranges = <0x0 0x60000 0x1000>;
1718
1719                         i2c3: i2c@0 {
1720                                 compatible = "ti,omap4-i2c";
1721                                 reg = <0x0 0x100>;
1722                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1723                                 #address-cells = <1>;
1724                                 #size-cells = <0>;
1725                         };
1726                 };
1727
1728                 target-module@6a000 {                   /* 0x4806a000, ap 26 18.0 */
1729                         compatible = "ti,sysc-omap2", "ti,sysc";
1730                         reg = <0x6a050 0x4>,
1731                               <0x6a054 0x4>,
1732                               <0x6a058 0x4>;
1733                         reg-names = "rev", "sysc", "syss";
1734                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1735                                          SYSC_OMAP2_SOFTRESET |
1736                                          SYSC_OMAP2_AUTOIDLE)>;
1737                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1738                                         <SYSC_IDLE_NO>,
1739                                         <SYSC_IDLE_SMART>,
1740                                         <SYSC_IDLE_SMART_WKUP>;
1741                         ti,syss-mask = <1>;
1742                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1743                         clocks = <&l4_per_clkctrl OMAP4_UART1_CLKCTRL 0>;
1744                         clock-names = "fck";
1745                         #address-cells = <1>;
1746                         #size-cells = <1>;
1747                         ranges = <0x0 0x6a000 0x1000>;
1748
1749                         uart1: serial@0 {
1750                                 compatible = "ti,omap4-uart";
1751                                 reg = <0x0 0x100>;
1752                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1753                                 clock-frequency = <48000000>;
1754                         };
1755                 };
1756
1757                 target-module@6c000 {                   /* 0x4806c000, ap 28 20.0 */
1758                         compatible = "ti,sysc-omap2", "ti,sysc";
1759                         reg = <0x6c050 0x4>,
1760                               <0x6c054 0x4>,
1761                               <0x6c058 0x4>;
1762                         reg-names = "rev", "sysc", "syss";
1763                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1764                                          SYSC_OMAP2_SOFTRESET |
1765                                          SYSC_OMAP2_AUTOIDLE)>;
1766                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1767                                         <SYSC_IDLE_NO>,
1768                                         <SYSC_IDLE_SMART>,
1769                                         <SYSC_IDLE_SMART_WKUP>;
1770                         ti,syss-mask = <1>;
1771                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1772                         clocks = <&l4_per_clkctrl OMAP4_UART2_CLKCTRL 0>;
1773                         clock-names = "fck";
1774                         #address-cells = <1>;
1775                         #size-cells = <1>;
1776                         ranges = <0x0 0x6c000 0x1000>;
1777
1778                         uart2: serial@0 {
1779                                 compatible = "ti,omap4-uart";
1780                                 reg = <0x0 0x100>;
1781                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1782                                 clock-frequency = <48000000>;
1783                         };
1784                 };
1785
1786                 target-module@6e000 {                   /* 0x4806e000, ap 30 1c.1 */
1787                         compatible = "ti,sysc-omap2", "ti,sysc";
1788                         reg = <0x6e050 0x4>,
1789                               <0x6e054 0x4>,
1790                               <0x6e058 0x4>;
1791                         reg-names = "rev", "sysc", "syss";
1792                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1793                                          SYSC_OMAP2_SOFTRESET |
1794                                          SYSC_OMAP2_AUTOIDLE)>;
1795                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1796                                         <SYSC_IDLE_NO>,
1797                                         <SYSC_IDLE_SMART>,
1798                                         <SYSC_IDLE_SMART_WKUP>;
1799                         ti,syss-mask = <1>;
1800                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1801                         clocks = <&l4_per_clkctrl OMAP4_UART4_CLKCTRL 0>;
1802                         clock-names = "fck";
1803                         #address-cells = <1>;
1804                         #size-cells = <1>;
1805                         ranges = <0x0 0x6e000 0x1000>;
1806
1807                         uart4: serial@0 {
1808                                 compatible = "ti,omap4-uart";
1809                                 reg = <0x0 0x100>;
1810                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1811                                 clock-frequency = <48000000>;
1812                         };
1813                 };
1814
1815                 target-module@70000 {                   /* 0x48070000, ap 32 28.0 */
1816                         compatible = "ti,sysc-omap2", "ti,sysc";
1817                         ti,hwmods = "i2c1";
1818                         reg = <0x70000 0x8>,
1819                               <0x70010 0x8>,
1820                               <0x70090 0x8>;
1821                         reg-names = "rev", "sysc", "syss";
1822                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1823                                          SYSC_OMAP2_ENAWAKEUP |
1824                                          SYSC_OMAP2_SOFTRESET |
1825                                          SYSC_OMAP2_AUTOIDLE)>;
1826                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1827                                         <SYSC_IDLE_NO>,
1828                                         <SYSC_IDLE_SMART>,
1829                                         <SYSC_IDLE_SMART_WKUP>;
1830                         ti,syss-mask = <1>;
1831                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1832                         clocks = <&l4_per_clkctrl OMAP4_I2C1_CLKCTRL 0>;
1833                         clock-names = "fck";
1834                         #address-cells = <1>;
1835                         #size-cells = <1>;
1836                         ranges = <0x0 0x70000 0x1000>;
1837
1838                         i2c1: i2c@0 {
1839                                 compatible = "ti,omap4-i2c";
1840                                 reg = <0x0 0x100>;
1841                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1842                                 #address-cells = <1>;
1843                                 #size-cells = <0>;
1844                         };
1845                 };
1846
1847                 target-module@72000 {                   /* 0x48072000, ap 34 30.0 */
1848                         compatible = "ti,sysc-omap2", "ti,sysc";
1849                         ti,hwmods = "i2c2";
1850                         reg = <0x72000 0x8>,
1851                               <0x72010 0x8>,
1852                               <0x72090 0x8>;
1853                         reg-names = "rev", "sysc", "syss";
1854                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1855                                          SYSC_OMAP2_ENAWAKEUP |
1856                                          SYSC_OMAP2_SOFTRESET |
1857                                          SYSC_OMAP2_AUTOIDLE)>;
1858                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1859                                         <SYSC_IDLE_NO>,
1860                                         <SYSC_IDLE_SMART>,
1861                                         <SYSC_IDLE_SMART_WKUP>;
1862                         ti,syss-mask = <1>;
1863                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1864                         clocks = <&l4_per_clkctrl OMAP4_I2C2_CLKCTRL 0>;
1865                         clock-names = "fck";
1866                         #address-cells = <1>;
1867                         #size-cells = <1>;
1868                         ranges = <0x0 0x72000 0x1000>;
1869
1870                         i2c2: i2c@0 {
1871                                 compatible = "ti,omap4-i2c";
1872                                 reg = <0x0 0x100>;
1873                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1874                                 #address-cells = <1>;
1875                                 #size-cells = <0>;
1876                         };
1877                 };
1878
1879                 target-module@76000 {                   /* 0x48076000, ap 39 38.0 */
1880                         compatible = "ti,sysc-omap4", "ti,sysc";
1881                         ti,hwmods = "slimbus2";
1882                         reg = <0x76000 0x4>,
1883                               <0x76010 0x4>;
1884                         reg-names = "rev", "sysc";
1885                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1886                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1887                                         <SYSC_IDLE_NO>,
1888                                         <SYSC_IDLE_SMART>,
1889                                         <SYSC_IDLE_SMART_WKUP>;
1890                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1891                         clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
1892                         clock-names = "fck";
1893                         #address-cells = <1>;
1894                         #size-cells = <1>;
1895                         ranges = <0x0 0x76000 0x1000>;
1896
1897                         /* No child device binding or driver in mainline */
1898                 };
1899
1900                 target-module@78000 {                   /* 0x48078000, ap 41 1a.0 */
1901                         compatible = "ti,sysc-omap2", "ti,sysc";
1902                         ti,hwmods = "elm";
1903                         reg = <0x78000 0x4>,
1904                               <0x78010 0x4>,
1905                               <0x78014 0x4>;
1906                         reg-names = "rev", "sysc", "syss";
1907                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1908                                          SYSC_OMAP2_SOFTRESET |
1909                                          SYSC_OMAP2_AUTOIDLE)>;
1910                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1911                                         <SYSC_IDLE_NO>,
1912                                         <SYSC_IDLE_SMART>;
1913                         ti,syss-mask = <1>;
1914                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1915                         clocks = <&l4_per_clkctrl OMAP4_ELM_CLKCTRL 0>;
1916                         clock-names = "fck";
1917                         #address-cells = <1>;
1918                         #size-cells = <1>;
1919                         ranges = <0x0 0x78000 0x1000>;
1920
1921                         elm: elm@0 {
1922                                 compatible = "ti,am3352-elm";
1923                                 reg = <0x0 0x2000>;
1924                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1925                                 status = "disabled";
1926                         };
1927                 };
1928
1929                 target-module@86000 {                   /* 0x48086000, ap 43 24.0 */
1930                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1931                         ti,hwmods = "timer10";
1932                         reg = <0x86000 0x4>,
1933                               <0x86010 0x4>,
1934                               <0x86014 0x4>;
1935                         reg-names = "rev", "sysc", "syss";
1936                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1937                                          SYSC_OMAP2_EMUFREE |
1938                                          SYSC_OMAP2_ENAWAKEUP |
1939                                          SYSC_OMAP2_SOFTRESET |
1940                                          SYSC_OMAP2_AUTOIDLE)>;
1941                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1942                                         <SYSC_IDLE_NO>,
1943                                         <SYSC_IDLE_SMART>;
1944                         ti,syss-mask = <1>;
1945                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1946                         clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 0>;
1947                         clock-names = "fck";
1948                         #address-cells = <1>;
1949                         #size-cells = <1>;
1950                         ranges = <0x0 0x86000 0x1000>;
1951
1952                         timer10: timer@0 {
1953                                 compatible = "ti,omap3430-timer";
1954                                 reg = <0x0 0x80>;
1955                                 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>;
1956                                 clock-names = "fck";
1957                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1958                                 ti,timer-pwm;
1959                         };
1960                 };
1961
1962                 target-module@88000 {                   /* 0x48088000, ap 45 2e.0 */
1963                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1964                         ti,hwmods = "timer11";
1965                         reg = <0x88000 0x4>,
1966                               <0x88010 0x4>;
1967                         reg-names = "rev", "sysc";
1968                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1969                                          SYSC_OMAP4_SOFTRESET)>;
1970                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1971                                         <SYSC_IDLE_NO>,
1972                                         <SYSC_IDLE_SMART>,
1973                                         <SYSC_IDLE_SMART_WKUP>;
1974                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1975                         clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 0>;
1976                         clock-names = "fck";
1977                         #address-cells = <1>;
1978                         #size-cells = <1>;
1979                         ranges = <0x0 0x88000 0x1000>;
1980
1981                         timer11: timer@0 {
1982                                 compatible = "ti,omap4430-timer";
1983                                 reg = <0x0 0x80>;
1984                                 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>;
1985                                 clock-names = "fck";
1986                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1987                                 ti,timer-pwm;
1988                         };
1989                 };
1990
1991                 target-module@90000 {                   /* 0x48090000, ap 57 2a.0 */
1992                         compatible = "ti,sysc";
1993                         status = "disabled";
1994                         #address-cells = <1>;
1995                         #size-cells = <1>;
1996                         ranges = <0x0 0x90000 0x2000>;
1997                 };
1998
1999                 target-module@96000 {                   /* 0x48096000, ap 37 26.0 */
2000                         compatible = "ti,sysc-omap2", "ti,sysc";
2001                         ti,hwmods = "mcbsp4";
2002                         reg = <0x9608c 0x4>;
2003                         reg-names = "sysc";
2004                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2005                                          SYSC_OMAP2_ENAWAKEUP |
2006                                          SYSC_OMAP2_SOFTRESET)>;
2007                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2008                                         <SYSC_IDLE_NO>,
2009                                         <SYSC_IDLE_SMART>;
2010                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2011                         clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 0>;
2012                         clock-names = "fck";
2013                         #address-cells = <1>;
2014                         #size-cells = <1>;
2015                         ranges = <0x0 0x96000 0x1000>;
2016
2017                         mcbsp4: mcbsp@0 {
2018                                 compatible = "ti,omap4-mcbsp";
2019                                 reg = <0x0 0xff>; /* L4 Interconnect */
2020                                 reg-names = "mpu";
2021                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2022                                 interrupt-names = "common";
2023                                 ti,buffer-size = <128>;
2024                                 dmas = <&sdma 31>,
2025                                        <&sdma 32>;
2026                                 dma-names = "tx", "rx";
2027                                 status = "disabled";
2028                         };
2029                 };
2030
2031                 target-module@98000 {                   /* 0x48098000, ap 49 22.0 */
2032                         compatible = "ti,sysc-omap4", "ti,sysc";
2033                         ti,hwmods = "mcspi1";
2034                         reg = <0x98000 0x4>,
2035                               <0x98010 0x4>;
2036                         reg-names = "rev", "sysc";
2037                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2038                                          SYSC_OMAP4_SOFTRESET)>;
2039                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2040                                         <SYSC_IDLE_NO>,
2041                                         <SYSC_IDLE_SMART>,
2042                                         <SYSC_IDLE_SMART_WKUP>;
2043                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2044                         clocks = <&l4_per_clkctrl OMAP4_MCSPI1_CLKCTRL 0>;
2045                         clock-names = "fck";
2046                         #address-cells = <1>;
2047                         #size-cells = <1>;
2048                         ranges = <0x0 0x98000 0x1000>;
2049
2050                         mcspi1: spi@0 {
2051                                 compatible = "ti,omap4-mcspi";
2052                                 reg = <0x0 0x200>;
2053                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
2054                                 #address-cells = <1>;
2055                                 #size-cells = <0>;
2056                                 ti,spi-num-cs = <4>;
2057                                 dmas = <&sdma 35>,
2058                                        <&sdma 36>,
2059                                        <&sdma 37>,
2060                                        <&sdma 38>,
2061                                        <&sdma 39>,
2062                                        <&sdma 40>,
2063                                        <&sdma 41>,
2064                                        <&sdma 42>;
2065                                 dma-names = "tx0", "rx0", "tx1", "rx1",
2066                                             "tx2", "rx2", "tx3", "rx3";
2067                         };
2068                 };
2069
2070                 target-module@9a000 {                   /* 0x4809a000, ap 51 2c.0 */
2071                         compatible = "ti,sysc-omap4", "ti,sysc";
2072                         ti,hwmods = "mcspi2";
2073                         reg = <0x9a000 0x4>,
2074                               <0x9a010 0x4>;
2075                         reg-names = "rev", "sysc";
2076                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2077                                          SYSC_OMAP4_SOFTRESET)>;
2078                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2079                                         <SYSC_IDLE_NO>,
2080                                         <SYSC_IDLE_SMART>,
2081                                         <SYSC_IDLE_SMART_WKUP>;
2082                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2083                         clocks = <&l4_per_clkctrl OMAP4_MCSPI2_CLKCTRL 0>;
2084                         clock-names = "fck";
2085                         #address-cells = <1>;
2086                         #size-cells = <1>;
2087                         ranges = <0x0 0x9a000 0x1000>;
2088
2089                         mcspi2: spi@0 {
2090                                 compatible = "ti,omap4-mcspi";
2091                                 reg = <0x0 0x200>;
2092                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
2093                                 #address-cells = <1>;
2094                                 #size-cells = <0>;
2095                                 ti,spi-num-cs = <2>;
2096                                 dmas = <&sdma 43>,
2097                                        <&sdma 44>,
2098                                        <&sdma 45>,
2099                                        <&sdma 46>;
2100                                 dma-names = "tx0", "rx0", "tx1", "rx1";
2101                         };
2102                 };
2103
2104                 target-module@9c000 {                   /* 0x4809c000, ap 53 36.0 */
2105                         compatible = "ti,sysc-omap4", "ti,sysc";
2106                         reg = <0x9c000 0x4>,
2107                               <0x9c010 0x4>;
2108                         reg-names = "rev", "sysc";
2109                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2110                                          SYSC_OMAP4_SOFTRESET)>;
2111                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2112                                         <SYSC_IDLE_NO>,
2113                                         <SYSC_IDLE_SMART>,
2114                                         <SYSC_IDLE_SMART_WKUP>;
2115                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2116                                         <SYSC_IDLE_NO>,
2117                                         <SYSC_IDLE_SMART>,
2118                                         <SYSC_IDLE_SMART_WKUP>;
2119                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2120                         clocks = <&l3_init_clkctrl OMAP4_MMC1_CLKCTRL 0>;
2121                         clock-names = "fck";
2122                         #address-cells = <1>;
2123                         #size-cells = <1>;
2124                         ranges = <0x0 0x9c000 0x1000>;
2125
2126                         mmc1: mmc@0 {
2127                                 compatible = "ti,omap4-hsmmc";
2128                                 reg = <0x0 0x400>;
2129                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
2130                                 ti,dual-volt;
2131                                 ti,needs-special-reset;
2132                                 dmas = <&sdma 61>, <&sdma 62>;
2133                                 dma-names = "tx", "rx";
2134                                 pbias-supply = <&pbias_mmc_reg>;
2135                         };
2136                 };
2137
2138                 target-module@9e000 {                   /* 0x4809e000, ap 55 48.0 */
2139                         compatible = "ti,sysc";
2140                         status = "disabled";
2141                         #address-cells = <1>;
2142                         #size-cells = <1>;
2143                         ranges = <0x0 0x9e000 0x1000>;
2144                 };
2145
2146                 target-module@a2000 {                   /* 0x480a2000, ap 79 3a.0 */
2147                         compatible = "ti,sysc";
2148                         status = "disabled";
2149                         #address-cells = <1>;
2150                         #size-cells = <1>;
2151                         ranges = <0x0 0xa2000 0x1000>;
2152                 };
2153
2154                 target-module@a4000 {                   /* 0x480a4000, ap 59 34.0 */
2155                         compatible = "ti,sysc";
2156                         status = "disabled";
2157                         #address-cells = <1>;
2158                         #size-cells = <1>;
2159                         ranges = <0x00000000 0x000a4000 0x00001000>,
2160                                  <0x00001000 0x000a5000 0x00001000>;
2161                 };
2162
2163                 target-module@a8000 {                   /* 0x480a8000, ap 61 3e.0 */
2164                         compatible = "ti,sysc";
2165                         status = "disabled";
2166                         #address-cells = <1>;
2167                         #size-cells = <1>;
2168                         ranges = <0x0 0xa8000 0x4000>;
2169                 };
2170
2171                 target-module@ad000 {                   /* 0x480ad000, ap 63 50.0 */
2172                         compatible = "ti,sysc-omap4", "ti,sysc";
2173                         reg = <0xad000 0x4>,
2174                               <0xad010 0x4>;
2175                         reg-names = "rev", "sysc";
2176                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2177                                          SYSC_OMAP4_SOFTRESET)>;
2178                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2179                                         <SYSC_IDLE_NO>,
2180                                         <SYSC_IDLE_SMART>,
2181                                         <SYSC_IDLE_SMART_WKUP>;
2182                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2183                                         <SYSC_IDLE_NO>,
2184                                         <SYSC_IDLE_SMART>,
2185                                         <SYSC_IDLE_SMART_WKUP>;
2186                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2187                         clocks = <&l4_per_clkctrl OMAP4_MMC3_CLKCTRL 0>;
2188                         clock-names = "fck";
2189                         #address-cells = <1>;
2190                         #size-cells = <1>;
2191                         ranges = <0x0 0xad000 0x1000>;
2192
2193                         mmc3: mmc@0 {
2194                                 compatible = "ti,omap4-hsmmc";
2195                                 reg = <0x0 0x400>;
2196                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
2197                                 ti,needs-special-reset;
2198                                 dmas = <&sdma 77>, <&sdma 78>;
2199                                 dma-names = "tx", "rx";
2200                         };
2201                 };
2202
2203                 target-module@b0000 {                   /* 0x480b0000, ap 47 40.0 */
2204                         compatible = "ti,sysc";
2205                         status = "disabled";
2206                         #address-cells = <1>;
2207                         #size-cells = <1>;
2208                         ranges = <0x0 0xb0000 0x1000>;
2209                 };
2210
2211                 target-module@b2000 {                   /* 0x480b2000, ap 65 3c.0 */
2212                         compatible = "ti,sysc-omap2", "ti,sysc";
2213                         ti,hwmods = "hdq1w";
2214                         reg = <0xb2000 0x4>,
2215                               <0xb2014 0x4>,
2216                               <0xb2018 0x4>;
2217                         reg-names = "rev", "sysc", "syss";
2218                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2219                                          SYSC_OMAP2_AUTOIDLE)>;
2220                         ti,syss-mask = <1>;
2221                         ti,no-reset-on-init;
2222                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2223                         clocks = <&l4_per_clkctrl OMAP4_HDQ1W_CLKCTRL 0>;
2224                         clock-names = "fck";
2225                         #address-cells = <1>;
2226                         #size-cells = <1>;
2227                         ranges = <0x0 0xb2000 0x1000>;
2228
2229                         hdqw1w: 1w@0 {
2230                                 compatible = "ti,omap3-1w";
2231                                 reg = <0x0 0x1000>;
2232                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
2233                         };
2234                 };
2235
2236                 target-module@b4000 {                   /* 0x480b4000, ap 67 46.0 */
2237                         compatible = "ti,sysc-omap4", "ti,sysc";
2238                         reg = <0xb4000 0x4>,
2239                               <0xb4010 0x4>;
2240                         reg-names = "rev", "sysc";
2241                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2242                                          SYSC_OMAP4_SOFTRESET)>;
2243                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2244                                         <SYSC_IDLE_NO>,
2245                                         <SYSC_IDLE_SMART>,
2246                                         <SYSC_IDLE_SMART_WKUP>;
2247                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2248                                         <SYSC_IDLE_NO>,
2249                                         <SYSC_IDLE_SMART>,
2250                                         <SYSC_IDLE_SMART_WKUP>;
2251                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2252                         clocks = <&l3_init_clkctrl OMAP4_MMC2_CLKCTRL 0>;
2253                         clock-names = "fck";
2254                         #address-cells = <1>;
2255                         #size-cells = <1>;
2256                         ranges = <0x0 0xb4000 0x1000>;
2257
2258                         mmc2: mmc@0 {
2259                                 compatible = "ti,omap4-hsmmc";
2260                                 reg = <0x0 0x400>;
2261                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2262                                 ti,needs-special-reset;
2263                                 dmas = <&sdma 47>, <&sdma 48>;
2264                                 dma-names = "tx", "rx";
2265                         };
2266                 };
2267
2268                 target-module@b8000 {                   /* 0x480b8000, ap 69 58.0 */
2269                         compatible = "ti,sysc-omap4", "ti,sysc";
2270                         ti,hwmods = "mcspi3";
2271                         reg = <0xb8000 0x4>,
2272                               <0xb8010 0x4>;
2273                         reg-names = "rev", "sysc";
2274                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2275                                          SYSC_OMAP4_SOFTRESET)>;
2276                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2277                                         <SYSC_IDLE_NO>,
2278                                         <SYSC_IDLE_SMART>,
2279                                         <SYSC_IDLE_SMART_WKUP>;
2280                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2281                         clocks = <&l4_per_clkctrl OMAP4_MCSPI3_CLKCTRL 0>;
2282                         clock-names = "fck";
2283                         #address-cells = <1>;
2284                         #size-cells = <1>;
2285                         ranges = <0x0 0xb8000 0x1000>;
2286
2287                         mcspi3: spi@0 {
2288                                 compatible = "ti,omap4-mcspi";
2289                                 reg = <0x0 0x200>;
2290                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2291                                 #address-cells = <1>;
2292                                 #size-cells = <0>;
2293                                 ti,spi-num-cs = <2>;
2294                                 dmas = <&sdma 15>, <&sdma 16>;
2295                                 dma-names = "tx0", "rx0";
2296                         };
2297                 };
2298
2299                 target-module@ba000 {                   /* 0x480ba000, ap 71 32.0 */
2300                         compatible = "ti,sysc-omap4", "ti,sysc";
2301                         ti,hwmods = "mcspi4";
2302                         reg = <0xba000 0x4>,
2303                               <0xba010 0x4>;
2304                         reg-names = "rev", "sysc";
2305                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2306                                          SYSC_OMAP4_SOFTRESET)>;
2307                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2308                                         <SYSC_IDLE_NO>,
2309                                         <SYSC_IDLE_SMART>,
2310                                         <SYSC_IDLE_SMART_WKUP>;
2311                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2312                         clocks = <&l4_per_clkctrl OMAP4_MCSPI4_CLKCTRL 0>;
2313                         clock-names = "fck";
2314                         #address-cells = <1>;
2315                         #size-cells = <1>;
2316                         ranges = <0x0 0xba000 0x1000>;
2317
2318                         mcspi4: spi@0 {
2319                                 compatible = "ti,omap4-mcspi";
2320                                 reg = <0x0 0x200>;
2321                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2322                                 #address-cells = <1>;
2323                                 #size-cells = <0>;
2324                                 ti,spi-num-cs = <1>;
2325                                 dmas = <&sdma 70>, <&sdma 71>;
2326                                 dma-names = "tx0", "rx0";
2327                         };
2328                 };
2329
2330                 target-module@d1000 {                   /* 0x480d1000, ap 73 44.0 */
2331                         compatible = "ti,sysc-omap4", "ti,sysc";
2332                         reg = <0xd1000 0x4>,
2333                               <0xd1010 0x4>;
2334                         reg-names = "rev", "sysc";
2335                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2336                                          SYSC_OMAP4_SOFTRESET)>;
2337                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2338                                         <SYSC_IDLE_NO>,
2339                                         <SYSC_IDLE_SMART>,
2340                                         <SYSC_IDLE_SMART_WKUP>;
2341                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2342                                         <SYSC_IDLE_NO>,
2343                                         <SYSC_IDLE_SMART>,
2344                                         <SYSC_IDLE_SMART_WKUP>;
2345                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2346                         clocks = <&l4_per_clkctrl OMAP4_MMC4_CLKCTRL 0>;
2347                         clock-names = "fck";
2348                         #address-cells = <1>;
2349                         #size-cells = <1>;
2350                         ranges = <0x0 0xd1000 0x1000>;
2351
2352                         mmc4: mmc@0 {
2353                                 compatible = "ti,omap4-hsmmc";
2354                                 reg = <0x0 0x400>;
2355                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2356                                 ti,needs-special-reset;
2357                                 dmas = <&sdma 57>, <&sdma 58>;
2358                                 dma-names = "tx", "rx";
2359                         };
2360                 };
2361
2362                 target-module@d5000 {                   /* 0x480d5000, ap 75 4e.0 */
2363                         compatible = "ti,sysc-omap4", "ti,sysc";
2364                         reg = <0xd5000 0x4>,
2365                               <0xd5010 0x4>;
2366                         reg-names = "rev", "sysc";
2367                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2368                                          SYSC_OMAP4_SOFTRESET)>;
2369                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2370                                         <SYSC_IDLE_NO>,
2371                                         <SYSC_IDLE_SMART>,
2372                                         <SYSC_IDLE_SMART_WKUP>;
2373                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2374                                         <SYSC_IDLE_NO>,
2375                                         <SYSC_IDLE_SMART>,
2376                                         <SYSC_IDLE_SMART_WKUP>;
2377                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2378                         clocks = <&l4_per_clkctrl OMAP4_MMC5_CLKCTRL 0>;
2379                         clock-names = "fck";
2380                         #address-cells = <1>;
2381                         #size-cells = <1>;
2382                         ranges = <0x0 0xd5000 0x1000>;
2383
2384                         mmc5: mmc@0 {
2385                                 compatible = "ti,omap4-hsmmc";
2386