arch/arm/boot/dts/omap4-droid4-xt894.dts

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License version 2 as
   4  * published by the Free Software Foundation.
   5  */
   6 /dts-v1/;
   7
   8 #include "omap443x.dtsi"
   9
  10 / {
  11         model = "Motorola Droid 4 XT894";
  12         compatible = "motorola,droid4", "ti,omap4430", "ti,omap4";
  13
  14         chosen {
  15                 stdout-path = &uart3;
  16         };
  17
  18         /*
  19          * We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
  20          * then 1023 - 1024 seems to contain mbm. For SRAM, see the notes
  21          * below about SRAM and L3_ICLK2 being unused by default,
  22          */
  23         memory {
  24                 device_type = "memory";
  25                 reg = <0x80000000 0x3fd00000>;  /* 1021 MB */
  26         };
  27
  28         /* CPCAP really supports 1650000 to 3400000 range */
  29         vmmc: regulator-mmc {
  30                 compatible = "regulator-fixed";
  31                 regulator-name = "vmmc";
  32                 regulator-min-microvolt = <3000000>;
  33                 regulator-max-microvolt = <3000000>;
  34                 regulator-always-on;
  35         };
  36
  37         /* CPCAP really supports 3000000 to 3100000 range */
  38         vemmc: regulator-emmc {
  39                 compatible = "regulator-fixed";
  40                 regulator-name = "vemmc";
  41                 regulator-min-microvolt = <3000000>;
  42                 regulator-max-microvolt = <3000000>;
  43                 regulator-always-on;
  44         };
  45
  46         /* CPCAP really supports 1650000 to 1950000 range */
  47         wl12xx_vmmc: regulator-wl12xx {
  48                 compatible = "regulator-fixed";
  49                 regulator-name = "vwl1271";
  50                 regulator-min-microvolt = <1650000>;
  51                 regulator-max-microvolt = <1650000>;
  52                 gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;    /* gpio94 */
  53                 startup-delay-us = <70000>;
  54                 enable-active-high;
  55         };
  56 };
  57
  58 /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */
  59 &gpmc {
  60         status = "disabled";
  61 };
  62
  63 &mmc1 {
  64         vmmc-supply = <&vmmc>;
  65         bus-width = <4>;
  66         cd-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* gpio106 */
  67 };
  68
  69 &mmc2 {
  70         vmmc-supply = <&vemmc>;
  71         bus-width = <8>;
  72         non-removable;
  73 };
  74
  75 &mmc3 {
  76         vmmc-supply = <&wl12xx_vmmc>;
  77         interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
  78                                &omap4_pmx_core 0xde>;
  79
  80         non-removable;
  81         bus-width = <4>;
  82         cap-power-off-card;
  83
  84         #address-cells = <1>;
  85         #size-cells = <0>;
  86         wlcore: wlcore@2 {
  87                 compatible = "ti,wl1283";
  88                 reg = <2>;
  89                 interrupt-parent = <&gpio4>;
  90                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; /* gpio100 */
  91                 ref-clock-frequency = <26000000>;
  92                 tcxo-clock-frequency = <26000000>;
  93         };
  94 };
  95
  96 /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */
  97 &ocmcram {
  98         status = "disabled";
  99 };
 100
 101 &omap4_pmx_core {
 102         usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins {
 103                 /* gpio_60 */
 104                 pinctrl-single,pins = <
 105                 OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
 106                 >;
 107         };
 108
 109         usb_ulpi_pins: pinmux_usb_ulpi_pins {
 110                 pinctrl-single,pins = <
 111                 OMAP4_IOPAD(0x196, MUX_MODE7)
 112                 OMAP4_IOPAD(0x198, MUX_MODE7)
 113                 OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0)
 114                 OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0)
 115                 OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0)
 116                 OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0)
 117                 OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0)
 118                 OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0)
 119                 OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0)
 120                 OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0)
 121                 OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0)
 122                 OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0)
 123                 OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0)
 124                 OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
 125                 >;
 126         };
 127
 128         /* usb0_otg_dp and usb0_otg_dm */
 129         usb_utmi_pins: pinmux_usb_utmi_pins {
 130                 pinctrl-single,pins = <
 131                 OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
 132                 OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
 133                 OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
 134                 OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
 135                 OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
 136                 OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
 137                 OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7)
 138                 OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7)
 139                 OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
 140                 OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
 141                 OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
 142                 OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
 143                 OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
 144                 OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
 145                 >;
 146         };
 147
 148         /* uart3_tx_irtx and uart3_rx_irrx */
 149         uart3_pins: pinmux_uart3_pins {
 150                 pinctrl-single,pins = <
 151                 OMAP4_IOPAD(0x196, MUX_MODE7)
 152                 OMAP4_IOPAD(0x198, MUX_MODE7)
 153                 OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
 154                 OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
 155                 OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
 156                 OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
 157                 OMAP4_IOPAD(0x1ba, MUX_MODE2)
 158                 OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2)
 159                 OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
 160                 OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
 161                 OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
 162                 OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
 163                 OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
 164                 OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
 165                 >;
 166         };
 167 };
 168
 169 &omap4_pmx_wkup {
 170         usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
 171                 /* gpio_wk0 */
 172                 pinctrl-single,pins = <
 173                 OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
 174                 >;
 175         };
 176 };
 177
 178 &uart3 {
 179         interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
 180                                &omap4_pmx_core 0x17c>;
 181 };
 182
 183 /* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */
 184 &usb_otg_hs {
 185         interface-type = <1>;
 186         mode = <3>;
 187         power = <50>;
 188 };