arch/arm/boot/dts/omap3.dtsi

   1 /*
   2  * Device Tree Source for OMAP3 SoC
   3  *
   4  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/pinctrl/omap.h>
  14
  15 #include "skeleton.dtsi"
  16
  17 / {
  18         compatible = "ti,omap3430", "ti,omap3";
  19         interrupt-parent = <&intc>;
  20
  21         aliases {
  22                 i2c0 = &i2c1;
  23                 i2c1 = &i2c2;
  24                 i2c2 = &i2c3;
  25                 serial0 = &uart1;
  26                 serial1 = &uart2;
  27                 serial2 = &uart3;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         compatible = "arm,cortex-a8";
  36                         device_type = "cpu";
  37                         reg = <0x0>;
  38                 };
  39         };
  40
  41         pmu {
  42                 compatible = "arm,cortex-a8-pmu";
  43                 reg = <0x54000000 0x800000>;
  44                 interrupts = <3>;
  45                 ti,hwmods = "debugss";
  46         };
  47
  48         /*
  49          * The soc node represents the soc top level view. It is used for IPs
  50          * that are not memory mapped in the MPU view or for the MPU itself.
  51          */
  52         soc {
  53                 compatible = "ti,omap-infra";
  54                 mpu {
  55                         compatible = "ti,omap3-mpu";
  56                         ti,hwmods = "mpu";
  57                 };
  58
  59                 iva {
  60                         compatible = "ti,iva2.2";
  61                         ti,hwmods = "iva";
  62
  63                         dsp {
  64                                 compatible = "ti,omap3-c64";
  65                         };
  66                 };
  67         };
  68
  69         /*
  70          * XXX: Use a flat representation of the OMAP3 interconnect.
  71          * The real OMAP interconnect network is quite complex.
  72          * Since that will not bring real advantage to represent that in DT for
  73          * the moment, just use a fake OCP bus entry to represent the whole bus
  74          * hierarchy.
  75          */
  76         ocp {
  77                 compatible = "simple-bus";
  78                 reg = <0x68000000 0x10000>;
  79                 interrupts = <9 10>;
  80                 #address-cells = <1>;
  81                 #size-cells = <1>;
  82                 ranges;
  83                 ti,hwmods = "l3_main";
  84
  85                 counter32k: counter@48320000 {
  86                         compatible = "ti,omap-counter32k";
  87                         reg = <0x48320000 0x20>;
  88                         ti,hwmods = "counter_32k";
  89                 };
  90
  91                 intc: interrupt-controller@48200000 {
  92                         compatible = "ti,omap2-intc";
  93                         interrupt-controller;
  94                         #interrupt-cells = <1>;
  95                         ti,intc-size = <96>;
  96                         reg = <0x48200000 0x1000>;
  97                 };
  98
  99                 sdma: dma-controller@48056000 {
 100                         compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
 101                         reg = <0x48056000 0x1000>;
 102                         interrupts = <12>,
 103                                      <13>,
 104                                      <14>,
 105                                      <15>;
 106                         #dma-cells = <1>;
 107                         #dma-channels = <32>;
 108                         #dma-requests = <96>;
 109                 };
 110
 111                 omap3_pmx_core: pinmux@48002030 {
 112                         compatible = "ti,omap3-padconf", "pinctrl-single";
 113                         reg = <0x48002030 0x05cc>;
 114                         #address-cells = <1>;
 115                         #size-cells = <0>;
 116                         #interrupt-cells = <1>;
 117                         interrupt-controller;
 118                         pinctrl-single,register-width = <16>;
 119                         pinctrl-single,function-mask = <0xff1f>;
 120                 };
 121
 122                 omap3_pmx_wkup: pinmux@48002a00 {
 123                         compatible = "ti,omap3-padconf", "pinctrl-single";
 124                         reg = <0x48002a00 0x5c>;
 125                         #address-cells = <1>;
 126                         #size-cells = <0>;
 127                         #interrupt-cells = <1>;
 128                         interrupt-controller;
 129                         pinctrl-single,register-width = <16>;
 130                         pinctrl-single,function-mask = <0xff1f>;
 131                 };
 132
 133                 gpio1: gpio@48310000 {
 134                         compatible = "ti,omap3-gpio";
 135                         reg = <0x48310000 0x200>;
 136                         interrupts = <29>;
 137                         ti,hwmods = "gpio1";
 138                         ti,gpio-always-on;
 139                         gpio-controller;
 140                         #gpio-cells = <2>;
 141                         interrupt-controller;
 142                         #interrupt-cells = <2>;
 143                 };
 144
 145                 gpio2: gpio@49050000 {
 146                         compatible = "ti,omap3-gpio";
 147                         reg = <0x49050000 0x200>;
 148                         interrupts = <30>;
 149                         ti,hwmods = "gpio2";
 150                         gpio-controller;
 151                         #gpio-cells = <2>;
 152                         interrupt-controller;
 153                         #interrupt-cells = <2>;
 154                 };
 155
 156                 gpio3: gpio@49052000 {
 157                         compatible = "ti,omap3-gpio";
 158                         reg = <0x49052000 0x200>;
 159                         interrupts = <31>;
 160                         ti,hwmods = "gpio3";
 161                         gpio-controller;
 162                         #gpio-cells = <2>;
 163                         interrupt-controller;
 164                         #interrupt-cells = <2>;
 165                 };
 166
 167                 gpio4: gpio@49054000 {
 168                         compatible = "ti,omap3-gpio";
 169                         reg = <0x49054000 0x200>;
 170                         interrupts = <32>;
 171                         ti,hwmods = "gpio4";
 172                         gpio-controller;
 173                         #gpio-cells = <2>;
 174                         interrupt-controller;
 175                         #interrupt-cells = <2>;
 176                 };
 177
 178                 gpio5: gpio@49056000 {
 179                         compatible = "ti,omap3-gpio";
 180                         reg = <0x49056000 0x200>;
 181                         interrupts = <33>;
 182                         ti,hwmods = "gpio5";
 183                         gpio-controller;
 184                         #gpio-cells = <2>;
 185                         interrupt-controller;
 186                         #interrupt-cells = <2>;
 187                 };
 188
 189                 gpio6: gpio@49058000 {
 190                         compatible = "ti,omap3-gpio";
 191                         reg = <0x49058000 0x200>;
 192                         interrupts = <34>;
 193                         ti,hwmods = "gpio6";
 194                         gpio-controller;
 195                         #gpio-cells = <2>;
 196                         interrupt-controller;
 197                         #interrupt-cells = <2>;
 198                 };
 199
 200                 uart1: serial@4806a000 {
 201                         compatible = "ti,omap3-uart";
 202                         reg = <0x4806a000 0x2000>;
 203                         interrupts = <72>;
 204                         dmas = <&sdma 49 &sdma 50>;
 205                         dma-names = "tx", "rx";
 206                         ti,hwmods = "uart1";
 207                         clock-frequency = <48000000>;
 208                 };
 209
 210                 uart2: serial@4806c000 {
 211                         compatible = "ti,omap3-uart";
 212                         reg = <0x4806c000 0x400>;
 213                         interrupts = <73>;
 214                         dmas = <&sdma 51 &sdma 52>;
 215                         dma-names = "tx", "rx";
 216                         ti,hwmods = "uart2";
 217                         clock-frequency = <48000000>;
 218                 };
 219
 220                 uart3: serial@49020000 {
 221                         compatible = "ti,omap3-uart";
 222                         reg = <0x49020000 0x400>;
 223                         interrupts = <74>;
 224                         dmas = <&sdma 53 &sdma 54>;
 225                         dma-names = "tx", "rx";
 226                         ti,hwmods = "uart3";
 227                         clock-frequency = <48000000>;
 228                 };
 229
 230                 i2c1: i2c@48070000 {
 231                         compatible = "ti,omap3-i2c";
 232                         reg = <0x48070000 0x80>;
 233                         interrupts = <56>;
 234                         dmas = <&sdma 27 &sdma 28>;
 235                         dma-names = "tx", "rx";
 236                         #address-cells = <1>;
 237                         #size-cells = <0>;
 238                         ti,hwmods = "i2c1";
 239                 };
 240
 241                 i2c2: i2c@48072000 {
 242                         compatible = "ti,omap3-i2c";
 243                         reg = <0x48072000 0x80>;
 244                         interrupts = <57>;
 245                         dmas = <&sdma 29 &sdma 30>;
 246                         dma-names = "tx", "rx";
 247                         #address-cells = <1>;
 248                         #size-cells = <0>;
 249                         ti,hwmods = "i2c2";
 250                 };
 251
 252                 i2c3: i2c@48060000 {
 253                         compatible = "ti,omap3-i2c";
 254                         reg = <0x48060000 0x80>;
 255                         interrupts = <61>;
 256                         dmas = <&sdma 25 &sdma 26>;
 257                         dma-names = "tx", "rx";
 258                         #address-cells = <1>;
 259                         #size-cells = <0>;
 260                         ti,hwmods = "i2c3";
 261                 };
 262
 263                 mcspi1: spi@48098000 {
 264                         compatible = "ti,omap2-mcspi";
 265                         reg = <0x48098000 0x100>;
 266                         interrupts = <65>;
 267                         #address-cells = <1>;
 268                         #size-cells = <0>;
 269                         ti,hwmods = "mcspi1";
 270                         ti,spi-num-cs = <4>;
 271                         dmas = <&sdma 35>,
 272                                <&sdma 36>,
 273                                <&sdma 37>,
 274                                <&sdma 38>,
 275                                <&sdma 39>,
 276                                <&sdma 40>,
 277                                <&sdma 41>,
 278                                <&sdma 42>;
 279                         dma-names = "tx0", "rx0", "tx1", "rx1",
 280                                     "tx2", "rx2", "tx3", "rx3";
 281                 };
 282
 283                 mcspi2: spi@4809a000 {
 284                         compatible = "ti,omap2-mcspi";
 285                         reg = <0x4809a000 0x100>;
 286                         interrupts = <66>;
 287                         #address-cells = <1>;
 288                         #size-cells = <0>;
 289                         ti,hwmods = "mcspi2";
 290                         ti,spi-num-cs = <2>;
 291                         dmas = <&sdma 43>,
 292                                <&sdma 44>,
 293                                <&sdma 45>,
 294                                <&sdma 46>;
 295                         dma-names = "tx0", "rx0", "tx1", "rx1";
 296                 };
 297
 298                 mcspi3: spi@480b8000 {
 299                         compatible = "ti,omap2-mcspi";
 300                         reg = <0x480b8000 0x100>;
 301                         interrupts = <91>;
 302                         #address-cells = <1>;
 303                         #size-cells = <0>;
 304                         ti,hwmods = "mcspi3";
 305                         ti,spi-num-cs = <2>;
 306                         dmas = <&sdma 15>,
 307                                <&sdma 16>,
 308                                <&sdma 23>,
 309                                <&sdma 24>;
 310                         dma-names = "tx0", "rx0", "tx1", "rx1";
 311                 };
 312
 313                 mcspi4: spi@480ba000 {
 314                         compatible = "ti,omap2-mcspi";
 315                         reg = <0x480ba000 0x100>;
 316                         interrupts = <48>;
 317                         #address-cells = <1>;
 318                         #size-cells = <0>;
 319                         ti,hwmods = "mcspi4";
 320                         ti,spi-num-cs = <1>;
 321                         dmas = <&sdma 70>, <&sdma 71>;
 322                         dma-names = "tx0", "rx0";
 323                 };
 324
 325                 hdqw1w: 1w@480b2000 {
 326                         compatible = "ti,omap3-1w";
 327                         reg = <0x480b2000 0x1000>;
 328                         interrupts = <58>;
 329                         ti,hwmods = "hdq1w";
 330                 };
 331
 332                 mmc1: mmc@4809c000 {
 333                         compatible = "ti,omap3-hsmmc";
 334                         reg = <0x4809c000 0x200>;
 335                         interrupts = <83>;
 336                         ti,hwmods = "mmc1";
 337                         ti,dual-volt;
 338                         dmas = <&sdma 61>, <&sdma 62>;
 339                         dma-names = "tx", "rx";
 340                 };
 341
 342                 mmc2: mmc@480b4000 {
 343                         compatible = "ti,omap3-hsmmc";
 344                         reg = <0x480b4000 0x200>;
 345                         interrupts = <86>;
 346                         ti,hwmods = "mmc2";
 347                         dmas = <&sdma 47>, <&sdma 48>;
 348                         dma-names = "tx", "rx";
 349                 };
 350
 351                 mmc3: mmc@480ad000 {
 352                         compatible = "ti,omap3-hsmmc";
 353                         reg = <0x480ad000 0x200>;
 354                         interrupts = <94>;
 355                         ti,hwmods = "mmc3";
 356                         dmas = <&sdma 77>, <&sdma 78>;
 357                         dma-names = "tx", "rx";
 358                 };
 359
 360                 wdt2: wdt@48314000 {
 361                         compatible = "ti,omap3-wdt";
 362                         reg = <0x48314000 0x80>;
 363                         ti,hwmods = "wd_timer2";
 364                 };
 365
 366                 mcbsp1: mcbsp@48074000 {
 367                         compatible = "ti,omap3-mcbsp";
 368                         reg = <0x48074000 0xff>;
 369                         reg-names = "mpu";
 370                         interrupts = <16>, /* OCP compliant interrupt */
 371                                      <59>, /* TX interrupt */
 372                                      <60>; /* RX interrupt */
 373                         interrupt-names = "common", "tx", "rx";
 374                         ti,buffer-size = <128>;
 375                         ti,hwmods = "mcbsp1";
 376                         dmas = <&sdma 31>,
 377                                <&sdma 32>;
 378                         dma-names = "tx", "rx";
 379                 };
 380
 381                 mcbsp2: mcbsp@49022000 {
 382                         compatible = "ti,omap3-mcbsp";
 383                         reg = <0x49022000 0xff>,
 384                               <0x49028000 0xff>;
 385                         reg-names = "mpu", "sidetone";
 386                         interrupts = <17>, /* OCP compliant interrupt */
 387                                      <62>, /* TX interrupt */
 388                                      <63>, /* RX interrupt */
 389                                      <4>;  /* Sidetone */
 390                         interrupt-names = "common", "tx", "rx", "sidetone";
 391                         ti,buffer-size = <1280>;
 392                         ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
 393                         dmas = <&sdma 33>,
 394                                <&sdma 34>;
 395                         dma-names = "tx", "rx";
 396                 };
 397
 398                 mcbsp3: mcbsp@49024000 {
 399                         compatible = "ti,omap3-mcbsp";
 400                         reg = <0x49024000 0xff>,
 401                               <0x4902a000 0xff>;
 402                         reg-names = "mpu", "sidetone";
 403                         interrupts = <22>, /* OCP compliant interrupt */
 404                                      <89>, /* TX interrupt */
 405                                      <90>, /* RX interrupt */
 406                                      <5>;  /* Sidetone */
 407                         interrupt-names = "common", "tx", "rx", "sidetone";
 408                         ti,buffer-size = <128>;
 409                         ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
 410                         dmas = <&sdma 17>,
 411                                <&sdma 18>;
 412                         dma-names = "tx", "rx";
 413                 };
 414
 415                 mcbsp4: mcbsp@49026000 {
 416                         compatible = "ti,omap3-mcbsp";
 417                         reg = <0x49026000 0xff>;
 418                         reg-names = "mpu";
 419                         interrupts = <23>, /* OCP compliant interrupt */
 420                                      <54>, /* TX interrupt */
 421                                      <55>; /* RX interrupt */
 422                         interrupt-names = "common", "tx", "rx";
 423                         ti,buffer-size = <128>;
 424                         ti,hwmods = "mcbsp4";
 425                         dmas = <&sdma 19>,
 426                                <&sdma 20>;
 427                         dma-names = "tx", "rx";
 428                 };
 429
 430                 mcbsp5: mcbsp@48096000 {
 431                         compatible = "ti,omap3-mcbsp";
 432                         reg = <0x48096000 0xff>;
 433                         reg-names = "mpu";
 434                         interrupts = <27>, /* OCP compliant interrupt */
 435                                      <81>, /* TX interrupt */
 436                                      <82>; /* RX interrupt */
 437                         interrupt-names = "common", "tx", "rx";
 438                         ti,buffer-size = <128>;
 439                         ti,hwmods = "mcbsp5";
 440                         dmas = <&sdma 21>,
 441                                <&sdma 22>;
 442                         dma-names = "tx", "rx";
 443                 };
 444
 445                 timer1: timer@48318000 {
 446                         compatible = "ti,omap3430-timer";
 447                         reg = <0x48318000 0x400>;
 448                         interrupts = <37>;
 449                         ti,hwmods = "timer1";
 450                         ti,timer-alwon;
 451                 };
 452
 453                 timer2: timer@49032000 {
 454                         compatible = "ti,omap3430-timer";
 455                         reg = <0x49032000 0x400>;
 456                         interrupts = <38>;
 457                         ti,hwmods = "timer2";
 458                 };
 459
 460                 timer3: timer@49034000 {
 461                         compatible = "ti,omap3430-timer";
 462                         reg = <0x49034000 0x400>;
 463                         interrupts = <39>;
 464                         ti,hwmods = "timer3";
 465                 };
 466
 467                 timer4: timer@49036000 {
 468                         compatible = "ti,omap3430-timer";
 469                         reg = <0x49036000 0x400>;
 470                         interrupts = <40>;
 471                         ti,hwmods = "timer4";
 472                 };
 473
 474                 timer5: timer@49038000 {
 475                         compatible = "ti,omap3430-timer";
 476                         reg = <0x49038000 0x400>;
 477                         interrupts = <41>;
 478                         ti,hwmods = "timer5";
 479                         ti,timer-dsp;
 480                 };
 481
 482                 timer6: timer@4903a000 {
 483                         compatible = "ti,omap3430-timer";
 484                         reg = <0x4903a000 0x400>;
 485                         interrupts = <42>;
 486                         ti,hwmods = "timer6";
 487                         ti,timer-dsp;
 488                 };
 489
 490                 timer7: timer@4903c000 {
 491                         compatible = "ti,omap3430-timer";
 492                         reg = <0x4903c000 0x400>;
 493                         interrupts = <43>;
 494                         ti,hwmods = "timer7";
 495                         ti,timer-dsp;
 496                 };
 497
 498                 timer8: timer@4903e000 {
 499                         compatible = "ti,omap3430-timer";
 500                         reg = <0x4903e000 0x400>;
 501                         interrupts = <44>;
 502                         ti,hwmods = "timer8";
 503                         ti,timer-pwm;
 504                         ti,timer-dsp;
 505                 };
 506
 507                 timer9: timer@49040000 {
 508                         compatible = "ti,omap3430-timer";
 509                         reg = <0x49040000 0x400>;
 510                         interrupts = <45>;
 511                         ti,hwmods = "timer9";
 512                         ti,timer-pwm;
 513                 };
 514
 515                 timer10: timer@48086000 {
 516                         compatible = "ti,omap3430-timer";
 517                         reg = <0x48086000 0x400>;
 518                         interrupts = <46>;
 519                         ti,hwmods = "timer10";
 520                         ti,timer-pwm;
 521                 };
 522
 523                 timer11: timer@48088000 {
 524                         compatible = "ti,omap3430-timer";
 525                         reg = <0x48088000 0x400>;
 526                         interrupts = <47>;
 527                         ti,hwmods = "timer11";
 528                         ti,timer-pwm;
 529                 };
 530
 531                 timer12: timer@48304000 {
 532                         compatible = "ti,omap3430-timer";
 533                         reg = <0x48304000 0x400>;
 534                         interrupts = <95>;
 535                         ti,hwmods = "timer12";
 536                         ti,timer-alwon;
 537                         ti,timer-secure;
 538                 };
 539
 540                 usbhstll: usbhstll@48062000 {
 541                         compatible = "ti,usbhs-tll";
 542                         reg = <0x48062000 0x1000>;
 543                         interrupts = <78>;
 544                         ti,hwmods = "usb_tll_hs";
 545                 };
 546
 547                 usbhshost: usbhshost@48064000 {
 548                         compatible = "ti,usbhs-host";
 549                         reg = <0x48064000 0x400>;
 550                         ti,hwmods = "usb_host_hs";
 551                         #address-cells = <1>;
 552                         #size-cells = <1>;
 553                         ranges;
 554
 555                         usbhsohci: ohci@48064400 {
 556                                 compatible = "ti,ohci-omap3", "usb-ohci";
 557                                 reg = <0x48064400 0x400>;
 558                                 interrupt-parent = <&intc>;
 559                                 interrupts = <76>;
 560                         };
 561
 562                         usbhsehci: ehci@48064800 {
 563                                 compatible = "ti,ehci-omap", "usb-ehci";
 564                                 reg = <0x48064800 0x400>;
 565                                 interrupt-parent = <&intc>;
 566                                 interrupts = <77>;
 567                         };
 568                 };
 569
 570                 gpmc: gpmc@6e000000 {
 571                         compatible = "ti,omap3430-gpmc";
 572                         ti,hwmods = "gpmc";
 573                         reg = <0x6e000000 0x02d0>;
 574                         interrupts = <20>;
 575                         gpmc,num-cs = <8>;
 576                         gpmc,num-waitpins = <4>;
 577                         #address-cells = <2>;
 578                         #size-cells = <1>;
 579                 };
 580
 581                 usb_otg_hs: usb_otg_hs@480ab000 {
 582                         compatible = "ti,omap3-musb";
 583                         reg = <0x480ab000 0x1000>;
 584                         interrupts = <92>, <93>;
 585                         interrupt-names = "mc", "dma";
 586                         ti,hwmods = "usb_otg_hs";
 587                         multipoint = <1>;
 588                         num-eps = <16>;
 589                         ram-bits = <12>;
 590                 };
 591         };
 592 };