Merge branch 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / omap3-tao3530.dtsi
1 /*
2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  */
9 /dts-v1/;
10
11 #include "omap34xx.dtsi"
12
13 /* Secure omaps have some devices inaccessible depending on the firmware */
14 &aes {
15         status = "disabled";
16 };
17
18 &sham {
19         status = "disabled";
20 };
21
22 / {
23         cpus {
24                 cpu@0 {
25                         cpu0-supply = <&vcc>;
26                 };
27         };
28
29         memory@80000000 {
30                 device_type = "memory";
31                 reg = <0x80000000 0x10000000>; /* 256 MB */
32         };
33
34         /* HS USB Port 2 Power */
35         hsusb2_power: hsusb2_power_reg {
36                 compatible = "regulator-fixed";
37                 regulator-name = "hsusb2_vbus";
38                 regulator-min-microvolt = <3300000>;
39                 regulator-max-microvolt = <3300000>;
40                 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
41                 startup-delay-us = <70000>;
42         };
43
44         /* HS USB Host PHY on PORT 2 */
45         hsusb2_phy: hsusb2_phy {
46                 compatible = "usb-nop-xceiv";
47                 reset-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;       /* gpio_162 */
48                 vcc-supply = <&hsusb2_power>;
49         };
50
51         sound {
52                 compatible = "ti,omap-twl4030";
53                 ti,model = "omap3beagle";
54
55                 /* McBSP2 is used for onboard sound, same as on beagle */
56                 ti,mcbsp = <&mcbsp2>;
57         };
58
59         /* Regulator to enable/switch the vcc of the Wifi module */
60         mmc2_sdio_poweron: regulator-mmc2-sdio-poweron {
61                 compatible = "regulator-fixed";
62                 regulator-name = "regulator-mmc2-sdio-poweron";
63                 regulator-min-microvolt = <3150000>;
64                 regulator-max-microvolt = <3150000>;
65                 gpio = <&gpio5 29 GPIO_ACTIVE_LOW>;             /* gpio_157 */
66                 startup-delay-us = <10000>;
67         };
68 };
69
70 &omap3_pmx_core {
71         hsusbb2_pins: pinmux_hsusbb2_pins {
72                 pinctrl-single,pins = <
73                         OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)               /* etk_d10.hsusb2_clk */
74                         OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)               /* etk_d11.hsusb2_stp */
75                         OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d12.hsusb2_dir */
76                         OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d13.hsusb2_nxt */
77                         OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d14.hsusb2_data0 */
78                         OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d15.hsusb2_data1 */
79                         OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi1_cs3.hsusb2_data2 */
80                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_clk.hsusb2_data7 */
81                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_simo.hsusb2_data4 */
82                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_somi.hsusb2_data5 */
83                         OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs0.hsusb2_data6 */
84                         OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs1.hsusb2_data3 */
85                 >;
86         };
87
88         mmc1_pins: pinmux_mmc1_pins {
89                 pinctrl-single,pins = <
90                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
91                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
92                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
93                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
94                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
95                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
96                         OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
97                         OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
98                         OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
99                         OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
100                 >;
101         };
102
103         mmc2_pins: pinmux_mmc2_pins {
104                 pinctrl-single,pins = <
105                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
106                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
107                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
108                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
109                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
110                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
111                 >;
112         };
113
114         /* wlan GPIO output for WLAN_EN */
115         wlan_gpio: pinmux_wlan_gpio {
116                 pinctrl-single,pins = <
117                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_fsr gpio_157 */
118                 >;
119         };
120
121         uart3_pins: pinmux_uart3_pins {
122                 pinctrl-single,pins = <
123                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
124                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)       /* uart3_tx_irtx.uart3_tx_irtx */
125                 >;
126         };
127
128         i2c3_pins: pinmux_i2c3_pins {
129                 pinctrl-single,pins = <
130                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl.i2c3_scl */
131                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.i2c3_sda */
132                 >;
133         };
134
135         mcspi1_pins: pinmux_mcspi1_pins {
136                 pinctrl-single,pins = <
137                         OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
138                         OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
139                         OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
140                         OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
141                 >;
142         };
143
144         mcspi3_pins: pinmux_mcspi3_pins {
145                 pinctrl-single,pins = <
146                         OMAP3_CORE1_IOPAD(0x25dc, PIN_OUTPUT | MUX_MODE1)       /* etk_d0.mcspi3_simo gpio14 INPUT | MODE1 */
147                         OMAP3_CORE1_IOPAD(0x25de, PIN_INPUT_PULLUP | MUX_MODE1) /* etk_d1.mcspi3_somi gpio15 INPUT | MODE1 */
148                         OMAP3_CORE1_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE1)       /* etk_d2.mcspi3_cs0 gpio16 INPUT | MODE1 */
149                         OMAP3_CORE1_IOPAD(0x25e2, PIN_INPUT | MUX_MODE1)        /* etk_d3.mcspi3_clk gpio17 INPUT | MODE1 */
150                 >;
151         };
152
153         mcbsp3_pins: pinmux_mcbsp3_pins {
154                 pinctrl-single,pins = <
155                         OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0)       /* mcbsp3_dx.uart2_cts */
156                         OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0)        /* mcbsp3_dr.uart2_rts */
157                         OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0)        /* mcbsp3_clk.uart2_tx */
158                         OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0)        /* mcbsp3_fsx.uart2_rx */
159                 >;
160         };
161 };
162
163 /* McBSP1: mux'ed with GPIO158 as clock for HA-DSP */
164 &mcbsp1 {
165         status = "disabled";
166 };
167
168 &mcbsp2 {
169         status = "okay";
170 };
171
172 &i2c1 {
173         clock-frequency = <2600000>;
174
175         twl: twl@48 {
176                 reg = <0x48>;
177                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
178                 interrupt-parent = <&intc>;
179
180                 twl_audio: audio {
181                         compatible = "ti,twl4030-audio";
182                         codec {
183                         };
184                 };
185         };
186 };
187
188 &i2c3 {
189         clock-frequency = <100000>;
190
191         pinctrl-names = "default";
192         pinctrl-0 = <&i2c3_pins>;
193 };
194
195 &mcspi1 {
196         pinctrl-names = "default";
197         pinctrl-0 = <&mcspi1_pins>;
198
199         spidev@0 {
200                 compatible = "spidev";
201                 spi-max-frequency = <48000000>;
202                 reg = <0>;
203                 spi-cpha;
204         };
205 };
206
207 &mcspi3 {
208         pinctrl-names = "default";
209         pinctrl-0 = <&mcspi3_pins>;
210
211         spidev@0 {
212                 compatible = "spidev";
213                 spi-max-frequency = <48000000>;
214                 reg = <0>;
215                 spi-cpha;
216         };
217 };
218
219 #include "twl4030.dtsi"
220 #include "twl4030_omap3.dtsi"
221
222 &mmc1 {
223         pinctrl-names = "default";
224         pinctrl-0 = <&mmc1_pins>;
225         vmmc-supply = <&vmmc1>;
226         vqmmc-supply = <&vsim>;
227         cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_HIGH>;
228         bus-width = <8>;
229 };
230
231 // WiFi (Marvell 88W8686) on MMC2/SDIO
232 &mmc2 {
233         pinctrl-names = "default";
234         pinctrl-0 = <&mmc2_pins>;
235         vmmc-supply = <&mmc2_sdio_poweron>;
236         non-removable;
237         bus-width = <4>;
238         cap-power-off-card;
239 };
240
241 &mmc3 {
242         status = "disabled";
243 };
244
245 &usbhshost {
246         port2-mode = "ehci-phy";
247 };
248
249 &usbhsehci {
250         phys = <0 &hsusb2_phy>;
251 };
252
253 &twl_gpio {
254         ti,use-leds;
255         /* pullups: BIT(1) */
256         ti,pullups = <0x000002>;
257         /*
258          * pulldowns:
259          * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
260          * BIT(15), BIT(16), BIT(17)
261          */
262         ti,pulldowns = <0x03a1c4>;
263 };
264
265 &uart3 {
266         pinctrl-names = "default";
267         pinctrl-0 = <&uart3_pins>;
268 };
269
270 &mcbsp3 {
271         status = "okay";
272         pinctrl-names = "default";
273         pinctrl-0 = <&mcbsp3_pins>;
274 };
275
276 &gpmc {
277         ranges = <0 0 0x30000000 0x01000000>;   /* CS0: 16MB for NAND */
278
279         nand@0,0 {
280                 compatible = "ti,omap2-nand";
281                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
282                 interrupt-parent = <&gpmc>;
283                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
284                              <1 IRQ_TYPE_NONE>; /* termcount */
285                 nand-bus-width = <16>;
286                 gpmc,device-width = <2>;        /* GPMC_DEVWIDTH_16BIT */
287                 ti,nand-ecc-opt = "sw";
288
289                 gpmc,cs-on-ns = <0>;
290                 gpmc,cs-rd-off-ns = <36>;
291                 gpmc,cs-wr-off-ns = <36>;
292                 gpmc,adv-on-ns = <6>;
293                 gpmc,adv-rd-off-ns = <24>;
294                 gpmc,adv-wr-off-ns = <36>;
295                 gpmc,oe-on-ns = <6>;
296                 gpmc,oe-off-ns = <48>;
297                 gpmc,we-on-ns = <6>;
298                 gpmc,we-off-ns = <30>;
299                 gpmc,rd-cycle-ns = <72>;
300                 gpmc,wr-cycle-ns = <72>;
301                 gpmc,access-ns = <54>;
302                 gpmc,wr-access-ns = <30>;
303
304                 #address-cells = <1>;
305                 #size-cells = <1>;
306
307                 x-loader@0 {
308                         label = "X-Loader";
309                         reg = <0 0x80000>;
310                 };
311
312                 bootloaders@80000 {
313                         label = "U-Boot";
314                         reg = <0x80000 0x1e0000>;
315                 };
316
317                 bootloaders_env@260000 {
318                         label = "U-Boot Env";
319                         reg = <0x260000 0x20000>;
320                 };
321
322                 kernel@280000 {
323                         label = "Kernel";
324                         reg = <0x280000 0x400000>;
325                 };
326
327                 filesystem@680000 {
328                         label = "File System";
329                         reg = <0x680000 0xf980000>;
330                 };
331         };
332 };
333
334 &usb_otg_hs {
335         interface-type = <0>;
336         usb-phy = <&usb2_phy>;
337         phys = <&usb2_phy>;
338         phy-names = "usb2-phy";
339         mode = <3>;
340         power = <50>;
341 };
342
343 &vaux2 {
344         regulator-name = "vdd_ehci";
345         regulator-min-microvolt = <1800000>;
346         regulator-max-microvolt = <1800000>;
347         regulator-always-on;
348 };