Merge remote-tracking branch 'asoc/fix/rcar' into asoc-linus
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / omap3-n900.dts
1 /*
2  * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
3  * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 (or later) as
7  * published by the Free Software Foundation.
8  */
9
10 /dts-v1/;
11
12 #include "omap34xx.dtsi"
13 #include <dt-bindings/input/input.h>
14
15 /*
16  * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
17  * for omap AES HW crypto support. When linux kernel try to access memory of AES
18  * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
19  * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
20  * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
21  * There is "unofficial" version of bootloader which enables AES in L3 firewall
22  * but it is not widely used and to prevent kernel crash rather AES is disabled.
23  * There is also no runtime detection code if AES is disabled in L3 firewall...
24  */
25 &aes {
26         status = "disabled";
27 };
28
29 / {
30         model = "Nokia N900";
31         compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
32
33         aliases {
34                 i2c0;
35                 i2c1 = &i2c1;
36                 i2c2 = &i2c2;
37                 i2c3 = &i2c3;
38         };
39
40         cpus {
41                 cpu@0 {
42                         cpu0-supply = <&vcc>;
43                 };
44         };
45
46         leds {
47                 compatible = "gpio-leds";
48                 heartbeat {
49                         label = "debug::sleep";
50                         gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* 162 */
51                         linux,default-trigger = "default-on";
52                         pinctrl-names = "default";
53                         pinctrl-0 = <&debug_leds>;
54                 };
55         };
56
57         memory@80000000 {
58                 device_type = "memory";
59                 reg = <0x80000000 0x10000000>; /* 256 MB */
60         };
61
62         gpio_keys {
63                 compatible = "gpio-keys";
64
65                 camera_lens_cover {
66                         label = "Camera Lens Cover";
67                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
68                         linux,input-type = <EV_SW>;
69                         linux,code = <SW_CAMERA_LENS_COVER>;
70                         linux,can-disable;
71                 };
72
73                 camera_focus {
74                         label = "Camera Focus";
75                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
76                         linux,code = <KEY_CAMERA_FOCUS>;
77                         linux,can-disable;
78                 };
79
80                 camera_capture {
81                         label = "Camera Capture";
82                         gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
83                         linux,code = <KEY_CAMERA>;
84                         linux,can-disable;
85                 };
86
87                 lock_button {
88                         label = "Lock Button";
89                         gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
90                         linux,code = <KEY_SCREENLOCK>;
91                         linux,can-disable;
92                 };
93
94                 keypad_slide {
95                         label = "Keypad Slide";
96                         gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
97                         linux,input-type = <EV_SW>;
98                         linux,code = <SW_KEYPAD_SLIDE>;
99                         linux,can-disable;
100                 };
101
102                 proximity_sensor {
103                         label = "Proximity Sensor";
104                         gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
105                         linux,input-type = <EV_SW>;
106                         linux,code = <SW_FRONT_PROXIMITY>;
107                         linux,can-disable;
108                 };
109         };
110
111         isp1707: isp1707 {
112                 compatible = "nxp,isp1707";
113                 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
114                 usb-phy = <&usb2_phy>;
115         };
116
117         tv: connector {
118                 compatible = "composite-video-connector";
119                 label = "tv";
120
121                 port {
122                         tv_connector_in: endpoint {
123                                 remote-endpoint = <&venc_out>;
124                         };
125                 };
126         };
127
128         sound: n900-audio {
129                 compatible = "nokia,n900-audio";
130
131                 nokia,cpu-dai = <&mcbsp2>;
132                 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
133                 nokia,headphone-amplifier = <&tpa6130a2>;
134
135                 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
136                 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
137                 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
138                 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
139         };
140
141         battery: n900-battery {
142                 compatible = "nokia,n900-battery";
143                 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
144                 io-channel-names = "temp", "bsi", "vbat";
145         };
146
147         pwm9: dmtimer-pwm {
148                 compatible = "ti,omap-dmtimer-pwm";
149                 #pwm-cells = <3>;
150                 ti,timers = <&timer9>;
151                 ti,clock-source = <0x00>; /* timer_sys_ck */
152         };
153
154         ir: n900-ir {
155                 compatible = "nokia,n900-ir";
156                 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
157         };
158
159         /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
160         vctcxo: vctcxo {
161                 compatible = "fixed-clock";
162                 #clock-cells = <0>;
163                 clock-frequency = <38400000>;
164         };
165 };
166
167 &isp {
168         vdds_csib-supply = <&vaux2>;
169
170         pinctrl-names = "default";
171         pinctrl-0 = <&camera_pins>;
172
173         ports {
174                 port@1 {
175                         reg = <1>;
176
177                         csi_isp: endpoint {
178                                 remote-endpoint = <&csi_cam1>;
179                                 bus-type = <3>; /* CCP2 */
180                                 clock-lanes = <1>;
181                                 data-lanes = <0>;
182                                 lane-polarity = <0 0>;
183                                 /* Select strobe = <1> for back camera, <0> for front camera */
184                                 strobe = <1>;
185                         };
186                 };
187         };
188 };
189
190 &omap3_pmx_core {
191         pinctrl-names = "default";
192
193         uart2_pins: pinmux_uart2_pins {
194                 pinctrl-single,pins = <
195                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)         /* uart2_cts */
196                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)               /* uart2_rts */
197                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
198                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
199                 >;
200         };
201
202         uart3_pins: pinmux_uart3_pins {
203                 pinctrl-single,pins = <
204                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)                /* uart3_rx */
205                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx */
206                 >;
207         };
208
209         ethernet_pins: pinmux_ethernet_pins {
210                 pinctrl-single,pins = <
211                         OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4)       /* gpmc_ncs3.gpio_54 */
212                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)               /* dss_data16.gpio_86 */
213                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
214                 >;
215         };
216
217         gpmc_pins: pinmux_gpmc_pins {
218                 pinctrl-single,pins = <
219
220                         /* address lines */
221                         OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
222                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
223                         OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
224
225                         /* data lines, gpmc_d0..d7 not muxable according to TRM */
226                         OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
227                         OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
228                         OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
229                         OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
230                         OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
231                         OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
232                         OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
233                         OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
234
235                         /*
236                          * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
237                          * according to TRM. OneNAND seems to require PIN_INPUT on clock.
238                          */
239                         OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
240                         OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
241                 >;
242         };
243
244         i2c1_pins: pinmux_i2c1_pins {
245                 pinctrl-single,pins = <
246                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl */
247                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda */
248                 >;
249         };
250
251         i2c2_pins: pinmux_i2c2_pins {
252                 pinctrl-single,pins = <
253                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)                /* i2c2_scl */
254                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)                /* i2c2_sda */
255                 >;
256         };
257
258         i2c3_pins: pinmux_i2c3_pins {
259                 pinctrl-single,pins = <
260                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)                /* i2c3_scl */
261                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)                /* i2c3_sda */
262                 >;
263         };
264
265         debug_leds: pinmux_debug_led_pins {
266                 pinctrl-single,pins = <
267                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
268                 >;
269         };
270
271         mcspi4_pins: pinmux_mcspi4_pins {
272                 pinctrl-single,pins = <
273                         OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
274                         OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
275                         OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
276                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
277                 >;
278         };
279
280         mmc1_pins: pinmux_mmc1_pins {
281                 pinctrl-single,pins = <
282                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
283                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
284                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0 */
285                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
286                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
287                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
288                 >;
289         };
290
291         mmc2_pins: pinmux_mmc2_pins {
292                 pinctrl-single,pins = <
293                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
294                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
295                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0 */
296                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
297                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
298                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
299                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
300                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
301                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
302                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
303                 >;
304         };
305
306         acx565akm_pins: pinmux_acx565akm_pins {
307                 pinctrl-single,pins = <
308                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4)               /* RX51_LCD_RESET_GPIO */
309                 >;
310         };
311
312         dss_sdi_pins: pinmux_dss_sdi_pins {
313                 pinctrl-single,pins = <
314                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
315                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
316                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
317                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
318
319                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
320                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
321                 >;
322         };
323
324         wl1251_pins: pinmux_wl1251 {
325                 pinctrl-single,pins = <
326                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4)               /* gpio 87 => wl1251 enable */
327                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4)                /* gpio 42 => wl1251 irq */
328                 >;
329         };
330
331         ssi_pins: pinmux_ssi {
332                 pinctrl-single,pins = <
333                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
334                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)               /* ssi1_flag_tx */
335                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)                /* ssi1_wake_tx (cawake) */
336                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)               /* ssi1_dat_tx */
337                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)                /* ssi1_dat_rx */
338                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)                /* ssi1_flag_rx */
339                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)               /* ssi1_rdy_rx */
340                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)               /* ssi1_wake */
341                 >;
342         };
343
344         modem_pins: pinmux_modem {
345                 pinctrl-single,pins = <
346                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4)               /* gpio 70 => cmt_apeslpx */
347                         OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4)                /* gpio 72 => ape_rst_rq */
348                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)               /* gpio 73 => cmt_rst_rq */
349                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)               /* gpio 74 => cmt_en */
350                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4)               /* gpio 75 => cmt_rst */
351                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)               /* gpio 157 => cmt_bsi */
352                 >;
353         };
354
355         camera_pins: pinmux_camera {
356                 pinctrl-single,pins = <
357                         OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7)       /* cam_hs */
358                         OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7)       /* cam_vs */
359                         OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0)       /* cam_xclka */
360                         OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7)       /* cam_d4 */
361                         OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0)        /* cam_d6 */
362                         OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0)        /* cam_d7 */
363                         OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0)        /* cam_d8 */
364                         OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0)        /* cam_d9 */
365                         OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7)       /* cam_d10 */
366                         OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7)       /* cam_xclkb */
367                         OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0)       /* cam_strobe */
368                 >;
369         };
370 };
371
372 &i2c1 {
373         pinctrl-names = "default";
374         pinctrl-0 = <&i2c1_pins>;
375
376         clock-frequency = <2200000>;
377
378         twl: twl@48 {
379                 reg = <0x48>;
380                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
381                 interrupt-parent = <&intc>;
382         };
383 };
384
385 #include "twl4030.dtsi"
386 #include "twl4030_omap3.dtsi"
387
388 &vaux1 {
389         regulator-name = "V28";
390         regulator-min-microvolt = <2800000>;
391         regulator-max-microvolt = <2800000>;
392         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
393         regulator-always-on; /* due to battery cover sensor */
394 };
395
396 &vaux2 {
397         regulator-name = "VCSI";
398         regulator-min-microvolt = <1800000>;
399         regulator-max-microvolt = <1800000>;
400         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
401 };
402
403 &vaux3 {
404         regulator-name = "VMMC2_30";
405         regulator-min-microvolt = <2800000>;
406         regulator-max-microvolt = <3000000>;
407         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
408 };
409
410 &vaux4 {
411         regulator-name = "VCAM_ANA_28";
412         regulator-min-microvolt = <2800000>;
413         regulator-max-microvolt = <2800000>;
414         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
415 };
416
417 &vmmc1 {
418         regulator-name = "VMMC1";
419         regulator-min-microvolt = <1850000>;
420         regulator-max-microvolt = <3150000>;
421         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
422 };
423
424 &vmmc2 {
425         regulator-name = "V28_A";
426         regulator-min-microvolt = <2800000>;
427         regulator-max-microvolt = <3000000>;
428         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
429         regulator-always-on; /* due VIO leak to AIC34 VDDs */
430 };
431
432 &vpll1 {
433         regulator-name = "VPLL";
434         regulator-min-microvolt = <1800000>;
435         regulator-max-microvolt = <1800000>;
436         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
437         regulator-always-on;
438 };
439
440 &vpll2 {
441         regulator-name = "VSDI_CSI";
442         regulator-min-microvolt = <1800000>;
443         regulator-max-microvolt = <1800000>;
444         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
445         regulator-always-on;
446 };
447
448 &vsim {
449         regulator-name = "VMMC2_IO_18";
450         regulator-min-microvolt = <1800000>;
451         regulator-max-microvolt = <1800000>;
452         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
453 };
454
455 &vio {
456         regulator-name = "VIO";
457         regulator-min-microvolt = <1800000>;
458         regulator-max-microvolt = <1800000>;
459 };
460
461 &vintana1 {
462         regulator-name = "VINTANA1";
463         /* fixed to 1500000 */
464         regulator-always-on;
465 };
466
467 &vintana2 {
468         regulator-name = "VINTANA2";
469         regulator-min-microvolt = <2750000>;
470         regulator-max-microvolt = <2750000>;
471         regulator-always-on;
472 };
473
474 &vintdig {
475         regulator-name = "VINTDIG";
476         /* fixed to 1500000 */
477         regulator-always-on;
478 };
479
480 &twl {
481         twl_audio: audio {
482                 compatible = "ti,twl4030-audio";
483                 ti,enable-vibra = <1>;
484         };
485
486         twl_power: power {
487                 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
488                 ti,use_poweroff;
489         };
490 };
491
492 &twl_keypad {
493         linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
494                          MATRIX_KEY(0x00, 0x01, KEY_O)
495                          MATRIX_KEY(0x00, 0x02, KEY_P)
496                          MATRIX_KEY(0x00, 0x03, KEY_COMMA)
497                          MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
498                          MATRIX_KEY(0x00, 0x06, KEY_A)
499                          MATRIX_KEY(0x00, 0x07, KEY_S)
500
501                          MATRIX_KEY(0x01, 0x00, KEY_W)
502                          MATRIX_KEY(0x01, 0x01, KEY_D)
503                          MATRIX_KEY(0x01, 0x02, KEY_F)
504                          MATRIX_KEY(0x01, 0x03, KEY_G)
505                          MATRIX_KEY(0x01, 0x04, KEY_H)
506                          MATRIX_KEY(0x01, 0x05, KEY_J)
507                          MATRIX_KEY(0x01, 0x06, KEY_K)
508                          MATRIX_KEY(0x01, 0x07, KEY_L)
509
510                          MATRIX_KEY(0x02, 0x00, KEY_E)
511                          MATRIX_KEY(0x02, 0x01, KEY_DOT)
512                          MATRIX_KEY(0x02, 0x02, KEY_UP)
513                          MATRIX_KEY(0x02, 0x03, KEY_ENTER)
514                          MATRIX_KEY(0x02, 0x05, KEY_Z)
515                          MATRIX_KEY(0x02, 0x06, KEY_X)
516                          MATRIX_KEY(0x02, 0x07, KEY_C)
517                          MATRIX_KEY(0x02, 0x08, KEY_F9)
518
519                          MATRIX_KEY(0x03, 0x00, KEY_R)
520                          MATRIX_KEY(0x03, 0x01, KEY_V)
521                          MATRIX_KEY(0x03, 0x02, KEY_B)
522                          MATRIX_KEY(0x03, 0x03, KEY_N)
523                          MATRIX_KEY(0x03, 0x04, KEY_M)
524                          MATRIX_KEY(0x03, 0x05, KEY_SPACE)
525                          MATRIX_KEY(0x03, 0x06, KEY_SPACE)
526                          MATRIX_KEY(0x03, 0x07, KEY_LEFT)
527
528                          MATRIX_KEY(0x04, 0x00, KEY_T)
529                          MATRIX_KEY(0x04, 0x01, KEY_DOWN)
530                          MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
531                          MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
532                          MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
533                          MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
534                          MATRIX_KEY(0x04, 0x08, KEY_F10)
535
536                          MATRIX_KEY(0x05, 0x00, KEY_Y)
537                          MATRIX_KEY(0x05, 0x08, KEY_F11)
538
539                          MATRIX_KEY(0x06, 0x00, KEY_U)
540
541                          MATRIX_KEY(0x07, 0x00, KEY_I)
542                          MATRIX_KEY(0x07, 0x01, KEY_F7)
543                          MATRIX_KEY(0x07, 0x02, KEY_F8)
544                          >;
545 };
546
547 &twl_gpio {
548         ti,pullups      = <0x0>;
549         ti,pulldowns    = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
550 };
551
552 &i2c2 {
553         pinctrl-names = "default";
554         pinctrl-0 = <&i2c2_pins>;
555
556         clock-frequency = <100000>;
557
558         tlv320aic3x: tlv320aic3x@18 {
559                 compatible = "ti,tlv320aic3x";
560                 reg = <0x18>;
561                 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
562                 ai3x-gpio-func = <
563                         0 /* AIC3X_GPIO1_FUNC_DISABLED */
564                         5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
565                 >;
566
567                 AVDD-supply = <&vmmc2>;
568                 DRVDD-supply = <&vmmc2>;
569                 IOVDD-supply = <&vio>;
570                 DVDD-supply = <&vio>;
571
572                 ai3x-micbias-vg = <1>;
573         };
574
575         tlv320aic3x_aux: tlv320aic3x@19 {
576                 compatible = "ti,tlv320aic3x";
577                 reg = <0x19>;
578                 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
579
580                 AVDD-supply = <&vmmc2>;
581                 DRVDD-supply = <&vmmc2>;
582                 IOVDD-supply = <&vio>;
583                 DVDD-supply = <&vio>;
584
585                 ai3x-micbias-vg = <2>;
586         };
587
588         tsl2563: tsl2563@29 {
589                 compatible = "amstaos,tsl2563";
590                 reg = <0x29>;
591
592                 amstaos,cover-comp-gain = <16>;
593         };
594
595         adp1653: led-controller@30 {
596                 compatible = "adi,adp1653";
597                 reg = <0x30>;
598                 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
599
600                 flash {
601                         flash-timeout-us = <500000>;
602                         flash-max-microamp = <320000>;
603                         led-max-microamp = <50000>;
604                 };
605                 indicator {
606                         led-max-microamp = <17500>;
607                 };
608         };
609
610         lp5523: lp5523@32 {
611                 compatible = "national,lp5523";
612                 reg = <0x32>;
613                 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
614                 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
615
616                 chan0 {
617                         chan-name = "lp5523:kb1";
618                         led-cur = /bits/ 8 <50>;
619                         max-cur = /bits/ 8 <100>;
620                 };
621
622                 chan1 {
623                         chan-name = "lp5523:kb2";
624                         led-cur = /bits/ 8 <50>;
625                         max-cur = /bits/ 8 <100>;
626                 };
627
628                 chan2 {
629                         chan-name = "lp5523:kb3";
630                         led-cur = /bits/ 8 <50>;
631                         max-cur = /bits/ 8 <100>;
632                 };
633
634                 chan3 {
635                         chan-name = "lp5523:kb4";
636                         led-cur = /bits/ 8 <50>;
637                         max-cur = /bits/ 8 <100>;
638                 };
639
640                 chan4 {
641                         chan-name = "lp5523:b";
642                         led-cur = /bits/ 8 <50>;
643                         max-cur = /bits/ 8 <100>;
644                 };
645
646                 chan5 {
647                         chan-name = "lp5523:g";
648                         led-cur = /bits/ 8 <50>;
649                         max-cur = /bits/ 8 <100>;
650                 };
651
652                 chan6 {
653                         chan-name = "lp5523:r";
654                         led-cur = /bits/ 8 <50>;
655                         max-cur = /bits/ 8 <100>;
656                 };
657
658                 chan7 {
659                         chan-name = "lp5523:kb5";
660                         led-cur = /bits/ 8 <50>;
661                         max-cur = /bits/ 8 <100>;
662                 };
663
664                 chan8 {
665                         chan-name = "lp5523:kb6";
666                         led-cur = /bits/ 8 <50>;
667                         max-cur = /bits/ 8 <100>;
668                 };
669         };
670
671         bq27200: bq27200@55 {
672                 compatible = "ti,bq27200";
673                 reg = <0x55>;
674         };
675
676         /* Stereo headphone amplifier */
677         tpa6130a2: tpa6130a2@60 {
678                 compatible = "ti,tpa6130a2";
679                 reg = <0x60>;
680
681                 Vdd-supply = <&vmmc2>;
682
683                 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
684         };
685
686         si4713: si4713@63 {
687                 compatible = "silabs,si4713";
688                 reg = <0x63>;
689
690                 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
691                 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
692                 vio-supply = <&vio>;
693                 vdd-supply = <&vaux1>;
694         };
695
696         bq24150a: bq24150a@6b {
697                 compatible = "ti,bq24150a";
698                 reg = <0x6b>;
699
700                 ti,current-limit = <100>;
701                 ti,weak-battery-voltage = <3400>;
702                 ti,battery-regulation-voltage = <4200>;
703                 ti,charge-current = <650>;
704                 ti,termination-current = <100>;
705                 ti,resistor-sense = <68>;
706
707                 ti,usb-charger-detection = <&isp1707>;
708         };
709 };
710
711 &i2c3 {
712         pinctrl-names = "default";
713         pinctrl-0 = <&i2c3_pins>;
714
715         clock-frequency = <400000>;
716
717         lis302dl: lis3lv02d@1d {
718                 compatible = "st,lis3lv02d";
719                 reg = <0x1d>;
720
721                 Vdd-supply = <&vaux1>;
722                 Vdd_IO-supply = <&vio>;
723
724                 interrupt-parent = <&gpio6>;
725                 interrupts = <21 20>; /* 181 and 180 */
726
727                 /* click flags */
728                 st,click-single-x;
729                 st,click-single-y;
730                 st,click-single-z;
731
732                 /* Limits are 0.5g * value */
733                 st,click-threshold-x = <8>;
734                 st,click-threshold-y = <8>;
735                 st,click-threshold-z = <10>;
736
737                 /* Click must be longer than time limit */
738                 st,click-time-limit = <9>;
739
740                 /* Kind of debounce filter */
741                 st,click-latency = <50>;
742
743                 /* Interrupt line 2 for click detection */
744                 st,irq2-click;
745
746                 st,wakeup-x-hi;
747                 st,wakeup-y-hi;
748                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
749
750                 st,wakeup2-z-hi;
751                 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
752
753                 st,hipass1-disable;
754                 st,hipass2-disable;
755
756                 st,axis-x = <1>;    /* LIS3_DEV_X */
757                 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
758                 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
759
760                 st,min-limit-x = <(-32)>;
761                 st,min-limit-y = <3>;
762                 st,min-limit-z = <3>;
763
764                 st,max-limit-x = <(-3)>;
765                 st,max-limit-y = <32>;
766                 st,max-limit-z = <32>;
767         };
768
769         cam1: camera@3e {
770                 compatible = "toshiba,et8ek8";
771                 reg = <0x3e>;
772
773                 vana-supply = <&vaux4>;
774
775                 clocks = <&isp 0>;
776                 clock-names = "extclk";
777                 clock-frequency = <9600000>;
778
779                 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
780
781                 port {
782                         csi_cam1: endpoint {
783                                 bus-type = <3>; /* CCP2 */
784                                 strobe = <1>;
785                                 clock-inv = <0>;
786                                 crc = <1>;
787
788                                 remote-endpoint = <&csi_isp>;
789                         };
790                 };
791         };
792
793         /* D/A converter for auto-focus */
794         ad5820: dac@0c {
795                 compatible = "adi,ad5820";
796                 reg = <0x0c>;
797
798                 VANA-supply = <&vaux4>;
799
800                 #io-channel-cells = <0>;
801         };
802 };
803
804 &mmc1 {
805         pinctrl-names = "default";
806         pinctrl-0 = <&mmc1_pins>;
807         vmmc-supply = <&vmmc1>;
808         bus-width = <4>;
809         /* For debugging, it is often good idea to remove this GPIO.
810            It means you can remove back cover (to reboot by removing
811            battery) and still use the MMC card. */
812         cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
813 };
814
815 /* most boards use vaux3, only some old versions use vmmc2 instead */
816 &mmc2 {
817         pinctrl-names = "default";
818         pinctrl-0 = <&mmc2_pins>;
819         vmmc-supply = <&vaux3>;
820         vqmmc-supply = <&vsim>;
821         bus-width = <8>;
822         non-removable;
823         no-sdio;
824         no-sd;
825 };
826
827 &mmc3 {
828         status = "disabled";
829 };
830
831 &gpmc {
832         ranges = <0 0 0x01000000 0x01000000>,   /* 16 MB for OneNAND */
833                  <1 0 0x02000000 0x01000000>;   /* 16 MB for smc91c96 */
834         pinctrl-names = "default";
835         pinctrl-0 = <&gpmc_pins>;
836
837         /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
838         onenand@0,0 {
839                 #address-cells = <1>;
840                 #size-cells = <1>;
841                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
842
843                 gpmc,sync-read;
844                 gpmc,sync-write;
845                 gpmc,burst-length = <16>;
846                 gpmc,burst-read;
847                 gpmc,burst-wrap;
848                 gpmc,burst-write;
849                 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
850                 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
851                 gpmc,cs-on-ns = <0>;
852                 gpmc,cs-rd-off-ns = <87>;
853                 gpmc,cs-wr-off-ns = <87>;
854                 gpmc,adv-on-ns = <0>;
855                 gpmc,adv-rd-off-ns = <10>;
856                 gpmc,adv-wr-off-ns = <10>;
857                 gpmc,oe-on-ns = <15>;
858                 gpmc,oe-off-ns = <87>;
859                 gpmc,we-on-ns = <0>;
860                 gpmc,we-off-ns = <87>;
861                 gpmc,rd-cycle-ns = <112>;
862                 gpmc,wr-cycle-ns = <112>;
863                 gpmc,access-ns = <81>;
864                 gpmc,page-burst-access-ns = <15>;
865                 gpmc,bus-turnaround-ns = <0>;
866                 gpmc,cycle2cycle-delay-ns = <0>;
867                 gpmc,wait-monitoring-ns = <0>;
868                 gpmc,clk-activation-ns = <5>;
869                 gpmc,wr-data-mux-bus-ns = <30>;
870                 gpmc,wr-access-ns = <81>;
871                 gpmc,sync-clk-ps = <15000>;
872
873                 /*
874                  * MTD partition table corresponding to Nokia's
875                  * Maemo 5 (Fremantle) release.
876                  */
877                 partition@0 {
878                         label = "bootloader";
879                         reg = <0x00000000 0x00020000>;
880                         read-only;
881                 };
882                 partition@1 {
883                         label = "config";
884                         reg = <0x00020000 0x00060000>;
885                 };
886                 partition@2 {
887                         label = "log";
888                         reg = <0x00080000 0x00040000>;
889                 };
890                 partition@3 {
891                         label = "kernel";
892                         reg = <0x000c0000 0x00200000>;
893                 };
894                 partition@4 {
895                         label = "initfs";
896                         reg = <0x002c0000 0x00200000>;
897                 };
898                 partition@5 {
899                         label = "rootfs";
900                         reg = <0x004c0000 0x0fb40000>;
901                 };
902         };
903
904         /* Ethernet is on some early development boards and qemu */
905         ethernet@gpmc {
906                 compatible = "smsc,lan91c94";
907                 interrupt-parent = <&gpio2>;
908                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
909                 reg = <1 0 0xf>;                /* 16 byte IO range */
910                 bank-width = <2>;
911                 pinctrl-names = "default";
912                 pinctrl-0 = <&ethernet_pins>;
913                 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;     /* gpio86 */
914                 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;      /* gpio164 */
915                 gpmc,device-width = <2>;
916                 gpmc,sync-clk-ps = <0>;
917                 gpmc,cs-on-ns = <0>;
918                 gpmc,cs-rd-off-ns = <48>;
919                 gpmc,cs-wr-off-ns = <24>;
920                 gpmc,adv-on-ns = <0>;
921                 gpmc,adv-rd-off-ns = <0>;
922                 gpmc,adv-wr-off-ns = <0>;
923                 gpmc,we-on-ns = <12>;
924                 gpmc,we-off-ns = <18>;
925                 gpmc,oe-on-ns = <12>;
926                 gpmc,oe-off-ns = <48>;
927                 gpmc,page-burst-access-ns = <0>;
928                 gpmc,access-ns = <42>;
929                 gpmc,rd-cycle-ns = <180>;
930                 gpmc,wr-cycle-ns = <180>;
931                 gpmc,bus-turnaround-ns = <0>;
932                 gpmc,cycle2cycle-delay-ns = <0>;
933                 gpmc,wait-monitoring-ns = <0>;
934                 gpmc,clk-activation-ns = <0>;
935                 gpmc,wr-access-ns = <0>;
936                 gpmc,wr-data-mux-bus-ns = <12>;
937         };
938 };
939
940 &mcspi1 {
941         /*
942          * For some reason, touchscreen is necessary for screen to work at
943          * all on real hw. It works well without it on emulator.
944          *
945          * Also... order in the device tree actually matters here.
946          */
947         tsc2005@0 {
948                 compatible = "ti,tsc2005";
949                 spi-max-frequency = <6000000>;
950                 reg = <0>;
951
952                 vio-supply = <&vio>;
953
954                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
955                 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
956
957                 touchscreen-fuzz-x = <4>;
958                 touchscreen-fuzz-y = <7>;
959                 touchscreen-fuzz-pressure = <2>;
960                 touchscreen-size-x = <4096>;
961                 touchscreen-size-y = <4096>;
962                 touchscreen-max-pressure = <2048>;
963
964                 ti,x-plate-ohms = <280>;
965                 ti,esd-recovery-timeout-ms = <8000>;
966         };
967
968         acx565akm@2 {
969                 compatible = "sony,acx565akm";
970                 spi-max-frequency = <6000000>;
971                 reg = <2>;
972
973                 pinctrl-names = "default";
974                 pinctrl-0 = <&acx565akm_pins>;
975
976                 label = "lcd";
977                 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
978
979                 port {
980                         lcd_in: endpoint {
981                                 remote-endpoint = <&sdi_out>;
982                         };
983                 };
984         };
985 };
986
987 &mcspi4 {
988         pinctrl-names = "default";
989         pinctrl-0 = <&mcspi4_pins>;
990
991         wl1251@0 {
992                 pinctrl-names = "default";
993                 pinctrl-0 = <&wl1251_pins>;
994
995                 vio-supply = <&vio>;
996
997                 compatible = "ti,wl1251";
998                 reg = <0>;
999                 spi-max-frequency = <48000000>;
1000
1001                 spi-cpol;
1002                 spi-cpha;
1003
1004                 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1005
1006                 interrupt-parent = <&gpio2>;
1007                 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1008
1009                 clocks = <&vctcxo>;
1010         };
1011 };
1012
1013 &usb_otg_hs {
1014         interface-type = <0>;
1015         usb-phy = <&usb2_phy>;
1016         phys = <&usb2_phy>;
1017         phy-names = "usb2-phy";
1018         mode = <2>;
1019         power = <50>;
1020 };
1021
1022 &uart1 {
1023         status = "disabled";
1024 };
1025
1026 &uart2 {
1027         pinctrl-names = "default";
1028         pinctrl-0 = <&uart2_pins>;
1029
1030         bcm2048: bluetooth {
1031                 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1032                 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1033                 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1034                 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1035                 clocks = <&vctcxo>;
1036                 clock-names = "sysclk";
1037         };
1038 };
1039
1040 &uart3 {
1041         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1042         pinctrl-names = "default";
1043         pinctrl-0 = <&uart3_pins>;
1044 };
1045
1046 &dss {
1047         status = "ok";
1048
1049         pinctrl-names = "default";
1050         pinctrl-0 = <&dss_sdi_pins>;
1051
1052         vdds_sdi-supply = <&vaux1>;
1053
1054         ports {
1055                 #address-cells = <1>;
1056                 #size-cells = <0>;
1057
1058                 port@1 {
1059                         reg = <1>;
1060
1061                         sdi_out: endpoint {
1062                                 remote-endpoint = <&lcd_in>;
1063                                 datapairs = <2>;
1064                         };
1065                 };
1066         };
1067 };
1068
1069 &venc {
1070         status = "ok";
1071
1072         vdda-supply = <&vdac>;
1073
1074         port {
1075                 venc_out: endpoint {
1076                         remote-endpoint = <&tv_connector_in>;
1077                         ti,channels = <1>;
1078                 };
1079         };
1080 };
1081
1082 &mcbsp2 {
1083         status = "ok";
1084 };
1085
1086 &ssi_port1 {
1087         pinctrl-names = "default";
1088         pinctrl-0 = <&ssi_pins>;
1089
1090         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1091
1092         modem: hsi-client {
1093                 compatible = "nokia,n900-modem";
1094
1095                 pinctrl-names = "default";
1096                 pinctrl-0 = <&modem_pins>;
1097
1098                 hsi-channel-ids = <0>, <1>, <2>, <3>;
1099                 hsi-channel-names = "mcsaab-control",
1100                                     "speech-control",
1101                                     "speech-data",
1102                                     "mcsaab-data";
1103                 hsi-speed-kbps = <55000>;
1104                 hsi-mode = "frame";
1105                 hsi-flow = "synchronized";
1106                 hsi-arb-mode = "round-robin";
1107
1108                 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1109
1110                 gpios = <&gpio3  6 GPIO_ACTIVE_HIGH>, /* 70 */
1111                         <&gpio3  9 GPIO_ACTIVE_HIGH>, /* 73 */
1112                         <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1113                         <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1114                         <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1115                 gpio-names = "cmt_apeslpx",
1116                              "cmt_rst_rq",
1117                              "cmt_en",
1118                              "cmt_rst",
1119                              "cmt_bsi";
1120         };
1121 };
1122
1123 &ssi_port2 {
1124         status = "disabled";
1125 };