arch/arm/boot/dts/omap3-n900.dts

   1 /*
   2  * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
   3  * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 (or later) as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 /dts-v1/;
  11
  12 #include "omap34xx.dtsi"
  13 #include <dt-bindings/input/input.h>
  14
  15 /*
  16  * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
  17  * for omap AES HW crypto support. When linux kernel try to access memory of AES
  18  * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
  19  * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
  20  * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
  21  * There is "unofficial" version of bootloader which enables AES in L3 firewall
  22  * but it is not widely used and to prevent kernel crash rather AES is disabled.
  23  * There is also no runtime detection code if AES is disabled in L3 firewall...
  24  */
  25 &aes {
  26         status = "disabled";
  27 };
  28
  29 / {
  30         model = "Nokia N900";
  31         compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
  32
  33         aliases {
  34                 i2c0;
  35                 i2c1 = &i2c1;
  36                 i2c2 = &i2c2;
  37                 i2c3 = &i2c3;
  38         };
  39
  40         cpus {
  41                 cpu@0 {
  42                         cpu0-supply = <&vcc>;
  43                 };
  44         };
  45
  46         leds {
  47                 compatible = "gpio-leds";
  48                 heartbeat {
  49                         label = "debug::sleep";
  50                         gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* 162 */
  51                         linux,default-trigger = "default-on";
  52                         pinctrl-names = "default";
  53                         pinctrl-0 = <&debug_leds>;
  54                 };
  55         };
  56
  57         memory@80000000 {
  58                 device_type = "memory";
  59                 reg = <0x80000000 0x10000000>; /* 256 MB */
  60         };
  61
  62         gpio_keys {
  63                 compatible = "gpio-keys";
  64
  65                 camera_lens_cover {
  66                         label = "Camera Lens Cover";
  67                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
  68                         linux,input-type = <EV_SW>;
  69                         linux,code = <SW_CAMERA_LENS_COVER>;
  70                         linux,can-disable;
  71                 };
  72
  73                 camera_focus {
  74                         label = "Camera Focus";
  75                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
  76                         linux,code = <KEY_CAMERA_FOCUS>;
  77                         linux,can-disable;
  78                 };
  79
  80                 camera_capture {
  81                         label = "Camera Capture";
  82                         gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
  83                         linux,code = <KEY_CAMERA>;
  84                         linux,can-disable;
  85                 };
  86
  87                 lock_button {
  88                         label = "Lock Button";
  89                         gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
  90                         linux,code = <KEY_SCREENLOCK>;
  91                         linux,can-disable;
  92                 };
  93
  94                 keypad_slide {
  95                         label = "Keypad Slide";
  96                         gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
  97                         linux,input-type = <EV_SW>;
  98                         linux,code = <SW_KEYPAD_SLIDE>;
  99                         linux,can-disable;
 100                 };
 101
 102                 proximity_sensor {
 103                         label = "Proximity Sensor";
 104                         gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
 105                         linux,input-type = <EV_SW>;
 106                         linux,code = <SW_FRONT_PROXIMITY>;
 107                         linux,can-disable;
 108                 };
 109         };
 110
 111         isp1707: isp1707 {
 112                 compatible = "nxp,isp1707";
 113                 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
 114                 usb-phy = <&usb2_phy>;
 115         };
 116
 117         tv: connector {
 118                 compatible = "composite-video-connector";
 119                 label = "tv";
 120
 121                 port {
 122                         tv_connector_in: endpoint {
 123                                 remote-endpoint = <&venc_out>;
 124                         };
 125                 };
 126         };
 127
 128         sound: n900-audio {
 129                 compatible = "nokia,n900-audio";
 130
 131                 nokia,cpu-dai = <&mcbsp2>;
 132                 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
 133                 nokia,headphone-amplifier = <&tpa6130a2>;
 134
 135                 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
 136                 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
 137                 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
 138                 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
 139         };
 140
 141         battery: n900-battery {
 142                 compatible = "nokia,n900-battery";
 143                 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
 144                 io-channel-names = "temp", "bsi", "vbat";
 145         };
 146
 147         pwm9: dmtimer-pwm {
 148                 compatible = "ti,omap-dmtimer-pwm";
 149                 #pwm-cells = <3>;
 150                 ti,timers = <&timer9>;
 151                 ti,clock-source = <0x00>; /* timer_sys_ck */
 152         };
 153
 154         ir: n900-ir {
 155                 compatible = "nokia,n900-ir";
 156                 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
 157         };
 158
 159         /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
 160         vctcxo: vctcxo {
 161                 compatible = "fixed-clock";
 162                 #clock-cells = <0>;
 163                 clock-frequency = <38400000>;
 164         };
 165 };
 166
 167 &omap3_pmx_core {
 168         pinctrl-names = "default";
 169
 170         uart2_pins: pinmux_uart2_pins {
 171                 pinctrl-single,pins = <
 172                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)         /* uart2_cts */
 173                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)               /* uart2_rts */
 174                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
 175                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
 176                 >;
 177         };
 178
 179         uart3_pins: pinmux_uart3_pins {
 180                 pinctrl-single,pins = <
 181                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)                /* uart3_rx */
 182                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx */
 183                 >;
 184         };
 185
 186         ethernet_pins: pinmux_ethernet_pins {
 187                 pinctrl-single,pins = <
 188                         OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4)       /* gpmc_ncs3.gpio_54 */
 189                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)               /* dss_data16.gpio_86 */
 190                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
 191                 >;
 192         };
 193
 194         gpmc_pins: pinmux_gpmc_pins {
 195                 pinctrl-single,pins = <
 196
 197                         /* address lines */
 198                         OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
 199                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
 200                         OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
 201
 202                         /* data lines, gpmc_d0..d7 not muxable according to TRM */
 203                         OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
 204                         OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
 205                         OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
 206                         OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
 207                         OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
 208                         OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
 209                         OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
 210                         OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
 211
 212                         /*
 213                          * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
 214                          * according to TRM. OneNAND seems to require PIN_INPUT on clock.
 215                          */
 216                         OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
 217                         OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
 218                 >;
 219         };
 220
 221         i2c1_pins: pinmux_i2c1_pins {
 222                 pinctrl-single,pins = <
 223                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl */
 224                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda */
 225                 >;
 226         };
 227
 228         i2c2_pins: pinmux_i2c2_pins {
 229                 pinctrl-single,pins = <
 230                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)                /* i2c2_scl */
 231                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)                /* i2c2_sda */
 232                 >;
 233         };
 234
 235         i2c3_pins: pinmux_i2c3_pins {
 236                 pinctrl-single,pins = <
 237                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)                /* i2c3_scl */
 238                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)                /* i2c3_sda */
 239                 >;
 240         };
 241
 242         debug_leds: pinmux_debug_led_pins {
 243                 pinctrl-single,pins = <
 244                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
 245                 >;
 246         };
 247
 248         mcspi4_pins: pinmux_mcspi4_pins {
 249                 pinctrl-single,pins = <
 250                         OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
 251                         OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
 252                         OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
 253                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
 254                 >;
 255         };
 256
 257         mmc1_pins: pinmux_mmc1_pins {
 258                 pinctrl-single,pins = <
 259                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
 260                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
 261                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0 */
 262                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
 263                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
 264                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
 265                 >;
 266         };
 267
 268         mmc2_pins: pinmux_mmc2_pins {
 269                 pinctrl-single,pins = <
 270                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
 271                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
 272                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0 */
 273                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
 274                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
 275                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
 276                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
 277                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
 278                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
 279                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
 280                 >;
 281         };
 282
 283         acx565akm_pins: pinmux_acx565akm_pins {
 284                 pinctrl-single,pins = <
 285                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4)               /* RX51_LCD_RESET_GPIO */
 286                 >;
 287         };
 288
 289         dss_sdi_pins: pinmux_dss_sdi_pins {
 290                 pinctrl-single,pins = <
 291                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
 292                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
 293                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
 294                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
 295
 296                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
 297                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
 298                 >;
 299         };
 300
 301         wl1251_pins: pinmux_wl1251 {
 302                 pinctrl-single,pins = <
 303                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4)               /* gpio 87 => wl1251 enable */
 304                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4)                /* gpio 42 => wl1251 irq */
 305                 >;
 306         };
 307
 308         ssi_pins: pinmux_ssi {
 309                 pinctrl-single,pins = <
 310                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
 311                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)               /* ssi1_flag_tx */
 312                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)                /* ssi1_wake_tx (cawake) */
 313                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)               /* ssi1_dat_tx */
 314                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)                /* ssi1_dat_rx */
 315                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)                /* ssi1_flag_rx */
 316                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)               /* ssi1_rdy_rx */
 317                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)               /* ssi1_wake */
 318                 >;
 319         };
 320
 321         modem_pins: pinmux_modem {
 322                 pinctrl-single,pins = <
 323                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4)               /* gpio 70 => cmt_apeslpx */
 324                         OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4)                /* gpio 72 => ape_rst_rq */
 325                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)               /* gpio 73 => cmt_rst_rq */
 326                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)               /* gpio 74 => cmt_en */
 327                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4)               /* gpio 75 => cmt_rst */
 328                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)               /* gpio 157 => cmt_bsi */
 329                 >;
 330         };
 331 };
 332
 333 &i2c1 {
 334         pinctrl-names = "default";
 335         pinctrl-0 = <&i2c1_pins>;
 336
 337         clock-frequency = <2200000>;
 338
 339         twl: twl@48 {
 340                 reg = <0x48>;
 341                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 342                 interrupt-parent = <&intc>;
 343         };
 344 };
 345
 346 #include "twl4030.dtsi"
 347 #include "twl4030_omap3.dtsi"
 348
 349 &vaux1 {
 350         regulator-name = "V28";
 351         regulator-min-microvolt = <2800000>;
 352         regulator-max-microvolt = <2800000>;
 353         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 354         regulator-always-on; /* due to battery cover sensor */
 355 };
 356
 357 &vaux2 {
 358         regulator-name = "VCSI";
 359         regulator-min-microvolt = <1800000>;
 360         regulator-max-microvolt = <1800000>;
 361         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 362 };
 363
 364 &vaux3 {
 365         regulator-name = "VMMC2_30";
 366         regulator-min-microvolt = <2800000>;
 367         regulator-max-microvolt = <3000000>;
 368         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 369 };
 370
 371 &vaux4 {
 372         regulator-name = "VCAM_ANA_28";
 373         regulator-min-microvolt = <2800000>;
 374         regulator-max-microvolt = <2800000>;
 375         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 376 };
 377
 378 &vmmc1 {
 379         regulator-name = "VMMC1";
 380         regulator-min-microvolt = <1850000>;
 381         regulator-max-microvolt = <3150000>;
 382         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 383 };
 384
 385 &vmmc2 {
 386         regulator-name = "V28_A";
 387         regulator-min-microvolt = <2800000>;
 388         regulator-max-microvolt = <3000000>;
 389         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 390         regulator-always-on; /* due VIO leak to AIC34 VDDs */
 391 };
 392
 393 &vpll1 {
 394         regulator-name = "VPLL";
 395         regulator-min-microvolt = <1800000>;
 396         regulator-max-microvolt = <1800000>;
 397         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 398         regulator-always-on;
 399 };
 400
 401 &vpll2 {
 402         regulator-name = "VSDI_CSI";
 403         regulator-min-microvolt = <1800000>;
 404         regulator-max-microvolt = <1800000>;
 405         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 406         regulator-always-on;
 407 };
 408
 409 &vsim {
 410         regulator-name = "VMMC2_IO_18";
 411         regulator-min-microvolt = <1800000>;
 412         regulator-max-microvolt = <1800000>;
 413         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 414 };
 415
 416 &vio {
 417         regulator-name = "VIO";
 418         regulator-min-microvolt = <1800000>;
 419         regulator-max-microvolt = <1800000>;
 420 };
 421
 422 &vintana1 {
 423         regulator-name = "VINTANA1";
 424         /* fixed to 1500000 */
 425         regulator-always-on;
 426 };
 427
 428 &vintana2 {
 429         regulator-name = "VINTANA2";
 430         regulator-min-microvolt = <2750000>;
 431         regulator-max-microvolt = <2750000>;
 432         regulator-always-on;
 433 };
 434
 435 &vintdig {
 436         regulator-name = "VINTDIG";
 437         /* fixed to 1500000 */
 438         regulator-always-on;
 439 };
 440
 441 &twl {
 442         twl_audio: audio {
 443                 compatible = "ti,twl4030-audio";
 444                 ti,enable-vibra = <1>;
 445         };
 446
 447         twl_power: power {
 448                 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
 449                 ti,use_poweroff;
 450         };
 451 };
 452
 453 &twl_keypad {
 454         linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
 455                          MATRIX_KEY(0x00, 0x01, KEY_O)
 456                          MATRIX_KEY(0x00, 0x02, KEY_P)
 457                          MATRIX_KEY(0x00, 0x03, KEY_COMMA)
 458                          MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
 459                          MATRIX_KEY(0x00, 0x06, KEY_A)
 460                          MATRIX_KEY(0x00, 0x07, KEY_S)
 461
 462                          MATRIX_KEY(0x01, 0x00, KEY_W)
 463                          MATRIX_KEY(0x01, 0x01, KEY_D)
 464                          MATRIX_KEY(0x01, 0x02, KEY_F)
 465                          MATRIX_KEY(0x01, 0x03, KEY_G)
 466                          MATRIX_KEY(0x01, 0x04, KEY_H)
 467                          MATRIX_KEY(0x01, 0x05, KEY_J)
 468                          MATRIX_KEY(0x01, 0x06, KEY_K)
 469                          MATRIX_KEY(0x01, 0x07, KEY_L)
 470
 471                          MATRIX_KEY(0x02, 0x00, KEY_E)
 472                          MATRIX_KEY(0x02, 0x01, KEY_DOT)
 473                          MATRIX_KEY(0x02, 0x02, KEY_UP)
 474                          MATRIX_KEY(0x02, 0x03, KEY_ENTER)
 475                          MATRIX_KEY(0x02, 0x05, KEY_Z)
 476                          MATRIX_KEY(0x02, 0x06, KEY_X)
 477                          MATRIX_KEY(0x02, 0x07, KEY_C)
 478                          MATRIX_KEY(0x02, 0x08, KEY_F9)
 479
 480                          MATRIX_KEY(0x03, 0x00, KEY_R)
 481                          MATRIX_KEY(0x03, 0x01, KEY_V)
 482                          MATRIX_KEY(0x03, 0x02, KEY_B)
 483                          MATRIX_KEY(0x03, 0x03, KEY_N)
 484                          MATRIX_KEY(0x03, 0x04, KEY_M)
 485                          MATRIX_KEY(0x03, 0x05, KEY_SPACE)
 486                          MATRIX_KEY(0x03, 0x06, KEY_SPACE)
 487                          MATRIX_KEY(0x03, 0x07, KEY_LEFT)
 488
 489                          MATRIX_KEY(0x04, 0x00, KEY_T)
 490                          MATRIX_KEY(0x04, 0x01, KEY_DOWN)
 491                          MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
 492                          MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
 493                          MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
 494                          MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
 495                          MATRIX_KEY(0x04, 0x08, KEY_F10)
 496
 497                          MATRIX_KEY(0x05, 0x00, KEY_Y)
 498                          MATRIX_KEY(0x05, 0x08, KEY_F11)
 499
 500                          MATRIX_KEY(0x06, 0x00, KEY_U)
 501
 502                          MATRIX_KEY(0x07, 0x00, KEY_I)
 503                          MATRIX_KEY(0x07, 0x01, KEY_F7)
 504                          MATRIX_KEY(0x07, 0x02, KEY_F8)
 505                          >;
 506 };
 507
 508 &twl_gpio {
 509         ti,pullups      = <0x0>;
 510         ti,pulldowns    = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
 511 };
 512
 513 &i2c2 {
 514         pinctrl-names = "default";
 515         pinctrl-0 = <&i2c2_pins>;
 516
 517         clock-frequency = <100000>;
 518
 519         tlv320aic3x: tlv320aic3x@18 {
 520                 compatible = "ti,tlv320aic3x";
 521                 reg = <0x18>;
 522                 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
 523                 ai3x-gpio-func = <
 524                         0 /* AIC3X_GPIO1_FUNC_DISABLED */
 525                         5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
 526                 >;
 527
 528                 AVDD-supply = <&vmmc2>;
 529                 DRVDD-supply = <&vmmc2>;
 530                 IOVDD-supply = <&vio>;
 531                 DVDD-supply = <&vio>;
 532
 533                 ai3x-micbias-vg = <1>;
 534         };
 535
 536         tlv320aic3x_aux: tlv320aic3x@19 {
 537                 compatible = "ti,tlv320aic3x";
 538                 reg = <0x19>;
 539                 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
 540
 541                 AVDD-supply = <&vmmc2>;
 542                 DRVDD-supply = <&vmmc2>;
 543                 IOVDD-supply = <&vio>;
 544                 DVDD-supply = <&vio>;
 545
 546                 ai3x-micbias-vg = <2>;
 547         };
 548
 549         tsl2563: tsl2563@29 {
 550                 compatible = "amstaos,tsl2563";
 551                 reg = <0x29>;
 552
 553                 amstaos,cover-comp-gain = <16>;
 554         };
 555
 556         adp1653: led-controller@30 {
 557                 compatible = "adi,adp1653";
 558                 reg = <0x30>;
 559                 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
 560
 561                 flash {
 562                         flash-timeout-us = <500000>;
 563                         flash-max-microamp = <320000>;
 564                         led-max-microamp = <50000>;
 565                 };
 566                 indicator {
 567                         led-max-microamp = <17500>;
 568                 };
 569         };
 570
 571         lp5523: lp5523@32 {
 572                 compatible = "national,lp5523";
 573                 reg = <0x32>;
 574                 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
 575                 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
 576
 577                 chan0 {
 578                         chan-name = "lp5523:kb1";
 579                         led-cur = /bits/ 8 <50>;
 580                         max-cur = /bits/ 8 <100>;
 581                 };
 582
 583                 chan1 {
 584                         chan-name = "lp5523:kb2";
 585                         led-cur = /bits/ 8 <50>;
 586                         max-cur = /bits/ 8 <100>;
 587                 };
 588
 589                 chan2 {
 590                         chan-name = "lp5523:kb3";
 591                         led-cur = /bits/ 8 <50>;
 592                         max-cur = /bits/ 8 <100>;
 593                 };
 594
 595                 chan3 {
 596                         chan-name = "lp5523:kb4";
 597                         led-cur = /bits/ 8 <50>;
 598                         max-cur = /bits/ 8 <100>;
 599                 };
 600
 601                 chan4 {
 602                         chan-name = "lp5523:b";
 603                         led-cur = /bits/ 8 <50>;
 604                         max-cur = /bits/ 8 <100>;
 605                 };
 606
 607                 chan5 {
 608                         chan-name = "lp5523:g";
 609                         led-cur = /bits/ 8 <50>;
 610                         max-cur = /bits/ 8 <100>;
 611                 };
 612
 613                 chan6 {
 614                         chan-name = "lp5523:r";
 615                         led-cur = /bits/ 8 <50>;
 616                         max-cur = /bits/ 8 <100>;
 617                 };
 618
 619                 chan7 {
 620                         chan-name = "lp5523:kb5";
 621                         led-cur = /bits/ 8 <50>;
 622                         max-cur = /bits/ 8 <100>;
 623                 };
 624
 625                 chan8 {
 626                         chan-name = "lp5523:kb6";
 627                         led-cur = /bits/ 8 <50>;
 628                         max-cur = /bits/ 8 <100>;
 629                 };
 630         };
 631
 632         bq27200: bq27200@55 {
 633                 compatible = "ti,bq27200";
 634                 reg = <0x55>;
 635         };
 636
 637         /* Stereo headphone amplifier */
 638         tpa6130a2: tpa6130a2@60 {
 639                 compatible = "ti,tpa6130a2";
 640                 reg = <0x60>;
 641
 642                 Vdd-supply = <&vmmc2>;
 643
 644                 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
 645         };
 646
 647         si4713: si4713@63 {
 648                 compatible = "silabs,si4713";
 649                 reg = <0x63>;
 650
 651                 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
 652                 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
 653                 vio-supply = <&vio>;
 654                 vdd-supply = <&vaux1>;
 655         };
 656
 657         bq24150a: bq24150a@6b {
 658                 compatible = "ti,bq24150a";
 659                 reg = <0x6b>;
 660
 661                 ti,current-limit = <100>;
 662                 ti,weak-battery-voltage = <3400>;
 663                 ti,battery-regulation-voltage = <4200>;
 664                 ti,charge-current = <650>;
 665                 ti,termination-current = <100>;
 666                 ti,resistor-sense = <68>;
 667
 668                 ti,usb-charger-detection = <&isp1707>;
 669         };
 670 };
 671
 672 &i2c3 {
 673         pinctrl-names = "default";
 674         pinctrl-0 = <&i2c3_pins>;
 675
 676         clock-frequency = <400000>;
 677
 678         lis302dl: lis3lv02d@1d {
 679                 compatible = "st,lis3lv02d";
 680                 reg = <0x1d>;
 681
 682                 Vdd-supply = <&vaux1>;
 683                 Vdd_IO-supply = <&vio>;
 684
 685                 interrupt-parent = <&gpio6>;
 686                 interrupts = <21 20>; /* 181 and 180 */
 687
 688                 /* click flags */
 689                 st,click-single-x;
 690                 st,click-single-y;
 691                 st,click-single-z;
 692
 693                 /* Limits are 0.5g * value */
 694                 st,click-threshold-x = <8>;
 695                 st,click-threshold-y = <8>;
 696                 st,click-threshold-z = <10>;
 697
 698                 /* Click must be longer than time limit */
 699                 st,click-time-limit = <9>;
 700
 701                 /* Kind of debounce filter */
 702                 st,click-latency = <50>;
 703
 704                 /* Interrupt line 2 for click detection */
 705                 st,irq2-click;
 706
 707                 st,wakeup-x-hi;
 708                 st,wakeup-y-hi;
 709                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
 710
 711                 st,wakeup2-z-hi;
 712                 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
 713
 714                 st,hipass1-disable;
 715                 st,hipass2-disable;
 716
 717                 st,axis-x = <1>;    /* LIS3_DEV_X */
 718                 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
 719                 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
 720
 721                 st,min-limit-x = <(-32)>;
 722                 st,min-limit-y = <3>;
 723                 st,min-limit-z = <3>;
 724
 725                 st,max-limit-x = <(-3)>;
 726                 st,max-limit-y = <32>;
 727                 st,max-limit-z = <32>;
 728         };
 729 };
 730
 731 &mmc1 {
 732         pinctrl-names = "default";
 733         pinctrl-0 = <&mmc1_pins>;
 734         vmmc-supply = <&vmmc1>;
 735         bus-width = <4>;
 736         cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
 737 };
 738
 739 /* most boards use vaux3, only some old versions use vmmc2 instead */
 740 &mmc2 {
 741         pinctrl-names = "default";
 742         pinctrl-0 = <&mmc2_pins>;
 743         vmmc-supply = <&vaux3>;
 744         vmmc_aux-supply = <&vsim>;
 745         bus-width = <8>;
 746         non-removable;
 747         no-sdio;
 748         no-sd;
 749 };
 750
 751 &mmc3 {
 752         status = "disabled";
 753 };
 754
 755 &gpmc {
 756         ranges = <0 0 0x01000000 0x01000000>,   /* 16 MB for OneNAND */
 757                  <1 0 0x02000000 0x01000000>;   /* 16 MB for smc91c96 */
 758         pinctrl-names = "default";
 759         pinctrl-0 = <&gpmc_pins>;
 760
 761         /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
 762         onenand@0,0 {
 763                 #address-cells = <1>;
 764                 #size-cells = <1>;
 765                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
 766
 767                 gpmc,sync-read;
 768                 gpmc,sync-write;
 769                 gpmc,burst-length = <16>;
 770                 gpmc,burst-read;
 771                 gpmc,burst-wrap;
 772                 gpmc,burst-write;
 773                 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
 774                 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
 775                 gpmc,cs-on-ns = <0>;
 776                 gpmc,cs-rd-off-ns = <87>;
 777                 gpmc,cs-wr-off-ns = <87>;
 778                 gpmc,adv-on-ns = <0>;
 779                 gpmc,adv-rd-off-ns = <10>;
 780                 gpmc,adv-wr-off-ns = <10>;
 781                 gpmc,oe-on-ns = <15>;
 782                 gpmc,oe-off-ns = <87>;
 783                 gpmc,we-on-ns = <0>;
 784                 gpmc,we-off-ns = <87>;
 785                 gpmc,rd-cycle-ns = <112>;
 786                 gpmc,wr-cycle-ns = <112>;
 787                 gpmc,access-ns = <81>;
 788                 gpmc,page-burst-access-ns = <15>;
 789                 gpmc,bus-turnaround-ns = <0>;
 790                 gpmc,cycle2cycle-delay-ns = <0>;
 791                 gpmc,wait-monitoring-ns = <0>;
 792                 gpmc,clk-activation-ns = <5>;
 793                 gpmc,wr-data-mux-bus-ns = <30>;
 794                 gpmc,wr-access-ns = <81>;
 795                 gpmc,sync-clk-ps = <15000>;
 796
 797                 /*
 798                  * MTD partition table corresponding to Nokia's
 799                  * Maemo 5 (Fremantle) release.
 800                  */
 801                 partition@0 {
 802                         label = "bootloader";
 803                         reg = <0x00000000 0x00020000>;
 804                         read-only;
 805                 };
 806                 partition@1 {
 807                         label = "config";
 808                         reg = <0x00020000 0x00060000>;
 809                 };
 810                 partition@2 {
 811                         label = "log";
 812                         reg = <0x00080000 0x00040000>;
 813                 };
 814                 partition@3 {
 815                         label = "kernel";
 816                         reg = <0x000c0000 0x00200000>;
 817                 };
 818                 partition@4 {
 819                         label = "initfs";
 820                         reg = <0x002c0000 0x00200000>;
 821                 };
 822                 partition@5 {
 823                         label = "rootfs";
 824                         reg = <0x004c0000 0x0fb40000>;
 825                 };
 826         };
 827
 828         /* Ethernet is on some early development boards and qemu */
 829         ethernet@gpmc {
 830                 compatible = "smsc,lan91c94";
 831                 interrupt-parent = <&gpio2>;
 832                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
 833                 reg = <1 0 0xf>;                /* 16 byte IO range */
 834                 bank-width = <2>;
 835                 pinctrl-names = "default";
 836                 pinctrl-0 = <&ethernet_pins>;
 837                 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;     /* gpio86 */
 838                 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;      /* gpio164 */
 839                 gpmc,device-width = <2>;
 840                 gpmc,sync-clk-ps = <0>;
 841                 gpmc,cs-on-ns = <0>;
 842                 gpmc,cs-rd-off-ns = <48>;
 843                 gpmc,cs-wr-off-ns = <24>;
 844                 gpmc,adv-on-ns = <0>;
 845                 gpmc,adv-rd-off-ns = <0>;
 846                 gpmc,adv-wr-off-ns = <0>;
 847                 gpmc,we-on-ns = <12>;
 848                 gpmc,we-off-ns = <18>;
 849                 gpmc,oe-on-ns = <12>;
 850                 gpmc,oe-off-ns = <48>;
 851                 gpmc,page-burst-access-ns = <0>;
 852                 gpmc,access-ns = <42>;
 853                 gpmc,rd-cycle-ns = <180>;
 854                 gpmc,wr-cycle-ns = <180>;
 855                 gpmc,bus-turnaround-ns = <0>;
 856                 gpmc,cycle2cycle-delay-ns = <0>;
 857                 gpmc,wait-monitoring-ns = <0>;
 858                 gpmc,clk-activation-ns = <0>;
 859                 gpmc,wr-access-ns = <0>;
 860                 gpmc,wr-data-mux-bus-ns = <12>;
 861         };
 862 };
 863
 864 &mcspi1 {
 865         /*
 866          * For some reason, touchscreen is necessary for screen to work at
 867          * all on real hw. It works well without it on emulator.
 868          *
 869          * Also... order in the device tree actually matters here.
 870          */
 871         tsc2005@0 {
 872                 compatible = "ti,tsc2005";
 873                 spi-max-frequency = <6000000>;
 874                 reg = <0>;
 875
 876                 vio-supply = <&vio>;
 877
 878                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
 879                 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
 880
 881                 touchscreen-fuzz-x = <4>;
 882                 touchscreen-fuzz-y = <7>;
 883                 touchscreen-fuzz-pressure = <2>;
 884                 touchscreen-size-x = <4096>;
 885                 touchscreen-size-y = <4096>;
 886                 touchscreen-max-pressure = <2048>;
 887
 888                 ti,x-plate-ohms = <280>;
 889                 ti,esd-recovery-timeout-ms = <8000>;
 890         };
 891
 892         acx565akm@2 {
 893                 compatible = "sony,acx565akm";
 894                 spi-max-frequency = <6000000>;
 895                 reg = <2>;
 896
 897                 pinctrl-names = "default";
 898                 pinctrl-0 = <&acx565akm_pins>;
 899
 900                 label = "lcd";
 901                 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
 902
 903                 port {
 904                         lcd_in: endpoint {
 905                                 remote-endpoint = <&sdi_out>;
 906                         };
 907                 };
 908         };
 909 };
 910
 911 &mcspi4 {
 912         pinctrl-names = "default";
 913         pinctrl-0 = <&mcspi4_pins>;
 914
 915         wl1251@0 {
 916                 pinctrl-names = "default";
 917                 pinctrl-0 = <&wl1251_pins>;
 918
 919                 vio-supply = <&vio>;
 920
 921                 compatible = "ti,wl1251";
 922                 reg = <0>;
 923                 spi-max-frequency = <48000000>;
 924
 925                 spi-cpol;
 926                 spi-cpha;
 927
 928                 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
 929
 930                 interrupt-parent = <&gpio2>;
 931                 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
 932
 933                 clocks = <&vctcxo>;
 934         };
 935 };
 936
 937 &usb_otg_hs {
 938         interface-type = <0>;
 939         usb-phy = <&usb2_phy>;
 940         phys = <&usb2_phy>;
 941         phy-names = "usb2-phy";
 942         mode = <2>;
 943         power = <50>;
 944 };
 945
 946 &uart1 {
 947         status = "disabled";
 948 };
 949
 950 &uart2 {
 951         pinctrl-names = "default";
 952         pinctrl-0 = <&uart2_pins>;
 953
 954         bcm2048: bluetooth {
 955                 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
 956                 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
 957                 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
 958                 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
 959                 clocks = <&vctcxo>;
 960                 clock-names = "sysclk";
 961         };
 962 };
 963
 964 &uart3 {
 965         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
 966         pinctrl-names = "default";
 967         pinctrl-0 = <&uart3_pins>;
 968 };
 969
 970 &dss {
 971         status = "ok";
 972
 973         pinctrl-names = "default";
 974         pinctrl-0 = <&dss_sdi_pins>;
 975
 976         vdds_sdi-supply = <&vaux1>;
 977
 978         ports {
 979                 #address-cells = <1>;
 980                 #size-cells = <0>;
 981
 982                 port@1 {
 983                         reg = <1>;
 984
 985                         sdi_out: endpoint {
 986                                 remote-endpoint = <&lcd_in>;
 987                                 datapairs = <2>;
 988                         };
 989                 };
 990         };
 991 };
 992
 993 &venc {
 994         status = "ok";
 995
 996         vdda-supply = <&vdac>;
 997
 998         port {
 999                 venc_out: endpoint {
1000                         remote-endpoint = <&tv_connector_in>;
1001                         ti,channels = <1>;
1002                 };
1003         };
1004 };
1005
1006 &mcbsp2 {
1007         status = "ok";
1008 };
1009
1010 &ssi_port1 {
1011         pinctrl-names = "default";
1012         pinctrl-0 = <&ssi_pins>;
1013
1014         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1015
1016         modem: hsi-client {
1017                 compatible = "nokia,n900-modem";
1018
1019                 pinctrl-names = "default";
1020                 pinctrl-0 = <&modem_pins>;
1021
1022                 hsi-channel-ids = <0>, <1>, <2>, <3>;
1023                 hsi-channel-names = "mcsaab-control",
1024                                     "speech-control",
1025                                     "speech-data",
1026                                     "mcsaab-data";
1027                 hsi-speed-kbps = <55000>;
1028                 hsi-mode = "frame";
1029                 hsi-flow = "synchronized";
1030                 hsi-arb-mode = "round-robin";
1031
1032                 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1033
1034                 gpios = <&gpio3  6 GPIO_ACTIVE_HIGH>, /* 70 */
1035                         <&gpio3  9 GPIO_ACTIVE_HIGH>, /* 73 */
1036                         <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1037                         <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1038                         <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1039                 gpio-names = "cmt_apeslpx",
1040                              "cmt_rst_rq",
1041                              "cmt_en",
1042                              "cmt_rst",
1043                              "cmt_bsi";
1044         };
1045 };
1046
1047 &ssi_port2 {
1048         status = "disabled";
1049 };