arch/arm/boot/dts/moxart.dtsi

   1 /* moxart.dtsi - Device Tree Include file for MOXA ART family SoC
   2  *
   3  * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
   4  *
   5  * Licensed under GPLv2 or later.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9
  10 / {
  11         #address-cells = <1>;
  12         #size-cells = <1>;
  13         compatible = "moxa,moxart";
  14         model = "MOXART";
  15         interrupt-parent = <&intc>;
  16
  17         cpus {
  18                 #address-cells = <1>;
  19                 #size-cells = <0>;
  20
  21                 cpu@0 {
  22                         device_type = "cpu";
  23                         compatible = "faraday,fa526";
  24                         reg = <0>;
  25                 };
  26         };
  27
  28         clocks {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31         };
  32
  33         soc {
  34                 compatible = "simple-bus";
  35                 #address-cells = <1>;
  36                 #size-cells = <1>;
  37                 reg = <0x90000000 0x10000000>;
  38                 ranges;
  39
  40                 intc: interrupt-controller@98800000 {
  41                         compatible = "moxa,moxart-ic", "faraday,ftintc010";
  42                         reg = <0x98800000 0x100>;
  43                         interrupt-controller;
  44                         #interrupt-cells = <2>;
  45                         interrupt-mask = <0x00080000>;
  46                 };
  47
  48                 clk_pll: clk_pll@98100000 {
  49                         compatible = "moxa,moxart-pll-clock";
  50                         #clock-cells = <0>;
  51                         reg = <0x98100000 0x34>;
  52                 };
  53
  54                 clk_apb: clk_apb@98100000 {
  55                         compatible = "moxa,moxart-apb-clock";
  56                         #clock-cells = <0>;
  57                         reg = <0x98100000 0x34>;
  58                         clocks = <&clk_pll>;
  59                 };
  60
  61                 timer: timer@98400000 {
  62                         compatible = "moxa,moxart-timer", "faraday,fttmr010";
  63                         reg = <0x98400000 0x42>;
  64                         interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
  65                         clocks = <&clk_apb>;
  66                         clock-names = "PCLK";
  67                 };
  68
  69                 gpio: gpio@98700000 {
  70                         gpio-controller;
  71                         #gpio-cells = <2>;
  72                         compatible = "moxa,moxart-gpio", "faraday,ftgpio010";
  73                         reg = <0x98700000 0x100>;
  74                 };
  75
  76                 rtc: rtc {
  77                         compatible = "moxa,moxart-rtc";
  78                         gpio-rtc-sclk = <&gpio 5 0>;
  79                         gpio-rtc-data = <&gpio 6 0>;
  80                         gpio-rtc-reset = <&gpio 7 0>;
  81                 };
  82
  83                 dma: dma@90500000 {
  84                         compatible = "moxa,moxart-dma";
  85                         reg = <0x90500080 0x40>;
  86                         interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
  87                         #dma-cells = <1>;
  88                 };
  89
  90                 watchdog: watchdog@98500000 {
  91                         compatible = "moxa,moxart-watchdog", "faraday,ftwdt010";
  92                         reg = <0x98500000 0x10>;
  93                         clocks = <&clk_apb>;
  94                         clock-names = "PCLK";
  95                 };
  96
  97                 sdhci: sdhci@98e00000 {
  98                         compatible = "moxa,moxart-sdhci";
  99                         reg = <0x98e00000 0x5C>;
 100                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
 101                         clocks = <&clk_apb>;
 102                         dmas =  <&dma 5>,
 103                                 <&dma 5>;
 104                         dma-names = "tx", "rx";
 105                         status = "disabled";
 106                 };
 107
 108                 mdio0: mdio@90900090 {
 109                         compatible = "moxa,moxart-mdio";
 110                         reg = <0x90900090 0x8>;
 111                         #address-cells = <1>;
 112                         #size-cells = <0>;
 113                         status = "disabled";
 114                 };
 115
 116                 mdio1: mdio@92000090 {
 117                         compatible = "moxa,moxart-mdio";
 118                         reg = <0x92000090 0x8>;
 119                         #address-cells = <1>;
 120                         #size-cells = <0>;
 121                         status = "disabled";
 122                 };
 123
 124                 mac0: mac@90900000 {
 125                         compatible = "moxa,moxart-mac";
 126                         reg = <0x90900000 0x90>;
 127                         interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
 128                         phy-handle = <&ethphy0>;
 129                         phy-mode = "mii";
 130                         status = "disabled";
 131                 };
 132
 133                 mac1: mac@92000000 {
 134                         compatible = "moxa,moxart-mac";
 135                         reg = <0x92000000 0x90>;
 136                         interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
 137                         phy-handle = <&ethphy1>;
 138                         phy-mode = "mii";
 139                         status = "disabled";
 140                 };
 141
 142                 uart0: uart@98200000 {
 143                         compatible = "ns16550a";
 144                         reg = <0x98200000 0x20>;
 145                         interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
 146                         reg-shift = <2>;
 147                         reg-io-width = <4>;
 148                         clock-frequency = <14745600>;
 149                         status = "disabled";
 150                 };
 151         };
 152 };