2 * Copyright 2015 Endless Mobile, Inc.
3 * Author: Carlo Caione <carlo@endlessm.com>
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program. If not, see <http://www.gnu.org/licenses/>.
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
47 #include <dt-bindings/clock/meson8b-clkc.h>
48 #include <dt-bindings/gpio/meson8b-gpio.h>
49 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
50 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
60 compatible = "arm,cortex-a5";
61 next-level-cache = <&L2>;
63 enable-method = "amlogic,meson8b-smp";
64 resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
65 operating-points-v2 = <&cpu_opp_table>;
66 clocks = <&clkc CLKID_CPUCLK>;
71 compatible = "arm,cortex-a5";
72 next-level-cache = <&L2>;
74 enable-method = "amlogic,meson8b-smp";
75 resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
76 operating-points-v2 = <&cpu_opp_table>;
77 clocks = <&clkc CLKID_CPUCLK>;
82 compatible = "arm,cortex-a5";
83 next-level-cache = <&L2>;
85 enable-method = "amlogic,meson8b-smp";
86 resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
87 operating-points-v2 = <&cpu_opp_table>;
88 clocks = <&clkc CLKID_CPUCLK>;
93 compatible = "arm,cortex-a5";
94 next-level-cache = <&L2>;
96 enable-method = "amlogic,meson8b-smp";
97 resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
98 operating-points-v2 = <&cpu_opp_table>;
99 clocks = <&clkc CLKID_CPUCLK>;
103 cpu_opp_table: opp-table {
104 compatible = "operating-points-v2";
108 opp-hz = /bits/ 64 <96000000>;
109 opp-microvolt = <860000>;
112 opp-hz = /bits/ 64 <192000000>;
113 opp-microvolt = <860000>;
116 opp-hz = /bits/ 64 <312000000>;
117 opp-microvolt = <860000>;
120 opp-hz = /bits/ 64 <408000000>;
121 opp-microvolt = <860000>;
124 opp-hz = /bits/ 64 <504000000>;
125 opp-microvolt = <860000>;
128 opp-hz = /bits/ 64 <600000000>;
129 opp-microvolt = <860000>;
132 opp-hz = /bits/ 64 <720000000>;
133 opp-microvolt = <860000>;
136 opp-hz = /bits/ 64 <816000000>;
137 opp-microvolt = <900000>;
140 opp-hz = /bits/ 64 <1008000000>;
141 opp-microvolt = <1140000>;
144 opp-hz = /bits/ 64 <1200000000>;
145 opp-microvolt = <1140000>;
148 opp-hz = /bits/ 64 <1320000000>;
149 opp-microvolt = <1140000>;
152 opp-hz = /bits/ 64 <1488000000>;
153 opp-microvolt = <1140000>;
156 opp-hz = /bits/ 64 <1536000000>;
157 opp-microvolt = <1140000>;
161 gpu_opp_table: gpu-opp-table {
162 compatible = "operating-points-v2";
165 opp-hz = /bits/ 64 <255000000>;
166 opp-microvolt = <1150000>;
169 opp-hz = /bits/ 64 <364300000>;
170 opp-microvolt = <1150000>;
173 opp-hz = /bits/ 64 <425000000>;
174 opp-microvolt = <1150000>;
177 opp-hz = /bits/ 64 <510000000>;
178 opp-microvolt = <1150000>;
181 opp-hz = /bits/ 64 <637500000>;
182 opp-microvolt = <1150000>;
188 compatible = "arm,cortex-a5-pmu";
189 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
190 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
191 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
192 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
193 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
197 #address-cells = <1>;
201 /* 2 MiB reserved for Hardware ROM Firmware? */
203 reg = <0x0 0x200000>;
209 compatible = "simple-bus";
210 reg = <0xd0000000 0x200000>;
211 #address-cells = <1>;
213 ranges = <0x0 0xd0000000 0x200000>;
216 compatible = "amlogic,meson8b-mali", "arm,mali-450";
217 reg = <0xc0000 0x40000>;
218 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
219 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
220 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
221 <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
222 <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
223 <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
225 <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
226 interrupt-names = "gp", "gpmmu", "pp", "pmu",
227 "pp0", "ppmmu0", "pp1", "ppmmu1";
228 resets = <&reset RESET_MALI>;
229 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
230 clock-names = "bus", "core";
231 operating-points-v2 = <&gpu_opp_table>;
232 switch-delay = <0xffff>;
239 compatible = "amlogic,meson8b-pmu", "syscon";
243 pinctrl_aobus: pinctrl@84 {
244 compatible = "amlogic,meson8b-aobus-pinctrl";
246 #address-cells = <1>;
250 gpio_ao: ao-bank@14 {
254 reg-names = "mux", "pull", "gpio";
257 gpio-ranges = <&pinctrl_aobus 0 0 16>;
260 uart_ao_a_pins: uart_ao_a {
262 groups = "uart_tx_ao_a", "uart_rx_ao_a";
263 function = "uart_ao";
268 ir_recv_pins: remote {
270 groups = "remote_input";
279 reset: reset-controller@4404 {
280 compatible = "amlogic,meson8b-reset";
285 analog_top: analog-top@81a8 {
286 compatible = "amlogic,meson8b-analog-top", "syscon";
291 compatible = "amlogic,meson8b-pwm";
297 pinctrl_cbus: pinctrl@9880 {
298 compatible = "amlogic,meson8b-cbus-pinctrl";
300 #address-cells = <1>;
309 reg-names = "mux", "pull", "pull-enable", "gpio";
312 gpio-ranges = <&pinctrl_cbus 0 0 83>;
315 eth_rgmii_pins: eth-rgmii {
317 groups = "eth_tx_clk",
332 function = "ethernet";
337 eth_rmii_pins: eth-rmii {
339 groups = "eth_tx_en",
348 function = "ethernet";
355 groups = "i2c_sda_a", "i2c_sck_a";
363 groups = "sd_d0_b", "sd_d1_b", "sd_d2_b",
364 "sd_d3_b", "sd_clk_b", "sd_cmd_b";
370 pwm_c1_pins: pwm-c1 {
378 uart_b0_pins: uart-b0 {
380 groups = "uart_tx_b0",
387 uart_b0_cts_rts_pins: uart-b0-cts-rts {
389 groups = "uart_cts_b0",
400 compatible = "amlogic,meson8b-smp-sram";
407 compatible = "amlogic,meson8b-efuse";
408 clocks = <&clkc CLKID_EFUSE>;
409 clock-names = "core";
411 temperature_calib: calib@1f4 {
412 /* only the upper two bytes are relevant */
418 compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
420 reg = <0xc9410000 0x10000
423 clocks = <&clkc CLKID_ETH>,
426 clock-names = "stmmaceth", "clkin0", "clkin1";
428 resets = <&reset RESET_ETHERNET>;
429 reset-names = "stmmaceth";
433 compatible = "amlogic,meson-gpio-intc",
434 "amlogic,meson8b-gpio-intc";
439 clkc: clock-controller {
440 compatible = "amlogic,meson8-clkc";
447 compatible = "amlogic,meson8b-rng", "amlogic,meson-rng";
448 clocks = <&clkc CLKID_RNG0>;
449 clock-names = "core";
453 clocks = <&clkc CLKID_CLK81>;
457 clocks = <&clkc CLKID_I2C>;
461 clocks = <&clkc CLKID_I2C>;
465 arm,data-latency = <3 3 3>;
466 arm,tag-latency = <2 2 2>;
467 arm,filter-ranges = <0x100000 0xc0000000>;
469 prefetch-instr = <1>;
475 compatible = "arm,cortex-a5-scu";
480 compatible = "arm,cortex-a5-global-timer";
482 interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
483 clocks = <&clkc CLKID_PERIPH>;
486 * the arm_global_timer driver currently does not handle clock
487 * rate changes. Keep it disabled for now.
493 compatible = "arm,cortex-a5-twd-timer";
495 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
496 clocks = <&clkc CLKID_PERIPH>;
501 compatible = "amlogic,meson8b-pwm";
505 compatible = "amlogic,meson8b-pwm";
509 compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
510 clocks = <&clkc CLKID_XTAL>,
511 <&clkc CLKID_SAR_ADC>;
512 clock-names = "clkin", "core";
513 amlogic,hhi-sysctrl = <&hhi>;
514 nvmem-cells = <&temperature_calib>;
515 nvmem-cell-names = "temperature_calib";
519 compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio";
520 clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;
521 clock-names = "core", "clkin";
525 clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
526 clock-names = "xtal", "pclk";
530 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
531 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
532 clock-names = "baud", "xtal", "pclk";
536 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
537 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>;
538 clock-names = "baud", "xtal", "pclk";
542 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
543 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>;
544 clock-names = "baud", "xtal", "pclk";
548 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
549 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>;
550 clock-names = "baud", "xtal", "pclk";
554 compatible = "amlogic,meson8b-usb", "snps,dwc2";
555 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
560 compatible = "amlogic,meson8b-usb", "snps,dwc2";
561 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
566 compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
567 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
568 clock-names = "usb_general", "usb";
569 resets = <&reset RESET_USB_OTG>;
573 compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
574 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
575 clock-names = "usb_general", "usb";
576 resets = <&reset RESET_USB_OTG>;
580 compatible = "amlogic,meson8b-wdt";