arch/arm/boot/dts/ls1021a.dtsi

   1 /*
   2  * Copyright 2013-2014 Freescale Semiconductor, Inc.
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of
  12  *     the License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  *     You should have received a copy of the GNU General Public
  20  *     License along with this file; if not, write to the Free
  21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  *     MA 02110-1301 USA
  23  *
  24  * Or, alternatively,
  25  *
  26  *  b) Permission is hereby granted, free of charge, to any person
  27  *     obtaining a copy of this software and associated documentation
  28  *     files (the "Software"), to deal in the Software without
  29  *     restriction, including without limitation the rights to use,
  30  *     copy, modify, merge, publish, distribute, sublicense, and/or
  31  *     sell copies of the Software, and to permit persons to whom the
  32  *     Software is furnished to do so, subject to the following
  33  *     conditions:
  34  *
  35  *     The above copyright notice and this permission notice shall be
  36  *     included in all copies or substantial portions of the Software.
  37  *
  38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45  *     OTHER DEALINGS IN THE SOFTWARE.
  46  */
  47
  48 #include <dt-bindings/interrupt-controller/arm-gic.h>
  49 #include <dt-bindings/thermal/thermal.h>
  50
  51 / {
  52         #address-cells = <2>;
  53         #size-cells = <2>;
  54         compatible = "fsl,ls1021a";
  55         interrupt-parent = <&gic>;
  56
  57         aliases {
  58                 crypto = &crypto;
  59                 ethernet0 = &enet0;
  60                 ethernet1 = &enet1;
  61                 ethernet2 = &enet2;
  62                 serial0 = &lpuart0;
  63                 serial1 = &lpuart1;
  64                 serial2 = &lpuart2;
  65                 serial3 = &lpuart3;
  66                 serial4 = &lpuart4;
  67                 serial5 = &lpuart5;
  68                 sysclk = &sysclk;
  69         };
  70
  71         cpus {
  72                 #address-cells = <1>;
  73                 #size-cells = <0>;
  74
  75                 cpu0: cpu@f00 {
  76                         compatible = "arm,cortex-a7";
  77                         device_type = "cpu";
  78                         reg = <0xf00>;
  79                         clocks = <&clockgen 1 0>;
  80                         #cooling-cells = <2>;
  81                 };
  82
  83                 cpu1: cpu@f01 {
  84                         compatible = "arm,cortex-a7";
  85                         device_type = "cpu";
  86                         reg = <0xf01>;
  87                         clocks = <&clockgen 1 0>;
  88                         #cooling-cells = <2>;
  89                 };
  90         };
  91
  92         memory {
  93                 device_type = "memory";
  94                 reg = <0x0 0x0 0x0 0x0>;
  95         };
  96
  97         sysclk: sysclk {
  98                 compatible = "fixed-clock";
  99                 #clock-cells = <0>;
 100                 clock-frequency = <100000000>;
 101                 clock-output-names = "sysclk";
 102         };
 103
 104         timer {
 105                 compatible = "arm,armv7-timer";
 106                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 107                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 108                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 109                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
 110         };
 111
 112         pmu {
 113                 compatible = "arm,cortex-a7-pmu";
 114                 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
 115                              <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
 116                 interrupt-affinity = <&cpu0>, <&cpu1>;
 117         };
 118
 119         reboot {
 120                 compatible = "syscon-reboot";
 121                 regmap = <&dcfg>;
 122                 offset = <0xb0>;
 123                 mask = <0x02>;
 124         };
 125
 126         soc {
 127                 compatible = "simple-bus";
 128                 #address-cells = <2>;
 129                 #size-cells = <2>;
 130                 device_type = "soc";
 131                 interrupt-parent = <&gic>;
 132                 ranges;
 133
 134                 ddr: memory-controller@1080000 {
 135                         compatible = "fsl,qoriq-memory-controller";
 136                         reg = <0x0 0x1080000 0x0 0x1000>;
 137                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
 138                         big-endian;
 139                 };
 140
 141                 gic: interrupt-controller@1400000 {
 142                         compatible = "arm,gic-400", "arm,cortex-a7-gic";
 143                         #interrupt-cells = <3>;
 144                         interrupt-controller;
 145                         reg = <0x0 0x1401000 0x0 0x1000>,
 146                               <0x0 0x1402000 0x0 0x2000>,
 147                               <0x0 0x1404000 0x0 0x2000>,
 148                               <0x0 0x1406000 0x0 0x2000>;
 149                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 150
 151                 };
 152
 153                 msi1: msi-controller@1570e00 {
 154                         compatible = "fsl,ls1021a-msi";
 155                         reg = <0x0 0x1570e00 0x0 0x8>;
 156                         msi-controller;
 157                         interrupts =  <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
 158                 };
 159
 160                 msi2: msi-controller@1570e08 {
 161                         compatible = "fsl,ls1021a-msi";
 162                         reg = <0x0 0x1570e08 0x0 0x8>;
 163                         msi-controller;
 164                         interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
 165                 };
 166
 167                 ifc: ifc@1530000 {
 168                         compatible = "fsl,ifc", "simple-bus";
 169                         reg = <0x0 0x1530000 0x0 0x10000>;
 170                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 171                 };
 172
 173                 dcfg: dcfg@1ee0000 {
 174                         compatible = "fsl,ls1021a-dcfg", "syscon";
 175                         reg = <0x0 0x1ee0000 0x0 0x10000>;
 176                         big-endian;
 177                 };
 178
 179                 qspi: spi@1550000 {
 180                         compatible = "fsl,ls1021a-qspi";
 181                         #address-cells = <1>;
 182                         #size-cells = <0>;
 183                         reg = <0x0 0x1550000 0x0 0x10000>,
 184                               <0x0 0x40000000 0x0 0x40000000>;
 185                         reg-names = "QuadSPI", "QuadSPI-memory";
 186                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
 187                         clock-names = "qspi_en", "qspi";
 188                         clocks = <&clockgen 4 1>, <&clockgen 4 1>;
 189                         big-endian;
 190                         status = "disabled";
 191                 };
 192
 193                 esdhc: esdhc@1560000 {
 194                         compatible = "fsl,ls1021a-esdhc", "fsl,esdhc";
 195                         reg = <0x0 0x1560000 0x0 0x10000>;
 196                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 197                         clock-frequency = <0>;
 198                         voltage-ranges = <1800 1800 3300 3300>;
 199                         sdhci,auto-cmd12;
 200                         big-endian;
 201                         bus-width = <4>;
 202                         status = "disabled";
 203                 };
 204
 205                 sata: sata@3200000 {
 206                         compatible = "fsl,ls1021a-ahci";
 207                         reg = <0x0 0x3200000 0x0 0x10000>,
 208                               <0x0 0x20220520 0x0 0x4>;
 209                         reg-names = "ahci", "sata-ecc";
 210                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
 211                         clocks = <&clockgen 4 1>;
 212                         dma-coherent;
 213                         status = "disabled";
 214                 };
 215
 216                 scfg: scfg@1570000 {
 217                         compatible = "fsl,ls1021a-scfg", "syscon";
 218                         reg = <0x0 0x1570000 0x0 0x10000>;
 219                         big-endian;
 220                 };
 221
 222                 crypto: crypto@1700000 {
 223                         compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
 224                         fsl,sec-era = <7>;
 225                         #address-cells = <1>;
 226                         #size-cells = <1>;
 227                         reg              = <0x0 0x1700000 0x0 0x100000>;
 228                         ranges           = <0x0 0x0 0x1700000 0x100000>;
 229                         interrupts       = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 230
 231                         sec_jr0: jr@10000 {
 232                                 compatible = "fsl,sec-v5.0-job-ring",
 233                                      "fsl,sec-v4.0-job-ring";
 234                                 reg = <0x10000 0x10000>;
 235                                 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 236                         };
 237
 238                         sec_jr1: jr@20000 {
 239                                 compatible = "fsl,sec-v5.0-job-ring",
 240                                      "fsl,sec-v4.0-job-ring";
 241                                 reg = <0x20000 0x10000>;
 242                                 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
 243                         };
 244
 245                         sec_jr2: jr@30000 {
 246                                 compatible = "fsl,sec-v5.0-job-ring",
 247                                      "fsl,sec-v4.0-job-ring";
 248                                 reg = <0x30000 0x10000>;
 249                                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 250                         };
 251
 252                         sec_jr3: jr@40000 {
 253                                 compatible = "fsl,sec-v5.0-job-ring",
 254                                      "fsl,sec-v4.0-job-ring";
 255                                 reg = <0x40000 0x10000>;
 256                                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
 257                         };
 258
 259                 };
 260
 261                 clockgen: clocking@1ee1000 {
 262                         compatible = "fsl,ls1021a-clockgen";
 263                         reg = <0x0 0x1ee1000 0x0 0x1000>;
 264                         #clock-cells = <2>;
 265                         clocks = <&sysclk>;
 266                 };
 267
 268                 tmu: tmu@1f00000 {
 269                         compatible = "fsl,qoriq-tmu";
 270                         reg = <0x0 0x1f00000 0x0 0x10000>;
 271                         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 272                         fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
 273                         fsl,tmu-calibration = <0x00000000 0x0000000f
 274                                                0x00000001 0x00000017
 275                                                0x00000002 0x0000001e
 276                                                0x00000003 0x00000026
 277                                                0x00000004 0x0000002e
 278                                                0x00000005 0x00000035
 279                                                0x00000006 0x0000003d
 280                                                0x00000007 0x00000044
 281                                                0x00000008 0x0000004c
 282                                                0x00000009 0x00000053
 283                                                0x0000000a 0x0000005b
 284                                                0x0000000b 0x00000064
 285
 286                                                0x00010000 0x00000011
 287                                                0x00010001 0x0000001c
 288                                                0x00010002 0x00000024
 289                                                0x00010003 0x0000002b
 290                                                0x00010004 0x00000034
 291                                                0x00010005 0x00000039
 292                                                0x00010006 0x00000042
 293                                                0x00010007 0x0000004c
 294                                                0x00010008 0x00000051
 295                                                0x00010009 0x0000005a
 296                                                0x0001000a 0x00000063
 297
 298                                                0x00020000 0x00000013
 299                                                0x00020001 0x00000019
 300                                                0x00020002 0x00000024
 301                                                0x00020003 0x0000002c
 302                                                0x00020004 0x00000035
 303                                                0x00020005 0x0000003d
 304                                                0x00020006 0x00000046
 305                                                0x00020007 0x00000050
 306                                                0x00020008 0x00000059
 307
 308                                                0x00030000 0x00000002
 309                                                0x00030001 0x0000000d
 310                                                0x00030002 0x00000019
 311                                                0x00030003 0x00000024>;
 312                         #thermal-sensor-cells = <1>;
 313                 };
 314
 315                 thermal-zones {
 316                         cpu_thermal: cpu-thermal {
 317                                 polling-delay-passive = <1000>;
 318                                 polling-delay = <5000>;
 319
 320                                 thermal-sensors = <&tmu 0>;
 321
 322                                 trips {
 323                                         cpu_alert: cpu-alert {
 324                                                 temperature = <85000>;
 325                                                 hysteresis = <2000>;
 326                                                 type = "passive";
 327                                         };
 328                                         cpu_crit: cpu-crit {
 329                                                 temperature = <95000>;
 330                                                 hysteresis = <2000>;
 331                                                 type = "critical";
 332                                         };
 333                                 };
 334
 335                                 cooling-maps {
 336                                         map0 {
 337                                                 trip = <&cpu_alert>;
 338                                                 cooling-device =
 339                                                         <&cpu0 THERMAL_NO_LIMIT
 340                                                         THERMAL_NO_LIMIT>,
 341                                                         <&cpu1 THERMAL_NO_LIMIT
 342                                                         THERMAL_NO_LIMIT>;
 343                                         };
 344                                 };
 345                         };
 346                 };
 347
 348                 dspi0: spi@2100000 {
 349                         compatible = "fsl,ls1021a-v1.0-dspi";
 350                         #address-cells = <1>;
 351                         #size-cells = <0>;
 352                         reg = <0x0 0x2100000 0x0 0x10000>;
 353                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 354                         clock-names = "dspi";
 355                         clocks = <&clockgen 4 1>;
 356                         spi-num-chipselects = <6>;
 357                         big-endian;
 358                         status = "disabled";
 359                 };
 360
 361                 dspi1: spi@2110000 {
 362                         compatible = "fsl,ls1021a-v1.0-dspi";
 363                         #address-cells = <1>;
 364                         #size-cells = <0>;
 365                         reg = <0x0 0x2110000 0x0 0x10000>;
 366                         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 367                         clock-names = "dspi";
 368                         clocks = <&clockgen 4 1>;
 369                         spi-num-chipselects = <6>;
 370                         big-endian;
 371                         status = "disabled";
 372                 };
 373
 374                 i2c0: i2c@2180000 {
 375                         compatible = "fsl,vf610-i2c";
 376                         #address-cells = <1>;
 377                         #size-cells = <0>;
 378                         reg = <0x0 0x2180000 0x0 0x10000>;
 379                         interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
 380                         clock-names = "i2c";
 381                         clocks = <&clockgen 4 1>;
 382                         dma-names = "tx", "rx";
 383                         dmas = <&edma0 1 39>, <&edma0 1 38>;
 384                         status = "disabled";
 385                 };
 386
 387                 i2c1: i2c@2190000 {
 388                         compatible = "fsl,vf610-i2c";
 389                         #address-cells = <1>;
 390                         #size-cells = <0>;
 391                         reg = <0x0 0x2190000 0x0 0x10000>;
 392                         interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
 393                         clock-names = "i2c";
 394                         clocks = <&clockgen 4 1>;
 395                         dma-names = "tx", "rx";
 396                         dmas = <&edma0 1 37>, <&edma0 1 36>;
 397                         status = "disabled";
 398                 };
 399
 400                 i2c2: i2c@21a0000 {
 401                         compatible = "fsl,vf610-i2c";
 402                         #address-cells = <1>;
 403                         #size-cells = <0>;
 404                         reg = <0x0 0x21a0000 0x0 0x10000>;
 405                         interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
 406                         clock-names = "i2c";
 407                         clocks = <&clockgen 4 1>;
 408                         dma-names = "tx", "rx";
 409                         dmas = <&edma0 1 35>, <&edma0 1 34>;
 410                         status = "disabled";
 411                 };
 412
 413                 uart0: serial@21c0500 {
 414                         compatible = "fsl,16550-FIFO64", "ns16550a";
 415                         reg = <0x0 0x21c0500 0x0 0x100>;
 416                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 417                         clock-frequency = <0>;
 418                         fifo-size = <15>;
 419                         status = "disabled";
 420                 };
 421
 422                 uart1: serial@21c0600 {
 423                         compatible = "fsl,16550-FIFO64", "ns16550a";
 424                         reg = <0x0 0x21c0600 0x0 0x100>;
 425                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 426                         clock-frequency = <0>;
 427                         fifo-size = <15>;
 428                         status = "disabled";
 429                 };
 430
 431                 uart2: serial@21d0500 {
 432                         compatible = "fsl,16550-FIFO64", "ns16550a";
 433                         reg = <0x0 0x21d0500 0x0 0x100>;
 434                         interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 435                         clock-frequency = <0>;
 436                         fifo-size = <15>;
 437                         status = "disabled";
 438                 };
 439
 440                 uart3: serial@21d0600 {
 441                         compatible = "fsl,16550-FIFO64", "ns16550a";
 442                         reg = <0x0 0x21d0600 0x0 0x100>;
 443                         interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 444                         clock-frequency = <0>;
 445                         fifo-size = <15>;
 446                         status = "disabled";
 447                 };
 448
 449                 gpio0: gpio@2300000 {
 450                         compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
 451                         reg = <0x0 0x2300000 0x0 0x10000>;
 452                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 453                         gpio-controller;
 454                         #gpio-cells = <2>;
 455                         interrupt-controller;
 456                         #interrupt-cells = <2>;
 457                 };
 458
 459                 gpio1: gpio@2310000 {
 460                         compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
 461                         reg = <0x0 0x2310000 0x0 0x10000>;
 462                         interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
 463                         gpio-controller;
 464                         #gpio-cells = <2>;
 465                         interrupt-controller;
 466                         #interrupt-cells = <2>;
 467                 };
 468
 469                 gpio2: gpio@2320000 {
 470                         compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
 471                         reg = <0x0 0x2320000 0x0 0x10000>;
 472                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 473                         gpio-controller;
 474                         #gpio-cells = <2>;
 475                         interrupt-controller;
 476                         #interrupt-cells = <2>;
 477                 };
 478
 479                 gpio3: gpio@2330000 {
 480                         compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
 481                         reg = <0x0 0x2330000 0x0 0x10000>;
 482                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
 483                         gpio-controller;
 484                         #gpio-cells = <2>;
 485                         interrupt-controller;
 486                         #interrupt-cells = <2>;
 487                 };
 488
 489                 lpuart0: serial@2950000 {
 490                         compatible = "fsl,ls1021a-lpuart";
 491                         reg = <0x0 0x2950000 0x0 0x1000>;
 492                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 493                         clocks = <&sysclk>;
 494                         clock-names = "ipg";
 495                         status = "disabled";
 496                 };
 497
 498                 lpuart1: serial@2960000 {
 499                         compatible = "fsl,ls1021a-lpuart";
 500                         reg = <0x0 0x2960000 0x0 0x1000>;
 501                         interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 502                         clocks = <&clockgen 4 1>;
 503                         clock-names = "ipg";
 504                         status = "disabled";
 505                 };
 506
 507                 lpuart2: serial@2970000 {
 508                         compatible = "fsl,ls1021a-lpuart";
 509                         reg = <0x0 0x2970000 0x0 0x1000>;
 510                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 511                         clocks = <&clockgen 4 1>;
 512                         clock-names = "ipg";
 513                         status = "disabled";
 514                 };
 515
 516                 lpuart3: serial@2980000 {
 517                         compatible = "fsl,ls1021a-lpuart";
 518                         reg = <0x0 0x2980000 0x0 0x1000>;
 519                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 520                         clocks = <&clockgen 4 1>;
 521                         clock-names = "ipg";
 522                         status = "disabled";
 523                 };
 524
 525                 lpuart4: serial@2990000 {
 526                         compatible = "fsl,ls1021a-lpuart";
 527                         reg = <0x0 0x2990000 0x0 0x1000>;
 528                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 529                         clocks = <&clockgen 4 1>;
 530                         clock-names = "ipg";
 531                         status = "disabled";
 532                 };
 533
 534                 lpuart5: serial@29a0000 {
 535                         compatible = "fsl,ls1021a-lpuart";
 536                         reg = <0x0 0x29a0000 0x0 0x1000>;
 537                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 538                         clocks = <&clockgen 4 1>;
 539                         clock-names = "ipg";
 540                         status = "disabled";
 541                 };
 542
 543                 pwm0: pwm@29d0000 {
 544                         compatible = "fsl,vf610-ftm-pwm";
 545                         #pwm-cells = <3>;
 546                         reg = <0x0 0x29d0000 0x0 0x10000>;
 547                         clock-names = "ftm_sys", "ftm_ext",
 548                                 "ftm_fix", "ftm_cnt_clk_en";
 549                         clocks = <&clockgen 4 1>, <&clockgen 4 1>,
 550                                 <&clockgen 4 1>, <&clockgen 4 1>;
 551                         big-endian;
 552                         status = "disabled";
 553                 };
 554
 555                 pwm1: pwm@29e0000 {
 556                         compatible = "fsl,vf610-ftm-pwm";
 557                         #pwm-cells = <3>;
 558                         reg = <0x0 0x29e0000 0x0 0x10000>;
 559                         clock-names = "ftm_sys", "ftm_ext",
 560                                 "ftm_fix", "ftm_cnt_clk_en";
 561                         clocks = <&clockgen 4 1>, <&clockgen 4 1>,
 562                                 <&clockgen 4 1>, <&clockgen 4 1>;
 563                         big-endian;
 564                         status = "disabled";
 565                 };
 566
 567                 pwm2: pwm@29f0000 {
 568                         compatible = "fsl,vf610-ftm-pwm";
 569                         #pwm-cells = <3>;
 570                         reg = <0x0 0x29f0000 0x0 0x10000>;
 571                         clock-names = "ftm_sys", "ftm_ext",
 572                                 "ftm_fix", "ftm_cnt_clk_en";
 573                         clocks = <&clockgen 4 1>, <&clockgen 4 1>,
 574                                 <&clockgen 4 1>, <&clockgen 4 1>;
 575                         big-endian;
 576                         status = "disabled";
 577                 };
 578
 579                 pwm3: pwm@2a00000 {
 580                         compatible = "fsl,vf610-ftm-pwm";
 581                         #pwm-cells = <3>;
 582                         reg = <0x0 0x2a00000 0x0 0x10000>;
 583                         clock-names = "ftm_sys", "ftm_ext",
 584                                 "ftm_fix", "ftm_cnt_clk_en";
 585                         clocks = <&clockgen 4 1>, <&clockgen 4 1>,
 586                                 <&clockgen 4 1>, <&clockgen 4 1>;
 587                         big-endian;
 588                         status = "disabled";
 589                 };
 590
 591                 pwm4: pwm@2a10000 {
 592                         compatible = "fsl,vf610-ftm-pwm";
 593                         #pwm-cells = <3>;
 594                         reg = <0x0 0x2a10000 0x0 0x10000>;
 595                         clock-names = "ftm_sys", "ftm_ext",
 596                                 "ftm_fix", "ftm_cnt_clk_en";
 597                         clocks = <&clockgen 4 1>, <&clockgen 4 1>,
 598                                 <&clockgen 4 1>, <&clockgen 4 1>;
 599                         big-endian;
 600                         status = "disabled";
 601                 };
 602
 603                 pwm5: pwm@2a20000 {
 604                         compatible = "fsl,vf610-ftm-pwm";
 605                         #pwm-cells = <3>;
 606                         reg = <0x0 0x2a20000 0x0 0x10000>;
 607                         clock-names = "ftm_sys", "ftm_ext",
 608                                 "ftm_fix", "ftm_cnt_clk_en";
 609                         clocks = <&clockgen 4 1>, <&clockgen 4 1>,
 610                                 <&clockgen 4 1>, <&clockgen 4 1>;
 611                         big-endian;
 612                         status = "disabled";
 613                 };
 614
 615                 pwm6: pwm@2a30000 {
 616                         compatible = "fsl,vf610-ftm-pwm";
 617                         #pwm-cells = <3>;
 618                         reg = <0x0 0x2a30000 0x0 0x10000>;
 619                         clock-names = "ftm_sys", "ftm_ext",
 620                                 "ftm_fix", "ftm_cnt_clk_en";
 621                         clocks = <&clockgen 4 1>, <&clockgen 4 1>,
 622                                 <&clockgen 4 1>, <&clockgen 4 1>;
 623                         big-endian;
 624                         status = "disabled";
 625                 };
 626
 627                 pwm7: pwm@2a40000 {
 628                         compatible = "fsl,vf610-ftm-pwm";
 629                         #pwm-cells = <3>;
 630                         reg = <0x0 0x2a40000 0x0 0x10000>;
 631                         clock-names = "ftm_sys", "ftm_ext",
 632                                 "ftm_fix", "ftm_cnt_clk_en";
 633                         clocks = <&clockgen 4 1>, <&clockgen 4 1>,
 634                                 <&clockgen 4 1>, <&clockgen 4 1>;
 635                         big-endian;
 636                         status = "disabled";
 637                 };
 638
 639                 wdog0: watchdog@2ad0000 {
 640                         compatible = "fsl,imx21-wdt";
 641                         reg = <0x0 0x2ad0000 0x0 0x10000>;
 642                         interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
 643                         clocks = <&clockgen 4 1>;
 644                         clock-names = "wdog-en";
 645                         big-endian;
 646                 };
 647
 648                 sai1: sai@2b50000 {
 649                         #sound-dai-cells = <0>;
 650                         compatible = "fsl,vf610-sai";
 651                         reg = <0x0 0x2b50000 0x0 0x10000>;
 652                         interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
 653                         clocks = <&clockgen 4 1>, <&clockgen 4 1>,
 654                                  <&clockgen 4 1>, <&clockgen 4 1>;
 655                         clock-names = "bus", "mclk1", "mclk2", "mclk3";
 656                         dma-names = "tx", "rx";
 657                         dmas = <&edma0 1 47>,
 658                                <&edma0 1 46>;
 659                         status = "disabled";
 660                 };
 661
 662                 sai2: sai@2b60000 {
 663                         #sound-dai-cells = <0>;
 664                         compatible = "fsl,vf610-sai";
 665                         reg = <0x0 0x2b60000 0x0 0x10000>;
 666                         interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 667                         clocks = <&clockgen 4 1>, <&clockgen 4 1>,
 668                                  <&clockgen 4 1>, <&clockgen 4 1>;
 669                         clock-names = "bus", "mclk1", "mclk2", "mclk3";
 670                         dma-names = "tx", "rx";
 671                         dmas = <&edma0 1 45>,
 672                                <&edma0 1 44>;
 673                         status = "disabled";
 674                 };
 675
 676                 edma0: edma@2c00000 {
 677                         #dma-cells = <2>;
 678                         compatible = "fsl,vf610-edma";
 679                         reg = <0x0 0x2c00000 0x0 0x10000>,
 680                               <0x0 0x2c10000 0x0 0x10000>,
 681                               <0x0 0x2c20000 0x0 0x10000>;
 682                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
 683                                      <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
 684                         interrupt-names = "edma-tx", "edma-err";
 685                         dma-channels = <32>;
 686                         big-endian;
 687                         clock-names = "dmamux0", "dmamux1";
 688                         clocks = <&clockgen 4 1>,
 689                                  <&clockgen 4 1>;
 690                 };
 691
 692                 dcu: dcu@2ce0000 {
 693                         compatible = "fsl,ls1021a-dcu";
 694                         reg = <0x0 0x2ce0000 0x0 0x10000>;
 695                         interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
 696                         clocks = <&clockgen 4 0>,
 697                                 <&clockgen 4 0>;
 698                         clock-names = "dcu", "pix";
 699                         big-endian;
 700                         status = "disabled";
 701                 };
 702
 703                 mdio0: mdio@2d24000 {
 704                         compatible = "gianfar";
 705                         device_type = "mdio";
 706                         #address-cells = <1>;
 707                         #size-cells = <0>;
 708                         reg = <0x0 0x2d24000 0x0 0x4000>,
 709                               <0x0 0x2d10030 0x0 0x4>;
 710                 };
 711
 712                 ptp_clock@2d10e00 {
 713                         compatible = "fsl,etsec-ptp";
 714                         reg = <0x0 0x2d10e00 0x0 0xb0>;
 715                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 716                         fsl,tclk-period = <5>;
 717                         fsl,tmr-prsc    = <2>;
 718                         fsl,tmr-add     = <0xaaaaaaab>;
 719                         fsl,tmr-fiper1  = <999999995>;
 720                         fsl,tmr-fiper2  = <99990>;
 721                         fsl,max-adj     = <499999999>;
 722                         fsl,extts-fifo;
 723                 };
 724
 725                 enet0: ethernet@2d10000 {
 726                         compatible = "fsl,etsec2";
 727                         device_type = "network";
 728                         #address-cells = <2>;
 729                         #size-cells = <2>;
 730                         interrupt-parent = <&gic>;
 731                         model = "eTSEC";
 732                         fsl,magic-packet;
 733                         ranges;
 734                         dma-coherent;
 735
 736                         queue-group@2d10000 {
 737                                 #address-cells = <2>;
 738                                 #size-cells = <2>;
 739                                 reg = <0x0 0x2d10000 0x0 0x1000>;
 740                                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
 741                                         <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
 742                                         <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 743                         };
 744
 745                         queue-group@2d14000  {
 746                                 #address-cells = <2>;
 747                                 #size-cells = <2>;
 748                                 reg = <0x0 0x2d14000 0x0 0x1000>;
 749                                 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
 750                                         <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
 751                                         <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 752                         };
 753                 };
 754
 755                 enet1: ethernet@2d50000 {
 756                         compatible = "fsl,etsec2";
 757                         device_type = "network";
 758                         #address-cells = <2>;
 759                         #size-cells = <2>;
 760                         interrupt-parent = <&gic>;
 761                         model = "eTSEC";
 762                         ranges;
 763                         dma-coherent;
 764
 765                         queue-group@2d50000  {
 766                                 #address-cells = <2>;
 767                                 #size-cells = <2>;
 768                                 reg = <0x0 0x2d50000 0x0 0x1000>;
 769                                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
 770                                         <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
 771                                         <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 772                         };
 773
 774                         queue-group@2d54000  {
 775                                 #address-cells = <2>;
 776                                 #size-cells = <2>;
 777                                 reg = <0x0 0x2d54000 0x0 0x1000>;
 778                                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
 779                                         <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
 780                                         <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 781                         };
 782                 };
 783
 784                 enet2: ethernet@2d90000 {
 785                         compatible = "fsl,etsec2";
 786                         device_type = "network";
 787                         #address-cells = <2>;
 788                         #size-cells = <2>;
 789                         interrupt-parent = <&gic>;
 790                         model = "eTSEC";
 791                         ranges;
 792                         dma-coherent;
 793
 794                         queue-group@2d90000  {
 795                                 #address-cells = <2>;
 796                                 #size-cells = <2>;
 797                                 reg = <0x0 0x2d90000 0x0 0x1000>;
 798                                 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
 799                                         <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
 800                                         <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 801                         };
 802
 803                         queue-group@2d94000  {
 804                                 #address-cells = <2>;
 805                                 #size-cells = <2>;
 806                                 reg = <0x0 0x2d94000 0x0 0x1000>;
 807                                 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
 808                                         <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
 809                                         <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 810                         };
 811                 };
 812
 813                 usb2: usb@8600000 {
 814                         compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
 815                         reg = <0x0 0x8600000 0x0 0x1000>;
 816                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
 817                         dr_mode = "host";
 818                         phy_type = "ulpi";
 819                 };
 820
 821                 usb3: usb3@3100000 {
 822                         compatible = "snps,dwc3";
 823                         reg = <0x0 0x3100000 0x0 0x10000>;
 824                         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 825                         dr_mode = "host";
 826                         snps,quirk-frame-length-adjustment = <0x20>;
 827                         snps,dis_rxdet_inp3_quirk;
 828                         snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
 829                 };
 830
 831                 pcie@3400000 {
 832                         compatible = "fsl,ls1021a-pcie";
 833                         reg = <0x00 0x03400000 0x0 0x00010000   /* controller registers */
 834                                0x40 0x00000000 0x0 0x00002000>; /* configuration space */
 835                         reg-names = "regs", "config";
 836                         interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
 837                         fsl,pcie-scfg = <&scfg 0>;
 838                         #address-cells = <3>;
 839                         #size-cells = <2>;
 840                         device_type = "pci";
 841                         num-lanes = <4>;
 842                         num-viewport = <6>;
 843                         bus-range = <0x0 0xff>;
 844                         ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
 845                                   0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 846                         msi-parent = <&msi1>, <&msi2>;
 847                         #interrupt-cells = <1>;
 848                         interrupt-map-mask = <0 0 0 7>;
 849                         interrupt-map = <0000 0 0 1 &gic GIC_SPI 91  IRQ_TYPE_LEVEL_HIGH>,
 850                                         <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
 851                                         <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
 852                                         <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
 853                         status = "disabled";
 854                 };
 855
 856                 pcie@3500000 {
 857                         compatible = "fsl,ls1021a-pcie";
 858                         reg = <0x00 0x03500000 0x0 0x00010000   /* controller registers */
 859                                0x48 0x00000000 0x0 0x00002000>; /* configuration space */
 860                         reg-names = "regs", "config";
 861                         interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
 862                         fsl,pcie-scfg = <&scfg 1>;
 863                         #address-cells = <3>;
 864                         #size-cells = <2>;
 865                         device_type = "pci";
 866                         num-lanes = <4>;
 867                         num-viewport = <6>;
 868                         bus-range = <0x0 0xff>;
 869                         ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
 870                                   0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 871                         msi-parent = <&msi1>, <&msi2>;
 872                         #interrupt-cells = <1>;
 873                         interrupt-map-mask = <0 0 0 7>;
 874                         interrupt-map = <0000 0 0 1 &gic GIC_SPI 92  IRQ_TYPE_LEVEL_HIGH>,
 875                                         <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
 876                                         <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
 877                                         <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
 878                         status = "disabled";
 879                 };
 880
 881                 can0: can@2a70000 {
 882                         compatible = "fsl,ls1021ar2-flexcan";
 883                         reg = <0x0 0x2a70000 0x0 0x1000>;
 884                         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 885                         clocks = <&clockgen 4 1>, <&clockgen 4 1>;
 886                         clock-names = "ipg", "per";
 887                         big-endian;
 888                 };
 889
 890                 can1: can@2a80000 {
 891                         compatible = "fsl,ls1021ar2-flexcan";
 892                         reg = <0x0 0x2a80000 0x0 0x1000>;
 893                         interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 894                         clocks = <&clockgen 4 1>, <&clockgen 4 1>;
 895                         clock-names = "ipg", "per";
 896                         big-endian;
 897                 };
 898
 899                 can2: can@2a90000 {
 900                         compatible = "fsl,ls1021ar2-flexcan";
 901                         reg = <0x0 0x2a90000 0x0 0x1000>;
 902                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
 903                         clocks = <&clockgen 4 1>, <&clockgen 4 1>;
 904                         clock-names = "ipg", "per";
 905                         big-endian;
 906                 };
 907
 908                 can3: can@2aa0000 {
 909                         compatible = "fsl,ls1021ar2-flexcan";
 910                         reg = <0x0 0x2aa0000 0x0 0x1000>;
 911                         interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
 912                         clocks = <&clockgen 4 1>, <&clockgen 4 1>;
 913                         clock-names = "ipg", "per";
 914                         big-endian;
 915                 };
 916
 917                 ocram1: sram@10000000 {
 918                         compatible = "mmio-sram";
 919                         reg = <0x0 0x10000000 0x0 0x10000>;
 920                         #address-cells = <1>;
 921                         #size-cells = <1>;
 922                         ranges = <0x0 0x0 0x10000000 0x10000>;
 923                 };
 924
 925                 ocram2: sram@10010000 {
 926                         compatible = "mmio-sram";
 927                         reg = <0x0 0x10010000 0x0 0x10000>;
 928                         #address-cells = <1>;
 929                         #size-cells = <1>;
 930                         ranges = <0x0 0x0 0x10010000 0x10000>;
 931                 };
 932
 933                 qdma: dma-controller@8390000 {
 934                         compatible = "fsl,ls1021a-qdma";
 935                         reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
 936                               <0x0 0x8389000 0x0 0x1000>, /* Status regs */
 937                               <0x0 0x838a000 0x0 0x2000>; /* Block regs */
 938                         interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
 939                                      <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
 940                                      <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 941                         interrupt-names = "qdma-error",
 942                                 "qdma-queue0", "qdma-queue1";
 943                         dma-channels = <8>;
 944                         block-number = <1>;
 945                         block-offset = <0x1000>;
 946                         fsl,dma-queues = <2>;
 947                         status-sizes = <64>;
 948                         queue-sizes = <64 64>;
 949                         big-endian;
 950                 };
 951
 952         };
 953 };