arch/arm/boot/dts/kirkwood.dtsi

   1 /include/ "skeleton.dtsi"
   2 #include <dt-bindings/input/input.h>
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   6
   7 / {
   8         compatible = "marvell,kirkwood";
   9         interrupt-parent = <&intc>;
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "marvell,feroceon";
  18                         reg = <0>;
  19                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  20                         clock-names = "cpu_clk", "ddrclk", "powersave";
  21                 };
  22         };
  23
  24         aliases {
  25                gpio0 = &gpio0;
  26                gpio1 = &gpio1;
  27         };
  28
  29         mbus {
  30                 compatible = "marvell,kirkwood-mbus", "simple-bus";
  31                 #address-cells = <2>;
  32                 #size-cells = <1>;
  33                 /* If a board file needs to change this ranges it must replace it completely */
  34                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000     /* internal-regs */
  35                           MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000      /* nand flash */
  36                           MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000      /* crypto sram */
  37                           >;
  38                 controller = <&mbusc>;
  39                 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
  40                 pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */
  41
  42                 crypto@0301 {
  43                         compatible = "marvell,orion-crypto";
  44                         reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>,
  45                               <MBUS_ID(0x03, 0x01) 0 0x800>;
  46                         reg-names = "regs", "sram";
  47                         interrupts = <22>;
  48                         clocks = <&gate_clk 17>;
  49                         status = "okay";
  50                 };
  51
  52                 nand: nand@012f {
  53                         #address-cells = <1>;
  54                         #size-cells = <1>;
  55                         cle = <0>;
  56                         ale = <1>;
  57                         bank-width = <1>;
  58                         compatible = "marvell,orion-nand";
  59                         reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
  60                         chip-delay = <25>;
  61                         /* set partition map and/or chip-delay in board dts */
  62                         clocks = <&gate_clk 7>;
  63                         status = "disabled";
  64                 };
  65         };
  66
  67         ocp@f1000000 {
  68                 compatible = "simple-bus";
  69                 ranges = <0x00000000 0xf1000000 0x0100000>;
  70                 #address-cells = <1>;
  71                 #size-cells = <1>;
  72
  73                 core_clk: core-clocks@10030 {
  74                         compatible = "marvell,kirkwood-core-clock";
  75                         reg = <0x10030 0x4>;
  76                         #clock-cells = <1>;
  77                 };
  78
  79                 spi@10600 {
  80                         compatible = "marvell,orion-spi";
  81                         #address-cells = <1>;
  82                         #size-cells = <0>;
  83                         cell-index = <0>;
  84                         interrupts = <23>;
  85                         reg = <0x10600 0x28>;
  86                         clocks = <&gate_clk 7>;
  87                         status = "disabled";
  88                 };
  89
  90                 gpio0: gpio@10100 {
  91                         compatible = "marvell,orion-gpio";
  92                         #gpio-cells = <2>;
  93                         gpio-controller;
  94                         reg = <0x10100 0x40>;
  95                         ngpios = <32>;
  96                         interrupt-controller;
  97                         #interrupt-cells = <2>;
  98                         interrupts = <35>, <36>, <37>, <38>;
  99                         clocks = <&gate_clk 7>;
 100                 };
 101
 102                 gpio1: gpio@10140 {
 103                         compatible = "marvell,orion-gpio";
 104                         #gpio-cells = <2>;
 105                         gpio-controller;
 106                         reg = <0x10140 0x40>;
 107                         ngpios = <18>;
 108                         interrupt-controller;
 109                         #interrupt-cells = <2>;
 110                         interrupts = <39>, <40>, <41>;
 111                         clocks = <&gate_clk 7>;
 112                 };
 113
 114                 i2c@11000 {
 115                         compatible = "marvell,mv64xxx-i2c";
 116                         reg = <0x11000 0x20>;
 117                         #address-cells = <1>;
 118                         #size-cells = <0>;
 119                         interrupts = <29>;
 120                         clock-frequency = <100000>;
 121                         clocks = <&gate_clk 7>;
 122                         status = "disabled";
 123                 };
 124
 125                 serial@12000 {
 126                         compatible = "ns16550a";
 127                         reg = <0x12000 0x100>;
 128                         reg-shift = <2>;
 129                         interrupts = <33>;
 130                         clocks = <&gate_clk 7>;
 131                         status = "disabled";
 132                 };
 133
 134                 serial@12100 {
 135                         compatible = "ns16550a";
 136                         reg = <0x12100 0x100>;
 137                         reg-shift = <2>;
 138                         interrupts = <34>;
 139                         clocks = <&gate_clk 7>;
 140                         status = "disabled";
 141                 };
 142
 143                 mbusc: mbus-controller@20000 {
 144                         compatible = "marvell,mbus-controller";
 145                         reg = <0x20000 0x80>, <0x1500 0x20>;
 146                 };
 147
 148                 bridge_intc: bridge-interrupt-ctrl@20110 {
 149                         compatible = "marvell,orion-bridge-intc";
 150                         interrupt-controller;
 151                         #interrupt-cells = <1>;
 152                         reg = <0x20110 0x8>;
 153                         interrupts = <1>;
 154                         marvell,#interrupts = <6>;
 155                 };
 156
 157                 gate_clk: clock-gating-control@2011c {
 158                         compatible = "marvell,kirkwood-gating-clock";
 159                         reg = <0x2011c 0x4>;
 160                         clocks = <&core_clk 0>;
 161                         #clock-cells = <1>;
 162                 };
 163
 164                 intc: main-interrupt-ctrl@20200 {
 165                         compatible = "marvell,orion-intc";
 166                         interrupt-controller;
 167                         #interrupt-cells = <1>;
 168                         reg = <0x20200 0x10>, <0x20210 0x10>;
 169                 };
 170
 171                 timer: timer@20300 {
 172                         compatible = "marvell,orion-timer";
 173                         reg = <0x20300 0x20>;
 174                         interrupt-parent = <&bridge_intc>;
 175                         interrupts = <1>, <2>;
 176                         clocks = <&core_clk 0>;
 177                 };
 178
 179                 wdt: watchdog-timer@20300 {
 180                         compatible = "marvell,orion-wdt";
 181                         reg = <0x20300 0x28>;
 182                         interrupt-parent = <&bridge_intc>;
 183                         interrupts = <3>;
 184                         clocks = <&gate_clk 7>;
 185                         status = "okay";
 186                 };
 187
 188                 ehci@50000 {
 189                         compatible = "marvell,orion-ehci";
 190                         reg = <0x50000 0x1000>;
 191                         interrupts = <19>;
 192                         clocks = <&gate_clk 3>;
 193                         status = "okay";
 194                 };
 195
 196                 xor@60800 {
 197                         compatible = "marvell,orion-xor";
 198                         reg = <0x60800 0x100
 199                                0x60A00 0x100>;
 200                         status = "okay";
 201                         clocks = <&gate_clk 8>;
 202
 203                         xor00 {
 204                               interrupts = <5>;
 205                               dmacap,memcpy;
 206                               dmacap,xor;
 207                         };
 208                         xor01 {
 209                               interrupts = <6>;
 210                               dmacap,memcpy;
 211                               dmacap,xor;
 212                               dmacap,memset;
 213                         };
 214                 };
 215
 216                 xor@60900 {
 217                         compatible = "marvell,orion-xor";
 218                         reg = <0x60900 0x100
 219                                0x60B00 0x100>;
 220                         status = "okay";
 221                         clocks = <&gate_clk 16>;
 222
 223                         xor00 {
 224                               interrupts = <7>;
 225                               dmacap,memcpy;
 226                               dmacap,xor;
 227                         };
 228                         xor01 {
 229                               interrupts = <8>;
 230                               dmacap,memcpy;
 231                               dmacap,xor;
 232                               dmacap,memset;
 233                         };
 234                 };
 235
 236                 eth0: ethernet-controller@72000 {
 237                         compatible = "marvell,kirkwood-eth";
 238                         #address-cells = <1>;
 239                         #size-cells = <0>;
 240                         reg = <0x72000 0x4000>;
 241                         clocks = <&gate_clk 0>;
 242                         marvell,tx-checksum-limit = <1600>;
 243                         status = "disabled";
 244
 245                         ethernet0-port@0 {
 246                                 compatible = "marvell,kirkwood-eth-port";
 247                                 reg = <0>;
 248                                 interrupts = <11>;
 249                                 /* overwrite MAC address in bootloader */
 250                                 local-mac-address = [00 00 00 00 00 00];
 251                                 /* set phy-handle property in board file */
 252                         };
 253                 };
 254
 255                 mdio: mdio-bus@72004 {
 256                         compatible = "marvell,orion-mdio";
 257                         #address-cells = <1>;
 258                         #size-cells = <0>;
 259                         reg = <0x72004 0x84>;
 260                         interrupts = <46>;
 261                         clocks = <&gate_clk 0>;
 262                         status = "disabled";
 263
 264                         /* add phy nodes in board file */
 265                 };
 266
 267                 eth1: ethernet-controller@76000 {
 268                         compatible = "marvell,kirkwood-eth";
 269                         #address-cells = <1>;
 270                         #size-cells = <0>;
 271                         reg = <0x76000 0x4000>;
 272                         clocks = <&gate_clk 19>;
 273                         marvell,tx-checksum-limit = <1600>;
 274                         status = "disabled";
 275
 276                         ethernet1-port@0 {
 277                                 compatible = "marvell,kirkwood-eth-port";
 278                                 reg = <0>;
 279                                 interrupts = <15>;
 280                                 /* overwrite MAC address in bootloader */
 281                                 local-mac-address = [00 00 00 00 00 00];
 282                                 /* set phy-handle property in board file */
 283                         };
 284                 };
 285
 286                 sata_phy0: sata-phy@82000 {
 287                         compatible = "marvell,mvebu-sata-phy";
 288                         reg = <0x82000 0x0334>;
 289                         clocks = <&gate_clk 14>;
 290                         clock-names = "sata";
 291                         #phy-cells = <0>;
 292                         status = "ok";
 293                 };
 294
 295                 sata_phy1: sata-phy@84000 {
 296                         compatible = "marvell,mvebu-sata-phy";
 297                         reg = <0x84000 0x0334>;
 298                         clocks = <&gate_clk 15>;
 299                         clock-names = "sata";
 300                         #phy-cells = <0>;
 301                         status = "ok";
 302                 };
 303         };
 304 };