arch/arm/boot/dts/kirkwood.dtsi

   1 /include/ "skeleton.dtsi"
   2 #include <dt-bindings/input/input.h>
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   6
   7 / {
   8         compatible = "marvell,kirkwood";
   9         interrupt-parent = <&intc>;
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "marvell,feroceon";
  18                         reg = <0>;
  19                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  20                         clock-names = "cpu_clk", "ddrclk", "powersave";
  21                 };
  22         };
  23
  24         aliases {
  25                gpio0 = &gpio0;
  26                gpio1 = &gpio1;
  27                i2c0 = &i2c0;
  28         };
  29
  30         mbus {
  31                 compatible = "marvell,kirkwood-mbus", "simple-bus";
  32                 #address-cells = <2>;
  33                 #size-cells = <1>;
  34                 /* If a board file needs to change this ranges it must replace it completely */
  35                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000     /* internal-regs */
  36                           MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000      /* nand flash */
  37                           MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000      /* crypto sram */
  38                           >;
  39                 controller = <&mbusc>;
  40                 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
  41                 pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */
  42
  43                 crypto@0301 {
  44                         compatible = "marvell,orion-crypto";
  45                         reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>,
  46                               <MBUS_ID(0x03, 0x01) 0 0x800>;
  47                         reg-names = "regs", "sram";
  48                         interrupts = <22>;
  49                         clocks = <&gate_clk 17>;
  50                         status = "okay";
  51                 };
  52
  53                 nand: nand@012f {
  54                         #address-cells = <1>;
  55                         #size-cells = <1>;
  56                         cle = <0>;
  57                         ale = <1>;
  58                         bank-width = <1>;
  59                         compatible = "marvell,orion-nand";
  60                         reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
  61                         chip-delay = <25>;
  62                         /* set partition map and/or chip-delay in board dts */
  63                         clocks = <&gate_clk 7>;
  64                         status = "disabled";
  65                 };
  66         };
  67
  68         ocp@f1000000 {
  69                 compatible = "simple-bus";
  70                 ranges = <0x00000000 0xf1000000 0x0100000>;
  71                 #address-cells = <1>;
  72                 #size-cells = <1>;
  73
  74                 core_clk: core-clocks@10030 {
  75                         compatible = "marvell,kirkwood-core-clock";
  76                         reg = <0x10030 0x4>;
  77                         #clock-cells = <1>;
  78                 };
  79
  80                 spi@10600 {
  81                         compatible = "marvell,orion-spi";
  82                         #address-cells = <1>;
  83                         #size-cells = <0>;
  84                         cell-index = <0>;
  85                         interrupts = <23>;
  86                         reg = <0x10600 0x28>;
  87                         clocks = <&gate_clk 7>;
  88                         status = "disabled";
  89                 };
  90
  91                 gpio0: gpio@10100 {
  92                         compatible = "marvell,orion-gpio";
  93                         #gpio-cells = <2>;
  94                         gpio-controller;
  95                         reg = <0x10100 0x40>;
  96                         ngpios = <32>;
  97                         interrupt-controller;
  98                         #interrupt-cells = <2>;
  99                         interrupts = <35>, <36>, <37>, <38>;
 100                         clocks = <&gate_clk 7>;
 101                 };
 102
 103                 gpio1: gpio@10140 {
 104                         compatible = "marvell,orion-gpio";
 105                         #gpio-cells = <2>;
 106                         gpio-controller;
 107                         reg = <0x10140 0x40>;
 108                         ngpios = <18>;
 109                         interrupt-controller;
 110                         #interrupt-cells = <2>;
 111                         interrupts = <39>, <40>, <41>;
 112                         clocks = <&gate_clk 7>;
 113                 };
 114
 115                 i2c0: i2c@11000 {
 116                         compatible = "marvell,mv64xxx-i2c";
 117                         reg = <0x11000 0x20>;
 118                         #address-cells = <1>;
 119                         #size-cells = <0>;
 120                         interrupts = <29>;
 121                         clock-frequency = <100000>;
 122                         clocks = <&gate_clk 7>;
 123                         status = "disabled";
 124                 };
 125
 126                 serial@12000 {
 127                         compatible = "ns16550a";
 128                         reg = <0x12000 0x100>;
 129                         reg-shift = <2>;
 130                         interrupts = <33>;
 131                         clocks = <&gate_clk 7>;
 132                         status = "disabled";
 133                 };
 134
 135                 serial@12100 {
 136                         compatible = "ns16550a";
 137                         reg = <0x12100 0x100>;
 138                         reg-shift = <2>;
 139                         interrupts = <34>;
 140                         clocks = <&gate_clk 7>;
 141                         status = "disabled";
 142                 };
 143
 144                 mbusc: mbus-controller@20000 {
 145                         compatible = "marvell,mbus-controller";
 146                         reg = <0x20000 0x80>, <0x1500 0x20>;
 147                 };
 148
 149                 system-controller@20000 {
 150                         compatible = "marvell,orion-system-controller";
 151                         reg = <0x20000 0x120>;
 152                 };
 153
 154                 bridge_intc: bridge-interrupt-ctrl@20110 {
 155                         compatible = "marvell,orion-bridge-intc";
 156                         interrupt-controller;
 157                         #interrupt-cells = <1>;
 158                         reg = <0x20110 0x8>;
 159                         interrupts = <1>;
 160                         marvell,#interrupts = <6>;
 161                 };
 162
 163                 gate_clk: clock-gating-control@2011c {
 164                         compatible = "marvell,kirkwood-gating-clock";
 165                         reg = <0x2011c 0x4>;
 166                         clocks = <&core_clk 0>;
 167                         #clock-cells = <1>;
 168                 };
 169
 170                 l2: l2-cache@20128 {
 171                         compatible = "marvell,kirkwood-cache";
 172                         reg = <0x20128 0x4>;
 173                 };
 174
 175                 intc: main-interrupt-ctrl@20200 {
 176                         compatible = "marvell,orion-intc";
 177                         interrupt-controller;
 178                         #interrupt-cells = <1>;
 179                         reg = <0x20200 0x10>, <0x20210 0x10>;
 180                 };
 181
 182                 timer: timer@20300 {
 183                         compatible = "marvell,orion-timer";
 184                         reg = <0x20300 0x20>;
 185                         interrupt-parent = <&bridge_intc>;
 186                         interrupts = <1>, <2>;
 187                         clocks = <&core_clk 0>;
 188                 };
 189
 190                 wdt: watchdog-timer@20300 {
 191                         compatible = "marvell,orion-wdt";
 192                         reg = <0x20300 0x28>, <0x20108 0x4>;
 193                         interrupt-parent = <&bridge_intc>;
 194                         interrupts = <3>;
 195                         clocks = <&gate_clk 7>;
 196                         status = "okay";
 197                 };
 198
 199                 ehci@50000 {
 200                         compatible = "marvell,orion-ehci";
 201                         reg = <0x50000 0x1000>;
 202                         interrupts = <19>;
 203                         clocks = <&gate_clk 3>;
 204                         status = "okay";
 205                 };
 206
 207                 xor@60800 {
 208                         compatible = "marvell,orion-xor";
 209                         reg = <0x60800 0x100
 210                                0x60A00 0x100>;
 211                         status = "okay";
 212                         clocks = <&gate_clk 8>;
 213
 214                         xor00 {
 215                               interrupts = <5>;
 216                               dmacap,memcpy;
 217                               dmacap,xor;
 218                         };
 219                         xor01 {
 220                               interrupts = <6>;
 221                               dmacap,memcpy;
 222                               dmacap,xor;
 223                               dmacap,memset;
 224                         };
 225                 };
 226
 227                 xor@60900 {
 228                         compatible = "marvell,orion-xor";
 229                         reg = <0x60900 0x100
 230                                0x60B00 0x100>;
 231                         status = "okay";
 232                         clocks = <&gate_clk 16>;
 233
 234                         xor00 {
 235                               interrupts = <7>;
 236                               dmacap,memcpy;
 237                               dmacap,xor;
 238                         };
 239                         xor01 {
 240                               interrupts = <8>;
 241                               dmacap,memcpy;
 242                               dmacap,xor;
 243                               dmacap,memset;
 244                         };
 245                 };
 246
 247                 eth0: ethernet-controller@72000 {
 248                         compatible = "marvell,kirkwood-eth";
 249                         #address-cells = <1>;
 250                         #size-cells = <0>;
 251                         reg = <0x72000 0x4000>;
 252                         clocks = <&gate_clk 0>;
 253                         marvell,tx-checksum-limit = <1600>;
 254                         status = "disabled";
 255
 256                         ethernet0-port@0 {
 257                                 compatible = "marvell,kirkwood-eth-port";
 258                                 reg = <0>;
 259                                 interrupts = <11>;
 260                                 /* overwrite MAC address in bootloader */
 261                                 local-mac-address = [00 00 00 00 00 00];
 262                                 /* set phy-handle property in board file */
 263                         };
 264                 };
 265
 266                 mdio: mdio-bus@72004 {
 267                         compatible = "marvell,orion-mdio";
 268                         #address-cells = <1>;
 269                         #size-cells = <0>;
 270                         reg = <0x72004 0x84>;
 271                         interrupts = <46>;
 272                         clocks = <&gate_clk 0>;
 273                         status = "disabled";
 274
 275                         /* add phy nodes in board file */
 276                 };
 277
 278                 eth1: ethernet-controller@76000 {
 279                         compatible = "marvell,kirkwood-eth";
 280                         #address-cells = <1>;
 281                         #size-cells = <0>;
 282                         reg = <0x76000 0x4000>;
 283                         clocks = <&gate_clk 19>;
 284                         marvell,tx-checksum-limit = <1600>;
 285                         status = "disabled";
 286
 287                         ethernet1-port@0 {
 288                                 compatible = "marvell,kirkwood-eth-port";
 289                                 reg = <0>;
 290                                 interrupts = <15>;
 291                                 /* overwrite MAC address in bootloader */
 292                                 local-mac-address = [00 00 00 00 00 00];
 293                                 /* set phy-handle property in board file */
 294                         };
 295                 };
 296
 297                 sata_phy0: sata-phy@82000 {
 298                         compatible = "marvell,mvebu-sata-phy";
 299                         reg = <0x82000 0x0334>;
 300                         clocks = <&gate_clk 14>;
 301                         clock-names = "sata";
 302                         #phy-cells = <0>;
 303                         status = "ok";
 304                 };
 305
 306                 sata_phy1: sata-phy@84000 {
 307                         compatible = "marvell,mvebu-sata-phy";
 308                         reg = <0x84000 0x0334>;
 309                         clocks = <&gate_clk 15>;
 310                         clock-names = "sata";
 311                         #phy-cells = <0>;
 312                         status = "ok";
 313                 };
 314
 315                 audio0: audio-controller@a0000 {
 316                         compatible = "marvell,kirkwood-audio";
 317                         reg = <0xa0000 0x2210>;
 318                         interrupts = <24>;
 319                         clocks = <&gate_clk 9>;
 320                         clock-names = "internal";
 321                         status = "disabled";
 322                 };
 323         };
 324 };