arch/arm/boot/dts/kirkwood.dtsi

   1 /include/ "skeleton.dtsi"
   2 #include <dt-bindings/input/input.h>
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   6
   7 / {
   8         compatible = "marvell,kirkwood";
   9         interrupt-parent = <&intc>;
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "marvell,feroceon";
  18                         reg = <0>;
  19                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  20                         clock-names = "cpu_clk", "ddrclk", "powersave";
  21                 };
  22         };
  23
  24         aliases {
  25                gpio0 = &gpio0;
  26                gpio1 = &gpio1;
  27                i2c0 = &i2c0;
  28         };
  29
  30         mbus {
  31                 compatible = "marvell,kirkwood-mbus", "simple-bus";
  32                 #address-cells = <2>;
  33                 #size-cells = <1>;
  34                 /* If a board file needs to change this ranges it must replace it completely */
  35                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000     /* internal-regs */
  36                           MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000      /* nand flash */
  37                           MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000      /* crypto sram */
  38                           >;
  39                 controller = <&mbusc>;
  40                 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
  41                 pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */
  42
  43                 cesa: crypto@0301 {
  44                         compatible = "marvell,orion-crypto";
  45                         reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>,
  46                               <MBUS_ID(0x03, 0x01) 0 0x800>;
  47                         reg-names = "regs", "sram";
  48                         interrupts = <22>;
  49                         clocks = <&gate_clk 17>;
  50                         status = "okay";
  51                 };
  52
  53                 nand: nand@012f {
  54                         #address-cells = <1>;
  55                         #size-cells = <1>;
  56                         cle = <0>;
  57                         ale = <1>;
  58                         bank-width = <1>;
  59                         compatible = "marvell,orion-nand";
  60                         reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
  61                         chip-delay = <25>;
  62                         /* set partition map and/or chip-delay in board dts */
  63                         clocks = <&gate_clk 7>;
  64                         pinctrl-0 = <&pmx_nand>;
  65                         pinctrl-names = "default";
  66                         status = "disabled";
  67                 };
  68         };
  69
  70         ocp@f1000000 {
  71                 compatible = "simple-bus";
  72                 ranges = <0x00000000 0xf1000000 0x0100000>;
  73                 #address-cells = <1>;
  74                 #size-cells = <1>;
  75
  76                 pinctrl: pin-controller@10000 {
  77                         /* set compatible property in SoC file */
  78                         reg = <0x10000 0x20>;
  79
  80                         pmx_ge1: pmx-ge1 {
  81                                 marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
  82                                                "mpp24", "mpp25", "mpp26", "mpp27",
  83                                                "mpp30", "mpp31", "mpp32", "mpp33";
  84                                 marvell,function = "ge1";
  85                         };
  86
  87                         pmx_nand: pmx-nand {
  88                                 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
  89                                                "mpp4", "mpp5", "mpp18", "mpp19";
  90                                 marvell,function = "nand";
  91                         };
  92
  93                         /*
  94                          * Default SPI0 pinctrl setting with CSn on mpp0,
  95                          * overwrite marvell,pins on board level if required.
  96                          */
  97                         pmx_spi: pmx-spi {
  98                                 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
  99                                 marvell,function = "spi";
 100                         };
 101
 102                         pmx_twsi0: pmx-twsi0 {
 103                                 marvell,pins = "mpp8", "mpp9";
 104                                 marvell,function = "twsi0";
 105                         };
 106
 107                         /*
 108                          * Default UART pinctrl setting without RTS/CTS,
 109                          * overwrite marvell,pins on board level if required.
 110                          */
 111                         pmx_uart0: pmx-uart0 {
 112                                 marvell,pins = "mpp10", "mpp11";
 113                                 marvell,function = "uart0";
 114                         };
 115
 116                         pmx_uart1: pmx-uart1 {
 117                                 marvell,pins = "mpp13", "mpp14";
 118                                 marvell,function = "uart1";
 119                         };
 120                 };
 121
 122                 core_clk: core-clocks@10030 {
 123                         compatible = "marvell,kirkwood-core-clock";
 124                         reg = <0x10030 0x4>;
 125                         #clock-cells = <1>;
 126                 };
 127
 128                 spi0: spi@10600 {
 129                         compatible = "marvell,orion-spi";
 130                         #address-cells = <1>;
 131                         #size-cells = <0>;
 132                         cell-index = <0>;
 133                         interrupts = <23>;
 134                         reg = <0x10600 0x28>;
 135                         clocks = <&gate_clk 7>;
 136                         pinctrl-0 = <&pmx_spi>;
 137                         pinctrl-names = "default";
 138                         status = "disabled";
 139                 };
 140
 141                 gpio0: gpio@10100 {
 142                         compatible = "marvell,orion-gpio";
 143                         #gpio-cells = <2>;
 144                         gpio-controller;
 145                         reg = <0x10100 0x40>;
 146                         ngpios = <32>;
 147                         interrupt-controller;
 148                         #interrupt-cells = <2>;
 149                         interrupts = <35>, <36>, <37>, <38>;
 150                         clocks = <&gate_clk 7>;
 151                 };
 152
 153                 gpio1: gpio@10140 {
 154                         compatible = "marvell,orion-gpio";
 155                         #gpio-cells = <2>;
 156                         gpio-controller;
 157                         reg = <0x10140 0x40>;
 158                         ngpios = <18>;
 159                         interrupt-controller;
 160                         #interrupt-cells = <2>;
 161                         interrupts = <39>, <40>, <41>;
 162                         clocks = <&gate_clk 7>;
 163                 };
 164
 165                 i2c0: i2c@11000 {
 166                         compatible = "marvell,mv64xxx-i2c";
 167                         reg = <0x11000 0x20>;
 168                         #address-cells = <1>;
 169                         #size-cells = <0>;
 170                         interrupts = <29>;
 171                         clock-frequency = <100000>;
 172                         clocks = <&gate_clk 7>;
 173                         pinctrl-0 = <&pmx_twsi0>;
 174                         pinctrl-names = "default";
 175                         status = "disabled";
 176                 };
 177
 178                 uart0: serial@12000 {
 179                         compatible = "ns16550a";
 180                         reg = <0x12000 0x100>;
 181                         reg-shift = <2>;
 182                         interrupts = <33>;
 183                         clocks = <&gate_clk 7>;
 184                         pinctrl-0 = <&pmx_uart0>;
 185                         pinctrl-names = "default";
 186                         status = "disabled";
 187                 };
 188
 189                 uart1: serial@12100 {
 190                         compatible = "ns16550a";
 191                         reg = <0x12100 0x100>;
 192                         reg-shift = <2>;
 193                         interrupts = <34>;
 194                         clocks = <&gate_clk 7>;
 195                         pinctrl-0 = <&pmx_uart1>;
 196                         pinctrl-names = "default";
 197                         status = "disabled";
 198                 };
 199
 200                 mbusc: mbus-controller@20000 {
 201                         compatible = "marvell,mbus-controller";
 202                         reg = <0x20000 0x80>, <0x1500 0x20>;
 203                 };
 204
 205                 sysc: system-controller@20000 {
 206                         compatible = "marvell,orion-system-controller";
 207                         reg = <0x20000 0x120>;
 208                 };
 209
 210                 bridge_intc: bridge-interrupt-ctrl@20110 {
 211                         compatible = "marvell,orion-bridge-intc";
 212                         interrupt-controller;
 213                         #interrupt-cells = <1>;
 214                         reg = <0x20110 0x8>;
 215                         interrupts = <1>;
 216                         marvell,#interrupts = <6>;
 217                 };
 218
 219                 gate_clk: clock-gating-control@2011c {
 220                         compatible = "marvell,kirkwood-gating-clock";
 221                         reg = <0x2011c 0x4>;
 222                         clocks = <&core_clk 0>;
 223                         #clock-cells = <1>;
 224                 };
 225
 226                 l2: l2-cache@20128 {
 227                         compatible = "marvell,kirkwood-cache";
 228                         reg = <0x20128 0x4>;
 229                 };
 230
 231                 intc: main-interrupt-ctrl@20200 {
 232                         compatible = "marvell,orion-intc";
 233                         interrupt-controller;
 234                         #interrupt-cells = <1>;
 235                         reg = <0x20200 0x10>, <0x20210 0x10>;
 236                 };
 237
 238                 timer: timer@20300 {
 239                         compatible = "marvell,orion-timer";
 240                         reg = <0x20300 0x20>;
 241                         interrupt-parent = <&bridge_intc>;
 242                         interrupts = <1>, <2>;
 243                         clocks = <&core_clk 0>;
 244                 };
 245
 246                 wdt: watchdog-timer@20300 {
 247                         compatible = "marvell,orion-wdt";
 248                         reg = <0x20300 0x28>, <0x20108 0x4>;
 249                         interrupt-parent = <&bridge_intc>;
 250                         interrupts = <3>;
 251                         clocks = <&gate_clk 7>;
 252                         status = "okay";
 253                 };
 254
 255                 usb0: ehci@50000 {
 256                         compatible = "marvell,orion-ehci";
 257                         reg = <0x50000 0x1000>;
 258                         interrupts = <19>;
 259                         clocks = <&gate_clk 3>;
 260                         status = "okay";
 261                 };
 262
 263                 dma0: xor@60800 {
 264                         compatible = "marvell,orion-xor";
 265                         reg = <0x60800 0x100
 266                                0x60A00 0x100>;
 267                         status = "okay";
 268                         clocks = <&gate_clk 8>;
 269
 270                         xor00 {
 271                               interrupts = <5>;
 272                               dmacap,memcpy;
 273                               dmacap,xor;
 274                         };
 275                         xor01 {
 276                               interrupts = <6>;
 277                               dmacap,memcpy;
 278                               dmacap,xor;
 279                               dmacap,memset;
 280                         };
 281                 };
 282
 283                 dma1: xor@60900 {
 284                         compatible = "marvell,orion-xor";
 285                         reg = <0x60900 0x100
 286                                0x60B00 0x100>;
 287                         status = "okay";
 288                         clocks = <&gate_clk 16>;
 289
 290                         xor00 {
 291                               interrupts = <7>;
 292                               dmacap,memcpy;
 293                               dmacap,xor;
 294                         };
 295                         xor01 {
 296                               interrupts = <8>;
 297                               dmacap,memcpy;
 298                               dmacap,xor;
 299                               dmacap,memset;
 300                         };
 301                 };
 302
 303                 eth0: ethernet-controller@72000 {
 304                         compatible = "marvell,kirkwood-eth";
 305                         #address-cells = <1>;
 306                         #size-cells = <0>;
 307                         reg = <0x72000 0x4000>;
 308                         clocks = <&gate_clk 0>;
 309                         marvell,tx-checksum-limit = <1600>;
 310                         status = "disabled";
 311
 312                         eth0port: ethernet0-port@0 {
 313                                 compatible = "marvell,kirkwood-eth-port";
 314                                 reg = <0>;
 315                                 interrupts = <11>;
 316                                 /* overwrite MAC address in bootloader */
 317                                 local-mac-address = [00 00 00 00 00 00];
 318                                 /* set phy-handle property in board file */
 319                         };
 320                 };
 321
 322                 mdio: mdio-bus@72004 {
 323                         compatible = "marvell,orion-mdio";
 324                         #address-cells = <1>;
 325                         #size-cells = <0>;
 326                         reg = <0x72004 0x84>;
 327                         interrupts = <46>;
 328                         clocks = <&gate_clk 0>;
 329                         status = "disabled";
 330
 331                         /* add phy nodes in board file */
 332                 };
 333
 334                 eth1: ethernet-controller@76000 {
 335                         compatible = "marvell,kirkwood-eth";
 336                         #address-cells = <1>;
 337                         #size-cells = <0>;
 338                         reg = <0x76000 0x4000>;
 339                         clocks = <&gate_clk 19>;
 340                         marvell,tx-checksum-limit = <1600>;
 341                         pinctrl-0 = <&pmx_ge1>;
 342                         pinctrl-names = "default";
 343                         status = "disabled";
 344
 345                         eth1port: ethernet1-port@0 {
 346                                 compatible = "marvell,kirkwood-eth-port";
 347                                 reg = <0>;
 348                                 interrupts = <15>;
 349                                 /* overwrite MAC address in bootloader */
 350                                 local-mac-address = [00 00 00 00 00 00];
 351                                 /* set phy-handle property in board file */
 352                         };
 353                 };
 354
 355                 sata_phy0: sata-phy@82000 {
 356                         compatible = "marvell,mvebu-sata-phy";
 357                         reg = <0x82000 0x0334>;
 358                         clocks = <&gate_clk 14>;
 359                         clock-names = "sata";
 360                         #phy-cells = <0>;
 361                         status = "ok";
 362                 };
 363
 364                 sata_phy1: sata-phy@84000 {
 365                         compatible = "marvell,mvebu-sata-phy";
 366                         reg = <0x84000 0x0334>;
 367                         clocks = <&gate_clk 15>;
 368                         clock-names = "sata";
 369                         #phy-cells = <0>;
 370                         status = "ok";
 371                 };
 372
 373                 audio0: audio-controller@a0000 {
 374                         compatible = "marvell,kirkwood-audio";
 375                         #sound-dai-cells = <0>;
 376                         reg = <0xa0000 0x2210>;
 377                         interrupts = <24>;
 378                         clocks = <&gate_clk 9>;
 379                         clock-names = "internal";
 380                         status = "disabled";
 381                 };
 382         };
 383 };