arch/arm/boot/dts/keystone-k2g.dtsi

   1 /*
   2  * Device Tree Source for K2G SOC
   3  *
   4  * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11  * kind, whether express or implied; without even the implied warranty
  12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <dt-bindings/interrupt-controller/arm-gic.h>
  17 #include <dt-bindings/pinctrl/keystone.h>
  18 #include <dt-bindings/gpio/gpio.h>
  19
  20 / {
  21         compatible = "ti,k2g","ti,keystone";
  22         model = "Texas Instruments K2G SoC";
  23         #address-cells = <2>;
  24         #size-cells = <2>;
  25         interrupt-parent = <&gic>;
  26
  27         chosen { };
  28
  29         aliases {
  30                 serial0 = &uart0;
  31                 rproc0 = &dsp0;
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 cpu@0 {
  39                         compatible = "arm,cortex-a15";
  40                         device_type = "cpu";
  41                         reg = <0>;
  42                 };
  43         };
  44
  45         gic: interrupt-controller@02561000 {
  46                 compatible = "arm,gic-400", "arm,cortex-a15-gic";
  47                 #interrupt-cells = <3>;
  48                 interrupt-controller;
  49                 reg = <0x0 0x02561000 0x0 0x1000>,
  50                       <0x0 0x02562000 0x0 0x2000>,
  51                       <0x0 0x02564000 0x0 0x2000>,
  52                       <0x0 0x02566000 0x0 0x2000>;
  53                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  54                                 IRQ_TYPE_LEVEL_HIGH)>;
  55         };
  56
  57         timer {
  58                 compatible = "arm,armv7-timer";
  59                 interrupts =
  60                         <GIC_PPI 13
  61                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  62                         <GIC_PPI 14
  63                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  64                         <GIC_PPI 11
  65                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  66                         <GIC_PPI 10
  67                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  68         };
  69
  70         pmu {
  71                 compatible = "arm,cortex-a15-pmu";
  72                 interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
  73         };
  74
  75         soc {
  76                 #address-cells = <1>;
  77                 #size-cells = <1>;
  78                 #pinctrl-cells = <1>;
  79                 compatible = "ti,keystone","simple-bus";
  80                 ranges = <0x0 0x0 0x0 0xc0000000>;
  81                 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
  82
  83                 msm_ram: msmram@0c000000 {
  84                         compatible = "mmio-sram";
  85                         reg = <0x0c000000 0x100000>;
  86                         ranges = <0x0 0x0c000000 0x100000>;
  87                         #address-cells = <1>;
  88                         #size-cells = <1>;
  89
  90                         sram-bm@f7000 {
  91                                 reg = <0x000f7000 0x8000>;
  92                         };
  93                 };
  94
  95                 k2g_pinctrl: pinmux@02621000 {
  96                         compatible = "pinctrl-single";
  97                         reg = <0x02621000 0x410>;
  98                         pinctrl-single,register-width = <32>;
  99                         pinctrl-single,function-mask = <0x001b0007>;
 100                 };
 101
 102                 devctrl: device-state-control@02620000 {
 103                         compatible = "ti,keystone-devctrl", "syscon";
 104                         reg = <0x02620000 0x1000>;
 105                 };
 106
 107                 uart0: serial@02530c00 {
 108                         compatible = "ti,da830-uart", "ns16550a";
 109                         current-speed = <115200>;
 110                         reg-shift = <2>;
 111                         reg-io-width = <4>;
 112                         reg = <0x02530c00 0x100>;
 113                         interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
 114                         clock-frequency = <200000000>;
 115                         status = "disabled";
 116                 };
 117
 118                 dcan0: can@0260B200 {
 119                         compatible = "ti,am4372-d_can", "ti,am3352-d_can";
 120                         reg = <0x0260B200 0x200>;
 121                         interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
 122                         status = "disabled";
 123                         power-domains = <&k2g_pds 0x0008>;
 124                         clocks = <&k2g_clks 0x0008 1>;
 125                 };
 126
 127                 dcan1: can@0260B400 {
 128                         compatible = "ti,am4372-d_can", "ti,am3352-d_can";
 129                         reg = <0x0260B400 0x200>;
 130                         interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
 131                         status = "disabled";
 132                         power-domains = <&k2g_pds 0x0009>;
 133                         clocks = <&k2g_clks 0x0009 1>;
 134                 };
 135
 136                 kirq0: keystone_irq@026202a0 {
 137                         compatible = "ti,keystone-irq";
 138                         interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
 139                         interrupt-controller;
 140                         #interrupt-cells = <1>;
 141                         ti,syscon-dev = <&devctrl 0x2a0>;
 142                 };
 143
 144                 dspgpio0: keystone_dsp_gpio@02620240 {
 145                         compatible = "ti,keystone-dsp-gpio";
 146                         gpio-controller;
 147                         #gpio-cells = <2>;
 148                         gpio,syscon-dev = <&devctrl 0x240>;
 149                 };
 150
 151                 dsp0: dsp@10800000 {
 152                         compatible = "ti,k2g-dsp";
 153                         reg = <0x10800000 0x00100000>,
 154                               <0x10e00000 0x00008000>,
 155                               <0x10f00000 0x00008000>;
 156                         reg-names = "l2sram", "l1pram", "l1dram";
 157                         power-domains = <&k2g_pds 0x0046>;
 158                         ti,syscon-dev = <&devctrl 0x844>;
 159                         resets = <&k2g_reset 0x0046 0x1>;
 160                         interrupt-parent = <&kirq0>;
 161                         interrupts = <0 8>;
 162                         interrupt-names = "vring", "exception";
 163                         kick-gpios = <&dspgpio0 27 0>;
 164                         status = "disabled";
 165                 };
 166
 167                 msgmgr: msgmgr@02a00000 {
 168                         compatible = "ti,k2g-message-manager";
 169                         #mbox-cells = <2>;
 170                         reg-names = "queue_proxy_region",
 171                                     "queue_state_debug_region";
 172                         reg = <0x02a00000 0x400000>, <0x028c3400 0x400>;
 173                         interrupt-names = "rx_005",
 174                                           "rx_057";
 175                         interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
 176                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
 177                 };
 178
 179                 pmmc: pmmc@02921c00 {
 180                         compatible = "ti,k2g-sci";
 181                         /*
 182                          * In case of rare platforms that does not use k2g as
 183                          * system master, use /delete-property/
 184                          */
 185                         ti,system-reboot-controller;
 186                         mbox-names = "rx", "tx";
 187                         mboxes= <&msgmgr 5 2>,
 188                                 <&msgmgr 0 0>;
 189                         reg-names = "debug_messages";
 190                         reg = <0x02921c00 0x400>;
 191
 192                         k2g_pds: power-controller {
 193                                 compatible = "ti,sci-pm-domain";
 194                                 #power-domain-cells = <1>;
 195                         };
 196
 197                         k2g_clks: clocks {
 198                                 compatible = "ti,k2g-sci-clk";
 199                                 #clock-cells = <2>;
 200                         };
 201
 202                         k2g_reset: reset-controller {
 203                                 compatible = "ti,sci-reset";
 204                                 #reset-cells = <2>;
 205                         };
 206                 };
 207
 208                 gpio0: gpio@2603000 {
 209                         compatible = "ti,k2g-gpio", "ti,keystone-gpio";
 210                         reg = <0x02603000 0x100>;
 211                         gpio-controller;
 212                         #gpio-cells = <2>;
 213
 214                         interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
 215                                         <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
 216                                         <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
 217                                         <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
 218                                         <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
 219                                         <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
 220                                         <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
 221                                         <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
 222                                         <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
 223                         interrupt-controller;
 224                         #interrupt-cells = <2>;
 225                         ti,ngpio = <144>;
 226                         ti,davinci-gpio-unbanked = <0>;
 227                         clocks = <&k2g_clks 0x001b 0x0>;
 228                         clock-names = "gpio";
 229                 };
 230
 231                 gpio1: gpio@260a000 {
 232                         compatible = "ti,k2g-gpio", "ti,keystone-gpio";
 233                         reg = <0x0260a000 0x100>;
 234                         gpio-controller;
 235                         #gpio-cells = <2>;
 236                         interrupts = <GIC_SPI 442 IRQ_TYPE_EDGE_RISING>,
 237                                         <GIC_SPI 443 IRQ_TYPE_EDGE_RISING>,
 238                                         <GIC_SPI 444 IRQ_TYPE_EDGE_RISING>,
 239                                         <GIC_SPI 445 IRQ_TYPE_EDGE_RISING>,
 240                                         <GIC_SPI 446 IRQ_TYPE_EDGE_RISING>;
 241                         interrupt-controller;
 242                         #interrupt-cells = <2>;
 243                         ti,ngpio = <68>;
 244                         ti,davinci-gpio-unbanked = <0>;
 245                         clocks = <&k2g_clks 0x001c 0x0>;
 246                         clock-names = "gpio";
 247                 };
 248
 249                 edma0: edma@02700000 {
 250                         compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
 251                         reg =   <0x02700000 0x8000>;
 252                         reg-names = "edma3_cc";
 253                         interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
 254                                         <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>,
 255                                         <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
 256                         interrupt-names = "edma3_ccint", "emda3_mperr",
 257                                           "edma3_ccerrint";
 258                         dma-requests = <64>;
 259                         #dma-cells = <2>;
 260
 261                         ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
 262
 263                         ti,edma-memcpy-channels = <32 33 34 35>;
 264
 265                         power-domains = <&k2g_pds 0x3f>;
 266                 };
 267
 268                 edma0_tptc0: tptc@02760000 {
 269                         compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
 270                         reg =   <0x02760000 0x400>;
 271                         power-domains = <&k2g_pds 0x3f>;
 272                 };
 273
 274                 edma0_tptc1: tptc@02768000 {
 275                         compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
 276                         reg =   <0x02768000 0x400>;
 277                         power-domains = <&k2g_pds 0x3f>;
 278                 };
 279
 280                 edma1: edma@02728000 {
 281                         compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
 282                         reg =   <0x02728000 0x8000>;
 283                         reg-names = "edma3_cc";
 284                         interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
 285                                         <GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
 286                                         <GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
 287                         interrupt-names = "edma3_ccint", "emda3_mperr",
 288                                           "edma3_ccerrint";
 289                         dma-requests = <64>;
 290                         #dma-cells = <2>;
 291
 292                         ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
 293
 294                         /*
 295                          * memcpy is disabled, can be enabled with:
 296                          * ti,edma-memcpy-channels = <12 13 14 15>;
 297                          * for example.
 298                          */
 299
 300                         power-domains = <&k2g_pds 0x4f>;
 301                 };
 302
 303                 edma1_tptc0: tptc@027b0000 {
 304                         compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
 305                         reg =   <0x027b0000 0x400>;
 306                         power-domains = <&k2g_pds 0x4f>;
 307                 };
 308
 309                 edma1_tptc1: tptc@027b8000 {
 310                         compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
 311                         reg =   <0x027b8000 0x400>;
 312                         power-domains = <&k2g_pds 0x4f>;
 313                 };
 314
 315                 mmc0: mmc@23000000 {
 316                         compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
 317                         reg = <0x23000000 0x400>;
 318                         interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
 319                         dmas = <&edma1 24 0>, <&edma1 25 0>;
 320                         dma-names = "tx", "rx";
 321                         bus-width = <4>;
 322                         ti,needs-special-reset;
 323                         no-1-8-v;
 324                         max-frequency = <96000000>;
 325                         power-domains = <&k2g_pds 0xb>;
 326                         clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
 327                         clock-names = "fck", "mmchsdb_fck";
 328                         status = "disabled";
 329                 };
 330
 331                 mmc1: mmc@23100000 {
 332                         compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
 333                         reg = <0x23100000 0x400>;
 334                         interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
 335                         dmas = <&edma1 26 0>, <&edma1 27 0>;
 336                         dma-names = "tx", "rx";
 337                         bus-width = <8>;
 338                         ti,needs-special-reset;
 339                         ti,non-removable;
 340                         max-frequency = <96000000>;
 341                         power-domains = <&k2g_pds 0xc>;
 342                         clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>;
 343                         clock-names = "fck", "mmchsdb_fck";
 344                         status = "disabled";
 345                 };
 346         };
 347 };