arch/arm/boot/dts/imx7s.dtsi

   1 /*
   2  * Copyright 2015 Freescale Semiconductor, Inc.
   3  * Copyright 2016 Toradex AG
   4  *
   5  * This file is dual-licensed: you can use it either under the terms
   6  * of the GPL or the X11 license, at your option. Note that this dual
   7  * licensing only applies to this file, and not this project as a
   8  * whole.
   9  *
  10  *  a) This file is free software; you can redistribute it and/or
  11  *     modify it under the terms of the GNU General Public License as
  12  *     published by the Free Software Foundation; either version 2 of the
  13  *     License, or (at your option) any later version.
  14  *
  15  *     This file is distributed in the hope that it will be useful,
  16  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *     GNU General Public License for more details.
  19  *
  20  * Or, alternatively,
  21  *
  22  *  b) Permission is hereby granted, free of charge, to any person
  23  *     obtaining a copy of this software and associated documentation
  24  *     files (the "Software"), to deal in the Software without
  25  *     restriction, including without limitation the rights to use,
  26  *     copy, modify, merge, publish, distribute, sublicense, and/or
  27  *     sell copies of the Software, and to permit persons to whom the
  28  *     Software is furnished to do so, subject to the following
  29  *     conditions:
  30  *
  31  *     The above copyright notice and this permission notice shall be
  32  *     included in all copies or substantial portions of the Software.
  33  *
  34  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  35  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  36  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  37  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  38  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  39  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  40  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  41  *     OTHER DEALINGS IN THE SOFTWARE.
  42  */
  43
  44 #include <dt-bindings/clock/imx7d-clock.h>
  45 #include <dt-bindings/gpio/gpio.h>
  46 #include <dt-bindings/input/input.h>
  47 #include <dt-bindings/interrupt-controller/arm-gic.h>
  48 #include "imx7d-pinfunc.h"
  49
  50 / {
  51         #address-cells = <1>;
  52         #size-cells = <1>;
  53         /*
  54          * The decompressor and also some bootloaders rely on a
  55          * pre-existing /chosen node to be available to insert the
  56          * command line and merge other ATAGS info.
  57          * Also for U-Boot there must be a pre-existing /memory node.
  58          */
  59         chosen {};
  60         memory { device_type = "memory"; reg = <0 0>; };
  61
  62         aliases {
  63                 gpio0 = &gpio1;
  64                 gpio1 = &gpio2;
  65                 gpio2 = &gpio3;
  66                 gpio3 = &gpio4;
  67                 gpio4 = &gpio5;
  68                 gpio5 = &gpio6;
  69                 gpio6 = &gpio7;
  70                 i2c0 = &i2c1;
  71                 i2c1 = &i2c2;
  72                 i2c2 = &i2c3;
  73                 i2c3 = &i2c4;
  74                 mmc0 = &usdhc1;
  75                 mmc1 = &usdhc2;
  76                 mmc2 = &usdhc3;
  77                 serial0 = &uart1;
  78                 serial1 = &uart2;
  79                 serial2 = &uart3;
  80                 serial3 = &uart4;
  81                 serial4 = &uart5;
  82                 serial5 = &uart6;
  83                 serial6 = &uart7;
  84                 spi0 = &ecspi1;
  85                 spi1 = &ecspi2;
  86                 spi2 = &ecspi3;
  87                 spi3 = &ecspi4;
  88         };
  89
  90         cpus {
  91                 #address-cells = <1>;
  92                 #size-cells = <0>;
  93
  94                 cpu0: cpu@0 {
  95                         compatible = "arm,cortex-a7";
  96                         device_type = "cpu";
  97                         reg = <0>;
  98                         clock-frequency = <792000000>;
  99                         clock-latency = <61036>; /* two CLK32 periods */
 100                         clocks = <&clks IMX7D_CLK_ARM>;
 101                 };
 102         };
 103
 104         ckil: clock-cki {
 105                 compatible = "fixed-clock";
 106                 #clock-cells = <0>;
 107                 clock-frequency = <32768>;
 108                 clock-output-names = "ckil";
 109         };
 110
 111         osc: clock-osc {
 112                 compatible = "fixed-clock";
 113                 #clock-cells = <0>;
 114                 clock-frequency = <24000000>;
 115                 clock-output-names = "osc";
 116         };
 117
 118         soc {
 119                 #address-cells = <1>;
 120                 #size-cells = <1>;
 121                 compatible = "simple-bus";
 122                 interrupt-parent = <&intc>;
 123                 ranges;
 124
 125                 funnel@30041000 {
 126                         compatible = "arm,coresight-funnel", "arm,primecell";
 127                         reg = <0x30041000 0x1000>;
 128                         clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 129                         clock-names = "apb_pclk";
 130
 131                         ca_funnel_ports: ports {
 132                                 #address-cells = <1>;
 133                                 #size-cells = <0>;
 134
 135                                 /* funnel input ports */
 136                                 port@0 {
 137                                         reg = <0>;
 138                                         ca_funnel_in_port0: endpoint {
 139                                                 slave-mode;
 140                                                 remote-endpoint = <&etm0_out_port>;
 141                                         };
 142                                 };
 143
 144                                 /* funnel output port */
 145                                 port@2 {
 146                                         reg = <0>;
 147                                         ca_funnel_out_port0: endpoint {
 148                                                 remote-endpoint = <&hugo_funnel_in_port0>;
 149                                         };
 150                                 };
 151
 152                                 /* the other input ports are not connect to anything */
 153                         };
 154                 };
 155
 156                 etm@3007c000 {
 157                         compatible = "arm,coresight-etm3x", "arm,primecell";
 158                         reg = <0x3007c000 0x1000>;
 159                         cpu = <&cpu0>;
 160                         clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 161                         clock-names = "apb_pclk";
 162
 163                         port {
 164                                 etm0_out_port: endpoint {
 165                                         remote-endpoint = <&ca_funnel_in_port0>;
 166                                 };
 167                         };
 168                 };
 169
 170                 funnel@30083000 {
 171                         compatible = "arm,coresight-funnel", "arm,primecell";
 172                         reg = <0x30083000 0x1000>;
 173                         clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 174                         clock-names = "apb_pclk";
 175
 176                         ports {
 177                                 #address-cells = <1>;
 178                                 #size-cells = <0>;
 179
 180                                 /* funnel input ports */
 181                                 port@0 {
 182                                         reg = <0>;
 183                                         hugo_funnel_in_port0: endpoint {
 184                                                 slave-mode;
 185                                                 remote-endpoint = <&ca_funnel_out_port0>;
 186                                         };
 187                                 };
 188
 189                                 port@1 {
 190                                         reg = <1>;
 191                                         hugo_funnel_in_port1: endpoint {
 192                                                 slave-mode; /* M4 input */
 193                                         };
 194                                 };
 195
 196                                 port@2 {
 197                                         reg = <0>;
 198                                         hugo_funnel_out_port0: endpoint {
 199                                                 remote-endpoint = <&etf_in_port>;
 200                                         };
 201                                 };
 202
 203                                 /* the other input ports are not connect to anything */
 204                         };
 205                 };
 206
 207                 etf@30084000 {
 208                         compatible = "arm,coresight-tmc", "arm,primecell";
 209                         reg = <0x30084000 0x1000>;
 210                         clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 211                         clock-names = "apb_pclk";
 212
 213                         ports {
 214                                 #address-cells = <1>;
 215                                 #size-cells = <0>;
 216
 217                                 port@0 {
 218                                         reg = <0>;
 219                                         etf_in_port: endpoint {
 220                                                 slave-mode;
 221                                                 remote-endpoint = <&hugo_funnel_out_port0>;
 222                                         };
 223                                 };
 224
 225                                 port@1 {
 226                                         reg = <0>;
 227                                         etf_out_port: endpoint {
 228                                                 remote-endpoint = <&replicator_in_port0>;
 229                                         };
 230                                 };
 231                         };
 232                 };
 233
 234                 etr@30086000 {
 235                         compatible = "arm,coresight-tmc", "arm,primecell";
 236                         reg = <0x30086000 0x1000>;
 237                         clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 238                         clock-names = "apb_pclk";
 239
 240                         port {
 241                                 etr_in_port: endpoint {
 242                                         slave-mode;
 243                                         remote-endpoint = <&replicator_out_port1>;
 244                                 };
 245                         };
 246                 };
 247
 248                 tpiu@30087000 {
 249                         compatible = "arm,coresight-tpiu", "arm,primecell";
 250                         reg = <0x30087000 0x1000>;
 251                         clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 252                         clock-names = "apb_pclk";
 253
 254                         port {
 255                                 tpiu_in_port: endpoint {
 256                                         slave-mode;
 257                                         remote-endpoint = <&replicator_out_port1>;
 258                                 };
 259                         };
 260                 };
 261
 262                 replicator {
 263                         /*
 264                          * non-configurable replicators don't show up on the
 265                          * AMBA bus.  As such no need to add "arm,primecell"
 266                          */
 267                         compatible = "arm,coresight-replicator";
 268
 269                         ports {
 270                                 #address-cells = <1>;
 271                                 #size-cells = <0>;
 272
 273                                 /* replicator output ports */
 274                                 port@0 {
 275                                         reg = <0>;
 276                                         replicator_out_port0: endpoint {
 277                                                 remote-endpoint = <&tpiu_in_port>;
 278                                         };
 279                                 };
 280
 281                                 port@1 {
 282                                         reg = <1>;
 283                                         replicator_out_port1: endpoint {
 284                                                 remote-endpoint = <&etr_in_port>;
 285                                         };
 286                                 };
 287
 288                                 /* replicator input port */
 289                                 port@2 {
 290                                         reg = <0>;
 291                                         replicator_in_port0: endpoint {
 292                                                 slave-mode;
 293                                                 remote-endpoint = <&etf_out_port>;
 294                                         };
 295                                 };
 296                         };
 297                 };
 298
 299                 intc: interrupt-controller@31001000 {
 300                         compatible = "arm,cortex-a7-gic";
 301                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 302                         #interrupt-cells = <3>;
 303                         interrupt-controller;
 304                         reg = <0x31001000 0x1000>,
 305                               <0x31002000 0x2000>,
 306                               <0x31004000 0x2000>,
 307                               <0x31006000 0x2000>;
 308                 };
 309
 310                 timer {
 311                         compatible = "arm,armv7-timer";
 312                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 313                                      <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 314                                      <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 315                                      <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 316                 };
 317
 318                 aips1: aips-bus@30000000 {
 319                         compatible = "fsl,aips-bus", "simple-bus";
 320                         #address-cells = <1>;
 321                         #size-cells = <1>;
 322                         reg = <0x30000000 0x400000>;
 323                         ranges;
 324
 325                         gpio1: gpio@30200000 {
 326                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 327                                 reg = <0x30200000 0x10000>;
 328                                 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, /* GPIO1_INT15_0 */
 329                                              <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; /* GPIO1_INT31_16 */
 330                                 gpio-controller;
 331                                 #gpio-cells = <2>;
 332                                 interrupt-controller;
 333                                 #interrupt-cells = <2>;
 334                                 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
 335                         };
 336
 337                         gpio2: gpio@30210000 {
 338                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 339                                 reg = <0x30210000 0x10000>;
 340                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
 341                                              <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 342                                 gpio-controller;
 343                                 #gpio-cells = <2>;
 344                                 interrupt-controller;
 345                                 #interrupt-cells = <2>;
 346                                 gpio-ranges = <&iomuxc 0 13 32>;
 347                         };
 348
 349                         gpio3: gpio@30220000 {
 350                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 351                                 reg = <0x30220000 0x10000>;
 352                                 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 353                                              <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 354                                 gpio-controller;
 355                                 #gpio-cells = <2>;
 356                                 interrupt-controller;
 357                                 #interrupt-cells = <2>;
 358                                 gpio-ranges = <&iomuxc 0 45 29>;
 359                         };
 360
 361                         gpio4: gpio@30230000 {
 362                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 363                                 reg = <0x30230000 0x10000>;
 364                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
 365                                              <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 366                                 gpio-controller;
 367                                 #gpio-cells = <2>;
 368                                 interrupt-controller;
 369                                 #interrupt-cells = <2>;
 370                                 gpio-ranges = <&iomuxc 0 74 24>;
 371                         };
 372
 373                         gpio5: gpio@30240000 {
 374                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 375                                 reg = <0x30240000 0x10000>;
 376                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 377                                              <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 378                                 gpio-controller;
 379                                 #gpio-cells = <2>;
 380                                 interrupt-controller;
 381                                 #interrupt-cells = <2>;
 382                                 gpio-ranges = <&iomuxc 0 98 18>;
 383                         };
 384
 385                         gpio6: gpio@30250000 {
 386                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 387                                 reg = <0x30250000 0x10000>;
 388                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 389                                              <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 390                                 gpio-controller;
 391                                 #gpio-cells = <2>;
 392                                 interrupt-controller;
 393                                 #interrupt-cells = <2>;
 394                                 gpio-ranges = <&iomuxc 0 116 23>;
 395                         };
 396
 397                         gpio7: gpio@30260000 {
 398                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 399                                 reg = <0x30260000 0x10000>;
 400                                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
 401                                              <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 402                                 gpio-controller;
 403                                 #gpio-cells = <2>;
 404                                 interrupt-controller;
 405                                 #interrupt-cells = <2>;
 406                                 gpio-ranges = <&iomuxc 0 139 16>;
 407                         };
 408
 409                         wdog1: wdog@30280000 {
 410                                 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
 411                                 reg = <0x30280000 0x10000>;
 412                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 413                                 clocks = <&clks IMX7D_WDOG1_ROOT_CLK>;
 414                         };
 415
 416                         wdog2: wdog@30290000 {
 417                                 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
 418                                 reg = <0x30290000 0x10000>;
 419                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 420                                 clocks = <&clks IMX7D_WDOG2_ROOT_CLK>;
 421                                 status = "disabled";
 422                         };
 423
 424                         wdog3: wdog@302a0000 {
 425                                 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
 426                                 reg = <0x302a0000 0x10000>;
 427                                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 428                                 clocks = <&clks IMX7D_WDOG3_ROOT_CLK>;
 429                                 status = "disabled";
 430                         };
 431
 432                         wdog4: wdog@302b0000 {
 433                                 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
 434                                 reg = <0x302b0000 0x10000>;
 435                                 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 436                                 clocks = <&clks IMX7D_WDOG4_ROOT_CLK>;
 437                                 status = "disabled";
 438                         };
 439
 440                         iomuxc_lpsr: iomuxc-lpsr@302c0000 {
 441                                 compatible = "fsl,imx7d-iomuxc-lpsr";
 442                                 reg = <0x302c0000 0x10000>;
 443                                 fsl,input-sel = <&iomuxc>;
 444                         };
 445
 446                         gpt1: gpt@302d0000 {
 447                                 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
 448                                 reg = <0x302d0000 0x10000>;
 449                                 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 450                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 451                                          <&clks IMX7D_GPT1_ROOT_CLK>;
 452                                 clock-names = "ipg", "per";
 453                         };
 454
 455                         gpt2: gpt@302e0000 {
 456                                 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
 457                                 reg = <0x302e0000 0x10000>;
 458                                 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
 459                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 460                                          <&clks IMX7D_GPT2_ROOT_CLK>;
 461                                 clock-names = "ipg", "per";
 462                                 status = "disabled";
 463                         };
 464
 465                         gpt3: gpt@302f0000 {
 466                                 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
 467                                 reg = <0x302f0000 0x10000>;
 468                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 469                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 470                                          <&clks IMX7D_GPT3_ROOT_CLK>;
 471                                 clock-names = "ipg", "per";
 472                                 status = "disabled";
 473                         };
 474
 475                         gpt4: gpt@30300000 {
 476                                 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
 477                                 reg = <0x30300000 0x10000>;
 478                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
 479                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 480                                          <&clks IMX7D_GPT4_ROOT_CLK>;
 481                                 clock-names = "ipg", "per";
 482                                 status = "disabled";
 483                         };
 484
 485                         iomuxc: iomuxc@30330000 {
 486                                 compatible = "fsl,imx7d-iomuxc";
 487                                 reg = <0x30330000 0x10000>;
 488                         };
 489
 490                         gpr: iomuxc-gpr@30340000 {
 491                                 compatible = "fsl,imx7d-iomuxc-gpr", "syscon";
 492                                 reg = <0x30340000 0x10000>;
 493                         };
 494
 495                         ocotp: ocotp-ctrl@30350000 {
 496                                 compatible = "syscon";
 497                                 reg = <0x30350000 0x10000>;
 498                                 clocks = <&clks IMX7D_CLK_DUMMY>;
 499                                 status = "disabled";
 500                         };
 501
 502                         anatop: anatop@30360000 {
 503                                 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
 504                                         "syscon", "simple-bus";
 505                                 reg = <0x30360000 0x10000>;
 506                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 507                                         <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 508
 509                                 reg_1p0d: regulator-vdd1p0d {
 510                                         compatible = "fsl,anatop-regulator";
 511                                         regulator-name = "vdd1p0d";
 512                                         regulator-min-microvolt = <800000>;
 513                                         regulator-max-microvolt = <1200000>;
 514                                         anatop-reg-offset = <0x210>;
 515                                         anatop-vol-bit-shift = <8>;
 516                                         anatop-vol-bit-width = <5>;
 517                                         anatop-min-bit-val = <8>;
 518                                         anatop-min-voltage = <800000>;
 519                                         anatop-max-voltage = <1200000>;
 520                                 };
 521                         };
 522
 523                         snvs: snvs@30370000 {
 524                                 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
 525                                 reg = <0x30370000 0x10000>;
 526
 527                                 snvs_rtc: snvs-rtc-lp {
 528                                         compatible = "fsl,sec-v4.0-mon-rtc-lp";
 529                                         regmap = <&snvs>;
 530                                         offset = <0x34>;
 531                                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
 532                                                      <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 533                                 };
 534
 535                                 snvs_poweroff: snvs-poweroff {
 536                                         compatible = "syscon-poweroff";
 537                                         regmap = <&snvs>;
 538                                         offset = <0x38>;
 539                                         mask = <0x60>;
 540                                 };
 541
 542                                 snvs_pwrkey: snvs-powerkey {
 543                                         compatible = "fsl,sec-v4.0-pwrkey";
 544                                         regmap = <&snvs>;
 545                                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 546                                         linux,keycode = <KEY_POWER>;
 547                                         wakeup-source;
 548                                 };
 549                         };
 550
 551                         clks: ccm@30380000 {
 552                                 compatible = "fsl,imx7d-ccm";
 553                                 reg = <0x30380000 0x10000>;
 554                                 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 555                                              <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 556                                 #clock-cells = <1>;
 557                                 clocks = <&ckil>, <&osc>;
 558                                 clock-names = "ckil", "osc";
 559                         };
 560
 561                         src: src@30390000 {
 562                                 compatible = "fsl,imx7d-src", "fsl,imx51-src", "syscon";
 563                                 reg = <0x30390000 0x10000>;
 564                                 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
 565                                 #reset-cells = <1>;
 566                         };
 567                 };
 568
 569                 aips2: aips-bus@30400000 {
 570                         compatible = "fsl,aips-bus", "simple-bus";
 571                         #address-cells = <1>;
 572                         #size-cells = <1>;
 573                         reg = <0x30400000 0x400000>;
 574                         ranges;
 575
 576                         adc1: adc@30610000 {
 577                                 compatible = "fsl,imx7d-adc";
 578                                 reg = <0x30610000 0x10000>;
 579                                 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 580                                 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
 581                                 clock-names = "adc";
 582                                 status = "disabled";
 583                         };
 584
 585                         adc2: adc@30620000 {
 586                                 compatible = "fsl,imx7d-adc";
 587                                 reg = <0x30620000 0x10000>;
 588                                 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
 589                                 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
 590                                 clock-names = "adc";
 591                                 status = "disabled";
 592                         };
 593
 594                         ecspi4: ecspi@30630000 {
 595                                 #address-cells = <1>;
 596                                 #size-cells = <0>;
 597                                 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
 598                                 reg = <0x30630000 0x10000>;
 599                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 600                                 clocks = <&clks IMX7D_ECSPI4_ROOT_CLK>,
 601                                         <&clks IMX7D_ECSPI4_ROOT_CLK>;
 602                                 clock-names = "ipg", "per";
 603                                 status = "disabled";
 604                         };
 605
 606                         pwm1: pwm@30660000 {
 607                                 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
 608                                 reg = <0x30660000 0x10000>;
 609                                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 610                                 clocks = <&clks IMX7D_PWM1_ROOT_CLK>,
 611                                          <&clks IMX7D_PWM1_ROOT_CLK>;
 612                                 clock-names = "ipg", "per";
 613                                 #pwm-cells = <2>;
 614                                 status = "disabled";
 615                         };
 616
 617                         pwm2: pwm@30670000 {
 618                                 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
 619                                 reg = <0x30670000 0x10000>;
 620                                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 621                                 clocks = <&clks IMX7D_PWM2_ROOT_CLK>,
 622                                          <&clks IMX7D_PWM2_ROOT_CLK>;
 623                                 clock-names = "ipg", "per";
 624                                 #pwm-cells = <2>;
 625                                 status = "disabled";
 626                         };
 627
 628                         pwm3: pwm@30680000 {
 629                                 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
 630                                 reg = <0x30680000 0x10000>;
 631                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 632                                 clocks = <&clks IMX7D_PWM3_ROOT_CLK>,
 633                                          <&clks IMX7D_PWM3_ROOT_CLK>;
 634                                 clock-names = "ipg", "per";
 635                                 #pwm-cells = <2>;
 636                                 status = "disabled";
 637                         };
 638
 639                         pwm4: pwm@30690000 {
 640                                 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
 641                                 reg = <0x30690000 0x10000>;
 642                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 643                                 clocks = <&clks IMX7D_PWM4_ROOT_CLK>,
 644                                          <&clks IMX7D_PWM4_ROOT_CLK>;
 645                                 clock-names = "ipg", "per";
 646                                 #pwm-cells = <2>;
 647                                 status = "disabled";
 648                         };
 649
 650                         lcdif: lcdif@30730000 {
 651                                 compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
 652                                 reg = <0x30730000 0x10000>;
 653                                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 654                                 clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>,
 655                                         <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>;
 656                                 clock-names = "pix", "axi";
 657                                 status = "disabled";
 658                         };
 659                 };
 660
 661                 aips3: aips-bus@30800000 {
 662                         compatible = "fsl,aips-bus", "simple-bus";
 663                         #address-cells = <1>;
 664                         #size-cells = <1>;
 665                         reg = <0x30800000 0x400000>;
 666                         ranges;
 667
 668                         ecspi1: ecspi@30820000 {
 669                                 #address-cells = <1>;
 670                                 #size-cells = <0>;
 671                                 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
 672                                 reg = <0x30820000 0x10000>;
 673                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 674                                 clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
 675                                         <&clks IMX7D_ECSPI1_ROOT_CLK>;
 676                                 clock-names = "ipg", "per";
 677                                 status = "disabled";
 678                         };
 679
 680                         ecspi2: ecspi@30830000 {
 681                                 #address-cells = <1>;
 682                                 #size-cells = <0>;
 683                                 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
 684                                 reg = <0x30830000 0x10000>;
 685                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 686                                 clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
 687                                         <&clks IMX7D_ECSPI2_ROOT_CLK>;
 688                                 clock-names = "ipg", "per";
 689                                 status = "disabled";
 690                         };
 691
 692                         ecspi3: ecspi@30840000 {
 693                                 #address-cells = <1>;
 694                                 #size-cells = <0>;
 695                                 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
 696                                 reg = <0x30840000 0x10000>;
 697                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 698                                 clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
 699                                         <&clks IMX7D_ECSPI3_ROOT_CLK>;
 700                                 clock-names = "ipg", "per";
 701                                 status = "disabled";
 702                         };
 703
 704                         uart1: serial@30860000 {
 705                                 compatible = "fsl,imx7d-uart",
 706                                              "fsl,imx6q-uart";
 707                                 reg = <0x30860000 0x10000>;
 708                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 709                                 clocks = <&clks IMX7D_UART1_ROOT_CLK>,
 710                                         <&clks IMX7D_UART1_ROOT_CLK>;
 711                                 clock-names = "ipg", "per";
 712                                 status = "disabled";
 713                         };
 714
 715                         uart2: serial@30890000 {
 716                                 compatible = "fsl,imx7d-uart",
 717                                              "fsl,imx6q-uart";
 718                                 reg = <0x30890000 0x10000>;
 719                                 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 720                                 clocks = <&clks IMX7D_UART2_ROOT_CLK>,
 721                                         <&clks IMX7D_UART2_ROOT_CLK>;
 722                                 clock-names = "ipg", "per";
 723                                 status = "disabled";
 724                         };
 725
 726                         uart3: serial@30880000 {
 727                                 compatible = "fsl,imx7d-uart",
 728                                              "fsl,imx6q-uart";
 729                                 reg = <0x30880000 0x10000>;
 730                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 731                                 clocks = <&clks IMX7D_UART3_ROOT_CLK>,
 732                                         <&clks IMX7D_UART3_ROOT_CLK>;
 733                                 clock-names = "ipg", "per";
 734                                 status = "disabled";
 735                         };
 736
 737                         sai1: sai@308a0000 {
 738                                 #sound-dai-cells = <0>;
 739                                 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
 740                                 reg = <0x308a0000 0x10000>;
 741                                 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
 742                                 clocks = <&clks IMX7D_SAI1_IPG_CLK>,
 743                                          <&clks IMX7D_SAI1_ROOT_CLK>,
 744                                          <&clks IMX7D_CLK_DUMMY>,
 745                                          <&clks IMX7D_CLK_DUMMY>;
 746                                 clock-names = "bus", "mclk1", "mclk2", "mclk3";
 747                                 dma-names = "rx", "tx";
 748                                 dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
 749                                 status = "disabled";
 750                         };
 751
 752                         sai2: sai@308b0000 {
 753                                 #sound-dai-cells = <0>;
 754                                 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
 755                                 reg = <0x308b0000 0x10000>;
 756                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 757                                 clocks = <&clks IMX7D_SAI2_IPG_CLK>,
 758                                          <&clks IMX7D_SAI2_ROOT_CLK>,
 759                                          <&clks IMX7D_CLK_DUMMY>,
 760                                          <&clks IMX7D_CLK_DUMMY>;
 761                                 clock-names = "bus", "mclk1", "mclk2", "mclk3";
 762                                 dma-names = "rx", "tx";
 763                                 dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
 764                                 status = "disabled";
 765                         };
 766
 767                         sai3: sai@308c0000 {
 768                                 #sound-dai-cells = <0>;
 769                                 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
 770                                 reg = <0x308c0000 0x10000>;
 771                                 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
 772                                 clocks = <&clks IMX7D_SAI3_IPG_CLK>,
 773                                          <&clks IMX7D_SAI3_ROOT_CLK>,
 774                                          <&clks IMX7D_CLK_DUMMY>,
 775                                          <&clks IMX7D_CLK_DUMMY>;
 776                                 clock-names = "bus", "mclk1", "mclk2", "mclk3";
 777                                 dma-names = "rx", "tx";
 778                                 dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
 779                                 status = "disabled";
 780                         };
 781
 782                         flexcan1: can@30a00000 {
 783                                 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
 784                                 reg = <0x30a00000 0x10000>;
 785                                 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 786                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 787                                         <&clks IMX7D_CAN1_ROOT_CLK>;
 788                                 clock-names = "ipg", "per";
 789                                 status = "disabled";
 790                         };
 791
 792                         flexcan2: can@30a10000 {
 793                                 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
 794                                 reg = <0x30a10000 0x10000>;
 795                                 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 796                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 797                                         <&clks IMX7D_CAN2_ROOT_CLK>;
 798                                 clock-names = "ipg", "per";
 799                                 status = "disabled";
 800                         };
 801
 802                         i2c1: i2c@30a20000 {
 803                                 #address-cells = <1>;
 804                                 #size-cells = <0>;
 805                                 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
 806                                 reg = <0x30a20000 0x10000>;
 807                                 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 808                                 clocks = <&clks IMX7D_I2C1_ROOT_CLK>;
 809                                 status = "disabled";
 810                         };
 811
 812                         i2c2: i2c@30a30000 {
 813                                 #address-cells = <1>;
 814                                 #size-cells = <0>;
 815                                 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
 816                                 reg = <0x30a30000 0x10000>;
 817                                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 818                                 clocks = <&clks IMX7D_I2C2_ROOT_CLK>;
 819                                 status = "disabled";
 820                         };
 821
 822                         i2c3: i2c@30a40000 {
 823                                 #address-cells = <1>;
 824                                 #size-cells = <0>;
 825                                 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
 826                                 reg = <0x30a40000 0x10000>;
 827                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 828                                 clocks = <&clks IMX7D_I2C3_ROOT_CLK>;
 829                                 status = "disabled";
 830                         };
 831
 832                         i2c4: i2c@30a50000 {
 833                                 #address-cells = <1>;
 834                                 #size-cells = <0>;
 835                                 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
 836                                 reg = <0x30a50000 0x10000>;
 837                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 838                                 clocks = <&clks IMX7D_I2C4_ROOT_CLK>;
 839                                 status = "disabled";
 840                         };
 841
 842                         uart4: serial@30a60000 {
 843                                 compatible = "fsl,imx7d-uart",
 844                                              "fsl,imx6q-uart";
 845                                 reg = <0x30a60000 0x10000>;
 846                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 847                                 clocks = <&clks IMX7D_UART4_ROOT_CLK>,
 848                                         <&clks IMX7D_UART4_ROOT_CLK>;
 849                                 clock-names = "ipg", "per";
 850                                 status = "disabled";
 851                         };
 852
 853                         uart5: serial@30a70000 {
 854                                 compatible = "fsl,imx7d-uart",
 855                                              "fsl,imx6q-uart";
 856                                 reg = <0x30a70000 0x10000>;
 857                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 858                                 clocks = <&clks IMX7D_UART5_ROOT_CLK>,
 859                                         <&clks IMX7D_UART5_ROOT_CLK>;
 860                                 clock-names = "ipg", "per";
 861                                 status = "disabled";
 862                         };
 863
 864                         uart6: serial@30a80000 {
 865                                 compatible = "fsl,imx7d-uart",
 866                                              "fsl,imx6q-uart";
 867                                 reg = <0x30a80000 0x10000>;
 868                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 869                                 clocks = <&clks IMX7D_UART6_ROOT_CLK>,
 870                                         <&clks IMX7D_UART6_ROOT_CLK>;
 871                                 clock-names = "ipg", "per";
 872                                 status = "disabled";
 873                         };
 874
 875                         uart7: serial@30a90000 {
 876                                 compatible = "fsl,imx7d-uart",
 877                                              "fsl,imx6q-uart";
 878                                 reg = <0x30a90000 0x10000>;
 879                                 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 880                                 clocks = <&clks IMX7D_UART7_ROOT_CLK>,
 881                                         <&clks IMX7D_UART7_ROOT_CLK>;
 882                                 clock-names = "ipg", "per";
 883                                 status = "disabled";
 884                         };
 885
 886                         usbotg1: usb@30b10000 {
 887                                 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
 888                                 reg = <0x30b10000 0x200>;
 889                                 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 890                                 clocks = <&clks IMX7D_USB_CTRL_CLK>;
 891                                 fsl,usbphy = <&usbphynop1>;
 892                                 fsl,usbmisc = <&usbmisc1 0>;
 893                                 phy-clkgate-delay-us = <400>;
 894                                 status = "disabled";
 895                         };
 896
 897                         usbh: usb@30b30000 {
 898                                 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
 899                                 reg = <0x30b30000 0x200>;
 900                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 901                                 clocks = <&clks IMX7D_USB_CTRL_CLK>;
 902                                 fsl,usbphy = <&usbphynop3>;
 903                                 fsl,usbmisc = <&usbmisc3 0>;
 904                                 phy_type = "hsic";
 905                                 dr_mode = "host";
 906                                 phy-clkgate-delay-us = <400>;
 907                                 status = "disabled";
 908                         };
 909
 910                         usbmisc1: usbmisc@30b10200 {
 911                                 #index-cells = <1>;
 912                                 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
 913                                 reg = <0x30b10200 0x200>;
 914                         };
 915
 916                         usbmisc3: usbmisc@30b30200 {
 917                                 #index-cells = <1>;
 918                                 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
 919                                 reg = <0x30b30200 0x200>;
 920                         };
 921
 922                         usbphynop1: usbphynop1 {
 923                                 compatible = "usb-nop-xceiv";
 924                                 clocks = <&clks IMX7D_USB_PHY1_CLK>;
 925                                 clock-names = "main_clk";
 926                         };
 927
 928                         usbphynop3: usbphynop3 {
 929                                 compatible = "usb-nop-xceiv";
 930                                 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
 931                                 clock-names = "main_clk";
 932                         };
 933
 934                         usdhc1: usdhc@30b40000 {
 935                                 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
 936                                 reg = <0x30b40000 0x10000>;
 937                                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 938                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 939                                         <&clks IMX7D_CLK_DUMMY>,
 940                                         <&clks IMX7D_USDHC1_ROOT_CLK>;
 941                                 clock-names = "ipg", "ahb", "per";
 942                                 bus-width = <4>;
 943                                 status = "disabled";
 944                         };
 945
 946                         usdhc2: usdhc@30b50000 {
 947                                 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
 948                                 reg = <0x30b50000 0x10000>;
 949                                 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 950                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 951                                         <&clks IMX7D_CLK_DUMMY>,
 952                                         <&clks IMX7D_USDHC2_ROOT_CLK>;
 953                                 clock-names = "ipg", "ahb", "per";
 954                                 bus-width = <4>;
 955                                 status = "disabled";
 956                         };
 957
 958                         usdhc3: usdhc@30b60000 {
 959                                 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
 960                                 reg = <0x30b60000 0x10000>;
 961                                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 962                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 963                                         <&clks IMX7D_CLK_DUMMY>,
 964                                         <&clks IMX7D_USDHC3_ROOT_CLK>;
 965                                 clock-names = "ipg", "ahb", "per";
 966                                 bus-width = <4>;
 967                                 status = "disabled";
 968                         };
 969
 970                         sdma: sdma@30bd0000 {
 971                                 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
 972                                 reg = <0x30bd0000 0x10000>;
 973                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 974                                 clocks = <&clks IMX7D_SDMA_CORE_CLK>,
 975                                          <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
 976                                 clock-names = "ipg", "ahb";
 977                                 #dma-cells = <3>;
 978                                 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
 979                         };
 980
 981                         fec1: ethernet@30be0000 {
 982                                 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
 983                                 reg = <0x30be0000 0x10000>;
 984                                 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
 985                                         <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
 986                                         <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 987                                 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
 988                                         <&clks IMX7D_ENET_AXI_ROOT_CLK>,
 989                                         <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
 990                                         <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
 991                                         <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
 992                                 clock-names = "ipg", "ahb", "ptp",
 993                                         "enet_clk_ref", "enet_out";
 994                                 fsl,num-tx-queues=<3>;
 995                                 fsl,num-rx-queues=<3>;
 996                                 status = "disabled";
 997                         };
 998                 };
 999         };
1000 };