arch/arm/boot/dts/imx7d-pico.dts

   1 /*
   2  * Copyright 2017 NXP
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44
  45 #include "imx7d.dtsi"
  46
  47 / {
  48         model = "Technexion Pico i.MX7D Board";
  49         compatible = "technexion,imx7d-pico", "fsl,imx7d";
  50
  51         memory {
  52                 reg = <0x80000000 0x80000000>;
  53         };
  54
  55         reg_ap6212: regulator-ap6212 {
  56                 compatible = "regulator-fixed";
  57                 pinctrl-names = "default";
  58                 pinctrl-0 = <&pinctrl_reg_ap6212>;
  59                 regulator-name = "AP6212";
  60                 regulator-min-microvolt = <3300000>;
  61                 regulator-max-microvolt = <3300000>;
  62                 gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
  63                 enable-active-high;
  64         };
  65
  66         reg_2p5v: regulator-2p5v {
  67                 compatible = "regulator-fixed";
  68                 regulator-name = "2P5V";
  69                 regulator-min-microvolt = <2500000>;
  70                 regulator-max-microvolt = <2500000>;
  71                 regulator-always-on;
  72         };
  73
  74         reg_3p3v: regulator-3p3v {
  75                 compatible = "regulator-fixed";
  76                 regulator-name = "3P3V";
  77                 regulator-min-microvolt = <3300000>;
  78                 regulator-max-microvolt = <3300000>;
  79                 regulator-always-on;
  80         };
  81
  82         reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
  83                 compatible = "regulator-fixed";
  84                 regulator-name = "usb_otg1_vbus";
  85                 regulator-min-microvolt = <5000000>;
  86                 regulator-max-microvolt = <5000000>;
  87                 gpio = <&gpio4 5 GPIO_ACTIVE_LOW>;
  88         };
  89
  90         reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
  91                 compatible = "regulator-fixed";
  92                 regulator-name = "usb_otg2_vbus";
  93                 regulator-min-microvolt = <5000000>;
  94                 regulator-max-microvolt = <5000000>;
  95         };
  96
  97         reg_vref_1v8: regulator-vref-1v8 {
  98                 compatible = "regulator-fixed";
  99                 regulator-name = "vref-1v8";
 100                 regulator-min-microvolt = <1800000>;
 101                 regulator-max-microvolt = <1800000>;
 102         };
 103
 104         sound {
 105                 compatible = "simple-audio-card";
 106                 simple-audio-card,name = "imx7-sgtl5000";
 107                 simple-audio-card,format = "i2s";
 108                 simple-audio-card,bitclock-master = <&dailink_master>;
 109                 simple-audio-card,frame-master = <&dailink_master>;
 110                 simple-audio-card,cpu {
 111                         sound-dai = <&sai1>;
 112                 };
 113
 114                 dailink_master: simple-audio-card,codec {
 115                         sound-dai = <&codec>;
 116                         clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
 117                 };
 118         };
 119 };
 120
 121 &fec1 {
 122         pinctrl-names = "default";
 123         pinctrl-0 = <&pinctrl_enet1>;
 124         assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
 125                           <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
 126         assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
 127         assigned-clock-rates = <0>, <100000000>;
 128         phy-mode = "rgmii";
 129         phy-handle = <&ethphy0>;
 130         fsl,magic-packet;
 131         status = "okay";
 132
 133         mdio {
 134                 #address-cells = <1>;
 135                 #size-cells = <0>;
 136
 137                 ethphy0: ethernet-phy@1 {
 138                         compatible = "ethernet-phy-ieee802.3-c22";
 139                         reg = <1>;
 140                         status = "okay";
 141                 };
 142         };
 143 };
 144
 145 &i2c1 {
 146         clock-frequency = <100000>;
 147         pinctrl-names = "default";
 148         pinctrl-0 = <&pinctrl_i2c1>;
 149         status = "okay";
 150
 151         codec: sgtl5000@a {
 152                 #sound-dai-cells = <0>;
 153                 reg = <0x0a>;
 154                 compatible = "fsl,sgtl5000";
 155                 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
 156                 VDDA-supply = <&reg_2p5v>;
 157                 VDDIO-supply = <&reg_vref_1v8>;
 158         };
 159 };
 160
 161 &i2c4 {
 162         pinctrl-names = "default";
 163         pinctrl-0 = <&pinctrl_i2c4>;
 164         status = "okay";
 165
 166         pmic: pfuze3000@8 {
 167                 compatible = "fsl,pfuze3000";
 168                 reg = <0x08>;
 169
 170                 regulators {
 171                         sw1a_reg: sw1a {
 172                                 regulator-min-microvolt = <700000>;
 173                                 regulator-max-microvolt = <3300000>;
 174                                 regulator-boot-on;
 175                                 regulator-always-on;
 176                                 regulator-ramp-delay = <6250>;
 177                         };
 178                         /* use sw1c_reg to align with pfuze100/pfuze200 */
 179                         sw1c_reg: sw1b {
 180                                 regulator-min-microvolt = <700000>;
 181                                 regulator-max-microvolt = <1475000>;
 182                                 regulator-boot-on;
 183                                 regulator-always-on;
 184                                 regulator-ramp-delay = <6250>;
 185                         };
 186
 187                         sw2_reg: sw2 {
 188                                 regulator-min-microvolt = <1800000>;
 189                                 regulator-max-microvolt = <1850000>;
 190                                 regulator-boot-on;
 191                                 regulator-always-on;
 192                         };
 193
 194                         sw3a_reg: sw3 {
 195                                 regulator-min-microvolt = <900000>;
 196                                 regulator-max-microvolt = <1650000>;
 197                                 regulator-boot-on;
 198                                 regulator-always-on;
 199                         };
 200
 201                         swbst_reg: swbst {
 202                                 regulator-min-microvolt = <5000000>;
 203                                 regulator-max-microvolt = <5150000>;
 204                         };
 205
 206                         snvs_reg: vsnvs {
 207                                 regulator-min-microvolt = <1000000>;
 208                                 regulator-max-microvolt = <3000000>;
 209                                 regulator-boot-on;
 210                                 regulator-always-on;
 211                         };
 212
 213                         vref_reg: vrefddr {
 214                                 regulator-boot-on;
 215                                 regulator-always-on;
 216                         };
 217
 218                         vgen1_reg: vldo1 {
 219                                 regulator-min-microvolt = <1800000>;
 220                                 regulator-max-microvolt = <3300000>;
 221                                 regulator-always-on;
 222                         };
 223
 224                         vgen2_reg: vldo2 {
 225                                 regulator-min-microvolt = <800000>;
 226                                 regulator-max-microvolt = <1550000>;
 227                         };
 228
 229                         vgen3_reg: vccsd {
 230                                 regulator-min-microvolt = <2850000>;
 231                                 regulator-max-microvolt = <3300000>;
 232                                 regulator-always-on;
 233                         };
 234
 235                         vgen4_reg: v33 {
 236                                 regulator-min-microvolt = <2850000>;
 237                                 regulator-max-microvolt = <3300000>;
 238                                 regulator-always-on;
 239                         };
 240
 241                         vgen5_reg: vldo3 {
 242                                 regulator-min-microvolt = <1800000>;
 243                                 regulator-max-microvolt = <3300000>;
 244                                 regulator-always-on;
 245                         };
 246
 247                         vgen6_reg: vldo4 {
 248                                 regulator-min-microvolt = <1800000>;
 249                                 regulator-max-microvolt = <3300000>;
 250                                 regulator-always-on;
 251                         };
 252                 };
 253         };
 254 };
 255
 256 &sai1 {
 257         pinctrl-names = "default";
 258         pinctrl-0 = <&pinctrl_sai1>;
 259         assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
 260                           <&clks IMX7D_SAI1_ROOT_CLK>;
 261         assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
 262         assigned-clock-rates = <0>, <24576000>;
 263         status = "okay";
 264 };
 265
 266 &uart5 {
 267         pinctrl-names = "default";
 268         pinctrl-0 = <&pinctrl_uart5>;
 269         assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
 270         assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
 271         status = "okay";
 272 };
 273
 274 &usbotg1 {
 275         vbus-supply = <&reg_usb_otg1_vbus>;
 276         status = "okay";
 277 };
 278
 279 &usbotg2 {
 280         vbus-supply = <&reg_usb_otg2_vbus>;
 281         dr_mode = "host";
 282         status = "okay";
 283 };
 284
 285 &usdhc2 { /* Wifi SDIO */
 286         pinctrl-names = "default";
 287         pinctrl-0 = <&pinctrl_usdhc2>;
 288         no-1-8-v;
 289         non-removable;
 290         keep-power-in-suspend;
 291         wakeup-source;
 292         vmmc-supply = <&reg_ap6212>;
 293         status = "okay";
 294 };
 295
 296 &usdhc3 {
 297         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 298         pinctrl-0 = <&pinctrl_usdhc3>;
 299         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 300         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 301         assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
 302         assigned-clock-rates = <400000000>;
 303         bus-width = <8>;
 304         no-1-8-v;
 305         fsl,tuning-step = <2>;
 306         non-removable;
 307         status = "okay";
 308 };
 309
 310 &wdog1 {
 311         pinctrl-names = "default";
 312         pinctrl-0 = <&pinctrl_wdog>;
 313         fsl,ext-reset-output;
 314         status = "okay";
 315 };
 316
 317 &iomuxc {
 318         pinctrl_enet1: enet1grp {
 319                 fsl,pins = <
 320                         MX7D_PAD_SD2_CD_B__ENET1_MDIO                   0x3
 321                         MX7D_PAD_SD2_WP__ENET1_MDC                      0x3
 322                         MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC       0x1
 323                         MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0       0x1
 324                         MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1       0x1
 325                         MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2       0x1
 326                         MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3       0x1
 327                         MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
 328                         MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC       0x1
 329                         MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0       0x1
 330                         MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1       0x1
 331                         MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2       0x1
 332                         MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3       0x1
 333                         MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
 334                 >;
 335         };
 336
 337         pinctrl_i2c1: i2c1grp {
 338                 fsl,pins = <
 339                         MX7D_PAD_UART1_TX_DATA__I2C1_SDA        0x4000007f
 340                         MX7D_PAD_UART1_RX_DATA__I2C1_SCL        0x4000007f
 341                 >;
 342         };
 343
 344         pinctrl_i2c4: i2c4grp {
 345                 fsl,pins = <
 346                         MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA         0x4000007f
 347                         MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL         0x4000007f
 348                 >;
 349         };
 350
 351         pinctrl_reg_ap6212: regap6212grp {
 352                 fsl,pins = <
 353                         MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16        0x59
 354                 >;
 355         };
 356
 357         pinctrl_sai1: sai1grp {
 358                 fsl,pins = <
 359                         MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK     0x1f
 360                         MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC        0x1f
 361                         MX7D_PAD_ENET1_COL__SAI1_TX_DATA0       0x30
 362                         MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0    0x1f
 363                 >;
 364         };
 365
 366         pinctrl_uart5: uart5grp {
 367                 fsl,pins = <
 368                         MX7D_PAD_I2C4_SDA__UART5_DCE_TX         0x79
 369                         MX7D_PAD_I2C4_SCL__UART5_DCE_RX         0x79
 370                 >;
 371         };
 372
 373         pinctrl_usbotg1_pwr: usbotg_pwr {
 374                 fsl,pins = <
 375                         MX7D_PAD_UART3_TX_DATA__GPIO4_IO5       0x14
 376                 >;
 377         };
 378
 379         pinctrl_usdhc2: usdhc2grp {
 380                 fsl,pins = <
 381                         MX7D_PAD_SD2_CMD__SD2_CMD               0x59
 382                         MX7D_PAD_SD2_CLK__SD2_CLK               0x19
 383                         MX7D_PAD_SD2_DATA0__SD2_DATA0           0x59
 384                         MX7D_PAD_SD2_DATA1__SD2_DATA1           0x59
 385                         MX7D_PAD_SD2_DATA2__SD2_DATA2           0x59
 386                         MX7D_PAD_SD2_DATA3__SD2_DATA3           0x59
 387                 >;
 388         };
 389
 390         pinctrl_usdhc3: usdhc3grp {
 391                 fsl,pins = <
 392                         MX7D_PAD_SD3_CMD__SD3_CMD               0x59
 393                         MX7D_PAD_SD3_CLK__SD3_CLK               0x19
 394                         MX7D_PAD_SD3_DATA0__SD3_DATA0           0x59
 395                         MX7D_PAD_SD3_DATA1__SD3_DATA1           0x59
 396                         MX7D_PAD_SD3_DATA2__SD3_DATA2           0x59
 397                         MX7D_PAD_SD3_DATA3__SD3_DATA3           0x59
 398                         MX7D_PAD_SD3_DATA4__SD3_DATA4           0x59
 399                         MX7D_PAD_SD3_DATA5__SD3_DATA5           0x59
 400                         MX7D_PAD_SD3_DATA6__SD3_DATA6           0x59
 401                         MX7D_PAD_SD3_DATA7__SD3_DATA7           0x59
 402                 >;
 403         };
 404
 405         pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
 406                 fsl,pins = <
 407                         MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
 408                         MX7D_PAD_SD3_CLK__SD3_CLK               0x1a
 409                         MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5a
 410                         MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5a
 411                         MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5a
 412                         MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5a
 413                         MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5a
 414                         MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5a
 415                         MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5a
 416                         MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5a
 417                 >;
 418         };
 419
 420         pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
 421                 fsl,pins = <
 422                         MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
 423                         MX7D_PAD_SD3_CLK__SD3_CLK               0x1b
 424                         MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5b
 425                         MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5b
 426                         MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5b
 427                         MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5b
 428                         MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5b
 429                         MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5b
 430                         MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5b
 431                         MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5b
 432                 >;
 433         };
 434 };
 435
 436 &iomuxc_lpsr {
 437         pinctrl_wdog: wdoggrp {
 438                 fsl,pins = <
 439                         MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B  0x74
 440                 >;
 441         };
 442 };