Merge tag 'nfs-for-5.1-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6ull.dtsi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 //
3 // Copyright 2016 Freescale Semiconductor, Inc.
4
5 #include "imx6ul.dtsi"
6 #include "imx6ull-pinfunc.h"
7 #include "imx6ull-pinfunc-snvs.h"
8
9 /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
10 /delete-node/ &uart8;
11 /* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
12 /delete-node/ &crypto;
13
14 &cpu0 {
15         operating-points = <
16                 /* kHz  uV */
17                 900000  1275000
18                 792000  1225000
19                 528000  1175000
20                 396000  1025000
21                 198000  950000
22         >;
23         fsl,soc-operating-points = <
24                 /* KHz  uV */
25                 900000  1250000
26                 792000  1175000
27                 528000  1175000
28                 396000  1175000
29                 198000  1175000
30         >;
31 };
32
33 &ocotp {
34         compatible = "fsl,imx6ull-ocotp", "syscon";
35 };
36
37 &usdhc1 {
38         compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
39 };
40
41 &usdhc2 {
42         compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
43 };
44
45 / {
46         soc {
47                 aips3: aips-bus@2200000 {
48                         compatible = "fsl,aips-bus", "simple-bus";
49                         #address-cells = <1>;
50                         #size-cells = <1>;
51                         reg = <0x02200000 0x100000>;
52                         ranges;
53
54                         dcp: crypto@2280000 {
55                                 compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp";
56                                 reg = <0x02280000 0x4000>;
57                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
58                                              <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
59                                              <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
60                                 clocks = <&clks IMX6ULL_CLK_DCP_CLK>;
61                                 clock-names = "dcp";
62                         };
63
64                         iomuxc_snvs: iomuxc-snvs@2290000 {
65                                 compatible = "fsl,imx6ull-iomuxc-snvs";
66                                 reg = <0x02290000 0x4000>;
67                         };
68
69                         uart8: serial@2288000 {
70                                 compatible = "fsl,imx6ul-uart",
71                                              "fsl,imx6q-uart";
72                                 reg = <0x02288000 0x4000>;
73                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
74                                 clocks = <&clks IMX6UL_CLK_UART8_IPG>,
75                                          <&clks IMX6UL_CLK_UART8_SERIAL>;
76                                 clock-names = "ipg", "per";
77                                 status = "disabled";
78                         };
79                 };
80         };
81 };