Merge tag 'mmc-v4.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6sl-evk.dts
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 //Copyright (C) 2013 Freescale Semiconductor, Inc.
4
5 /dts-v1/;
6
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include "imx6sl.dtsi"
10
11 / {
12         model = "Freescale i.MX6 SoloLite EVK Board";
13         compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
14
15         chosen {
16                 stdout-path = &uart1;
17         };
18
19         memory@80000000 {
20                 reg = <0x80000000 0x40000000>;
21         };
22
23         backlight_display: backlight_display {
24                 compatible = "pwm-backlight";
25                 pwms = <&pwm1 0 5000000>;
26                 brightness-levels = <0 4 8 16 32 64 128 255>;
27                 default-brightness-level = <6>;
28         };
29
30         leds {
31                 compatible = "gpio-leds";
32                 pinctrl-names = "default";
33                 pinctrl-0 = <&pinctrl_led>;
34
35                 user {
36                         label = "debug";
37                         gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
38                         linux,default-trigger = "heartbeat";
39                 };
40         };
41
42         reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
43                 compatible = "regulator-fixed";
44                 regulator-name = "usb_otg1_vbus";
45                 regulator-min-microvolt = <5000000>;
46                 regulator-max-microvolt = <5000000>;
47                 gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
48                 enable-active-high;
49                 vin-supply = <&swbst_reg>;
50         };
51
52         reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
53                 compatible = "regulator-fixed";
54                 regulator-name = "usb_otg2_vbus";
55                 regulator-min-microvolt = <5000000>;
56                 regulator-max-microvolt = <5000000>;
57                 gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
58                 enable-active-high;
59                 vin-supply = <&swbst_reg>;
60         };
61
62         reg_aud3v: regulator-aud3v {
63                 compatible = "regulator-fixed";
64                 regulator-name = "wm8962-supply-3v15";
65                 regulator-min-microvolt = <3150000>;
66                 regulator-max-microvolt = <3150000>;
67                 regulator-boot-on;
68         };
69
70         reg_aud4v: regulator-aud4v {
71                 compatible = "regulator-fixed";
72                 regulator-name = "wm8962-supply-4v2";
73                 regulator-min-microvolt = <4325000>;
74                 regulator-max-microvolt = <4325000>;
75                 regulator-boot-on;
76         };
77
78         reg_lcd_3v3: regulator-lcd-3v3 {
79                 compatible = "regulator-fixed";
80                 pinctrl-names = "default";
81                 pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
82                 regulator-name = "lcd-3v3";
83                 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
84                 enable-active-high;
85         };
86
87         reg_lcd_5v: regulator-lcd-5v {
88                 compatible = "regulator-fixed";
89                 regulator-name = "lcd-5v0";
90                 regulator-min-microvolt = <5000000>;
91                 regulator-max-microvolt = <5000000>;
92         };
93
94         sound {
95                 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
96                 model = "wm8962-audio";
97                 ssi-controller = <&ssi2>;
98                 audio-codec = <&codec>;
99                 audio-routing =
100                         "Headphone Jack", "HPOUTL",
101                         "Headphone Jack", "HPOUTR",
102                         "Ext Spk", "SPKOUTL",
103                         "Ext Spk", "SPKOUTR",
104                         "AMIC", "MICBIAS",
105                         "IN3R", "AMIC";
106                 mux-int-port = <2>;
107                 mux-ext-port = <3>;
108         };
109
110         panel {
111                 compatible = "sii,43wvf1g";
112                 backlight = <&backlight_display>;
113                 dvdd-supply = <&reg_lcd_3v3>;
114                 avdd-supply = <&reg_lcd_5v>;
115
116                 port {
117                         panel_in: endpoint {
118                                 remote-endpoint = <&display_out>;
119                         };
120                 };
121         };
122 };
123
124 &audmux {
125         pinctrl-names = "default";
126         pinctrl-0 = <&pinctrl_audmux3>;
127         status = "okay";
128 };
129
130 &ecspi1 {
131         cs-gpios = <&gpio4 11 0>;
132         pinctrl-names = "default";
133         pinctrl-0 = <&pinctrl_ecspi1>;
134         status = "okay";
135
136         flash: m25p80@0 {
137                 #address-cells = <1>;
138                 #size-cells = <1>;
139                 compatible = "st,m25p32", "jedec,spi-nor";
140                 spi-max-frequency = <20000000>;
141                 reg = <0>;
142         };
143 };
144
145 &fec {
146         pinctrl-names = "default", "sleep";
147         pinctrl-0 = <&pinctrl_fec>;
148         pinctrl-1 = <&pinctrl_fec_sleep>;
149         phy-mode = "rmii";
150         status = "okay";
151 };
152
153 &i2c1 {
154         clock-frequency = <100000>;
155         pinctrl-names = "default";
156         pinctrl-0 = <&pinctrl_i2c1>;
157         status = "okay";
158
159         pmic: pfuze100@8 {
160                 compatible = "fsl,pfuze100";
161                 reg = <0x08>;
162
163                 regulators {
164                         sw1a_reg: sw1ab {
165                                 regulator-min-microvolt = <300000>;
166                                 regulator-max-microvolt = <1875000>;
167                                 regulator-boot-on;
168                                 regulator-always-on;
169                                 regulator-ramp-delay = <6250>;
170                         };
171
172                         sw1c_reg: sw1c {
173                                 regulator-min-microvolt = <300000>;
174                                 regulator-max-microvolt = <1875000>;
175                                 regulator-boot-on;
176                                 regulator-always-on;
177                                 regulator-ramp-delay = <6250>;
178                         };
179
180                         sw2_reg: sw2 {
181                                 regulator-min-microvolt = <800000>;
182                                 regulator-max-microvolt = <3300000>;
183                                 regulator-boot-on;
184                                 regulator-always-on;
185                         };
186
187                         sw3a_reg: sw3a {
188                                 regulator-min-microvolt = <400000>;
189                                 regulator-max-microvolt = <1975000>;
190                                 regulator-boot-on;
191                                 regulator-always-on;
192                         };
193
194                         sw3b_reg: sw3b {
195                                 regulator-min-microvolt = <400000>;
196                                 regulator-max-microvolt = <1975000>;
197                                 regulator-boot-on;
198                                 regulator-always-on;
199                         };
200
201                         sw4_reg: sw4 {
202                                 regulator-min-microvolt = <800000>;
203                                 regulator-max-microvolt = <3300000>;
204                                 regulator-always-on;
205                         };
206
207                         swbst_reg: swbst {
208                                 regulator-min-microvolt = <5000000>;
209                                 regulator-max-microvolt = <5150000>;
210                         };
211
212                         snvs_reg: vsnvs {
213                                 regulator-min-microvolt = <1000000>;
214                                 regulator-max-microvolt = <3000000>;
215                                 regulator-boot-on;
216                                 regulator-always-on;
217                         };
218
219                         vref_reg: vrefddr {
220                                 regulator-boot-on;
221                                 regulator-always-on;
222                         };
223
224                         vgen1_reg: vgen1 {
225                                 regulator-min-microvolt = <800000>;
226                                 regulator-max-microvolt = <1550000>;
227                                 regulator-always-on;
228                         };
229
230                         vgen2_reg: vgen2 {
231                                 regulator-min-microvolt = <800000>;
232                                 regulator-max-microvolt = <1550000>;
233                         };
234
235                         vgen3_reg: vgen3 {
236                                 regulator-min-microvolt = <1800000>;
237                                 regulator-max-microvolt = <3300000>;
238                         };
239
240                         vgen4_reg: vgen4 {
241                                 regulator-min-microvolt = <1800000>;
242                                 regulator-max-microvolt = <3300000>;
243                                 regulator-always-on;
244                         };
245
246                         vgen5_reg: vgen5 {
247                                 regulator-min-microvolt = <1800000>;
248                                 regulator-max-microvolt = <3300000>;
249                                 regulator-always-on;
250                         };
251
252                         vgen6_reg: vgen6 {
253                                 regulator-min-microvolt = <1800000>;
254                                 regulator-max-microvolt = <3300000>;
255                                 regulator-always-on;
256                         };
257                 };
258         };
259 };
260
261 &i2c2 {
262         clock-frequency = <100000>;
263         pinctrl-names = "default";
264         pinctrl-0 = <&pinctrl_i2c2>;
265         status = "okay";
266
267         codec: wm8962@1a {
268                 compatible = "wlf,wm8962";
269                 reg = <0x1a>;
270                 clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
271                 DCVDD-supply = <&vgen3_reg>;
272                 DBVDD-supply = <&reg_aud3v>;
273                 AVDD-supply = <&vgen3_reg>;
274                 CPVDD-supply = <&vgen3_reg>;
275                 MICVDD-supply = <&reg_aud3v>;
276                 PLLVDD-supply = <&vgen3_reg>;
277                 SPKVDD1-supply = <&reg_aud4v>;
278                 SPKVDD2-supply = <&reg_aud4v>;
279         };
280 };
281
282 &iomuxc {
283         pinctrl-names = "default";
284         pinctrl-0 = <&pinctrl_hog>;
285
286         imx6sl-evk {
287                 pinctrl_hog: hoggrp {
288                         fsl,pins = <
289                                 MX6SL_PAD_KEY_ROW7__GPIO4_IO07    0x17059
290                                 MX6SL_PAD_KEY_COL7__GPIO4_IO06    0x17059
291                                 MX6SL_PAD_SD2_DAT7__GPIO5_IO00    0x17059
292                                 MX6SL_PAD_SD2_DAT6__GPIO4_IO29    0x17059
293                                 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
294                                 MX6SL_PAD_KEY_COL4__GPIO4_IO00  0x80000000
295                                 MX6SL_PAD_KEY_COL5__GPIO4_IO02  0x80000000
296                                 MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
297                         >;
298                 };
299
300                 pinctrl_audmux3: audmux3grp {
301                         fsl,pins = <
302                                 MX6SL_PAD_AUD_RXD__AUD3_RXD       0x4130b0
303                                 MX6SL_PAD_AUD_TXC__AUD3_TXC       0x4130b0
304                                 MX6SL_PAD_AUD_TXD__AUD3_TXD       0x4110b0
305                                 MX6SL_PAD_AUD_TXFS__AUD3_TXFS     0x4130b0
306                         >;
307                 };
308
309                 pinctrl_ecspi1: ecspi1grp {
310                         fsl,pins = <
311                                 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO      0x100b1
312                                 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI      0x100b1
313                                 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK      0x100b1
314                                 MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11        0x80000000
315                         >;
316                 };
317
318                 pinctrl_fec: fecgrp {
319                         fsl,pins = <
320                                 MX6SL_PAD_FEC_MDC__FEC_MDC              0x1b0b0
321                                 MX6SL_PAD_FEC_MDIO__FEC_MDIO            0x1b0b0
322                                 MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV         0x1b0b0
323                                 MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0        0x1b0b0
324                                 MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1        0x1b0b0
325                                 MX6SL_PAD_FEC_TX_EN__FEC_TX_EN          0x1b0b0
326                                 MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0        0x1b0b0
327                                 MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1        0x1b0b0
328                                 MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT      0x4001b0a8
329                         >;
330                 };
331
332                 pinctrl_fec_sleep: fecgrp-sleep {
333                         fsl,pins = <
334                                 MX6SL_PAD_FEC_MDC__GPIO4_IO23      0x3080
335                                 MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25   0x3080
336                                 MX6SL_PAD_FEC_RXD0__GPIO4_IO17     0x3080
337                                 MX6SL_PAD_FEC_RXD1__GPIO4_IO18     0x3080
338                                 MX6SL_PAD_FEC_TX_EN__GPIO4_IO22    0x3080
339                                 MX6SL_PAD_FEC_TXD0__GPIO4_IO24     0x3080
340                                 MX6SL_PAD_FEC_TXD1__GPIO4_IO16     0x3080
341                                 MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26  0x3080
342                         >;
343                 };
344
345                 pinctrl_i2c1: i2c1grp {
346                         fsl,pins = <
347                                 MX6SL_PAD_I2C1_SCL__I2C1_SCL    0x4001b8b1
348                                 MX6SL_PAD_I2C1_SDA__I2C1_SDA    0x4001b8b1
349                         >;
350                 };
351
352
353                 pinctrl_i2c2: i2c2grp {
354                         fsl,pins = <
355                                 MX6SL_PAD_I2C2_SCL__I2C2_SCL    0x4001b8b1
356                                 MX6SL_PAD_I2C2_SDA__I2C2_SDA    0x4001b8b1
357                         >;
358                 };
359
360                 pinctrl_kpp: kppgrp {
361                         fsl,pins = <
362                                 MX6SL_PAD_KEY_ROW0__KEY_ROW0    0x1b010
363                                 MX6SL_PAD_KEY_ROW1__KEY_ROW1    0x1b010
364                                 MX6SL_PAD_KEY_ROW2__KEY_ROW2    0x1b0b0
365                                 MX6SL_PAD_KEY_COL0__KEY_COL0    0x110b0
366                                 MX6SL_PAD_KEY_COL1__KEY_COL1    0x110b0
367                                 MX6SL_PAD_KEY_COL2__KEY_COL2    0x110b0
368                         >;
369                 };
370
371                 pinctrl_lcd: lcdgrp {
372                         fsl,pins = <
373                                 MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0
374                                 MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0
375                                 MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0
376                                 MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0
377                                 MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0
378                                 MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0
379                                 MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0
380                                 MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0
381                                 MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0
382                                 MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0
383                                 MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0
384                                 MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0
385                                 MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0
386                                 MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0
387                                 MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0
388                                 MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0
389                                 MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0
390                                 MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0
391                                 MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0
392                                 MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0
393                                 MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0
394                                 MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0
395                                 MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0
396                                 MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0
397                                 MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0
398                                 MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0
399                                 MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0
400                                 MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0
401                         >;
402                 };
403
404                 pinctrl_led: ledgrp {
405                         fsl,pins = <
406                                 MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
407                         >;
408                 };
409
410                 pinctrl_pwm1: pwmgrp {
411                         fsl,pins = <
412                                 MX6SL_PAD_PWM1__PWM1_OUT 0x110b0
413                         >;
414                 };
415
416                 pinctrl_reg_lcd_3v3: reglcd3v3grp {
417                         fsl,pins = <
418                                 MX6SL_PAD_KEY_ROW5__GPIO4_IO03    0x17059
419                         >;
420                 };
421
422                 pinctrl_uart1: uart1grp {
423                         fsl,pins = <
424                                 MX6SL_PAD_UART1_RXD__UART1_RX_DATA      0x1b0b1
425                                 MX6SL_PAD_UART1_TXD__UART1_TX_DATA      0x1b0b1
426                         >;
427                 };
428
429                 pinctrl_usbotg1: usbotg1grp {
430                         fsl,pins = <
431                                 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID      0x17059
432                         >;
433                 };
434
435                 pinctrl_usdhc1: usdhc1grp {
436                         fsl,pins = <
437                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x17059
438                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x10059
439                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x17059
440                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x17059
441                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x17059
442                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x17059
443                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x17059
444                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x17059
445                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x17059
446                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x17059
447                         >;
448                 };
449
450                 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
451                         fsl,pins = <
452                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x170b9
453                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x100b9
454                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x170b9
455                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x170b9
456                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x170b9
457                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x170b9
458                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x170b9
459                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x170b9
460                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x170b9
461                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x170b9
462                         >;
463                 };
464
465                 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
466                         fsl,pins = <
467                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x170f9
468                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x100f9
469                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x170f9
470                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x170f9
471                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x170f9
472                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x170f9
473                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x170f9
474                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x170f9
475                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x170f9
476                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x170f9
477                         >;
478                 };
479
480                 pinctrl_usdhc2: usdhc2grp {
481                         fsl,pins = <
482                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x17059
483                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x10059
484                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x17059
485                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x17059
486                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x17059
487                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x17059
488                         >;
489                 };
490
491                 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
492                         fsl,pins = <
493                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x170b9
494                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x100b9
495                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x170b9
496                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x170b9
497                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x170b9
498                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x170b9
499                         >;
500                 };
501
502                 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
503                         fsl,pins = <
504                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x170f9
505                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x100f9
506                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x170f9
507                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x170f9
508                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x170f9
509                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x170f9
510                         >;
511                 };
512
513                 pinctrl_usdhc3: usdhc3grp {
514                         fsl,pins = <
515                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x17059
516                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x10059
517                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x17059
518                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x17059
519                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x17059
520                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x17059
521                         >;
522                 };
523
524                 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
525                         fsl,pins = <
526                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x170b9
527                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x100b9
528                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x170b9
529                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x170b9
530                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x170b9
531                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x170b9
532                         >;
533                 };
534
535                 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
536                         fsl,pins = <
537                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x170f9
538                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x100f9
539                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x170f9
540                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x170f9
541                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x170f9
542                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x170f9
543                         >;
544                 };
545         };
546 };
547
548 &kpp {
549         pinctrl-names = "default";
550         pinctrl-0 = <&pinctrl_kpp>;
551         linux,keymap = <
552                         MATRIX_KEY(0x0, 0x0, KEY_UP)         /* ROW0, COL0 */
553                         MATRIX_KEY(0x0, 0x1, KEY_DOWN)       /* ROW0, COL1 */
554                         MATRIX_KEY(0x0, 0x2, KEY_ENTER)      /* ROW0, COL2 */
555                         MATRIX_KEY(0x1, 0x0, KEY_HOME)       /* ROW1, COL0 */
556                         MATRIX_KEY(0x1, 0x1, KEY_RIGHT)      /* ROW1, COL1 */
557                         MATRIX_KEY(0x1, 0x2, KEY_LEFT)       /* ROW1, COL2 */
558                         MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
559                         MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP)   /* ROW2, COL1 */
560         >;
561         status = "okay";
562 };
563
564 &lcdif {
565         pinctrl-names = "default";
566         pinctrl-0 = <&pinctrl_lcd>;
567         status = "okay";
568
569         port {
570                 display_out: endpoint {
571                         remote-endpoint = <&panel_in>;
572                 };
573         };
574 };
575
576 &pwm1 {
577         pinctrl-names = "default";
578         pinctrl-0 = <&pinctrl_pwm1>;
579         status = "okay";
580 };
581
582 &snvs_poweroff {
583         status = "okay";
584 };
585
586 &ssi2 {
587         status = "okay";
588 };
589
590 &uart1 {
591         pinctrl-names = "default";
592         pinctrl-0 = <&pinctrl_uart1>;
593         status = "okay";
594 };
595
596 &usbotg1 {
597         vbus-supply = <&reg_usb_otg1_vbus>;
598         pinctrl-names = "default";
599         pinctrl-0 = <&pinctrl_usbotg1>;
600         disable-over-current;
601         status = "okay";
602 };
603
604 &usbotg2 {
605         vbus-supply = <&reg_usb_otg2_vbus>;
606         dr_mode = "host";
607         disable-over-current;
608         status = "okay";
609 };
610
611 &usdhc1 {
612         pinctrl-names = "default", "state_100mhz", "state_200mhz";
613         pinctrl-0 = <&pinctrl_usdhc1>;
614         pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
615         pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
616         bus-width = <8>;
617         cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
618         wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
619         status = "okay";
620 };
621
622 &usdhc2 {
623         pinctrl-names = "default", "state_100mhz", "state_200mhz";
624         pinctrl-0 = <&pinctrl_usdhc2>;
625         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
626         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
627         cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
628         wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
629         status = "okay";
630 };
631
632 &usdhc3 {
633         pinctrl-names = "default", "state_100mhz", "state_200mhz";
634         pinctrl-0 = <&pinctrl_usdhc3>;
635         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
636         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
637         cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
638         status = "okay";
639 };