arch/arm/boot/dts/imx6sl-evk.dts

   1 /*
   2  * Copyright (C) 2013 Freescale Semiconductor, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/input/input.h>
  13 #include "imx6sl.dtsi"
  14
  15 / {
  16         model = "Freescale i.MX6 SoloLite EVK Board";
  17         compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
  18
  19         memory {
  20                 reg = <0x80000000 0x40000000>;
  21         };
  22
  23         backlight_display: backlight_display {
  24                 compatible = "pwm-backlight";
  25                 pwms = <&pwm1 0 5000000>;
  26                 brightness-levels = <0 4 8 16 32 64 128 255>;
  27                 default-brightness-level = <6>;
  28         };
  29
  30         leds {
  31                 compatible = "gpio-leds";
  32                 pinctrl-names = "default";
  33                 pinctrl-0 = <&pinctrl_led>;
  34
  35                 user {
  36                         label = "debug";
  37                         gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
  38                         linux,default-trigger = "heartbeat";
  39                 };
  40         };
  41
  42         reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
  43                 compatible = "regulator-fixed";
  44                 regulator-name = "usb_otg1_vbus";
  45                 regulator-min-microvolt = <5000000>;
  46                 regulator-max-microvolt = <5000000>;
  47                 gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
  48                 enable-active-high;
  49                 vin-supply = <&swbst_reg>;
  50         };
  51
  52         reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
  53                 compatible = "regulator-fixed";
  54                 regulator-name = "usb_otg2_vbus";
  55                 regulator-min-microvolt = <5000000>;
  56                 regulator-max-microvolt = <5000000>;
  57                 gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
  58                 enable-active-high;
  59                 vin-supply = <&swbst_reg>;
  60         };
  61
  62         reg_aud3v: regulator-aud3v {
  63                 compatible = "regulator-fixed";
  64                 regulator-name = "wm8962-supply-3v15";
  65                 regulator-min-microvolt = <3150000>;
  66                 regulator-max-microvolt = <3150000>;
  67                 regulator-boot-on;
  68         };
  69
  70         reg_aud4v: regulator-aud4v {
  71                 compatible = "regulator-fixed";
  72                 regulator-name = "wm8962-supply-4v2";
  73                 regulator-min-microvolt = <4325000>;
  74                 regulator-max-microvolt = <4325000>;
  75                 regulator-boot-on;
  76         };
  77
  78         reg_lcd_3v3: regulator-lcd-3v3 {
  79                 compatible = "regulator-fixed";
  80                 regulator-name = "lcd-3v3";
  81                 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
  82                 enable-active-high;
  83         };
  84
  85         reg_lcd_5v: regulator-lcd-5v {
  86                 compatible = "regulator-fixed";
  87                 regulator-name = "lcd-5v0";
  88                 regulator-min-microvolt = <5000000>;
  89                 regulator-max-microvolt = <5000000>;
  90         };
  91
  92         sound {
  93                 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
  94                 model = "wm8962-audio";
  95                 ssi-controller = <&ssi2>;
  96                 audio-codec = <&codec>;
  97                 audio-routing =
  98                         "Headphone Jack", "HPOUTL",
  99                         "Headphone Jack", "HPOUTR",
 100                         "Ext Spk", "SPKOUTL",
 101                         "Ext Spk", "SPKOUTR",
 102                         "AMIC", "MICBIAS",
 103                         "IN3R", "AMIC";
 104                 mux-int-port = <2>;
 105                 mux-ext-port = <3>;
 106         };
 107
 108         panel {
 109                 compatible = "sii,43wvf1g";
 110                 backlight = <&backlight_display>;
 111                 dvdd-supply = <&reg_lcd_3v3>;
 112                 avdd-supply = <&reg_lcd_5v>;
 113
 114                 port {
 115                         panel_in: endpoint {
 116                                 remote-endpoint = <&display_out>;
 117                         };
 118                 };
 119         };
 120 };
 121
 122 &audmux {
 123         pinctrl-names = "default";
 124         pinctrl-0 = <&pinctrl_audmux3>;
 125         status = "okay";
 126 };
 127
 128 &ecspi1 {
 129         cs-gpios = <&gpio4 11 0>;
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&pinctrl_ecspi1>;
 132         status = "okay";
 133
 134         flash: m25p80@0 {
 135                 #address-cells = <1>;
 136                 #size-cells = <1>;
 137                 compatible = "st,m25p32", "jedec,spi-nor";
 138                 spi-max-frequency = <20000000>;
 139                 reg = <0>;
 140         };
 141 };
 142
 143 &fec {
 144         pinctrl-names = "default", "sleep";
 145         pinctrl-0 = <&pinctrl_fec>;
 146         pinctrl-1 = <&pinctrl_fec_sleep>;
 147         phy-mode = "rmii";
 148         status = "okay";
 149 };
 150
 151 &i2c1 {
 152         clock-frequency = <100000>;
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&pinctrl_i2c1>;
 155         status = "okay";
 156
 157         pmic: pfuze100@8 {
 158                 compatible = "fsl,pfuze100";
 159                 reg = <0x08>;
 160
 161                 regulators {
 162                         sw1a_reg: sw1ab {
 163                                 regulator-min-microvolt = <300000>;
 164                                 regulator-max-microvolt = <1875000>;
 165                                 regulator-boot-on;
 166                                 regulator-always-on;
 167                                 regulator-ramp-delay = <6250>;
 168                         };
 169
 170                         sw1c_reg: sw1c {
 171                                 regulator-min-microvolt = <300000>;
 172                                 regulator-max-microvolt = <1875000>;
 173                                 regulator-boot-on;
 174                                 regulator-always-on;
 175                                 regulator-ramp-delay = <6250>;
 176                         };
 177
 178                         sw2_reg: sw2 {
 179                                 regulator-min-microvolt = <800000>;
 180                                 regulator-max-microvolt = <3300000>;
 181                                 regulator-boot-on;
 182                                 regulator-always-on;
 183                         };
 184
 185                         sw3a_reg: sw3a {
 186                                 regulator-min-microvolt = <400000>;
 187                                 regulator-max-microvolt = <1975000>;
 188                                 regulator-boot-on;
 189                                 regulator-always-on;
 190                         };
 191
 192                         sw3b_reg: sw3b {
 193                                 regulator-min-microvolt = <400000>;
 194                                 regulator-max-microvolt = <1975000>;
 195                                 regulator-boot-on;
 196                                 regulator-always-on;
 197                         };
 198
 199                         sw4_reg: sw4 {
 200                                 regulator-min-microvolt = <800000>;
 201                                 regulator-max-microvolt = <3300000>;
 202                         };
 203
 204                         swbst_reg: swbst {
 205                                 regulator-min-microvolt = <5000000>;
 206                                 regulator-max-microvolt = <5150000>;
 207                         };
 208
 209                         snvs_reg: vsnvs {
 210                                 regulator-min-microvolt = <1000000>;
 211                                 regulator-max-microvolt = <3000000>;
 212                                 regulator-boot-on;
 213                                 regulator-always-on;
 214                         };
 215
 216                         vref_reg: vrefddr {
 217                                 regulator-boot-on;
 218                                 regulator-always-on;
 219                         };
 220
 221                         vgen1_reg: vgen1 {
 222                                 regulator-min-microvolt = <800000>;
 223                                 regulator-max-microvolt = <1550000>;
 224                                 regulator-always-on;
 225                         };
 226
 227                         vgen2_reg: vgen2 {
 228                                 regulator-min-microvolt = <800000>;
 229                                 regulator-max-microvolt = <1550000>;
 230                         };
 231
 232                         vgen3_reg: vgen3 {
 233                                 regulator-min-microvolt = <1800000>;
 234                                 regulator-max-microvolt = <3300000>;
 235                         };
 236
 237                         vgen4_reg: vgen4 {
 238                                 regulator-min-microvolt = <1800000>;
 239                                 regulator-max-microvolt = <3300000>;
 240                                 regulator-always-on;
 241                         };
 242
 243                         vgen5_reg: vgen5 {
 244                                 regulator-min-microvolt = <1800000>;
 245                                 regulator-max-microvolt = <3300000>;
 246                                 regulator-always-on;
 247                         };
 248
 249                         vgen6_reg: vgen6 {
 250                                 regulator-min-microvolt = <1800000>;
 251                                 regulator-max-microvolt = <3300000>;
 252                                 regulator-always-on;
 253                         };
 254                 };
 255         };
 256 };
 257
 258 &i2c2 {
 259         clock-frequency = <100000>;
 260         pinctrl-names = "default";
 261         pinctrl-0 = <&pinctrl_i2c2>;
 262         status = "okay";
 263
 264         codec: wm8962@1a {
 265                 compatible = "wlf,wm8962";
 266                 reg = <0x1a>;
 267                 clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
 268                 DCVDD-supply = <&vgen3_reg>;
 269                 DBVDD-supply = <&reg_aud3v>;
 270                 AVDD-supply = <&vgen3_reg>;
 271                 CPVDD-supply = <&vgen3_reg>;
 272                 MICVDD-supply = <&reg_aud3v>;
 273                 PLLVDD-supply = <&vgen3_reg>;
 274                 SPKVDD1-supply = <&reg_aud4v>;
 275                 SPKVDD2-supply = <&reg_aud4v>;
 276         };
 277 };
 278
 279 &iomuxc {
 280         pinctrl-names = "default";
 281         pinctrl-0 = <&pinctrl_hog>;
 282
 283         imx6sl-evk {
 284                 pinctrl_hog: hoggrp {
 285                         fsl,pins = <
 286                                 MX6SL_PAD_KEY_ROW7__GPIO4_IO07    0x17059
 287                                 MX6SL_PAD_KEY_COL7__GPIO4_IO06    0x17059
 288                                 MX6SL_PAD_SD2_DAT7__GPIO5_IO00    0x17059
 289                                 MX6SL_PAD_SD2_DAT6__GPIO4_IO29    0x17059
 290                                 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
 291                                 MX6SL_PAD_KEY_COL4__GPIO4_IO00  0x80000000
 292                                 MX6SL_PAD_KEY_COL5__GPIO4_IO02  0x80000000
 293                                 MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
 294                         >;
 295                 };
 296
 297                 pinctrl_audmux3: audmux3grp {
 298                         fsl,pins = <
 299                                 MX6SL_PAD_AUD_RXD__AUD3_RXD       0x4130b0
 300                                 MX6SL_PAD_AUD_TXC__AUD3_TXC       0x4130b0
 301                                 MX6SL_PAD_AUD_TXD__AUD3_TXD       0x4110b0
 302                                 MX6SL_PAD_AUD_TXFS__AUD3_TXFS     0x4130b0
 303                         >;
 304                 };
 305
 306                 pinctrl_ecspi1: ecspi1grp {
 307                         fsl,pins = <
 308                                 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO      0x100b1
 309                                 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI      0x100b1
 310                                 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK      0x100b1
 311                                 MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11        0x80000000
 312                         >;
 313                 };
 314
 315                 pinctrl_fec: fecgrp {
 316                         fsl,pins = <
 317                                 MX6SL_PAD_FEC_MDC__FEC_MDC              0x1b0b0
 318                                 MX6SL_PAD_FEC_MDIO__FEC_MDIO            0x1b0b0
 319                                 MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV         0x1b0b0
 320                                 MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0        0x1b0b0
 321                                 MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1        0x1b0b0
 322                                 MX6SL_PAD_FEC_TX_EN__FEC_TX_EN          0x1b0b0
 323                                 MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0        0x1b0b0
 324                                 MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1        0x1b0b0
 325                                 MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT      0x4001b0a8
 326                         >;
 327                 };
 328
 329                 pinctrl_fec_sleep: fecgrp-sleep {
 330                         fsl,pins = <
 331                                 MX6SL_PAD_FEC_MDC__GPIO4_IO23      0x3080
 332                                 MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25   0x3080
 333                                 MX6SL_PAD_FEC_RXD0__GPIO4_IO17     0x3080
 334                                 MX6SL_PAD_FEC_RXD1__GPIO4_IO18     0x3080
 335                                 MX6SL_PAD_FEC_TX_EN__GPIO4_IO22    0x3080
 336                                 MX6SL_PAD_FEC_TXD0__GPIO4_IO24     0x3080
 337                                 MX6SL_PAD_FEC_TXD1__GPIO4_IO16     0x3080
 338                                 MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26  0x3080
 339                         >;
 340                 };
 341
 342                 pinctrl_i2c1: i2c1grp {
 343                         fsl,pins = <
 344                                 MX6SL_PAD_I2C1_SCL__I2C1_SCL    0x4001b8b1
 345                                 MX6SL_PAD_I2C1_SDA__I2C1_SDA    0x4001b8b1
 346                         >;
 347                 };
 348
 349
 350                 pinctrl_i2c2: i2c2grp {
 351                         fsl,pins = <
 352                                 MX6SL_PAD_I2C2_SCL__I2C2_SCL    0x4001b8b1
 353                                 MX6SL_PAD_I2C2_SDA__I2C2_SDA    0x4001b8b1
 354                         >;
 355                 };
 356
 357                 pinctrl_kpp: kppgrp {
 358                         fsl,pins = <
 359                                 MX6SL_PAD_KEY_ROW0__KEY_ROW0    0x1b010
 360                                 MX6SL_PAD_KEY_ROW1__KEY_ROW1    0x1b010
 361                                 MX6SL_PAD_KEY_ROW2__KEY_ROW2    0x1b0b0
 362                                 MX6SL_PAD_KEY_COL0__KEY_COL0    0x110b0
 363                                 MX6SL_PAD_KEY_COL1__KEY_COL1    0x110b0
 364                                 MX6SL_PAD_KEY_COL2__KEY_COL2    0x110b0
 365                         >;
 366                 };
 367
 368                 pinctrl_lcd: lcdgrp {
 369                         fsl,pins = <
 370                                 MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0
 371                                 MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0
 372                                 MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0
 373                                 MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0
 374                                 MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0
 375                                 MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0
 376                                 MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0
 377                                 MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0
 378                                 MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0
 379                                 MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0
 380                                 MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0
 381                                 MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0
 382                                 MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0
 383                                 MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0
 384                                 MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0
 385                                 MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0
 386                                 MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0
 387                                 MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0
 388                                 MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0
 389                                 MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0
 390                                 MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0
 391                                 MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0
 392                                 MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0
 393                                 MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0
 394                                 MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0
 395                                 MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0
 396                                 MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0
 397                                 MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0
 398                         >;
 399                 };
 400
 401                 pinctrl_led: ledgrp {
 402                         fsl,pins = <
 403                                 MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
 404                         >;
 405                 };
 406
 407                 pinctrl_pwm1: pwmgrp {
 408                         fsl,pins = <
 409                                 MX6SL_PAD_PWM1__PWM1_OUT 0x110b0
 410                         >;
 411                 };
 412
 413                 pinctrl_uart1: uart1grp {
 414                         fsl,pins = <
 415                                 MX6SL_PAD_UART1_RXD__UART1_RX_DATA      0x1b0b1
 416                                 MX6SL_PAD_UART1_TXD__UART1_TX_DATA      0x1b0b1
 417                         >;
 418                 };
 419
 420                 pinctrl_usbotg1: usbotg1grp {
 421                         fsl,pins = <
 422                                 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID      0x17059
 423                         >;
 424                 };
 425
 426                 pinctrl_usdhc1: usdhc1grp {
 427                         fsl,pins = <
 428                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x17059
 429                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x10059
 430                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x17059
 431                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x17059
 432                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x17059
 433                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x17059
 434                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x17059
 435                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x17059
 436                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x17059
 437                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x17059
 438                         >;
 439                 };
 440
 441                 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
 442                         fsl,pins = <
 443                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x170b9
 444                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x100b9
 445                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x170b9
 446                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x170b9
 447                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x170b9
 448                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x170b9
 449                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x170b9
 450                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x170b9
 451                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x170b9
 452                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x170b9
 453                         >;
 454                 };
 455
 456                 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
 457                         fsl,pins = <
 458                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x170f9
 459                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x100f9
 460                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x170f9
 461                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x170f9
 462                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x170f9
 463                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x170f9
 464                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x170f9
 465                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x170f9
 466                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x170f9
 467                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x170f9
 468                         >;
 469                 };
 470
 471                 pinctrl_usdhc2: usdhc2grp {
 472                         fsl,pins = <
 473                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x17059
 474                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x10059
 475                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x17059
 476                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x17059
 477                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x17059
 478                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x17059
 479                         >;
 480                 };
 481
 482                 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
 483                         fsl,pins = <
 484                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x170b9
 485                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x100b9
 486                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x170b9
 487                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x170b9
 488                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x170b9
 489                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x170b9
 490                         >;
 491                 };
 492
 493                 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
 494                         fsl,pins = <
 495                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x170f9
 496                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x100f9
 497                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x170f9
 498                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x170f9
 499                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x170f9
 500                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x170f9
 501                         >;
 502                 };
 503
 504                 pinctrl_usdhc3: usdhc3grp {
 505                         fsl,pins = <
 506                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x17059
 507                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x10059
 508                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x17059
 509                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x17059
 510                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x17059
 511                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x17059
 512                         >;
 513                 };
 514
 515                 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
 516                         fsl,pins = <
 517                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x170b9
 518                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x100b9
 519                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x170b9
 520                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x170b9
 521                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x170b9
 522                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x170b9
 523                         >;
 524                 };
 525
 526                 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
 527                         fsl,pins = <
 528                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x170f9
 529                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x100f9
 530                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x170f9
 531                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x170f9
 532                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x170f9
 533                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x170f9
 534                         >;
 535                 };
 536         };
 537 };
 538
 539 &kpp {
 540         pinctrl-names = "default";
 541         pinctrl-0 = <&pinctrl_kpp>;
 542         linux,keymap = <
 543                         MATRIX_KEY(0x0, 0x0, KEY_UP)         /* ROW0, COL0 */
 544                         MATRIX_KEY(0x0, 0x1, KEY_DOWN)       /* ROW0, COL1 */
 545                         MATRIX_KEY(0x0, 0x2, KEY_ENTER)      /* ROW0, COL2 */
 546                         MATRIX_KEY(0x1, 0x0, KEY_HOME)       /* ROW1, COL0 */
 547                         MATRIX_KEY(0x1, 0x1, KEY_RIGHT)      /* ROW1, COL1 */
 548                         MATRIX_KEY(0x1, 0x2, KEY_LEFT)       /* ROW1, COL2 */
 549                         MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
 550                         MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP)   /* ROW2, COL1 */
 551         >;
 552         status = "okay";
 553 };
 554
 555 &lcdif {
 556         pinctrl-names = "default";
 557         pinctrl-0 = <&pinctrl_lcd>;
 558         status = "okay";
 559
 560         port {
 561                 display_out: endpoint {
 562                         remote-endpoint = <&panel_in>;
 563                 };
 564         };
 565 };
 566
 567 &pwm1 {
 568         pinctrl-names = "default";
 569         pinctrl-0 = <&pinctrl_pwm1>;
 570         status = "okay";
 571 };
 572
 573 &snvs_poweroff {
 574         status = "okay";
 575 };
 576
 577 &ssi2 {
 578         status = "okay";
 579 };
 580
 581 &uart1 {
 582         pinctrl-names = "default";
 583         pinctrl-0 = <&pinctrl_uart1>;
 584         status = "okay";
 585 };
 586
 587 &usbotg1 {
 588         vbus-supply = <&reg_usb_otg1_vbus>;
 589         pinctrl-names = "default";
 590         pinctrl-0 = <&pinctrl_usbotg1>;
 591         disable-over-current;
 592         status = "okay";
 593 };
 594
 595 &usbotg2 {
 596         vbus-supply = <&reg_usb_otg2_vbus>;
 597         dr_mode = "host";
 598         disable-over-current;
 599         status = "okay";
 600 };
 601
 602 &usdhc1 {
 603         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 604         pinctrl-0 = <&pinctrl_usdhc1>;
 605         pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
 606         pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
 607         bus-width = <8>;
 608         cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
 609         wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
 610         status = "okay";
 611 };
 612
 613 &usdhc2 {
 614         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 615         pinctrl-0 = <&pinctrl_usdhc2>;
 616         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
 617         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
 618         cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
 619         wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
 620         status = "okay";
 621 };
 622
 623 &usdhc3 {
 624         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 625         pinctrl-0 = <&pinctrl_usdhc3>;
 626         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 627         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 628         cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
 629         status = "okay";
 630 };