Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6qdl-wandboard.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright 2013 Freescale Semiconductor, Inc.
4  *
5  * Author: Fabio Estevam <fabio.estevam@freescale.com>
6  */
7
8 #include <dt-bindings/gpio/gpio.h>
9
10 / {
11         chosen {
12                 stdout-path = &uart1;
13         };
14
15         sound {
16                 compatible = "fsl,imx6-wandboard-sgtl5000",
17                              "fsl,imx-audio-sgtl5000";
18                 model = "imx6-wandboard-sgtl5000";
19                 ssi-controller = <&ssi1>;
20                 audio-codec = <&codec>;
21                 audio-routing =
22                         "MIC_IN", "Mic Jack",
23                         "Mic Jack", "Mic Bias",
24                         "Headphone Jack", "HP_OUT";
25                 mux-int-port = <1>;
26                 mux-ext-port = <3>;
27         };
28
29         sound-spdif {
30                 compatible = "fsl,imx-audio-spdif";
31                 model = "imx-spdif";
32                 spdif-controller = <&spdif>;
33                 spdif-out;
34         };
35
36         reg_2p5v: regulator-2p5v {
37                 compatible = "regulator-fixed";
38                 regulator-name = "2P5V";
39                 regulator-min-microvolt = <2500000>;
40                 regulator-max-microvolt = <2500000>;
41                 regulator-always-on;
42         };
43
44         reg_3p3v: regulator-3p3v {
45                 compatible = "regulator-fixed";
46                 regulator-name = "3P3V";
47                 regulator-min-microvolt = <3300000>;
48                 regulator-max-microvolt = <3300000>;
49                 regulator-always-on;
50         };
51
52         reg_usb_otg_vbus: regulator-usbotgvbus {
53                 compatible = "regulator-fixed";
54                 regulator-name = "usb_otg_vbus";
55                 regulator-min-microvolt = <5000000>;
56                 regulator-max-microvolt = <5000000>;
57                 pinctrl-names = "default";
58                 pinctrl-0 = <&pinctrl_usbotgvbus>;
59                 gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
60         };
61 };
62
63 &audmux {
64         pinctrl-names = "default";
65         pinctrl-0 = <&pinctrl_audmux>;
66         status = "okay";
67 };
68
69 &hdmi {
70         ddc-i2c-bus = <&i2c1>;
71         status = "okay";
72 };
73
74 &i2c1 {
75         clock-frequency = <100000>;
76         pinctrl-names = "default";
77         pinctrl-0 = <&pinctrl_i2c1>;
78         status = "okay";
79 };
80
81 &i2c2 {
82         clock-frequency = <100000>;
83         pinctrl-names = "default";
84         pinctrl-0 = <&pinctrl_i2c2>;
85         status = "okay";
86
87         codec: sgtl5000@a {
88                 pinctrl-names = "default";
89                 pinctrl-0 = <&pinctrl_mclk>;
90                 compatible = "fsl,sgtl5000";
91                 reg = <0x0a>;
92                 clocks = <&clks IMX6QDL_CLK_CKO>;
93                 VDDA-supply = <&reg_2p5v>;
94                 VDDIO-supply = <&reg_3p3v>;
95                 lrclk-strength = <3>;
96         };
97 };
98
99 &iomuxc {
100         pinctrl-names = "default";
101
102         imx6qdl-wandboard {
103
104                 pinctrl_audmux: audmuxgrp {
105                         fsl,pins = <
106                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
107                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
108                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
109                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
110                         >;
111                 };
112
113                 pinctrl_enet: enetgrp {
114                         fsl,pins = <
115                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
116                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
117                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
118                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
119                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
120                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
121                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
122                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
123                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
124                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
125                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
126                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
127                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
128                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
129                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
130                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
131                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
132                         >;
133                 };
134
135                 pinctrl_i2c1: i2c1grp {
136                         fsl,pins = <
137                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
138                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
139                         >;
140                 };
141
142                 pinctrl_i2c2: i2c2grp {
143                         fsl,pins = <
144                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
145                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
146                         >;
147                 };
148
149                 pinctrl_mclk: mclkgrp {
150                         fsl,pins = <
151                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0
152                         >;
153                 };
154
155                 pinctrl_spdif: spdifgrp {
156                         fsl,pins = <
157                                 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT         0x1b0b0
158                         >;
159                 };
160
161                 pinctrl_uart1: uart1grp {
162                         fsl,pins = <
163                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
164                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
165                         >;
166                 };
167
168                 pinctrl_uart3: uart3grp {
169                         fsl,pins = <
170                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
171                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
172                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
173                                 MX6QDL_PAD_EIM_EB3__UART3_RTS_B         0x1b0b1
174                         >;
175                 };
176
177                 pinctrl_usbotg: usbotggrp {
178                         fsl,pins = <
179                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
180                         >;
181                 };
182
183                 pinctrl_usbotgvbus: usbotgvbusgrp {
184                         fsl,pins = <
185                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x130b0
186                         >;
187                 };
188
189                 pinctrl_usdhc1: usdhc1grp {
190                         fsl,pins = <
191                                 MX6QDL_PAD_SD1_CMD__SD1_CMD             0x17059
192                                 MX6QDL_PAD_SD1_CLK__SD1_CLK             0x10059
193                                 MX6QDL_PAD_SD1_DAT0__SD1_DATA0          0x17059
194                                 MX6QDL_PAD_SD1_DAT1__SD1_DATA1          0x17059
195                                 MX6QDL_PAD_SD1_DAT2__SD1_DATA2          0x17059
196                                 MX6QDL_PAD_SD1_DAT3__SD1_DATA3          0x17059
197                         >;
198                 };
199
200                 pinctrl_usdhc2: usdhc2grp {
201                         fsl,pins = <
202                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
203                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
204                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
205                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
206                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
207                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
208                         >;
209                 };
210
211                 pinctrl_usdhc3: usdhc3grp {
212                         fsl,pins = <
213                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
214                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
215                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
216                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
217                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
218                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
219                         >;
220                 };
221         };
222 };
223
224 &fec {
225         pinctrl-names = "default";
226         pinctrl-0 = <&pinctrl_enet>;
227         phy-mode = "rgmii-id";
228         phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
229         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
230                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
231         fsl,err006687-workaround-present;
232         status = "okay";
233 };
234
235 &spdif {
236         pinctrl-names = "default";
237         pinctrl-0 = <&pinctrl_spdif>;
238         status = "okay";
239 };
240
241 &ssi1 {
242         status = "okay";
243 };
244
245 &uart1 {
246         pinctrl-names = "default";
247         pinctrl-0 = <&pinctrl_uart1>;
248         status = "okay";
249 };
250
251 &uart3 {
252         pinctrl-names = "default";
253         pinctrl-0 = <&pinctrl_uart3>;
254         uart-has-rtscts;
255         status = "okay";
256 };
257
258 &usbh1 {
259         status = "okay";
260 };
261
262 &usbotg {
263         vbus-supply = <&reg_usb_otg_vbus>;
264         pinctrl-names = "default";
265         pinctrl-0 = <&pinctrl_usbotg>;
266         disable-over-current;
267         dr_mode = "otg";
268         status = "okay";
269 };
270
271 &usdhc1 {
272         pinctrl-names = "default";
273         pinctrl-0 = <&pinctrl_usdhc1>;
274         cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
275         status = "okay";
276 };
277
278 &usdhc3 {
279         pinctrl-names = "default";
280         pinctrl-0 = <&pinctrl_usdhc3>;
281         cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
282         status = "okay";
283 };