Merge branch 'omap-for-v4.21/dt' into omap-for-v5.1/dt
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6qdl-udoo.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright 2013 Freescale Semiconductor, Inc.
4  *
5  * Author: Fabio Estevam <fabio.estevam@freescale.com>
6  */
7
8 / {
9         aliases {
10                 backlight = &backlight;
11                 panelchan = &panelchan;
12                 panel7 = &panel7;
13                 touchscreenp7 = &touchscreenp7;
14         };
15
16         chosen {
17                 stdout-path = &uart2;
18         };
19
20         backlight: backlight {
21                 compatible = "gpio-backlight";
22                 gpios = <&gpio1 4 0>;
23                 default-on;
24                 status = "disabled";
25         };
26
27         gpio-poweroff {
28                 compatible = "gpio-poweroff";
29                 gpios = <&gpio2 4 0>;
30                 pinctrl-0 = <&pinctrl_power_off>;
31                 pinctrl-names = "default";
32         };
33
34         memory@10000000 {
35                 device_type = "memory";
36                 reg = <0x10000000 0x40000000>;
37         };
38
39         panel7: panel7 {
40                 /*
41                  * in reality it is a -20t (parallel) model,
42                  * but with LVDS bridge chip attached,
43                  * so it is equivalent to -19t model in drive
44                  * characteristics
45                  */
46                 compatible = "urt,umsh-8596md-19t";
47                 pinctrl-names = "default";
48                 pinctrl-0 = <&pinctrl_panel>;
49                 power-supply = <&reg_panel>;
50                 backlight = <&backlight>;
51                 status = "disabled";
52
53                 port {
54                         panel_in: endpoint {
55                                 remote-endpoint = <&lvds0_out>;
56                         };
57                 };
58         };
59
60         regulators {
61                 compatible = "simple-bus";
62                 #address-cells = <1>;
63                 #size-cells = <0>;
64
65                 reg_usb_h1_vbus: regulator@0 {
66                         compatible = "regulator-fixed";
67                         reg = <0>;
68                         regulator-name = "usb_h1_vbus";
69                         regulator-min-microvolt = <5000000>;
70                         regulator-max-microvolt = <5000000>;
71                         enable-active-high;
72                         startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
73                         gpio = <&gpio7 12 0>;
74                 };
75
76                 reg_panel: regulator@1 {
77                         compatible = "regulator-fixed";
78                         reg = <1>;
79                         regulator-name = "lcd_panel";
80                         enable-active-high;
81                         gpio = <&gpio1 2 0>;
82                 };
83         };
84
85         sound {
86                 compatible = "fsl,imx6q-udoo-ac97",
87                              "fsl,imx-audio-ac97";
88                 model = "fsl,imx6q-udoo-ac97";
89                 audio-cpu = <&ssi1>;
90                 audio-routing =
91                         "RX", "Mic Jack",
92                         "Headphone Jack", "TX";
93                 mux-int-port = <1>;
94                 mux-ext-port = <6>;
95         };
96 };
97
98 &fec {
99         pinctrl-names = "default";
100         pinctrl-0 = <&pinctrl_enet>;
101         phy-mode = "rgmii";
102         status = "okay";
103 };
104
105 &hdmi {
106         ddc-i2c-bus = <&i2c2>;
107         status = "okay";
108 };
109
110 &i2c2 {
111         clock-frequency = <100000>;
112         pinctrl-names = "default";
113         pinctrl-0 = <&pinctrl_i2c2>;
114         status = "okay";
115 };
116
117 &i2c3 {
118         clock-frequency = <100000>;
119         pinctrl-names = "default";
120         pinctrl-0 = <&pinctrl_i2c3>;
121         status = "okay";
122
123         touchscreenp7: touchscreenp7@55 {
124                 compatible = "sitronix,st1232";
125                 pinctrl-names = "default";
126                 pinctrl-0 = <&pinctrl_touchscreenp7>;
127                 reg = <0x55>;
128                 interrupt-parent = <&gpio1>;
129                 interrupts = <13 8>;
130                 gpios = <&gpio1 15 0>;
131                 status = "disabled";
132         };
133 };
134
135 &iomuxc {
136         imx6q-udoo {
137                 pinctrl_enet: enetgrp {
138                         fsl,pins = <
139                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
140                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
141                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
142                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
143                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
144                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
145                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
146                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
147                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
148                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
149                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
150                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
151                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
152                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
153                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
154                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
155                         >;
156                 };
157
158                 pinctrl_i2c2: i2c2grp {
159                         fsl,pins = <
160                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
161                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
162                         >;
163                 };
164
165                 pinctrl_i2c3: i2c3grp {
166                         fsl,pins = <
167                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001f8b1
168                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001f8b1
169                         >;
170                 };
171
172                 pinctrl_panel: panelgrp {
173                         fsl,pins = <
174                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x70
175                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x70
176                         >;
177                 };
178
179                 pinctrl_power_off: poweroffgrp {
180                         fsl,pins = <
181                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x30
182                         >;
183                 };
184
185                 pinctrl_touchscreenp7: touchscreenp7grp {
186                         fsl,pins = <
187                                 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15         0x70
188                                 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13         0x1b0b0
189                         >;
190                 };
191
192                 pinctrl_uart2: uart2grp {
193                         fsl,pins = <
194                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
195                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
196                         >;
197                 };
198
199                 pinctrl_uart4: uart4grp {
200                         fsl,pins = <
201                                 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
202                                 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA      0x1b0b1
203                         >;
204                 };
205
206                 pinctrl_usbh: usbhgrp {
207                         fsl,pins = <
208                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
209                                 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
210                         >;
211                 };
212
213                 pinctrl_usdhc3: usdhc3grp {
214                         fsl,pins = <
215                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
216                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
217                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
218                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
219                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
220                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
221                         >;
222                 };
223
224                 pinctrl_ac97_running: ac97running {
225                         fsl,pins = <
226                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
227                                 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS          0x1b0b0
228                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
229                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
230                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
231                         >;
232                 };
233
234                 pinctrl_ac97_warm_reset: ac97warmreset {
235                         fsl,pins = <
236                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
237                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
238                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
239                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
240                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
241                         >;
242                 };
243
244                 pinctrl_ac97_reset: ac97reset {
245                         fsl,pins = <
246                                 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18         0x1b0b0
247                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
248                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
249                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
250                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
251                         >;
252                 };
253         };
254 };
255
256 &ldb {
257         status = "okay";
258
259         panelchan: lvds-channel@0 {
260                 port@4 {
261                         reg = <4>;
262
263                         lvds0_out: endpoint {
264                                 remote-endpoint = <&panel_in>;
265                         };
266                 };
267         };
268 };
269
270 &uart2 {
271         pinctrl-names = "default";
272         pinctrl-0 = <&pinctrl_uart2>;
273         status = "okay";
274 };
275
276 &uart4 {
277         pinctrl-names = "default";
278         pinctrl-0 = <&pinctrl_uart4>;
279         status = "okay";
280 };
281
282 &usbh1 {
283         pinctrl-names = "default";
284         pinctrl-0 = <&pinctrl_usbh>;
285         vbus-supply = <&reg_usb_h1_vbus>;
286         clocks = <&clks IMX6QDL_CLK_CKO>;
287         status = "okay";
288 };
289
290 &usdhc3 {
291         pinctrl-names = "default";
292         pinctrl-0 = <&pinctrl_usdhc3>;
293         non-removable;
294         status = "okay";
295 };
296
297 &audmux {
298         status = "okay";
299 };
300
301 &ssi1 {
302         cell-index = <0>;
303         fsl,mode = "ac97-slave";
304         pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
305         pinctrl-0 = <&pinctrl_ac97_running>;
306         pinctrl-1 = <&pinctrl_ac97_reset>;
307         pinctrl-2 = <&pinctrl_ac97_warm_reset>;
308         ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
309         status = "okay";
310 };