arch/arm/boot/dts/imx6qdl-udoo.dtsi

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * Author: Fabio Estevam <fabio.estevam@freescale.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  */
  11
  12 / {
  13         aliases {
  14                 backlight = &backlight;
  15                 panelchan = &panelchan;
  16                 panel7 = &panel7;
  17                 touchscreenp7 = &touchscreenp7;
  18         };
  19
  20         chosen {
  21                 stdout-path = &uart2;
  22         };
  23
  24         backlight: backlight {
  25                 compatible = "gpio-backlight";
  26                 gpios = <&gpio1 4 0>;
  27                 default-on;
  28                 status = "disabled";
  29         };
  30
  31         gpio-poweroff {
  32                 compatible = "gpio-poweroff";
  33                 gpios = <&gpio2 4 0>;
  34                 pinctrl-0 = <&pinctrl_power_off>;
  35                 pinctrl-names = "default";
  36         };
  37
  38         memory {
  39                 reg = <0x10000000 0x40000000>;
  40         };
  41
  42         panel7: panel7 {
  43                 /*
  44                  * in reality it is a -20t (parallel) model,
  45                  * but with LVDS bridge chip attached,
  46                  * so it is equivalent to -19t model in drive
  47                  * characteristics
  48                  */
  49                 compatible = "urt,umsh-8596md-19t";
  50                 pinctrl-names = "default";
  51                 pinctrl-0 = <&pinctrl_panel>;
  52                 power-supply = <&reg_panel>;
  53                 backlight = <&backlight>;
  54                 status = "disabled";
  55
  56                 port {
  57                         panel_in: endpoint {
  58                                 remote-endpoint = <&lvds0_out>;
  59                         };
  60                 };
  61         };
  62
  63         regulators {
  64                 compatible = "simple-bus";
  65                 #address-cells = <1>;
  66                 #size-cells = <0>;
  67
  68                 reg_usb_h1_vbus: regulator@0 {
  69                         compatible = "regulator-fixed";
  70                         reg = <0>;
  71                         regulator-name = "usb_h1_vbus";
  72                         regulator-min-microvolt = <5000000>;
  73                         regulator-max-microvolt = <5000000>;
  74                         enable-active-high;
  75                         startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
  76                         gpio = <&gpio7 12 0>;
  77                 };
  78
  79                 reg_panel: regulator@1 {
  80                         compatible = "regulator-fixed";
  81                         reg = <1>;
  82                         regulator-name = "lcd_panel";
  83                         enable-active-high;
  84                         gpio = <&gpio1 2 0>;
  85                 };
  86         };
  87
  88         sound {
  89                 compatible = "fsl,imx6q-udoo-ac97",
  90                              "fsl,imx-audio-ac97";
  91                 model = "fsl,imx6q-udoo-ac97";
  92                 audio-cpu = <&ssi1>;
  93                 audio-routing =
  94                         "RX", "Mic Jack",
  95                         "Headphone Jack", "TX";
  96                 mux-int-port = <1>;
  97                 mux-ext-port = <6>;
  98         };
  99 };
 100
 101 &fec {
 102         pinctrl-names = "default";
 103         pinctrl-0 = <&pinctrl_enet>;
 104         phy-mode = "rgmii";
 105         status = "okay";
 106 };
 107
 108 &hdmi {
 109         ddc-i2c-bus = <&i2c2>;
 110         status = "okay";
 111 };
 112
 113 &i2c2 {
 114         clock-frequency = <100000>;
 115         pinctrl-names = "default";
 116         pinctrl-0 = <&pinctrl_i2c2>;
 117         status = "okay";
 118 };
 119
 120 &i2c3 {
 121         clock-frequency = <100000>;
 122         pinctrl-names = "default";
 123         pinctrl-0 = <&pinctrl_i2c3>;
 124         status = "okay";
 125
 126         touchscreenp7: touchscreenp7@55 {
 127                 compatible = "sitronix,st1232";
 128                 pinctrl-names = "default";
 129                 pinctrl-0 = <&pinctrl_touchscreenp7>;
 130                 reg = <0x55>;
 131                 interrupt-parent = <&gpio1>;
 132                 interrupts = <13 8>;
 133                 gpios = <&gpio1 15 0>;
 134                 status = "disabled";
 135         };
 136 };
 137
 138 &iomuxc {
 139         imx6q-udoo {
 140                 pinctrl_enet: enetgrp {
 141                         fsl,pins = <
 142                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 143                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 144                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 145                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 146                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 147                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 148                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
 149                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
 150                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
 151                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
 152                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
 153                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
 154                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 155                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 156                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 157                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 158                         >;
 159                 };
 160
 161                 pinctrl_i2c2: i2c2grp {
 162                         fsl,pins = <
 163                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 164                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 165                         >;
 166                 };
 167
 168                 pinctrl_i2c3: i2c3grp {
 169                         fsl,pins = <
 170                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001f8b1
 171                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001f8b1
 172                         >;
 173                 };
 174
 175                 pinctrl_panel: panelgrp {
 176                         fsl,pins = <
 177                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x70
 178                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x70
 179                         >;
 180                 };
 181
 182                 pinctrl_power_off: poweroffgrp {
 183                         fsl,pins = <
 184                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x30
 185                         >;
 186                 };
 187
 188                 pinctrl_touchscreenp7: touchscreenp7grp {
 189                         fsl,pins = <
 190                                 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15         0x70
 191                                 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13         0x1b0b0
 192                         >;
 193                 };
 194
 195                 pinctrl_uart2: uart2grp {
 196                         fsl,pins = <
 197                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 198                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 199                         >;
 200                 };
 201
 202                 pinctrl_usbh: usbhgrp {
 203                         fsl,pins = <
 204                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
 205                                 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
 206                         >;
 207                 };
 208
 209                 pinctrl_usdhc3: usdhc3grp {
 210                         fsl,pins = <
 211                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 212                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 213                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 214                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 215                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 216                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 217                         >;
 218                 };
 219
 220                 pinctrl_ac97_running: ac97running {
 221                         fsl,pins = <
 222                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
 223                                 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS          0x1b0b0
 224                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
 225                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
 226                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 227                         >;
 228                 };
 229
 230                 pinctrl_ac97_warm_reset: ac97warmreset {
 231                         fsl,pins = <
 232                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
 233                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
 234                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
 235                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
 236                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 237                         >;
 238                 };
 239
 240                 pinctrl_ac97_reset: ac97reset {
 241                         fsl,pins = <
 242                                 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18         0x1b0b0
 243                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
 244                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
 245                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
 246                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 247                         >;
 248                 };
 249         };
 250 };
 251
 252 &ldb {
 253         status = "okay";
 254
 255         panelchan: lvds-channel@0 {
 256                 port@4 {
 257                         reg = <4>;
 258
 259                         lvds0_out: endpoint {
 260                                 remote-endpoint = <&panel_in>;
 261                         };
 262                 };
 263         };
 264 };
 265
 266 &uart2 {
 267         pinctrl-names = "default";
 268         pinctrl-0 = <&pinctrl_uart2>;
 269         status = "okay";
 270 };
 271
 272 &usbh1 {
 273         pinctrl-names = "default";
 274         pinctrl-0 = <&pinctrl_usbh>;
 275         vbus-supply = <&reg_usb_h1_vbus>;
 276         clocks = <&clks IMX6QDL_CLK_CKO>;
 277         status = "okay";
 278 };
 279
 280 &usdhc3 {
 281         pinctrl-names = "default";
 282         pinctrl-0 = <&pinctrl_usdhc3>;
 283         non-removable;
 284         status = "okay";
 285 };
 286
 287 &audmux {
 288         status = "okay";
 289 };
 290
 291 &ssi1 {
 292         cell-index = <0>;
 293         fsl,mode = "ac97-slave";
 294         pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
 295         pinctrl-0 = <&pinctrl_ac97_running>;
 296         pinctrl-1 = <&pinctrl_ac97_reset>;
 297         pinctrl-2 = <&pinctrl_ac97_warm_reset>;
 298         ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
 299         status = "okay";
 300 };