Merge tag 'ceph-for-4.16-rc1' of git://github.com/ceph/ceph-client
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6qdl-sr-som-ti.dtsi
1 /*
2  * Copyright (C) 2013,2014 Russell King
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License
11  *     version 2 as published by the Free Software Foundation.
12  *
13  *     This file is distributed in the hope that it will be useful,
14  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *     GNU General Public License for more details.
17  *
18  * Or, alternatively,
19  *
20  *  b) Permission is hereby granted, free of charge, to any person
21  *     obtaining a copy of this software and associated documentation
22  *     files (the "Software"), to deal in the Software without
23  *     restriction, including without limitation the rights to use,
24  *     copy, modify, merge, publish, distribute, sublicense, and/or
25  *     sell copies of the Software, and to permit persons to whom the
26  *     Software is furnished to do so, subject to the following
27  *     conditions:
28  *
29  *     The above copyright notice and this permission notice shall be
30  *     included in all copies or substantial portions of the Software.
31  *
32  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39  *     OTHER DEALINGS IN THE SOFTWARE.
40  */
41 #include <dt-bindings/gpio/gpio.h>
42
43 / {
44         nvcc_sd1: regulator-nvcc-sd1 {
45                 compatible = "regulator-fixed";
46                 regulator-always-on;
47                 regulator-name = "nvcc_sd1";
48                 regulator-min-microvolt = <1800000>;
49                 regulator-max-microvolt = <1800000>;
50                 vin-supply = <&vcc_3v3>;
51         };
52
53         clk_ti_wifi: ti-wifi-clock {
54                 /* This is a hack around the kernel - using "fixed clock"
55                  * results in the "pinctrl" properties being ignored, and
56                  * the clock not being output.  Instead, use a gated clock
57                  * and the unrouted WL_XTAL_PU gpio.
58                  */
59                 compatible = "gpio-gate-clock";
60                 #clock-cells = <0>;
61                 clock-frequency = <32768>;
62                 pinctrl-names = "default";
63                 pinctrl-0 = <&pinctrl_microsom_ti_clk>;
64                 enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
65         };
66
67         pwrseq_ti_wifi: ti-wifi-pwrseq {
68                 compatible = "mmc-pwrseq-simple";
69                 pinctrl-names = "default";
70                 pinctrl-0 = <&pinctrl_microsom_ti_wifi_en>;
71                 reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
72                 post-power-on-delay-ms = <200>;
73                 clocks = <&clk_ti_wifi>;
74                 clock-names = "ext_clock";
75         };
76 };
77
78 &iomuxc {
79         microsom {
80                 pinctrl_microsom_ti_bt: microsom-ti-bt {
81                         fsl,pins = <
82                                 /* BT_EN_SOC */
83                                 MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00       0x40013070
84                         >;
85                 };
86
87                 pinctrl_microsom_ti_clk: microsom-ti-clk {
88                         fsl,pins = <
89                                 /* EXT_32K */
90                                 MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K  0x1b0b0
91                                 /* WL_XTAL_PU (unrouted) */
92                                 MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
93                         >;
94                 };
95
96                 pinctrl_microsom_ti_wifi_en: microsom-ti-wifi-en {
97                         fsl,pins = <
98                                 /* WLAN_EN_SOC */
99                                 MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26        0x40013070
100                         >;
101                 };
102
103                 pinctrl_microsom_ti_wifi_irq: microsom-ti-wifi-irq {
104                         fsl,pins = <
105                                 /* WLAN_IRQ */
106                                 MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04       0x40013070
107                         >;
108                 };
109
110                 pinctrl_microsom_uart4: microsom-uart4 {
111                         fsl,pins = <
112                                 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
113                                 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
114                                 MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
115                                 MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
116                         >;
117                 };
118
119                 pinctrl_microsom_usdhc1: microsom-usdhc1 {
120                         fsl,pins = <
121                                 MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059
122                                 MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059
123                                 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
124                                 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
125                                 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
126                                 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
127                         >;
128                 };
129         };
130 };
131
132 /* UART4 - Connected to optional TI Wi-Fi/BT/FM */
133 &uart4 {
134         pinctrl-names = "default";
135         pinctrl-0 = <&pinctrl_microsom_uart4>;
136         uart-has-rtscts;
137         status = "okay";
138
139         bluetooth {
140                 compatible = "ti,wl1837-st";
141                 clocks = <&clk_ti_wifi>;
142                 clock-names = "ext_clock";
143                 enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
144                 pinctrl-names = "default";
145                 pinctrl-0 = <&pinctrl_microsom_ti_bt>;
146         };
147 };
148
149 /* USDHC1 - Connected to optional TI Wi-Fi/BT/FM */
150 &usdhc1 {
151         pinctrl-names = "default";
152         pinctrl-0 = <&pinctrl_microsom_usdhc1>;
153         bus-width = <4>;
154         keep-power-in-suspend;
155         mmc-pwrseq = <&pwrseq_ti_wifi>;
156         non-removable;
157         vmmc-supply = <&vcc_3v3>;
158         /* vqmmc-supply = <&nvcc_sd1>; - MMC layer doesn't like it! */
159         status = "okay";
160         #address-cells = <1>;
161         #size-cells = <0>;
162
163         wlcore@2 {
164                 compatible = "ti,wl1837";
165                 reg = <2>;
166                 interrupts-extended = <&gpio6 4 IRQ_TYPE_LEVEL_HIGH>;
167                 pinctrl-names = "default";
168                 pinctrl-0 = <&pinctrl_microsom_ti_wifi_irq>;
169         };
170 };