Merge remote-tracking branches 'asoc/topic/rl6231', 'asoc/topic/rockchip', 'asoc...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6qdl-nitrogen6x.dtsi
1 /*
2  * Copyright 2013 Boundary Devices, Inc.
3  * Copyright 2011 Freescale Semiconductor, Inc.
4  * Copyright 2011 Linaro Ltd.
5  *
6  * The code contained herein is licensed under the GNU General Public
7  * License. You may obtain a copy of the GNU General Public License
8  * Version 2 or later at the following locations:
9  *
10  * http://www.opensource.org/licenses/gpl-license.html
11  * http://www.gnu.org/copyleft/gpl.html
12  */
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15
16 / {
17         chosen {
18                 stdout-path = &uart2;
19         };
20
21         memory {
22                 reg = <0x10000000 0x40000000>;
23         };
24
25         regulators {
26                 compatible = "simple-bus";
27                 #address-cells = <1>;
28                 #size-cells = <0>;
29
30                 reg_2p5v: regulator@0 {
31                         compatible = "regulator-fixed";
32                         reg = <0>;
33                         regulator-name = "2P5V";
34                         regulator-min-microvolt = <2500000>;
35                         regulator-max-microvolt = <2500000>;
36                         regulator-always-on;
37                 };
38
39                 reg_3p3v: regulator@1 {
40                         compatible = "regulator-fixed";
41                         reg = <1>;
42                         regulator-name = "3P3V";
43                         regulator-min-microvolt = <3300000>;
44                         regulator-max-microvolt = <3300000>;
45                         regulator-always-on;
46                 };
47
48                 reg_usb_otg_vbus: regulator@2 {
49                         compatible = "regulator-fixed";
50                         reg = <2>;
51                         regulator-name = "usb_otg_vbus";
52                         regulator-min-microvolt = <5000000>;
53                         regulator-max-microvolt = <5000000>;
54                         gpio = <&gpio3 22 0>;
55                         enable-active-high;
56                 };
57         };
58
59         gpio-keys {
60                 compatible = "gpio-keys";
61                 pinctrl-names = "default";
62                 pinctrl-0 = <&pinctrl_gpio_keys>;
63
64                 power {
65                         label = "Power Button";
66                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
67                         linux,code = <KEY_POWER>;
68                         gpio-key,wakeup;
69                 };
70
71                 menu {
72                         label = "Menu";
73                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
74                         linux,code = <KEY_MENU>;
75                 };
76
77                 home {
78                         label = "Home";
79                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
80                         linux,code = <KEY_HOME>;
81                 };
82
83                 back {
84                         label = "Back";
85                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
86                         linux,code = <KEY_BACK>;
87                 };
88
89                 volume-up {
90                         label = "Volume Up";
91                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
92                         linux,code = <KEY_VOLUMEUP>;
93                 };
94
95                 volume-down {
96                         label = "Volume Down";
97                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
98                         linux,code = <KEY_VOLUMEDOWN>;
99                 };
100         };
101
102         sound {
103                 compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
104                              "fsl,imx-audio-sgtl5000";
105                 model = "imx6q-nitrogen6x-sgtl5000";
106                 ssi-controller = <&ssi1>;
107                 audio-codec = <&codec>;
108                 audio-routing =
109                         "MIC_IN", "Mic Jack",
110                         "Mic Jack", "Mic Bias",
111                         "Headphone Jack", "HP_OUT";
112                 mux-int-port = <1>;
113                 mux-ext-port = <3>;
114         };
115
116         backlight_lcd {
117                 compatible = "pwm-backlight";
118                 pwms = <&pwm1 0 5000000>;
119                 brightness-levels = <0 4 8 16 32 64 128 255>;
120                 default-brightness-level = <7>;
121                 power-supply = <&reg_3p3v>;
122                 status = "okay";
123         };
124
125         backlight_lvds {
126                 compatible = "pwm-backlight";
127                 pwms = <&pwm4 0 5000000>;
128                 brightness-levels = <0 4 8 16 32 64 128 255>;
129                 default-brightness-level = <7>;
130                 power-supply = <&reg_3p3v>;
131                 status = "okay";
132         };
133 };
134
135 &audmux {
136         pinctrl-names = "default";
137         pinctrl-0 = <&pinctrl_audmux>;
138         status = "okay";
139 };
140
141 &ecspi1 {
142         fsl,spi-num-chipselects = <1>;
143         cs-gpios = <&gpio3 19 0>;
144         pinctrl-names = "default";
145         pinctrl-0 = <&pinctrl_ecspi1>;
146         status = "okay";
147
148         flash: m25p80@0 {
149                 compatible = "sst,sst25vf016b";
150                 spi-max-frequency = <20000000>;
151                 reg = <0>;
152         };
153 };
154
155 &fec {
156         pinctrl-names = "default";
157         pinctrl-0 = <&pinctrl_enet>;
158         phy-mode = "rgmii";
159         phy-reset-gpios = <&gpio1 27 0>;
160         txen-skew-ps = <0>;
161         txc-skew-ps = <3000>;
162         rxdv-skew-ps = <0>;
163         rxc-skew-ps = <3000>;
164         rxd0-skew-ps = <0>;
165         rxd1-skew-ps = <0>;
166         rxd2-skew-ps = <0>;
167         rxd3-skew-ps = <0>;
168         txd0-skew-ps = <0>;
169         txd1-skew-ps = <0>;
170         txd2-skew-ps = <0>;
171         txd3-skew-ps = <0>;
172         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
173                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
174         status = "okay";
175 };
176
177 &i2c1 {
178         clock-frequency = <100000>;
179         pinctrl-names = "default";
180         pinctrl-0 = <&pinctrl_i2c1>;
181         status = "okay";
182
183         codec: sgtl5000@0a {
184                 compatible = "fsl,sgtl5000";
185                 reg = <0x0a>;
186                 clocks = <&clks 201>;
187                 VDDA-supply = <&reg_2p5v>;
188                 VDDIO-supply = <&reg_3p3v>;
189         };
190 };
191
192 &iomuxc {
193         pinctrl-names = "default";
194         pinctrl-0 = <&pinctrl_hog>;
195
196         imx6q-nitrogen6x {
197                 pinctrl_hog: hoggrp {
198                         fsl,pins = <
199                                 /* SGTL5000 sys_mclk */
200                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
201                         >;
202                 };
203
204                 pinctrl_audmux: audmuxgrp {
205                         fsl,pins = <
206                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
207                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
208                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
209                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
210                         >;
211                 };
212
213                 pinctrl_ecspi1: ecspi1grp {
214                         fsl,pins = <
215                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
216                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
217                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
218                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
219                         >;
220                 };
221
222                 pinctrl_enet: enetgrp {
223                         fsl,pins = <
224                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
225                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
226                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
227                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
228                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
229                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
230                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
231                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
232                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
233                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
234                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
235                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
236                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
237                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
238                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
239                                 /* Phy reset */
240                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x000b0
241                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
242                         >;
243                 };
244
245                 pinctrl_gpio_keys: gpio_keysgrp {
246                         fsl,pins = <
247                                 /* Power Button */
248                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
249                                 /* Menu Button */
250                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
251                                 /* Home Button */
252                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
253                                 /* Back Button */
254                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
255                                 /* Volume Up Button */
256                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
257                                 /* Volume Down Button */
258                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
259                         >;
260                 };
261
262                 pinctrl_i2c1: i2c1grp {
263                         fsl,pins = <
264                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
265                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
266                         >;
267                 };
268
269                 pinctrl_pwm1: pwm1grp {
270                         fsl,pins = <
271                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
272                         >;
273                 };
274
275                 pinctrl_pwm3: pwm3grp {
276                         fsl,pins = <
277                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
278                         >;
279                 };
280
281                 pinctrl_pwm4: pwm4grp {
282                         fsl,pins = <
283                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
284                         >;
285                 };
286
287                 pinctrl_uart1: uart1grp {
288                         fsl,pins = <
289                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
290                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
291                         >;
292                 };
293
294                 pinctrl_uart2: uart2grp {
295                         fsl,pins = <
296                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
297                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
298                         >;
299                 };
300
301                 pinctrl_usbotg: usbotggrp {
302                         fsl,pins = <
303                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID   0x17059
304                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
305                                 /* power enable, high active */
306                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
307                         >;
308                 };
309
310                 pinctrl_usdhc3: usdhc3grp {
311                         fsl,pins = <
312                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
313                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
314                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
315                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
316                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
317                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
318                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
319                         >;
320                 };
321
322                 pinctrl_usdhc4: usdhc4grp {
323                         fsl,pins = <
324                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
325                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
326                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
327                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
328                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
329                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
330                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
331                         >;
332                 };
333         };
334 };
335
336 &ldb {
337         status = "okay";
338
339         lvds-channel@0 {
340                 fsl,data-mapping = "spwg";
341                 fsl,data-width = <18>;
342                 status = "okay";
343
344                 display-timings {
345                         native-mode = <&timing0>;
346                         timing0: hsd100pxn1 {
347                                 clock-frequency = <65000000>;
348                                 hactive = <1024>;
349                                 vactive = <768>;
350                                 hback-porch = <220>;
351                                 hfront-porch = <40>;
352                                 vback-porch = <21>;
353                                 vfront-porch = <7>;
354                                 hsync-len = <60>;
355                                 vsync-len = <10>;
356                         };
357                 };
358         };
359 };
360
361 &pcie {
362         status = "okay";
363 };
364
365 &pwm1 {
366         pinctrl-names = "default";
367         pinctrl-0 = <&pinctrl_pwm1>;
368         status = "okay";
369 };
370
371 &pwm3 {
372         pinctrl-names = "default";
373         pinctrl-0 = <&pinctrl_pwm3>;
374         status = "okay";
375 };
376
377 &pwm4 {
378         pinctrl-names = "default";
379         pinctrl-0 = <&pinctrl_pwm4>;
380         status = "okay";
381 };
382
383 &ssi1 {
384         fsl,mode = "i2s-slave";
385         status = "okay";
386 };
387
388 &uart1 {
389         pinctrl-names = "default";
390         pinctrl-0 = <&pinctrl_uart1>;
391         status = "okay";
392 };
393
394 &uart2 {
395         pinctrl-names = "default";
396         pinctrl-0 = <&pinctrl_uart2>;
397         status = "okay";
398 };
399
400 &usbh1 {
401         status = "okay";
402 };
403
404 &usbotg {
405         vbus-supply = <&reg_usb_otg_vbus>;
406         pinctrl-names = "default";
407         pinctrl-0 = <&pinctrl_usbotg>;
408         disable-over-current;
409         status = "okay";
410 };
411
412 &usdhc3 {
413         pinctrl-names = "default";
414         pinctrl-0 = <&pinctrl_usdhc3>;
415         cd-gpios = <&gpio7 0 0>;
416         vmmc-supply = <&reg_3p3v>;
417         status = "okay";
418 };
419
420 &usdhc4 {
421         pinctrl-names = "default";
422         pinctrl-0 = <&pinctrl_usdhc4>;
423         cd-gpios = <&gpio2 6 0>;
424         vmmc-supply = <&reg_3p3v>;
425         status = "okay";
426 };