arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi

   1 /*
   2  * Copyright 2013 Boundary Devices, Inc.
   3  * Copyright 2011 Freescale Semiconductor, Inc.
   4  * Copyright 2011 Linaro Ltd.
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License
  13  *     version 2 as published by the Free Software Foundation.
  14  *
  15  *     This file is distributed in the hope that it will be useful,
  16  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *     GNU General Public License for more details.
  19  *
  20  * Or, alternatively,
  21  *
  22  *  b) Permission is hereby granted, free of charge, to any person
  23  *     obtaining a copy of this software and associated documentation
  24  *     files (the "Software"), to deal in the Software without
  25  *     restriction, including without limitation the rights to use,
  26  *     copy, modify, merge, publish, distribute, sublicense, and/or
  27  *     sell copies of the Software, and to permit persons to whom the
  28  *     Software is furnished to do so, subject to the following
  29  *     conditions:
  30  *
  31  *     The above copyright notice and this permission notice shall be
  32  *     included in all copies or substantial portions of the Software.
  33  *
  34  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  35  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  36  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  37  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  38  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  39  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  40  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  41  *     OTHER DEALINGS IN THE SOFTWARE.
  42  */
  43 #include <dt-bindings/gpio/gpio.h>
  44 #include <dt-bindings/input/input.h>
  45
  46 / {
  47         chosen {
  48                 stdout-path = &uart2;
  49         };
  50
  51         memory {
  52                 reg = <0x10000000 0x40000000>;
  53         };
  54
  55         regulators {
  56                 compatible = "simple-bus";
  57                 #address-cells = <1>;
  58                 #size-cells = <0>;
  59
  60                 reg_2p5v: regulator@0 {
  61                         compatible = "regulator-fixed";
  62                         reg = <0>;
  63                         regulator-name = "2P5V";
  64                         regulator-min-microvolt = <2500000>;
  65                         regulator-max-microvolt = <2500000>;
  66                         regulator-always-on;
  67                 };
  68
  69                 reg_3p3v: regulator@1 {
  70                         compatible = "regulator-fixed";
  71                         reg = <1>;
  72                         regulator-name = "3P3V";
  73                         regulator-min-microvolt = <3300000>;
  74                         regulator-max-microvolt = <3300000>;
  75                         regulator-always-on;
  76                 };
  77
  78                 reg_usb_otg_vbus: regulator@2 {
  79                         compatible = "regulator-fixed";
  80                         reg = <2>;
  81                         regulator-name = "usb_otg_vbus";
  82                         regulator-min-microvolt = <5000000>;
  83                         regulator-max-microvolt = <5000000>;
  84                         gpio = <&gpio3 22 0>;
  85                         enable-active-high;
  86                 };
  87
  88                 reg_can_xcvr: regulator@3 {
  89                         compatible = "regulator-fixed";
  90                         reg = <3>;
  91                         regulator-name = "CAN XCVR";
  92                         regulator-min-microvolt = <3300000>;
  93                         regulator-max-microvolt = <3300000>;
  94                         pinctrl-names = "default";
  95                         pinctrl-0 = <&pinctrl_can_xcvr>;
  96                         gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
  97                 };
  98
  99                 reg_wlan_vmmc: regulator@4 {
 100                         compatible = "regulator-fixed";
 101                         reg = <4>;
 102                         pinctrl-names = "default";
 103                         pinctrl-0 = <&pinctrl_wlan_vmmc>;
 104                         regulator-name = "reg_wlan_vmmc";
 105                         regulator-min-microvolt = <3300000>;
 106                         regulator-max-microvolt = <3300000>;
 107                         gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
 108                         startup-delay-us = <70000>;
 109                         enable-active-high;
 110                 };
 111
 112                 reg_usb_h1_vbus: regulator@5 {
 113                         compatible = "regulator-fixed";
 114                         reg = <5>;
 115                         pinctrl-names = "default";
 116                         pinctrl-0 = <&pinctrl_usbh1>;
 117                         regulator-name = "usb_h1_vbus";
 118                         regulator-min-microvolt = <3300000>;
 119                         regulator-max-microvolt = <3300000>;
 120                         gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
 121                         enable-active-high;
 122                 };
 123         };
 124
 125         gpio-keys {
 126                 compatible = "gpio-keys";
 127                 pinctrl-names = "default";
 128                 pinctrl-0 = <&pinctrl_gpio_keys>;
 129
 130                 power {
 131                         label = "Power Button";
 132                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 133                         linux,code = <KEY_POWER>;
 134                         wakeup-source;
 135                 };
 136
 137                 menu {
 138                         label = "Menu";
 139                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 140                         linux,code = <KEY_MENU>;
 141                 };
 142
 143                 home {
 144                         label = "Home";
 145                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 146                         linux,code = <KEY_HOME>;
 147                 };
 148
 149                 back {
 150                         label = "Back";
 151                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 152                         linux,code = <KEY_BACK>;
 153                 };
 154
 155                 volume-up {
 156                         label = "Volume Up";
 157                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
 158                         linux,code = <KEY_VOLUMEUP>;
 159                 };
 160
 161                 volume-down {
 162                         label = "Volume Down";
 163                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
 164                         linux,code = <KEY_VOLUMEDOWN>;
 165                 };
 166         };
 167
 168         sound {
 169                 compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
 170                              "fsl,imx-audio-sgtl5000";
 171                 model = "imx6q-nitrogen6x-sgtl5000";
 172                 ssi-controller = <&ssi1>;
 173                 audio-codec = <&codec>;
 174                 audio-routing =
 175                         "MIC_IN", "Mic Jack",
 176                         "Mic Jack", "Mic Bias",
 177                         "Headphone Jack", "HP_OUT";
 178                 mux-int-port = <1>;
 179                 mux-ext-port = <3>;
 180         };
 181
 182         backlight_lcd: backlight-lcd {
 183                 compatible = "pwm-backlight";
 184                 pwms = <&pwm1 0 5000000>;
 185                 brightness-levels = <0 4 8 16 32 64 128 255>;
 186                 default-brightness-level = <7>;
 187                 power-supply = <&reg_3p3v>;
 188                 status = "okay";
 189         };
 190
 191         backlight_lvds: backlight-lvds {
 192                 compatible = "pwm-backlight";
 193                 pwms = <&pwm4 0 5000000>;
 194                 brightness-levels = <0 4 8 16 32 64 128 255>;
 195                 default-brightness-level = <7>;
 196                 power-supply = <&reg_3p3v>;
 197                 status = "okay";
 198         };
 199
 200         lcd_display: disp0 {
 201                 compatible = "fsl,imx-parallel-display";
 202                 #address-cells = <1>;
 203                 #size-cells = <0>;
 204                 interface-pix-fmt = "bgr666";
 205                 pinctrl-names = "default";
 206                 pinctrl-0 = <&pinctrl_j15>;
 207                 status = "okay";
 208
 209                 port@0 {
 210                         reg = <0>;
 211
 212                         lcd_display_in: endpoint {
 213                                 remote-endpoint = <&ipu1_di0_disp0>;
 214                         };
 215                 };
 216
 217                 port@1 {
 218                         reg = <1>;
 219
 220                         lcd_display_out: endpoint {
 221                                 remote-endpoint = <&lcd_panel_in>;
 222                         };
 223                 };
 224         };
 225
 226         panel-lcd {
 227                 compatible = "okaya,rs800480t-7x0gp";
 228                 backlight = <&backlight_lcd>;
 229
 230                 port {
 231                         lcd_panel_in: endpoint {
 232                                 remote-endpoint = <&lcd_display_out>;
 233                         };
 234                 };
 235         };
 236
 237         panel-lvds0 {
 238                 compatible = "hannstar,hsd100pxn1";
 239                 backlight = <&backlight_lvds>;
 240
 241                 port {
 242                         panel_in: endpoint {
 243                                 remote-endpoint = <&lvds0_out>;
 244                         };
 245                 };
 246         };
 247 };
 248
 249 &audmux {
 250         pinctrl-names = "default";
 251         pinctrl-0 = <&pinctrl_audmux>;
 252         status = "okay";
 253 };
 254
 255 &can1 {
 256         pinctrl-names = "default";
 257         pinctrl-0 = <&pinctrl_can1>;
 258         xceiver-supply = <&reg_can_xcvr>;
 259         status = "okay";
 260 };
 261
 262 &clks {
 263         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 264                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 265         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 266                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 267 };
 268
 269 &ecspi1 {
 270         cs-gpios = <&gpio3 19 0>;
 271         pinctrl-names = "default";
 272         pinctrl-0 = <&pinctrl_ecspi1>;
 273         status = "okay";
 274
 275         flash: m25p80@0 {
 276                 compatible = "sst,sst25vf016b", "jedec,spi-nor";
 277                 spi-max-frequency = <20000000>;
 278                 reg = <0>;
 279         };
 280 };
 281
 282 &fec {
 283         pinctrl-names = "default";
 284         pinctrl-0 = <&pinctrl_enet>;
 285         phy-mode = "rgmii";
 286         phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
 287         txen-skew-ps = <0>;
 288         txc-skew-ps = <3000>;
 289         rxdv-skew-ps = <0>;
 290         rxc-skew-ps = <3000>;
 291         rxd0-skew-ps = <0>;
 292         rxd1-skew-ps = <0>;
 293         rxd2-skew-ps = <0>;
 294         rxd3-skew-ps = <0>;
 295         txd0-skew-ps = <0>;
 296         txd1-skew-ps = <0>;
 297         txd2-skew-ps = <0>;
 298         txd3-skew-ps = <0>;
 299         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 300                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 301         fsl,err006687-workaround-present;
 302         status = "okay";
 303 };
 304
 305 &hdmi {
 306         ddc-i2c-bus = <&i2c2>;
 307         status = "okay";
 308 };
 309
 310 &i2c1 {
 311         clock-frequency = <100000>;
 312         pinctrl-names = "default";
 313         pinctrl-0 = <&pinctrl_i2c1>;
 314         status = "okay";
 315
 316         codec: sgtl5000@a {
 317                 compatible = "fsl,sgtl5000";
 318                 reg = <0x0a>;
 319                 clocks = <&clks IMX6QDL_CLK_CKO>;
 320                 VDDA-supply = <&reg_2p5v>;
 321                 VDDIO-supply = <&reg_3p3v>;
 322         };
 323
 324         rtc: rtc@6f {
 325                 compatible = "isil,isl1208";
 326                 reg = <0x6f>;
 327         };
 328 };
 329
 330 &i2c2 {
 331         clock-frequency = <100000>;
 332         pinctrl-names = "default";
 333         pinctrl-0 = <&pinctrl_i2c2>;
 334         status = "okay";
 335 };
 336
 337 &i2c3 {
 338         clock-frequency = <100000>;
 339         pinctrl-names = "default";
 340         pinctrl-0 = <&pinctrl_i2c3>;
 341         status = "okay";
 342
 343         touchscreen@4 {
 344                 compatible = "eeti,egalax_ts";
 345                 reg = <0x04>;
 346                 interrupt-parent = <&gpio1>;
 347                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 348                 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
 349         };
 350
 351         touchscreen@38 {
 352                 compatible = "edt,edt-ft5x06";
 353                 reg = <0x38>;
 354                 interrupt-parent = <&gpio1>;
 355                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 356         };
 357 };
 358
 359 &iomuxc {
 360         pinctrl-names = "default";
 361         pinctrl-0 = <&pinctrl_hog>;
 362
 363         imx6q-nitrogen6x {
 364                 pinctrl_hog: hoggrp {
 365                         fsl,pins = <
 366                                 /* SGTL5000 sys_mclk */
 367                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
 368                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09   0x1b0b0
 369                         >;
 370                 };
 371
 372                 pinctrl_audmux: audmuxgrp {
 373                         fsl,pins = <
 374                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 375                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 376                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 377                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 378                         >;
 379                 };
 380
 381                 pinctrl_can1: can1grp {
 382                         fsl,pins = <
 383                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b0
 384                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b0
 385                         >;
 386                 };
 387
 388                 pinctrl_can_xcvr: can-xcvrgrp {
 389                         fsl,pins = <
 390                                 /* Flexcan XCVR enable */
 391                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x1b0b0
 392                         >;
 393                 };
 394
 395                 pinctrl_ecspi1: ecspi1grp {
 396                         fsl,pins = <
 397                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 398                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 399                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 400                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
 401                         >;
 402                 };
 403
 404                 pinctrl_enet: enetgrp {
 405                         fsl,pins = <
 406                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 407                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 408                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
 409                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
 410                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
 411                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
 412                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
 413                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
 414                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 415                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 416                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 417                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 418                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 419                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 420                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 421                                 /* Phy reset */
 422                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x000b0
 423                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 424                         >;
 425                 };
 426
 427                 pinctrl_gpio_keys: gpio-keysgrp {
 428                         fsl,pins = <
 429                                 /* Power Button */
 430                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 431                                 /* Menu Button */
 432                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 433                                 /* Home Button */
 434                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 435                                 /* Back Button */
 436                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
 437                                 /* Volume Up Button */
 438                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 439                                 /* Volume Down Button */
 440                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 441                         >;
 442                 };
 443
 444                 pinctrl_i2c1: i2c1grp {
 445                         fsl,pins = <
 446                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 447                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 448                         >;
 449                 };
 450
 451                 pinctrl_i2c2: i2c2grp {
 452                         fsl,pins = <
 453                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 454                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 455                         >;
 456                 };
 457
 458                 pinctrl_i2c3: i2c3grp {
 459                         fsl,pins = <
 460                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
 461                                 MX6QDL_PAD_GPIO_16__I2C3_SDA            0x4001b8b1
 462                         >;
 463                 };
 464
 465                 pinctrl_j15: j15grp {
 466                         fsl,pins = <
 467                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 468                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 469                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 470                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 471                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
 472                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 473                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 474                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 475                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 476                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 477                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 478                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 479                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 480                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 481                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 482                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 483                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 484                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 485                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 486                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 487                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 488                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 489                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 490                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 491                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 492                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 493                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 494                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 495                         >;
 496                 };
 497
 498                 pinctrl_pwm1: pwm1grp {
 499                         fsl,pins = <
 500                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
 501                         >;
 502                 };
 503
 504                 pinctrl_pwm3: pwm3grp {
 505                         fsl,pins = <
 506                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
 507                         >;
 508                 };
 509
 510                 pinctrl_pwm4: pwm4grp {
 511                         fsl,pins = <
 512                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
 513                         >;
 514                 };
 515
 516                 pinctrl_uart1: uart1grp {
 517                         fsl,pins = <
 518                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 519                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 520                         >;
 521                 };
 522
 523                 pinctrl_uart2: uart2grp {
 524                         fsl,pins = <
 525                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 526                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 527                         >;
 528                 };
 529
 530                 pinctrl_usbh1: usbh1grp {
 531                         fsl,pins = <
 532                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x030b0
 533                         >;
 534                 };
 535
 536                 pinctrl_usbotg: usbotggrp {
 537                         fsl,pins = <
 538                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID   0x17059
 539                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
 540                                 /* power enable, high active */
 541                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
 542                         >;
 543                 };
 544
 545                 pinctrl_usdhc2: usdhc2grp {
 546                         fsl,pins = <
 547                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17071
 548                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10071
 549                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17071
 550                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17071
 551                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17071
 552                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17071
 553                         >;
 554                 };
 555
 556                 pinctrl_usdhc3: usdhc3grp {
 557                         fsl,pins = <
 558                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 559                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 560                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 561                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 562                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 563                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 564                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
 565                         >;
 566                 };
 567
 568                 pinctrl_usdhc4: usdhc4grp {
 569                         fsl,pins = <
 570                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 571                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 572                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 573                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 574                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 575                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 576                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
 577                         >;
 578                 };
 579
 580                 pinctrl_wlan_vmmc: wlan-vmmcgrp {
 581                         fsl,pins = <
 582                                 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11        0x100b0
 583                                 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15        0x000b0
 584                                 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16        0x000b0
 585                                 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT      0x000b0
 586                         >;
 587                 };
 588         };
 589 };
 590
 591 &ipu1_di0_disp0 {
 592         remote-endpoint = <&lcd_display_in>;
 593 };
 594
 595 &ldb {
 596         status = "okay";
 597
 598         lvds-channel@0 {
 599                 status = "okay";
 600
 601                 port@4 {
 602                         reg = <4>;
 603
 604                         lvds0_out: endpoint {
 605                                 remote-endpoint = <&panel_in>;
 606                         };
 607                 };
 608         };
 609 };
 610
 611 &pcie {
 612         status = "okay";
 613 };
 614
 615 &pwm1 {
 616         pinctrl-names = "default";
 617         pinctrl-0 = <&pinctrl_pwm1>;
 618         status = "okay";
 619 };
 620
 621 &pwm3 {
 622         pinctrl-names = "default";
 623         pinctrl-0 = <&pinctrl_pwm3>;
 624         status = "okay";
 625 };
 626
 627 &pwm4 {
 628         pinctrl-names = "default";
 629         pinctrl-0 = <&pinctrl_pwm4>;
 630         status = "okay";
 631 };
 632
 633 &ssi1 {
 634         status = "okay";
 635 };
 636
 637 &uart1 {
 638         pinctrl-names = "default";
 639         pinctrl-0 = <&pinctrl_uart1>;
 640         status = "okay";
 641 };
 642
 643 &uart2 {
 644         pinctrl-names = "default";
 645         pinctrl-0 = <&pinctrl_uart2>;
 646         status = "okay";
 647 };
 648
 649 &usbh1 {
 650         vbus-supply = <&reg_usb_h1_vbus>;
 651         status = "okay";
 652 };
 653
 654 &usbotg {
 655         vbus-supply = <&reg_usb_otg_vbus>;
 656         pinctrl-names = "default";
 657         pinctrl-0 = <&pinctrl_usbotg>;
 658         disable-over-current;
 659         status = "okay";
 660 };
 661
 662 &usdhc2 {
 663         pinctrl-names = "default";
 664         pinctrl-0 = <&pinctrl_usdhc2>;
 665         bus-width = <4>;
 666         non-removable;
 667         vmmc-supply = <&reg_wlan_vmmc>;
 668         cap-power-off-card;
 669         keep-power-in-suspend;
 670         status = "okay";
 671
 672         #address-cells = <1>;
 673         #size-cells = <0>;
 674         wlcore: wlcore@2 {
 675                 compatible = "ti,wl1271";
 676                 reg = <2>;
 677                 interrupt-parent = <&gpio6>;
 678                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
 679                 ref-clock-frequency = <38400000>;
 680         };
 681 };
 682
 683 &usdhc3 {
 684         pinctrl-names = "default";
 685         pinctrl-0 = <&pinctrl_usdhc3>;
 686         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 687         vmmc-supply = <&reg_3p3v>;
 688         status = "okay";
 689 };
 690
 691 &usdhc4 {
 692         pinctrl-names = "default";
 693         pinctrl-0 = <&pinctrl_usdhc4>;
 694         cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
 695         vmmc-supply = <&reg_3p3v>;
 696         status = "okay";
 697 };