Merge tag '5.4-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6qdl-nit6xlite.dtsi
1 // SPDX-License-Identifier: GPL-2.0 OR X11
2 /*
3  * Copyright 2015 Boundary Devices, Inc.
4  */
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9         chosen {
10                 stdout-path = &uart2;
11         };
12
13         memory@10000000 {
14                 device_type = "memory";
15                 reg = <0x10000000 0x20000000>;
16         };
17
18         regulators {
19                 compatible = "simple-bus";
20                 #address-cells = <1>;
21                 #size-cells = <0>;
22
23                 reg_2p5v: regulator@0 {
24                         compatible = "regulator-fixed";
25                         reg = <0>;
26                         regulator-name = "2P5V";
27                         regulator-min-microvolt = <2500000>;
28                         regulator-max-microvolt = <2500000>;
29                         regulator-always-on;
30                 };
31
32                 reg_3p3v: regulator@1 {
33                         compatible = "regulator-fixed";
34                         reg = <1>;
35                         regulator-name = "3P3V";
36                         regulator-min-microvolt = <3300000>;
37                         regulator-max-microvolt = <3300000>;
38                         regulator-always-on;
39                 };
40
41                 reg_usb_otg_vbus: regulator@2 {
42                         compatible = "regulator-fixed";
43                         reg = <2>;
44                         regulator-name = "usb_otg_vbus";
45                         regulator-min-microvolt = <5000000>;
46                         regulator-max-microvolt = <5000000>;
47                         gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
48                         enable-active-high;
49                 };
50
51                 reg_wlan_vmmc: regulator@3 {
52                         compatible = "regulator-fixed";
53                         reg = <3>;
54                         pinctrl-names = "default";
55                         pinctrl-0 = <&pinctrl_wlan_vmmc>;
56                         regulator-name = "reg_wlan_vmmc";
57                         regulator-min-microvolt = <1800000>;
58                         regulator-max-microvolt = <1800000>;
59                         gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>;
60                         startup-delay-us = <70000>;
61                         enable-active-high;
62                 };
63         };
64
65         gpio-keys {
66                 compatible = "gpio-keys";
67                 pinctrl-names = "default";
68                 pinctrl-0 = <&pinctrl_gpio_keys>;
69
70                 home {
71                         label = "Home";
72                         gpios = <&gpio7 13 IRQ_TYPE_LEVEL_LOW>;
73                         linux,code = <102>;
74                 };
75
76                 back {
77                         label = "Back";
78                         gpios = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>;
79                         linux,code = <158>;
80                 };
81         };
82
83         leds {
84                 compatible = "gpio-leds";
85                 pinctrl-names = "default";
86                 pinctrl-0 = <&pinctrl_leds>;
87
88                 j14-pin1 {
89                         gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
90                         retain-state-suspended;
91                         default-state = "off";
92                 };
93
94                 j14-pin3 {
95                         gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
96                         retain-state-suspended;
97                         default-state = "off";
98                 };
99
100                 j14-pins8-9 {
101                         gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
102                         retain-state-suspended;
103                         default-state = "off";
104                 };
105
106                 j46-pin2 {
107                         gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
108                         retain-state-suspended;
109                         default-state = "off";
110                 };
111
112                 j46-pin3 {
113                         gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
114                         retain-state-suspended;
115                         default-state = "off";
116                 };
117         };
118
119         backlight-lcd {
120                 compatible = "pwm-backlight";
121                 pwms = <&pwm1 0 5000000>;
122                 brightness-levels = <0 4 8 16 32 64 128 255>;
123                 default-brightness-level = <7>;
124                 power-supply = <&reg_3p3v>;
125                 status = "okay";
126         };
127
128         backlight_lvds0: backlight-lvds0 {
129                 compatible = "pwm-backlight";
130                 pwms = <&pwm4 0 5000000>;
131                 brightness-levels = <0 4 8 16 32 64 128 255>;
132                 default-brightness-level = <7>;
133                 power-supply = <&reg_3p3v>;
134                 status = "okay";
135         };
136
137         panel-lvds0 {
138                 compatible = "hannstar,hsd100pxn1";
139                 backlight = <&backlight_lvds0>;
140
141                 port {
142                         panel_in_lvds0: endpoint {
143                                 remote-endpoint = <&lvds0_out>;
144                         };
145                 };
146         };
147
148         sound {
149                 compatible = "fsl,imx6dl-nit6xlite-sgtl5000",
150                              "fsl,imx-audio-sgtl5000";
151                 model = "imx6dl-nit6xlite-sgtl5000";
152                 ssi-controller = <&ssi1>;
153                 audio-codec = <&codec>;
154                 audio-routing =
155                         "MIC_IN", "Mic Jack",
156                         "Mic Jack", "Mic Bias",
157                         "Headphone Jack", "HP_OUT";
158                 mux-int-port = <1>;
159                 mux-ext-port = <3>;
160         };
161 };
162
163 &audmux {
164         pinctrl-names = "default";
165         pinctrl-0 = <&pinctrl_audmux>;
166         status = "okay";
167 };
168
169 &clks {
170         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
171                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
172         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
173                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
174 };
175
176 &ecspi1 {
177         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
178         pinctrl-names = "default";
179         pinctrl-0 = <&pinctrl_ecspi1>;
180         status = "okay";
181
182         flash: m25p80@0 {
183                 compatible = "microchip,sst25vf016b";
184                 spi-max-frequency = <20000000>;
185                 reg = <0>;
186         };
187 };
188
189 &fec {
190         pinctrl-names = "default";
191         pinctrl-0 = <&pinctrl_enet>;
192         phy-mode = "rgmii";
193         phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
194         txen-skew-ps = <0>;
195         txc-skew-ps = <3000>;
196         rxdv-skew-ps = <0>;
197         rxc-skew-ps = <3000>;
198         rxd0-skew-ps = <0>;
199         rxd1-skew-ps = <0>;
200         rxd2-skew-ps = <0>;
201         rxd3-skew-ps = <0>;
202         txd0-skew-ps = <0>;
203         txd1-skew-ps = <0>;
204         txd2-skew-ps = <0>;
205         txd3-skew-ps = <0>;
206         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
207                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
208         fsl,err006687-workaround-present;
209         status = "okay";
210 };
211
212 &hdmi {
213         ddc-i2c-bus = <&i2c2>;
214         status = "okay";
215 };
216
217 &i2c1 {
218         clock-frequency = <100000>;
219         pinctrl-names = "default";
220         pinctrl-0 = <&pinctrl_i2c1>;
221         status = "okay";
222
223         codec: sgtl5000@a {
224                 compatible = "fsl,sgtl5000";
225                 pinctrl-names = "default";
226                 pinctrl-0 = <&pinctrl_sgtl5000>;
227                 reg = <0x0a>;
228                 clocks = <&clks IMX6QDL_CLK_CKO>;
229                 VDDA-supply = <&reg_2p5v>;
230                 VDDIO-supply = <&reg_3p3v>;
231         };
232 };
233
234 &i2c2 {
235         clock-frequency = <100000>;
236         pinctrl-names = "default";
237         pinctrl-0 = <&pinctrl_i2c2>;
238         status = "okay";
239 };
240
241 &i2c3 {
242         clock-frequency = <100000>;
243         pinctrl-names = "default";
244         pinctrl-0 = <&pinctrl_i2c3>;
245         status = "okay";
246
247         touchscreen@4 {
248                 compatible = "eeti,egalax_ts";
249                 reg = <0x04>;
250                 interrupt-parent = <&gpio1>;
251                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
252                 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
253         };
254
255         touchscreen@38 {
256                 compatible = "edt,edt-ft5x06";
257                 reg = <0x38>;
258                 interrupt-parent = <&gpio1>;
259                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
260                 wakeup-source;
261         };
262
263         rtc@6f {
264                 compatible = "isil,isl1208";
265                 pinctrl-names = "default";
266                 pinctrl-0 = <&pinctrl_rtc>;
267                 reg = <0x6f>;
268                 interrupts-extended = <&gpio2 26 IRQ_TYPE_LEVEL_LOW>;
269         };
270 };
271
272 &iomuxc {
273         pinctrl-names = "default";
274         pinctrl-0 = <&pinctrl_j10>;
275         pinctrl-1 = <&pinctrl_j28>;
276
277         imx6dl-nit6xlite {
278                 pinctrl_audmux: audmuxgrp {
279                         fsl,pins = <
280                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
281                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
282                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
283                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
284                         >;
285                 };
286
287                 pinctrl_ecspi1: ecspi1grp {
288                         fsl,pins = <
289                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
290                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
291                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
292                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19          0x000b1
293                         >;
294                 };
295
296                 pinctrl_enet: enetgrp {
297                         fsl,pins = <
298                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
299                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
300                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
301                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
302                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
303                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
304                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
305                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
306                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
307                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
308                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
309                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
310                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
311                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
312                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
313                                 /* Phy reset */
314                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x0f0b0
315                                 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0
316                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
317                         >;
318                 };
319
320                 pinctrl_gpio_keys: gpio-keysgrp {
321                         fsl,pins = <
322                                 /* Home Button: J14 pin 5 */
323                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
324                                 /* Back Button: J14 pin 7 */
325                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
326                         >;
327                 };
328
329                 pinctrl_i2c1: i2c1grp {
330                         fsl,pins = <
331                                 MX6QDL_PAD_EIM_D21__I2C1_SCL    0x4001b8b1
332                                 MX6QDL_PAD_EIM_D28__I2C1_SDA    0x4001b8b1
333                         >;
334                 };
335
336                 pinctrl_i2c2: i2c2grp {
337                         fsl,pins = <
338                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b8b1
339                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b8b1
340                         >;
341                 };
342
343                 pinctrl_i2c3: i2c3grp {
344                         fsl,pins = <
345                                 MX6QDL_PAD_GPIO_5__I2C3_SCL     0x4001b8b1
346                                 MX6QDL_PAD_GPIO_16__I2C3_SDA    0x4001b8b1
347                                 /* Touch IRQ: J7 pin 4 */
348                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09   0x1b0b0
349                                 /* tcs2004 IRQ */
350                                 MX6QDL_PAD_EIM_LBA__GPIO2_IO27  0x1b0b0
351                                 /* tsc2004 reset */
352                                 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x0b0b0
353                         >;
354                 };
355
356                 pinctrl_j10: j10grp {
357                         fsl,pins = <
358                                 /* Broadcom WiFi module pins */
359                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00         0x1b0b0
360                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
361                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
362                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
363                                 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09       0x0b0b0
364                                 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14        0x1b0b0
365                                 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT      0x000b0
366                         >;
367                 };
368
369                 pinctrl_j28: j28grp {
370                         fsl,pins = <
371                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b0
372                         >;
373                 };
374
375                 pinctrl_leds: ledsgrp {
376                         fsl,pins = <
377                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x0b0b0
378                                 MX6QDL_PAD_GPIO_3__GPIO1_IO03           0x0b0b0
379                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29          0x030b0
380                                 MX6QDL_PAD_GPIO_7__GPIO1_IO07           0x0b0b0
381                                 MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0b0b0
382                         >;
383                 };
384
385                 pinctrl_pwm1: pwm1grp {
386                         fsl,pins = <
387                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
388                         >;
389                 };
390
391                 pinctrl_pwm3: pwm3grp {
392                         fsl,pins = <
393                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
394                         >;
395                 };
396
397                 pinctrl_pwm4: pwm4grp {
398                         fsl,pins = <
399                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
400                         >;
401                 };
402
403                 pinctrl_wlan_vmmc: wlan-vmmcgrp {
404                         fsl,pins = <
405                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07        0x030b0
406                         >;
407                 };
408
409                 pinctrl_rtc: rtcgrp {
410                         fsl,pins = <
411                                 MX6QDL_PAD_EIM_RW__GPIO2_IO26           0x1b0b0
412                         >;
413                 };
414
415                 pinctrl_sgtl5000: sgtl5000grp {
416                         fsl,pins = <
417                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x000b0
418                                 MX6QDL_PAD_EIM_A25__GPIO5_IO02          0x1b0b0
419                         >;
420                 };
421
422                 pinctrl_uart1: uart1grp {
423                         fsl,pins = <
424                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
425                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
426                         >;
427                 };
428
429                 pinctrl_uart2: uart2grp {
430                         fsl,pins = <
431                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
432                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
433                         >;
434                 };
435
436                 pinctrl_uart3: uart3grp {
437                         fsl,pins = <
438                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
439                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
440                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
441                                 MX6QDL_PAD_EIM_D31__UART3_RTS_B         0x1b0b1
442                         >;
443                 };
444
445                 pinctrl_usbotg: usbotggrp {
446                         fsl,pins = <
447                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
448                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC         0x1b0b0
449                                 /* power enable, high active */
450                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x000b0
451                         >;
452                 };
453
454                 pinctrl_usdhc2: usdhc2grp {
455                         fsl,pins = <
456                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
457                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
458                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
459                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
460                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
461                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
462                         >;
463                 };
464
465                 pinctrl_usdhc3: usdhc3grp {
466                         fsl,pins = <
467                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
468                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
469                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
470                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
471                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
472                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
473                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x1b0b0
474                         >;
475                 };
476         };
477 };
478
479 &ldb {
480         status = "okay";
481
482         lvds-channel@0 {
483                 status = "okay";
484
485                 port@4 {
486                         reg = <4>;
487
488                         lvds0_out: endpoint {
489                                 remote-endpoint = <&panel_in_lvds0>;
490                         };
491                 };
492         };
493 };
494
495 &pcie {
496         status = "okay";
497 };
498
499 &pwm1 {
500         pinctrl-names = "default";
501         pinctrl-0 = <&pinctrl_pwm1>;
502         status = "okay";
503 };
504
505 &pwm3 {
506         pinctrl-names = "default";
507         pinctrl-0 = <&pinctrl_pwm3>;
508         status = "okay";
509 };
510
511 &pwm4 {
512         pinctrl-names = "default";
513         pinctrl-0 = <&pinctrl_pwm4>;
514         status = "okay";
515 };
516
517 &ssi1 {
518         status = "okay";
519 };
520
521 &uart1 {
522         pinctrl-names = "default";
523         pinctrl-0 = <&pinctrl_uart1>;
524         status = "okay";
525 };
526
527 &uart2 {
528         pinctrl-names = "default";
529         pinctrl-0 = <&pinctrl_uart2>;
530         status = "okay";
531 };
532
533 &uart3 {
534         pinctrl-names = "default";
535         pinctrl-0 = <&pinctrl_uart3>;
536         uart-has-rtscts;
537         status = "okay";
538 };
539
540 &usbh1 {
541         status = "okay";
542 };
543
544 &usbotg {
545         vbus-supply = <&reg_usb_otg_vbus>;
546         pinctrl-names = "default";
547         pinctrl-0 = <&pinctrl_usbotg>;
548         disable-over-current;
549         status = "okay";
550 };
551
552 &usdhc2 {
553         pinctrl-names = "default";
554         pinctrl-0 = <&pinctrl_usdhc2>;
555         bus-width = <4>;
556         non-removable;
557         vmmc-supply = <&reg_3p3v>;
558         vqmmc-supply = <&reg_wlan_vmmc>;
559         cap-power-off-card;
560         keep-power-in-suspend;
561         status = "okay";
562 };
563
564 &usdhc3 {
565         pinctrl-names = "default";
566         pinctrl-0 = <&pinctrl_usdhc3>;
567         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
568         vmmc-supply = <&reg_3p3v>;
569         status = "okay";
570 };