2 * Copyright 2013 Gateworks Corporation
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/sound/fsl-imx-audmux.h>
16 /* these are used by bootloader for disabling nodes */
28 bootargs = "console=ttymxc1,115200";
32 compatible = "pwm-backlight";
33 pwms = <&pwm4 0 5000000>;
34 brightness-levels = <0 4 8 16 32 64 128 255>;
35 default-brightness-level = <7>;
39 compatible = "gpio-leds";
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_gpio_leds>;
45 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
47 linux,default-trigger = "heartbeat";
52 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
53 default-state = "off";
58 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
59 default-state = "off";
64 device_type = "memory";
65 reg = <0x10000000 0x40000000>;
69 compatible = "pps-gpio";
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_pps>;
72 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
77 compatible = "simple-bus";
81 reg_1p0v: regulator@0 {
82 compatible = "regulator-fixed";
84 regulator-name = "1P0V";
85 regulator-min-microvolt = <1000000>;
86 regulator-max-microvolt = <1000000>;
90 reg_3p3v: regulator@1 {
91 compatible = "regulator-fixed";
93 regulator-name = "3P3V";
94 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <3300000>;
99 reg_usb_h1_vbus: regulator@2 {
100 compatible = "regulator-fixed";
102 regulator-name = "usb_h1_vbus";
103 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <5000000>;
108 reg_usb_otg_vbus: regulator@3 {
109 compatible = "regulator-fixed";
111 regulator-name = "usb_otg_vbus";
112 regulator-min-microvolt = <5000000>;
113 regulator-max-microvolt = <5000000>;
114 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
120 compatible = "fsl,imx6q-ventana-sgtl5000",
121 "fsl,imx-audio-sgtl5000";
122 model = "sgtl5000-audio";
123 ssi-controller = <&ssi1>;
124 audio-codec = <&sgtl5000>;
126 "MIC_IN", "Mic Jack",
127 "Mic Jack", "Mic Bias",
128 "Headphone Jack", "HP_OUT";
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
140 fsl,audmux-port = <1>;
142 (IMX_AUDMUX_V2_PTCR_TFSDIR |
143 IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
144 IMX_AUDMUX_V2_PTCR_TCLKDIR |
145 IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
146 IMX_AUDMUX_V2_PTCR_SYN)
147 IMX_AUDMUX_V2_PDCR_RXDSEL(4)
152 fsl,audmux-port = <4>;
154 IMX_AUDMUX_V2_PTCR_SYN
155 IMX_AUDMUX_V2_PDCR_RXDSEL(1)>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_flexcan1>;
166 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
167 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
168 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
169 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
173 cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_ecspi2>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_enet>;
182 phy-mode = "rgmii-id";
183 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
188 pinctrl-names = "default";
189 pinctrl-0 = <&pinctrl_gpmi_nand>;
194 ddc-i2c-bus = <&i2c3>;
199 clock-frequency = <100000>;
200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_i2c1>;
205 compatible = "atmel,24c02";
211 compatible = "atmel,24c02";
217 compatible = "atmel,24c02";
223 compatible = "atmel,24c02";
229 compatible = "nxp,pca9555";
236 compatible = "dallas,ds1672";
242 clock-frequency = <100000>;
243 pinctrl-names = "default";
244 pinctrl-0 = <&pinctrl_i2c2>;
248 compatible = "fsl,pfuze100";
253 regulator-min-microvolt = <300000>;
254 regulator-max-microvolt = <1875000>;
257 regulator-ramp-delay = <6250>;
261 regulator-min-microvolt = <300000>;
262 regulator-max-microvolt = <1875000>;
265 regulator-ramp-delay = <6250>;
269 regulator-min-microvolt = <800000>;
270 regulator-max-microvolt = <3950000>;
276 regulator-min-microvolt = <400000>;
277 regulator-max-microvolt = <1975000>;
283 regulator-min-microvolt = <400000>;
284 regulator-max-microvolt = <1975000>;
290 regulator-min-microvolt = <800000>;
291 regulator-max-microvolt = <3300000>;
295 regulator-min-microvolt = <5000000>;
296 regulator-max-microvolt = <5150000>;
302 regulator-min-microvolt = <1000000>;
303 regulator-max-microvolt = <3000000>;
314 regulator-min-microvolt = <800000>;
315 regulator-max-microvolt = <1550000>;
319 regulator-min-microvolt = <800000>;
320 regulator-max-microvolt = <1550000>;
324 regulator-min-microvolt = <1800000>;
325 regulator-max-microvolt = <3300000>;
329 regulator-min-microvolt = <1800000>;
330 regulator-max-microvolt = <3300000>;
335 regulator-min-microvolt = <1800000>;
336 regulator-max-microvolt = <3300000>;
341 regulator-min-microvolt = <1800000>;
342 regulator-max-microvolt = <3300000>;
350 clock-frequency = <100000>;
351 pinctrl-names = "default";
352 pinctrl-0 = <&pinctrl_i2c3>;
355 sgtl5000: audio-codec@a {
356 compatible = "fsl,sgtl5000";
358 clocks = <&clks IMX6QDL_CLK_CKO>;
359 VDDA-supply = <&sw4_reg>;
360 VDDIO-supply = <®_3p3v>;
363 touchscreen: egalax_ts@4 {
364 compatible = "eeti,egalax_ts";
366 interrupt-parent = <&gpio7>;
368 wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
376 fsl,data-mapping = "spwg";
377 fsl,data-width = <18>;
381 native-mode = <&timing0>;
382 timing0: hsd100pxn1 {
383 clock-frequency = <65000000>;
398 pinctrl-names = "default";
399 pinctrl-0 = <&pinctrl_pcie>;
400 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
405 pinctrl-names = "default";
406 pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
411 pinctrl-names = "default";
412 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
417 pinctrl-names = "default";
418 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
423 pinctrl-names = "default", "state_dio";
424 pinctrl-0 = <&pinctrl_pwm4_backlight>;
425 pinctrl-1 = <&pinctrl_pwm4_dio>;
438 pinctrl-names = "default";
439 pinctrl-0 = <&pinctrl_uart1>;
440 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
445 pinctrl-names = "default";
446 pinctrl-0 = <&pinctrl_uart2>;
451 pinctrl-names = "default";
452 pinctrl-0 = <&pinctrl_uart5>;
457 vbus-supply = <®_usb_otg_vbus>;
458 pinctrl-names = "default";
459 pinctrl-0 = <&pinctrl_usbotg>;
460 disable-over-current;
465 vbus-supply = <®_usb_h1_vbus>;
470 pinctrl-names = "default", "state_100mhz", "state_200mhz";
471 pinctrl-0 = <&pinctrl_usdhc3>;
472 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
473 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
474 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
475 vmmc-supply = <®_3p3v>;
476 no-1-8-v; /* firmware will remove if board revision supports */
485 pinctrl-names = "default";
486 pinctrl-0 = <&pinctrl_wdog>;
487 fsl,ext-reset-output;
492 pinctrl_audmux: audmuxgrp {
494 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
495 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
496 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
497 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
498 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
499 MX6QDL_PAD_EIM_D25__AUD5_RXC 0x130b0
500 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
501 MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x130b0
505 pinctrl_enet: enetgrp {
507 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
508 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
509 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
510 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
511 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
512 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
513 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
514 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
515 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
516 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
517 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
518 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
519 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
520 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
521 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
522 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
526 pinctrl_ecspi2: escpi2grp {
528 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
529 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
530 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
531 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
535 pinctrl_flexcan1: flexcan1grp {
537 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
538 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
539 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
543 pinctrl_gpio_leds: gpioledsgrp {
545 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
546 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
547 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
551 pinctrl_gpmi_nand: gpminandgrp {
553 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
554 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
555 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
556 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
557 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
558 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
559 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
560 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
561 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
562 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
563 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
564 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
565 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
566 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
567 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
571 pinctrl_i2c1: i2c1grp {
573 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
574 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
578 pinctrl_i2c2: i2c2grp {
580 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
581 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
585 pinctrl_i2c3: i2c3grp {
587 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
588 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
592 pinctrl_pcie: pciegrp {
594 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
595 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
599 pinctrl_pps: ppsgrp {
601 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
605 pinctrl_pwm1: pwm1grp {
607 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
611 pinctrl_pwm2: pwm2grp {
613 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
617 pinctrl_pwm3: pwm3grp {
619 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
623 pinctrl_pwm4_backlight: pwm4grpbacklight {
626 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
630 pinctrl_pwm4_dio: pwm4grpdio {
633 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
637 pinctrl_uart1: uart1grp {
639 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
640 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
641 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
645 pinctrl_uart2: uart2grp {
647 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
648 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
652 pinctrl_uart5: uart5grp {
654 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
655 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
659 pinctrl_usbotg: usbotggrp {
661 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
662 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
666 pinctrl_usdhc3: usdhc3grp {
668 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
669 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
670 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
671 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
672 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
673 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
674 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
675 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
679 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
681 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
682 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
683 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
684 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
685 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
686 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
687 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
688 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
692 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
694 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
695 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
696 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
697 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
698 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
699 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
700 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
701 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
705 pinctrl_wdog: wdoggrp {
707 MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0