arch/arm/boot/dts/imx6qdl-apf6dev.dtsi

   1 /*
   2  * Copyright 2015 Armadeus Systems
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of
  12  *     the License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  *     You should have received a copy of the GNU General Public
  20  *     License along with this file; if not, write to the Free
  21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  *     MA 02110-1301 USA
  23  *
  24  * Or, alternatively,
  25  *
  26  *  b) Permission is hereby granted, free of charge, to any person
  27  *     obtaining a copy of this software and associated documentation
  28  *     files (the "Software"), to deal in the Software without
  29  *     restriction, including without limitation the rights to use,
  30  *     copy, modify, merge, publish, distribute, sublicense, and/or
  31  *     sell copies of the Software, and to permit persons to whom the
  32  *     Software is furnished to do so, subject to the following
  33  *     conditions:
  34  *
  35  *     The above copyright notice and this permission notice shall be
  36  *     included in all copies or substantial portions of the Software.
  37  *
  38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45  *     OTHER DEALINGS IN THE SOFTWARE.
  46  */
  47
  48 #include <dt-bindings/gpio/gpio.h>
  49 #include <dt-bindings/input/input.h>
  50 #include <dt-bindings/interrupt-controller/irq.h>
  51
  52 / {
  53         chosen {
  54                 stdout-path = &uart4;
  55         };
  56
  57         disp0 {
  58                 compatible = "fsl,imx-parallel-display";
  59                 interface-pix-fmt = "bgr666";
  60                 pinctrl-names = "default";
  61                 pinctrl-0 = <&pinctrl_ipu1_disp1>;
  62
  63                 display-timings {
  64                         lw700 {
  65                                 clock-frequency = <33000033>;
  66                                 hactive = <800>;
  67                                 vactive = <480>;
  68                                 hback-porch = <96>;
  69                                 hfront-porch = <96>;
  70                                 vback-porch = <20>;
  71                                 vfront-porch = <21>;
  72                                 hsync-len = <64>;
  73                                 vsync-len = <4>;
  74                                 hsync-active = <1>;
  75                                 vsync-active = <1>;
  76                                 de-active = <1>;
  77                                 pixelclk-active = <1>;
  78                         };
  79                 };
  80
  81                 port {
  82                         display_in: endpoint {
  83                                 remote-endpoint = <&ipu1_di0_disp0>;
  84                         };
  85                 };
  86         };
  87
  88         gpio-keys {
  89                 compatible = "gpio-keys";
  90                 pinctrl-names = "default";
  91                 pinctrl-0 = <&pinctrl_gpio_keys>;
  92
  93                 user-button {
  94                         label = "User button";
  95                         gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
  96                         linux,code = <BTN_MISC>;
  97                         wakeup-source;
  98                 };
  99         };
 100
 101         leds {
 102                 compatible = "gpio-leds";
 103                 pinctrl-names = "default";
 104                 pinctrl-0 = <&pinctrl_gpio_leds>;
 105
 106                 user-led {
 107                         label = "User LED";
 108                         gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
 109                         linux,default-trigger = "heartbeat";
 110                         default-state = "on";
 111                 };
 112         };
 113
 114         regulators {
 115                 compatible = "simple-bus";
 116
 117                 reg_3p3v: 3p3v {
 118                         compatible = "regulator-fixed";
 119                         regulator-name = "3P3V";
 120                         regulator-min-microvolt = <3300000>;
 121                         regulator-max-microvolt = <3300000>;
 122                         regulator-always-on;
 123                 };
 124
 125                 reg_usbh1_vbus: usb-h1-vbus {
 126                         compatible = "regulator-fixed";
 127                         regulator-name = "usb_h1_vbus";
 128                         regulator-min-microvolt = <5000000>;
 129                         regulator-max-microvolt = <5000000>;
 130                         regulator-always-on;
 131                 };
 132
 133                 reg_usb_otg_vbus: usb-otg-vbus {
 134                         compatible = "regulator-fixed";
 135                         regulator-name = "usb_otg_vbus";
 136                         regulator-min-microvolt = <5000000>;
 137                         regulator-max-microvolt = <5000000>;
 138                         regulator-always-on;
 139                 };
 140         };
 141
 142         sound {
 143                 compatible = "fsl,imx6-armadeus-sgtl5000",
 144                              "fsl,imx-audio-sgtl5000";
 145                 model = "imx6-armadeus-sgtl5000";
 146                 ssi-controller = <&ssi1>;
 147                 audio-codec = <&codec>;
 148                 audio-routing =
 149                         "MIC_IN", "Mic Jack",
 150                         "Mic Jack", "Mic Bias",
 151                         "Headphone Jack", "HP_OUT";
 152                 mux-int-port = <1>;
 153                 mux-ext-port = <3>;
 154         };
 155
 156         sound-spdif {
 157                 compatible = "fsl,imx-audio-spdif";
 158                 model = "imx-spdif";
 159                 spdif-controller = <&spdif>;
 160                 spdif-out;
 161         };
 162 };
 163
 164 &audmux {
 165         pinctrl-names = "default";
 166         pinctrl-0 = <&pinctrl_audmux>;
 167         status = "okay";
 168 };
 169
 170 &can2 {
 171         pinctrl-names = "default";
 172         pinctrl-0 = <&pinctrl_flexcan2>;
 173         status = "okay";
 174 };
 175
 176 &ecspi1 {
 177         pinctrl-names = "default";
 178         pinctrl-0 = <&pinctrl_ecspi1>;
 179         cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>,
 180                    <&gpio4 10 GPIO_ACTIVE_LOW>,
 181                    <&gpio4 11 GPIO_ACTIVE_LOW>;
 182         status = "okay";
 183 };
 184
 185 &hdmi {
 186         ddc-i2c-bus = <&i2c3>;
 187         status = "okay";
 188 };
 189
 190 &i2c1 {
 191         clock-frequency = <400000>;
 192         pinctrl-names = "default";
 193         pinctrl-0 = <&pinctrl_i2c1>;
 194         status = "okay";
 195
 196         touchscreen@48 {
 197                 compatible = "semtech,sx8654";
 198                 reg = <0x48>;
 199                 pinctrl-names = "default";
 200                 pinctrl-0 = <&pinctrl_touchscreen>;
 201                 interrupt-parent = <&gpio6>;
 202                 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
 203         };
 204 };
 205
 206 &i2c2 {
 207         clock-frequency = <400000>;
 208         pinctrl-names = "default";
 209         pinctrl-0 = <&pinctrl_i2c2>;
 210         status = "okay";
 211
 212         codec: sgtl5000@a {
 213                 compatible = "fsl,sgtl5000";
 214                 reg = <0x0a>;
 215                 clocks = <&clks IMX6QDL_CLK_CKO>;
 216                 VDDA-supply = <&reg_3p3v>;
 217                 VDDIO-supply = <&reg_3p3v>;
 218         };
 219 };
 220
 221 &i2c3 {
 222         clock-frequency = <400000>;
 223         pinctrl-names = "default";
 224         pinctrl-0 = <&pinctrl_i2c3>;
 225         status = "okay";
 226 };
 227
 228 &ipu1_di0_disp0 {
 229         remote-endpoint = <&display_in>;
 230 };
 231
 232 &pcie {
 233         pinctrl-names = "default";
 234         pinctrl-0 = <&pinctrl_pcie>;
 235         reset-gpio = <&gpio6 2 GPIO_ACTIVE_LOW>;
 236         status = "okay";
 237 };
 238
 239 &pwm3 {
 240         pinctrl-names = "default";
 241         pinctrl-0 = <&pinctrl_pwm3>;
 242         status = "okay";
 243 };
 244
 245 /* GPS */
 246 &uart1 {
 247         pinctrl-names = "default";
 248         pinctrl-0 = <&pinctrl_uart1>;
 249         status = "okay";
 250 };
 251
 252 /* GSM */
 253 &uart3 {
 254         pinctrl-names = "default";
 255         pinctrl-0 = <&pinctrl_uart3 &pinctrl_gsm>;
 256         uart-has-rtscts;
 257         status = "okay";
 258 };
 259
 260 /* console */
 261 &uart4 {
 262         pinctrl-names = "default";
 263         pinctrl-0 = <&pinctrl_uart4>;
 264         status = "okay";
 265 };
 266
 267 &usbh1 {
 268         vbus-supply = <&reg_usbh1_vbus>;
 269         phy_type = "utmi";
 270         status = "okay";
 271 };
 272
 273 &usbotg {
 274         pinctrl-names = "default";
 275         pinctrl-0 = <&pinctrl_usbotg>;
 276         vbus-supply = <&reg_usb_otg_vbus>;
 277         dr_mode = "otg";
 278         status = "okay";
 279 };
 280
 281 /* microSD */
 282 &usdhc2 {
 283         pinctrl-names = "default";
 284         pinctrl-0 = <&pinctrl_usdhc2>;
 285         cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
 286         no-1-8-v;
 287         status = "okay";
 288 };
 289
 290 &spdif {
 291         pinctrl-names = "default";
 292         pinctrl-0 = <&pinctrl_spdif>;
 293         status = "okay";
 294 };
 295
 296 &ssi1 {
 297         status = "okay";
 298 };
 299
 300 &iomuxc {
 301         pinctrl-names = "default";
 302         pinctrl-0 = <&pinctrl_gpios>;
 303
 304         apf6dev {
 305                 pinctrl_audmux: audmuxgrp {
 306                         fsl,pins = <
 307                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0
 308                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0
 309                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
 310                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0
 311                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
 312                         >;
 313                 };
 314
 315                 pinctrl_ecspi1: ecspi1grp {
 316                         fsl,pins = <
 317                                 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
 318                                 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
 319                                 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
 320                                 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09  0x1b0b0
 321                                 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11  0x1b0b0
 322                                 MX6QDL_PAD_KEY_COL2__GPIO4_IO10  0x1b0b0
 323                         >;
 324                 };
 325
 326                 pinctrl_flexcan2: flexcan2grp {
 327                         fsl,pins = <
 328                                 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
 329                                 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
 330                         >;
 331                 };
 332
 333                 pinctrl_gpio_keys: gpiokeysgrp {
 334                         fsl,pins = <
 335                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
 336                         >;
 337                 };
 338
 339                 pinctrl_gpio_leds: gpioledsgrp {
 340                         fsl,pins = <
 341                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0
 342                         >;
 343                 };
 344
 345                 pinctrl_gpios: gpiosgrp {
 346                         fsl,pins = <
 347                                 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20         0x100b1
 348                                 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12      0x100b1
 349                                 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13      0x100b1
 350                                 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14      0x100b1
 351                                 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15      0x100b1
 352                                 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16      0x100b1
 353                                 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17      0x100b1
 354                                 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18      0x100b1
 355                                 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21       0x100b1
 356                         >;
 357                 };
 358
 359                 pinctrl_gsm: gsmgrp {
 360                         fsl,pins = <
 361                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x130b0 /* GSM_POKIN */
 362                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x130b0 /* GSM_PWR_EN */
 363                         >;
 364                 };
 365
 366                 pinctrl_i2c1: i2c1grp {
 367                         fsl,pins = <
 368                                 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
 369                                 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
 370                         >;
 371                 };
 372
 373                 pinctrl_i2c2: i2c2grp {
 374                         fsl,pins = <
 375                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
 376                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
 377                         >;
 378                 };
 379
 380                 pinctrl_i2c3: i2c3grp {
 381                         fsl,pins = <
 382                                 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
 383                                 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
 384                         >;
 385                 };
 386
 387                 pinctrl_ipu1_disp1: ipu1disp1grp {
 388                         fsl,pins = <
 389                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK      0x100b1
 390                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15            0x100b1
 391                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02             0x100b1
 392                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03             0x100b1
 393                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00        0x100b1
 394                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01        0x100b1
 395                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02        0x100b1
 396                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03        0x100b1
 397                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04        0x100b1
 398                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05        0x100b1
 399                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06        0x100b1
 400                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07        0x100b1
 401                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08        0x100b1
 402                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09        0x100b1
 403                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10       0x100b1
 404                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11       0x100b1
 405                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12       0x100b1
 406                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13       0x100b1
 407                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14       0x100b1
 408                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15       0x100b1
 409                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16       0x100b1
 410                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17       0x100b1
 411                         >;
 412                 };
 413
 414                 pinctrl_pcie: pciegrp {
 415                         fsl,pins = <
 416                                 MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0
 417                         >;
 418                 };
 419
 420                 pinctrl_pwm3: pwm3grp {
 421                         fsl,pins = <
 422                                 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
 423                         >;
 424                 };
 425
 426                 pinctrl_uart1: uart1grp {
 427                         fsl,pins = <
 428                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b0
 429                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b0
 430                         >;
 431                 };
 432
 433                 pinctrl_uart3: uart3grp {
 434                         fsl,pins = <
 435                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b0
 436                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0
 437                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0
 438                                 MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b0
 439                         >;
 440                 };
 441
 442                 pinctrl_uart4: uart4grp {
 443                         fsl,pins = <
 444                                 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b0
 445                                 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b0
 446                         >;
 447                 };
 448
 449                 pinctrl_usbotg: usbotggrp {
 450                         fsl,pins = <
 451                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1b0b0
 452                         >;
 453                 };
 454
 455                 pinctrl_usdhc2: usdhc2grp {
 456                         fsl,pins = <
 457                                 MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
 458                                 MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
 459                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
 460                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
 461                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
 462                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
 463                         >;
 464                 };
 465
 466                 pinctrl_spdif: spdifgrp {
 467                         fsl,pins = <
 468                                 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
 469                         >;
 470                 };
 471
 472                 pinctrl_touchscreen: touchscreengrp {
 473                         fsl,pins = <
 474                                 MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0
 475                         >;
 476                 };
 477         };
 478 };