arch/arm/boot/dts/imx6q-udoo.dts

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * Author: Fabio Estevam <fabio.estevam@freescale.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  */
  11
  12 /dts-v1/;
  13 #include "imx6q.dtsi"
  14
  15 / {
  16         model = "Udoo i.MX6 Quad Board";
  17         compatible = "udoo,imx6q-udoo", "fsl,imx6q";
  18
  19         chosen {
  20                 stdout-path = &uart2;
  21         };
  22
  23         memory {
  24                 reg = <0x10000000 0x40000000>;
  25         };
  26 };
  27
  28 &fec {
  29         pinctrl-names = "default";
  30         pinctrl-0 = <&pinctrl_enet>;
  31         phy-mode = "rgmii";
  32         status = "okay";
  33 };
  34
  35 &hdmi {
  36         ddc-i2c-bus = <&i2c2>;
  37         status = "okay";
  38 };
  39
  40 &i2c2 {
  41         clock-frequency = <100000>;
  42         pinctrl-names = "default";
  43         pinctrl-0 = <&pinctrl_i2c2>;
  44         status = "okay";
  45 };
  46
  47 &iomuxc {
  48         imx6q-udoo {
  49                 pinctrl_enet: enetgrp {
  50                         fsl,pins = <
  51                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
  52                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
  53                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
  54                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
  55                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
  56                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
  57                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
  58                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
  59                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
  60                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
  61                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
  62                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
  63                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
  64                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
  65                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
  66                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
  67                         >;
  68                 };
  69
  70                 pinctrl_i2c2: i2c2grp {
  71                         fsl,pins = <
  72                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
  73                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
  74                         >;
  75                 };
  76
  77                 pinctrl_uart2: uart2grp {
  78                         fsl,pins = <
  79                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
  80                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
  81                         >;
  82                 };
  83
  84                 pinctrl_usdhc3: usdhc3grp {
  85                         fsl,pins = <
  86                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
  87                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
  88                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
  89                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
  90                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
  91                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
  92                         >;
  93                 };
  94         };
  95 };
  96
  97 &sata {
  98         status = "okay";
  99 };
 100
 101 &uart2 {
 102         pinctrl-names = "default";
 103         pinctrl-0 = <&pinctrl_uart2>;
 104         status = "okay";
 105 };
 106
 107 &usdhc3 {
 108         pinctrl-names = "default";
 109         pinctrl-0 = <&pinctrl_usdhc3>;
 110         non-removable;
 111         status = "okay";
 112 };