Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6q-sbc6x.dts
1 /*
2  * Copyright 2013 Pavel Machek <pavel@denx.de>
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License V2.
6  */
7
8 /dts-v1/;
9 #include "imx6q.dtsi"
10
11 / {
12         model = "MicroSys sbc6x board";
13         compatible = "microsys,sbc6x", "fsl,imx6q";
14
15         memory@10000000 {
16                 device_type = "memory";
17                 reg = <0x10000000 0x80000000>;
18         };
19 };
20
21
22 &fec {
23         pinctrl-names = "default";
24         pinctrl-0 = <&pinctrl_enet>;
25         phy-mode = "rgmii";
26         status = "okay";
27 };
28
29 &iomuxc {
30         imx6q-sbc6x {
31                 pinctrl_enet: enetgrp {
32                         fsl,pins = <
33                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
34                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
35                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
36                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
37                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
38                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
39                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
40                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
41                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
42                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
43                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
44                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
45                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
46                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
47                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
48                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
49                         >;
50                 };
51
52                 pinctrl_uart1: uart1grp {
53                         fsl,pins = <
54                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
55                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
56                         >;
57                 };
58
59                 pinctrl_usbotg: usbotggrp {
60                         fsl,pins = <
61                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
62                         >;
63                 };
64
65                 pinctrl_usdhc3: usdhc3grp {
66                         fsl,pins = <
67                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
68                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
69                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
70                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
71                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
72                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
73                         >;
74                 };
75         };
76 };
77
78 &uart1 {
79         pinctrl-names = "default";
80         pinctrl-0 = <&pinctrl_uart1>;
81         status = "okay";
82 };
83
84 &usbotg {
85         pinctrl-names = "default";
86         pinctrl-0 = <&pinctrl_usbotg>;
87         disable-over-current;
88         status = "okay";
89 };
90
91 &usdhc3 {
92         pinctrl-names = "default";
93         pinctrl-0 = <&pinctrl_usdhc3>;
94         status = "okay";
95 };